A memristor read-write circuit with current-limited protection

Abstract

The present invention relates to the field of memory technology, and specifically to a memristor read-write circuit with current limiting protection. The present invention comprises a memristor and a read-write circuit part connected thereto. The circuit adopts a negative feedback mechanism of a parallel resistor array and an operational amplifier during the writing process to achieve effective current limiting protection for the memristor, prevent breakdown, and ensure accurate storage of data; when erasing, the circuit adjusts the reference voltage without current limiting protection, and restores the state of the memristor by changing the top and bottom electrode voltages; and when reading, by selecting a suitable parallel resistor branch, the accurate acquisition of the voltage signal is ensured, thereby obtaining the conductance value of the memristor. The present invention improves the safety and reliability of the memristor, and achieves more efficient precise writing and reading of the memristor; by limiting the current, the heating of the component under high load is reduced, and the service life is extended; by integrating the current limiting protection into the read-write circuit, the integration of the system is improved.

Description

Technical Field

[0001] The invention relates to the technical field of memory, in particular to a memristor read-write circuit with current limiting protection. Background Art

[0002] With the rapid development of computer technology, the demand for data processing and data storage is increasing in the context of big data and artificial intelligence. Although traditional random access memory (RAM) performs well in data access speed and capacity, it is incapable of meeting the requirements in specific application scenarios, such as large-area storage and long-term data preservation. In order to solve this problem, memristors came into being. Memristors can retain stored data after power failure, have a smaller structure, can store more data in the same physical space, and consume less energy during read and write operations, especially in static state, which greatly reduces energy consumption. At the same time, memristors can also achieve fast read and write operations, improve system responsiveness, and can also be combined with a variety of emerging technologies (such as neural network computing). With the continuous advancement of technology, memristors are expected to play an increasingly important role in the future computing and storage fields.

[0003] There are several mainstream ways to implement the existing memristor read and write circuits, including direct read and write circuits, current-controlled read and write circuits, voltage pulse write circuits, row and column addressing read and write circuits, etc. The direct write circuit changes the resistance state of the memristor by directly applying voltage across the two ends of the memristor. This method is simple in design, but during the writing process, the memristor is easily damaged due to excessive current. The current-controlled read and write circuit changes the state of the memristor resistance by precisely controlling the current, but requires a complex current control mechanism when reading and writing data, which increases the design difficulty and may lead to higher power consumption. The voltage pulse write circuit uses short voltage pulses to write data, which is suitable for fast operations, but the selection of its pulse width and amplitude is very sensitive, which is easy to cause miswriting and unstable performance under different temperature conditions. The row and column addressing read and write circuit selects specific memristors for reading and writing by row and column addressing. It is suitable for large-scale storage, but requires complex decoding logic and may interfere with adjacent units when reading or writing. Summary of the invention

[0004] In view of the above-mentioned problems or shortcomings, the present invention provides a memristor read-write circuit with current limiting protection, which is used for memory to achieve more efficient memristor writing and reading, and has a simple and reliable design, which can effectively achieve the purpose of protecting memristor elements and accurately reading and writing.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0006] A memristor read / write circuit with current limiting protection comprises a memristor, a top electrode read / write circuit and a bottom electrode read / write circuit, wherein the circuit structures of the top electrode read / write circuit and the bottom electrode read / write circuit are completely the same.

[0007] The memristor is composed of a top electrode, a bottom electrode and a dielectric layer at both ends. The top electrode and the bottom electrode of the memristor are respectively connected to the top electrode read-write circuit and the bottom electrode read-write circuit.

[0008] The top electrode read-write circuit consists of a voltage input part DAC, an operational amplifier, a parallel resistor array, a voltage comparator, an ADC and an RS trigger.

[0009] The voltage input part DAC is connected to the positive input terminal of the operational amplifier and one end of a switch S via a resistor R, and the other end of the switch S is grounded.

[0010] The output end of the operational amplifier is connected to one end of the parallel resistor array, the positive input end of the voltage comparator and the ADC, and the negative input end of the operational amplifier is connected to the other end of the parallel resistor array and the top electrode of the memristor.

[0011] The parallel resistor array includes 3+1 branches, of which three branches each have a resistor connected in series with a switch, and the other branch has only one switch. The resistance values ​​of the three branches are the upper and lower limits of the resistance range of the memristor, and the middle resistance value, and correspond to high resistance, medium resistance and low resistance (for example, the resistance range of the memristor is 1K-100K, and the resistance values ​​of the three branches correspond to low resistance 1K, medium resistance 50K and high resistance 100K).

[0012] The voltage comparator includes a comparator and a DAC, wherein the DAC provides a reference voltage; the negative input terminal of the comparator is connected to the DAC, the output terminal is connected to the S terminal of the RS trigger, and the positive input terminal is connected to the output terminal of the operational amplifier, the ADC and one end of the parallel resistor array.

[0013] The output terminal Q of the RS trigger is used as the control port of the switch S, the R terminal is always set to 0, and the S terminal is connected to the output terminal of the voltage comparator.

[0014] The ADC is used to obtain the storage value of the memristor by collecting the voltage at the output end of the operational amplifier during the reading process.

[0015] Furthermore, the overall working process of the above memristor read-write circuit with current limiting protection is as follows:

[0016] When writing (SET), the top electrode read-write circuit: Since current limiting is required when writing, the parallel resistor array selects a resistor branch that matches the low-resistance state of the memristor, closes the branch switch, and the operational amplifier forms a negative feedback state. First, the voltage input signal generated by the DAC enters the positive input terminal of the operational amplifier through the series resistor R. Since the negative input terminal of the operational amplifier forms a negative feedback virtual short, its voltage is the same as the positive input terminal, and the voltage signal is applied to the top electrode of the memristor and the other end of the parallel resistor array.

[0017] At the same time, because it is a write operation, the voltage input signal generated by the bottom electrode read-write circuit: DAC is 0, and the voltage signal transmitted to the bottom electrode of the memristor is 0. Then the top electrode of the memristor is a high voltage, and the bottom electrode is a low voltage, which can change the conductivity value of its dielectric layer, thereby storing the corresponding data.

[0018] As the resistance of the memristor dielectric layer decreases, the current of the top electrode read / write circuit increases, and the voltage of its parallel resistor array changes. After the voltage signal is input into the positive input terminal of the voltage comparator, if it is greater than the reference voltage V provided by the DAC, REF1 , the voltage comparator output is 1, and the RS trigger output will also be 1, causing the switch S to close, that is, the voltage signal generated by the voltage input part DAC is transmitted to the ground, thereby achieving the purpose of protecting the memristor.

[0019] During erasing (RESET), since it is difficult to break down the internal resistance of the memristor when it changes from low to high, the reference voltage in the voltage comparator of the top electrode read-write circuit and the bottom electrode read-write circuit is adjusted to 5V, and the switches containing the resistance branch in the parallel resistor array are all opened, and the switches without the resistance branch are closed. Then, the voltage generated by the DAC of the voltage input part in the top electrode read-write circuit is set to 0V, and the voltage generated by the DAC of the voltage input part in the bottom electrode read-write circuit is set to 5V, then the voltage at both ends of the memristor is exactly opposite to that during writing, which can make the dielectric layer change in the reverse direction, achieving the purpose of erasing data.

[0020] When reading (READ), the bottom electrode read-write circuit maintains the same operation as writing, with the following differences:

[0021] The DAC input voltage of the voltage input part in the top electrode read-write circuit is 0.5V, and current flows in the memristor at this time; assuming that it is unknown whether the memristor is in a low-resistance or high-resistance state at this time, the low-resistance branch of the parallel resistor array in the top electrode read-write circuit is closed first. At this time, if the voltage signal collected by the ADC changes little, the current branch is disconnected and a branch with a larger resistance value is selected to close. When the voltage signal collected by the ADC changes close to the original voltage value, the voltage signal of the voltage input part DAC is subtracted from the current ADC voltage signal to obtain the voltage on the parallel resistor array. The current can be calculated by the resistance value on the closed branch, thereby obtaining the conductivity value stored in the memristor.

[0022] Furthermore, the R terminal of the RS trigger is always 0. When the S terminal input is 0, the output terminal Q terminal is 0; when the S terminal input is 1, the output terminal Q terminal is 1, and the corresponding switch S is closed.

[0023] Furthermore, the reference voltage V provided by the DAC in the voltage comparator REF Adjust according to the erase, read and write conditions, and adjust V during erase REF The voltage is 5V, adjust V when reading REF The voltage is 5V. When writing, adjust V according to the current I that needs to be limited. REF Voltage, specific value: V REF =I×the resistance value of the closed branch in the parallel resistor array+the voltage value of the DAC input of the voltage input part.

[0024] Furthermore, the maximum value of the current I that needs to be limited is the maximum current allowed by the memristor, which is determined by the material of the memristor.

[0025] Furthermore, the resistance value of the resistor R is adjustable, and is used to eliminate the noise of the voltage input of the corresponding voltage input part DAC, and ensure that the input is not short-circuited when the switch S is closed.

[0026] In summary, compared with the prior art, the present invention has the following advantages and effects: (1) The present invention introduces a current limiting protection mechanism in the circuit design, which can effectively prevent the damage of the memristor caused by excessive current, thereby improving the stability and reliability of the system. (2) By limiting the current, the present invention reduces the heat generation of the components under high load and prolongs the service life of the memristor and related components. (3) The present invention ensures that the reading and writing process of the memristor is more stable under different working environments, avoids reading and writing errors caused by current fluctuations, and improves data reliability. (4) By integrating current limiting protection into the read-write circuit, the present invention reduces the need for external protection circuits, simplifies the overall design, and improves the integration of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the structure of the parallel resistor array in the present invention.

[0028] Figure 2 Schematic diagram of the circuit structure of the read-write circuit in the present invention.

[0029] Figure 3 Schematic diagram of the circuit structure of the embodiment. DETAILED DESCRIPTION

[0030] The present invention is further described in detail below in conjunction with the embodiments and drawings.

[0031] A memristor read / write circuit with current limiting protection includes a memristor, a top electrode read / write circuit and a bottom electrode read / write circuit. The circuit structures of the top electrode read / write circuit and the bottom electrode read / write circuit are exactly the same. The circuit structures of the top electrode read / write circuit and the bottom electrode read / write circuit are exactly the same. Figure 2 The overall circuit structure is shown in Figure 3 shown.

[0032] The memristor is composed of electrodes at both ends and a dielectric layer. The top electrode and the bottom electrode of the memristor are respectively connected to the top electrode read-write circuit and the bottom electrode read-write circuit.

[0033] The top electrode read-write circuit consists of a voltage input part DAC1, an operational amplifier 1, a parallel resistor array 1, a voltage comparator 1, an ADC1 and an RS trigger 1.

[0034] The voltage input portion DAC1 is connected to the positive input terminal of the operational amplifier 1 and one end of the switch S1 via a resistor R1 , and the other end of the switch S1 is grounded.

[0035] The output end of the operational amplifier 1 is connected to one end of the parallel resistor array 1, the positive input end of the voltage comparator 1 and ADC1, and the negative input end of the operational amplifier 1 is connected to the other end of the parallel resistor array 1 and the top electrode of the memristor.

[0036] The parallel resistor array includes 3+1 branches, such as Figure 1 As shown, three of the branches are connected in series with a resistor and a switch, and another branch has only one switch. The resistance values ​​of the three branches are the upper limit, lower limit and middle resistance of the memristor resistance range; in this embodiment, the memristor resistance range is 1K-100K, and the resistance values ​​of the three branches correspond to low resistance 1K, medium resistance 50K and high resistance 100K.

[0037] The voltage comparator 1 includes a comparator 1 and a DAC3, wherein the DAC3 provides a reference voltage V REF1 The negative input terminal of comparator 1 is connected to DAC3, the output terminal is connected to the S terminal of RS trigger 1, and the positive input terminal is connected to the output terminal of operational amplifier 1, ADC1 and one end of parallel resistor array 1.

[0038] The output terminal Q of the RS trigger 1 serves as a control port of the switch S1 , the R terminal is always set to 0, and the S terminal is connected to the output terminal of the voltage comparator 1 .

[0039] During the reading process, the ADC1 collects the voltage at the output end of the operational amplifier 1 and calculates and obtains the storage value of the memristor.

[0040] The bottom electrode read-write circuit is composed of a voltage input part DAC2, an operational amplifier 2, a parallel resistor array 2, a voltage comparator 2, an ADC2 and an RS trigger 2.

[0041] The voltage input portion DAC2 is connected to the positive input terminal of the operational amplifier 2 and one end of the switch S2 via a resistor R2, and the other end of the switch S2 is grounded.

[0042] The output end of the operational amplifier 2 is connected to one end of the parallel resistor array 2, the positive input end of the voltage comparator 2 and ADC2, and the negative input end of the operational amplifier 2 is connected to the other end of the parallel resistor array 2 and the bottom electrode of the memristor.

[0043] The voltage comparator 2 includes a comparator 2 and a DAC4. The DAC4 provides a reference voltage V REF2 The negative input terminal of the comparator 2 is connected to the DAC4, the output terminal is connected to the S terminal of the RS trigger 2, and the positive input terminal is connected to the output terminal of the operational amplifier 2, the ADC2 and one end of the parallel resistor array 2.

[0044] The output terminal Q of the RS trigger 2 is used as the control port of the switch S2, the R terminal is always set to 0, and the S terminal is connected to the output terminal of the comparator 2.

[0045] The ADC2 obtains the storage value of the memristor by collecting the voltage at the output end of the operational amplifier 2 during the reading process.

[0046] 1. Specific implementation method of memristor writing (SET):

[0047] Since the resistance of the memristor changes from large to small during writing, when the voltage is too large, it may cause the memristor to break down, that is, current limiting is required during this process. Figure 1 As shown, the parallel resistor array selects a resistor branch that matches the low-resistance state of the memristor (if a high-resistance matching resistor is selected, the voltage on the parallel resistor array may be too large, causing DAC1 to be grounded prematurely), closes the branch switch, and the operational amplifier forms a negative feedback state.

[0048] As attached Figure 3 As shown, the voltage input signal generated by DAC1 first enters the positive input terminal of the operational amplifier through the series resistor R1. Since the negative input terminal of the operational amplifier constitutes negative feedback, in the virtual short state, the voltage is the same as the positive input terminal, and the voltage signal will be applied to the top electrode of the memristor and the lower end of the parallel resistor array. At the same time, since it is a write operation, the voltage input signal generated by DAC2 in the read-write circuit part connected to the bottom electrode is 0, and the voltage signal transmitted to the bottom electrode of the memristor is 0 in the same manner as described above. Then the top electrode of the memristor is a high voltage and the bottom electrode is a low voltage, which can change the conductivity value of its dielectric layer, thereby storing the corresponding data.

[0049] During the process of the resistance decrease of the dielectric layer of the memristor, the current of the read-write circuit part connected to the top electrode increases, and the voltage of the parallel resistor array changes. After the voltage signal at the upper end of the parallel resistor array (the end connected to the output end of the operational amplifier) ​​is input into the positive input end of the voltage comparator, if it is greater than the reference voltage, the output of the voltage comparator is 1, making the output of the RS trigger 1 as well, that is, the voltage signal generated by DAC1 is transmitted to the ground, thereby achieving the purpose of protecting the memristor.

[0050] 2. Specific implementation method of memristor erasure (RESET):

[0051] During erasing (RESET), since the internal resistance of the memristor is difficult to break down when it changes from low to high, current limiting protection is not required. The reference voltage VREF in the voltage comparator is adjusted to 5V (no current limiting), and the branch switches containing resistors in the parallel resistor array are all opened, and the branch switches without resistors are closed. Then, the voltage generated by DAC1 in the read-write circuit connected to the top electrode is set to 0V, and the voltage generated by DAC2 in the read-write circuit connected to the bottom electrode is set to 5V. The voltage across the memristor is exactly opposite to that during writing, which can make the dielectric layer change in the reverse direction and restore it to the state before writing, thereby achieving the purpose of erasing data.

[0052] 3. Specific implementation method of memristor reading (READ):

[0053] The principle of reading (READ) is roughly the same as that of writing. The difference is that the voltage difference required for the electrodes at both ends of the memristor is smaller when reading (if the voltage difference is larger, the conductivity of the dielectric layer will change, that is, writing again), and the input voltage of the DAC1 part of the read-write circuit connected to the top electrode is usually around 0.5V; at this time, there is current flowing in the memristor. When reading, since it is unknown whether the memristor is in a low resistance or high resistance state at this time, it is necessary to close the low resistance branch in the parallel resistor array first; at this time, if the voltage signal collected by ADC1 changes little, it means that the resistance value of the memristor is much larger than the selected resistance, and the voltage change is inaccurate. Therefore, the current resistance branch is disconnected, and a resistance branch with a larger resistance value is selected to close.

[0054] When the voltage signal collected by ADC1 changes and approaches the original voltage value, it means that the resistance value of the selected branch resistor is close to the resistance value of the memristor. At this time, the voltage signal collected by ADC1 is relatively accurate. The voltage on the parallel resistor array can be obtained by subtracting the voltage signal of DAC1 input from the current voltage signal of ADC1. The current can be calculated by the resistance value of the current closed branch, thereby obtaining the conductivity value stored in the memristor.

[0055] It can be seen from the above embodiments that the present invention proposes a memristor read-write circuit with current limiting protection, including a memristor and a read-write circuit part connected thereto. The circuit adopts a negative feedback mechanism of a parallel resistor array and an operational amplifier during the writing (SET) process to achieve effective current limiting protection for the memristor, prevent breakdown, and ensure accurate data storage. When erasing (RESET), the circuit adjusts the reference voltage without current limiting protection, and restores the state of the memristor by changing the top and bottom electrode voltages. When reading (READ), by selecting a suitable parallel resistor branch, the accurate acquisition of the voltage signal is ensured, thereby obtaining the conductance value of the memristor. The overall design improves the safety and reliability of the memristor, making it perform well in data storage applications.

Claims

1. A memristor read-write circuit with current limiting protection, characterized in that: It includes a memristor, a top electrode read-write circuit and a bottom electrode read-write circuit; The memristor is composed of a top electrode, a bottom electrode and a dielectric layer at both ends, and the top electrode and the bottom electrode of the memristor are respectively connected to the top electrode read-write circuit and the bottom electrode read-write circuit; The top electrode read-write circuit consists of a voltage input section DAC, an operational amplifier, a parallel resistor array, a voltage comparator, an ADC, and an RS trigger; The voltage input part DAC is connected to the positive input terminal of the operational amplifier and one end of the switch S via a resistor R, and the other end of the switch S is grounded; The output end of the operational amplifier is connected to one end of the parallel resistor array, the positive input end of the voltage comparator and the ADC, and the negative input end of the operational amplifier is connected to the other end of the parallel resistor array and the top electrode of the memristor; The parallel resistor array comprises 3+1 branches, wherein each of the three branches comprises a resistor and a switch connected in series, and the other branch comprises only one switch; the resistance values ​​of the three branches are respectively the upper limit, the lower limit and the middle resistance value of the resistance variation range of the memristor, and correspond one to one: high resistance corresponds to the upper limit, medium resistance corresponds to the middle resistance value and low resistance corresponds to the lower limit; The voltage comparator includes a comparator and a DAC, wherein the DAC provides a reference voltage; the negative input terminal of the comparator is connected to the DAC, the output terminal is connected to the S terminal of the RS trigger, and the positive input terminal is connected to the output terminal of the operational amplifier, the ADC and one end of the parallel resistor array; The output terminal Q of the RS trigger is used as the control port of the switch S, the R terminal is always set to 0, and the S terminal is connected to the output terminal of the voltage comparator; The ADC is used to calculate and obtain the storage value of the memristor by collecting the voltage at the output end of the operational amplifier during the reading process; The circuit structures of the top electrode read-write circuit and the bottom electrode read-write circuit are exactly the same.

2. The memristor read-write circuit with current limiting protection as claimed in claim 1, characterized in that: The workflow is: When writing, the top electrode read-write circuit: Since current limiting is required during writing, the parallel resistor array selects a resistor branch that matches the low-resistance state of the memristor, closes the branch switch, and the operational amplifier forms a negative feedback state; first, the voltage input signal generated by the DAC enters the positive input terminal of the operational amplifier through the series resistor R; the negative input terminal of the operational amplifier forms a negative feedback virtual short, and its voltage is the same as the positive input terminal. The voltage signal at the negative input terminal of the operational amplifier is applied to the top electrode of the memristor and the other end of the parallel resistor array; At the same time, since it is a write operation, the voltage input signal generated by the bottom electrode read-write circuit: DAC is 0, and the voltage signal transmitted to the bottom electrode of the memristor is 0; then the top electrode of the memristor is a high voltage, and the bottom electrode is a low voltage, which can change the conductivity value of its dielectric layer, thereby storing the corresponding data; As the resistance of the memristor dielectric layer decreases, the current of the top electrode read / write circuit increases, and the voltage of its parallel resistor array changes. After the voltage signal is input to the positive input terminal of the voltage comparator, if it is greater than the reference voltage V provided by the DAC, REF1 , then the voltage comparator output is 1, and the RS trigger output will also be 1, so that the switch S is closed, that is, the voltage signal generated by the voltage input part DAC is transmitted to the ground; When erasing, the reference voltages in the voltage comparators of the top electrode read / write circuit and the bottom electrode read / write circuit are adjusted to 5V, and the switches of the parallel resistor array containing the resistance branches are all opened, and the switches of the non-resistance branches are closed; Then, the voltage generated by the DAC in the voltage input part of the top electrode read-write circuit is set to 0V, and the voltage generated by the DAC in the voltage input part of the bottom electrode read-write circuit is set to 5V. Then, the voltage across the memristor is exactly opposite to that during writing, causing the dielectric layer to change in the reverse direction, thereby achieving the purpose of erasing data. When reading, the bottom electrode read-write circuit maintains the same operation as writing, with the following differences: The DAC input voltage of the voltage input part in the top electrode read-write circuit is 0.5V, and current flows in the memristor at this time; assuming that it is unknown whether the memristor is in a low-resistance or high-resistance state at this time, the low-resistance branch of the parallel resistor array in the top electrode read-write circuit is closed first. At this time, if the voltage signal collected by the ADC changes little, the current branch is disconnected and a branch with a larger resistance value is selected to be closed; When the voltage signal collected by the ADC changes close to the original voltage value, the voltage on the parallel resistor array can be obtained by subtracting the voltage signal of the voltage input part DAC from the current ADC voltage signal. The current can be calculated by calculating the resistance value on the closed branch, thereby obtaining the conductivity value stored in the memristor.

3. The memristor read / write circuit with current limiting protection as claimed in claim 1, characterized in that: The RS trigger has its R terminal always at 0. When the S terminal input is 0, the output terminal Q terminal is 0; when the S terminal input is 1, the output terminal Q terminal is 1, and the corresponding switch S is closed.

4. The memristor read / write circuit with current limiting protection as claimed in claim 1, characterized in that: The voltage comparator DAC provides a reference voltage V REF Adjust according to the erase, read and write conditions, and adjust V during erase REF The voltage is 5V, adjust V when reading REF The voltage is 5V. When writing, adjust V according to the current I that needs to be limited. REF Voltage, specific value: V REF =I×the resistance value of the closed branch in the parallel resistor array+the voltage value of the DAC input of the voltage input part.

5. The memristor read / write circuit with current limiting protection as claimed in claim 1, characterized in that: The maximum current I that needs to be limited is the maximum current allowed by the memristor.

6. The memristor read / write circuit with current limiting protection as claimed in claim 1, characterized in that: The resistance value of the resistor R is adjustable, and is used to eliminate the noise of the voltage input of the corresponding voltage input part DAC, and ensure that the input is not short-circuited when the switch S is closed.

Images