An accurately controllable resistive attenuator structure and a method for manufacturing the same

Abstract

The application relates to a precisely controllable resistance attenuator structure and a preparation method thereof. The attenuator comprises a substrate, a microstrip layer and a resistance layer arranged on the substrate; the substrate is a ceramic substrate; the resistance layer is arranged at the middle position of the front surface of the substrate; the microstrip layer comprises a first microstrip pattern, a second microstrip pattern, a third microstrip pattern and a fourth microstrip pattern arranged on the front surface of the substrate. The resistance layer is arranged at the middle position of the front surface of the substrate; the resistance layer comprises a first resistance pattern, a second resistance pattern, a third resistance pattern and a fourth resistance pattern arranged on the front surface of the substrate. The precisely controllable resistance attenuator structure can precisely control the resistance value of the resistance layer by controlling the thickness of the resistance layer, so that the input / output impedance and the attenuation value can be precisely controlled in limited space, the impedance matching requirement of the attenuator is met, the standing wave ratio of the attenuator is reduced, and the attenuation precision is improved.

Description

Technical Field

[0001] This invention relates to the field of precisely controllable resistive attenuator structure technology, specifically to a precisely controllable resistive attenuator structure and its fabrication method. Background Technology

[0002] In microwave transmitting and receiving systems, there are safety or normal requirements for signal levels. Excessively high levels will cause overload, leading to intolerable nonlinear distortion or even burnout of amplification components, rendering the entire system inoperable. Attenuators can adjust the signal level to the required level. Attenuators play an irreplaceable role in adjusting the gain of microwave transmitting and receiving systems and are widely used in these systems.

[0003] Attenuators can be categorized into active and passive attenuators based on their constituent components. Precisely adjustable resistive attenuators, a type of passive attenuator, are increasingly widely used due to their high reliability, high precision, and high-frequency response. Based on their assembly and usage methods, precisely adjustable resistive attenuators can be further divided into surface-mount attenuators and wire-bonded attenuators. Compared to wire-bonded attenuators, surface-mount attenuators exhibit less high-frequency parasitic effects and have a simpler assembly method, thus broadening their application range. However, as operating frequencies increase, users are placing increasingly higher demands on attenuator performance.

[0004] Therefore, how to meet the impedance matching requirements of attenuators, reduce the standing wave ratio of attenuators, and improve attenuation accuracy has become an urgent problem to be solved in the industry. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide a precisely controllable resistive attenuator structure and its fabrication method.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] In a first aspect of the invention, a precisely tunable resistive attenuator structure is disclosed. The attenuator includes a substrate and a microstrip layer and a resistive layer disposed on the substrate; the substrate is a ceramic substrate.

[0008] The microstrip layer includes a first microstrip pattern, a second microstrip pattern, a third microstrip pattern, a fourth microstrip pattern, and a fifth microstrip pattern disposed on the front side of the substrate; the resistive layer is disposed at the center of the front side of the substrate.

[0009] The resistive layer includes a first resistive pattern, a second resistive pattern, a third resistive pattern, and a fourth resistive pattern disposed on the front side of the substrate.

[0010] The fifth microstrip pattern is located in the center of the front side of the substrate; the first resistor pattern is disposed behind the fifth microstrip pattern, the second resistor pattern and the third resistor pattern are disposed on the left and right sides of the fifth microstrip pattern respectively, and the fourth resistor pattern is disposed in front of the fifth microstrip pattern; the first microstrip pattern is disposed to the left of the second resistor pattern, and the second microstrip pattern is disposed to the right of the third resistor pattern; the third microstrip pattern is disposed behind the first resistor pattern, and the fourth microstrip pattern is disposed in front of the fourth resistor pattern.

[0011] As a further improvement to the above technical solution, the widths of the first microstrip pattern, the second microstrip pattern, the fifth microstrip pattern, the second resistor pattern, and the third resistor pattern are equal, and the sum of their lengths is equal to the length of the substrate.

[0012] As a further improvement to the above technical solution, the widths of the first resistor pattern, the fourth resistor pattern, and the fifth microstrip pattern are equal.

[0013] As a further improvement to the above technical solution, the sum of the widths of the first resistor pattern, the fourth resistor pattern, the third microstrip pattern, the fourth microstrip pattern, and the fifth microstrip pattern is equal to the width of the substrate.

[0014] As a further improvement to the above technical solution, the lengths of the third microstrip pattern and the fourth microstrip pattern are both equal to the length of the substrate.

[0015] As a further improvement to the above technical solution, the substrate is an alumina ceramic substrate with a thickness of 0.38 mm and a purity of 99.6%.

[0016] As a further improvement to the above technical solution, the microstrip layer has a symmetrical structure of input / output ports.

[0017] As a further improvement to the above technical solution, the microstrip layer is a titanium / copper / nickel / gold microstrip layer, wherein the thickness of the titanium layer is 0.2-0.3 μm, the thickness of the copper layer is 3-5 μm, the thickness of the nickel layer is 0.2-0.3 μm, and the thickness of the gold layer is 0.3-0.5 μm.

[0018] As a further improvement to the above technical solution, the resistive layer is made of TaN material, and its thickness can be adjusted according to product requirements. By controlling the thickness of the resistive layer, the resistance value of each resistor in the resistive layer can be precisely controlled so that the input / output impedance meets the requirement of 50±1Ω.

[0019] In a second aspect of the invention, a method for fabricating the aforementioned precisely tunable resistive attenuator structure is disclosed. This method includes the following steps:

[0020] S1. Fabrication of the substrate for the attenuator unit

[0021] A ceramic substrate was selected as the substrate for the attenuator unit, and an electronic cleaning agent was used to clean the ceramic substrate.

[0022] S2. Fabrication of microstrip patterns

[0023] A layer of titanium is sputtered on the front side of a ceramic substrate using a vacuum deposition process, and a corresponding microstrip pattern is fabricated on the front side of the ceramic substrate using a photolithography process.

[0024] S3, Electroplated Thickened Microstrip Pattern

[0025] Copper / nickel / gold is electroplated onto the surface of the titanium layer on the ceramic substrate using an electroplating process to thicken the microstrip pattern;

[0026] S4, First preparation of the resistive layer

[0027] A second and third resistor pattern are fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate, except for the areas where the second and third resistor patterns are located, are removed using a lift-off process, leaving the tantalum nitride (TaN) at the locations of the second and third resistor patterns. The resistor layer in the areas where the second and third resistor patterns are located is then completed.

[0028] S5, Second preparation of the resistive layer

[0029] A first resistor pattern is fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate as a resistor layer using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate, except for the area where the first resistor pattern is located, are removed using a lift-off process, leaving the tantalum nitride (TaN) at the location of the first resistor pattern, thus completing the resistor layer in the area where the first resistor pattern is located.

[0030] S6, Third preparation of the resistive layer

[0031] A fourth resistor pattern is fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate as a resistor layer using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate except for the area where the fourth resistor pattern is located are removed using a lift-off process, leaving the tantalum nitride (TaN) at the location of the fourth resistor pattern, thus completing the resistor layer in the area where the fourth resistor pattern is located.

[0032] S7, Attenuator Unit Cutting

[0033] The attenuator units obtained from steps S1 to S6 are cut using a dicing process to obtain several attenuators, thus completing the attenuator fabrication.

[0034] Compared with the prior art, the advantages of the present invention are:

[0035] This invention proposes a precisely adjustable resistive attenuator structure and its fabrication method. By controlling the thickness of the resistive layer, the resistance value of each resistor in the resistive layer can be precisely controlled, thereby achieving precise control of the input / output impedance and attenuation value in a limited space. This satisfies the impedance matching requirements of the attenuator, reduces the standing wave ratio of the attenuator, and improves the attenuation accuracy. Attached Figure Description

[0036] Figure 1 This is a front view of the precisely adjustable resistive attenuator structure in this invention;

[0037] Figure 2 This is a cross-sectional view of the precisely adjustable resistive attenuator structure in this invention.

[0038] in:

[0039] 1. First microstrip pattern, 2. Second microstrip pattern, 3. Third microstrip pattern, 4. Fourth microstrip pattern, 5. Fifth microstrip pattern, 6. First resistor pattern, 7. Second resistor pattern, 8. Third resistor pattern, 9. Fourth resistor pattern, 10. Substrate. Detailed Implementation

[0040] The present invention will be further described below with reference to the accompanying drawings:

[0041] like Figure 1 and Figure 2 The diagram illustrates a precisely tunable resistive attenuator structure. The attenuator includes a substrate 10, a microstrip layer disposed on the substrate 10, and a resistive layer disposed on the substrate 10. The substrate 10 is a 99.6% alumina ceramic substrate, which provides extremely high thermal stability and electrical insulation, particularly important for high-frequency circuits, effectively reducing parasitic capacitance and signal loss. The microstrip layer is a titanium / copper / nickel / gold (Ti / Cu / Ni / Au) microstrip layer, employing a Ti / Cu / Ni / Au multilayer structure. Titanium serves as the adhesion layer, nickel as the anti-diffusion layer, copper provides the main conductive path, and gold ensures good contact resistance and corrosion resistance. The resistive layer is a tantalum nitride (TaN) resistive layer. Tantalum nitride (TaN) is a high-temperature stable material with good chemical stability, suitable as a precision resistive material. Its resistance value can be adjusted by thickness to meet specific design requirements.

[0042] like Figure 1 and Figure 2 As shown, the microstrip layer includes a first microstrip pattern 1, a second microstrip pattern 2, a third microstrip pattern 3, a fourth microstrip pattern 4, and a fifth microstrip pattern 5 disposed on the front side of the substrate 10; the resistive layer is disposed at the center of the front side of the substrate 10; the resistive layer includes a first resistive pattern 6, a second resistive pattern 7, a third resistive pattern 8, and a fourth resistive pattern 9 disposed on the front side of the substrate 10; the fifth microstrip pattern 5 is located at the center of the front side of the substrate 10; the first resistive pattern 6 is disposed behind the fifth microstrip pattern 5, the second resistive pattern 7 and the third resistive pattern 8 are respectively disposed on the left and right sides of the fifth microstrip pattern 5, and the fourth resistive pattern 9 is disposed in front of the fifth microstrip pattern 5; the first microstrip pattern 1 is disposed to the left of the second resistive pattern 7, and the second microstrip pattern 2 is disposed to the right of the third resistive pattern 8; the third microstrip pattern 3 is disposed behind the first resistive pattern 6, and the fourth microstrip pattern 4 is disposed in front of the fourth resistive pattern 9.

[0043] As a further improvement to the above technical solution, the widths of the first microstrip pattern 1, the second microstrip pattern 2, the fifth microstrip pattern 5, the second resistor pattern 7, and the third resistor pattern 8 are equal, and the sum of their lengths is equal to the length of the substrate 10. The widths of the first resistor pattern 6, the fourth resistor pattern 9, and the fifth microstrip pattern 5 are equal. The sum of the widths of the first resistor pattern 6, the fourth resistor pattern 9, the third microstrip pattern 3, the fourth microstrip pattern 4, and the fifth microstrip pattern 5 is equal to the width of the substrate 10. The lengths of the third microstrip pattern 3 and the fourth microstrip pattern 4 are both equal to the length of the substrate 10. The width, length, and thickness of each component in the microstrip layer and resistor layer are clearly defined. This is not only to meet physical space requirements, but more importantly, to precisely control the electrical performance of the attenuator and ensure that the input / output impedance meets the 50±1Ω standard.

[0044] The microstrip and resistor patterns of the attenuator described in this invention are carefully arranged on the substrate to achieve specific electrical characteristics. For example, the fifth microstrip pattern is located at the center of the substrate, surrounded by four resistor patterns; this arrangement optimizes the signal path and impedance matching. Furthermore, the first, second, and fifth microstrip patterns, as well as the second and third resistor patterns, have equal widths, which helps ensure the symmetry and consistency of the input / output ports. The special arrangement of the microstrip and resistor patterns helps minimize parasitic effects and ensures that the signal path is as short and straight as possible, thereby reducing phase delay and insertion loss. The symmetrical structure not only improves mechanical stability but also enhances electrical symmetry, which is crucial for maintaining balanced signal transmission.

[0045] As a further improvement to the above technical solution, the substrate 10 is an alumina ceramic substrate with a thickness of 0.38 mm and a purity of 99.6%.

[0046] As a further improvement to the above technical solution, the microstrip layer has a symmetrical structure of input / output ports.

[0047] As a further improvement to the above technical solution, the microstrip layer is a titanium / copper / nickel / gold microstrip layer, wherein the thickness of the titanium layer is 0.2-0.3 μm, the thickness of the copper layer is 3-5 μm, the thickness of the nickel layer is 0.2-0.3 μm, and the thickness of the gold layer is 0.3-0.5 μm.

[0048] As a further improvement to the above technical solution, the resistive layer is made of TaN material, and its thickness can be adjusted according to product requirements. By controlling the thickness of the resistive layer, the resistance value of each resistor in the resistive layer can be precisely controlled so that the input / output impedance meets the requirement of 50±1Ω.

[0049] The method for fabricating the above-mentioned precisely tunable resistive attenuator structure includes the following steps:

[0050] S1. Fabrication of the substrate for the attenuator unit

[0051] A ceramic substrate was selected as the base for the attenuator unit, and it was cleaned using an electronic cleaning agent. Specifically, a 99.6% alumina ceramic substrate was chosen as the base material, as this material possesses excellent electrical insulation and thermal stability. The ceramic substrate was deeply cleaned using an electronic cleaning agent to remove surface contaminants and impurities, ensuring the quality of subsequent coating processes.

[0052] S2. Fabrication of microstrip patterns

[0053] A layer of titanium is sputtered onto the front side of a ceramic substrate using a vacuum deposition process, and the corresponding microstrip pattern is then fabricated on the front side of the ceramic substrate using photolithography. Magnetron sputtering, a process within vacuum deposition, is used to deposit a titanium layer on the front side of the ceramic substrate as a base metal to enhance the adhesion between subsequent metal layers and the ceramic substrate. The desired microstrip pattern positions are then defined using photolithography, which involves applying a photosensitive material (photoresist) and then exposing and developing it with a mask.

[0054] S3, Electroplated Thickened Microstrip Pattern

[0055] Copper / nickel / gold is electroplated onto the surface of the titanium layer on a ceramic substrate using an electroplating process to thicken the microstrip pattern. Copper provides the main conductive path, nickel prevents copper from diffusing into other layers, and gold ensures good contact resistance and corrosion resistance.

[0056] S4, First preparation of the resistive layer

[0057] A second and third resistor pattern are fabricated on the front side of a ceramic substrate using photolithography. A layer of tantalum nitride (TaN) is then sputtered onto the front side of the ceramic substrate using vacuum deposition. A lift-off process is then used to remove the photoresist on the front side of the ceramic substrate, as well as the tantalum nitride (TaN) on the surface of the ceramic substrate except for the areas where the second and third resistor patterns are located. The tantalum nitride (TaN) at the locations of the second and third resistor patterns is retained, thus completing the resistor layer in the areas where the second and third resistor patterns are located.

[0058] S5, Second preparation of the resistive layer

[0059] A first resistor pattern is fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate as a resistor layer using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate, except for the area where the first resistor pattern is located, are removed using a lift-off process, leaving the tantalum nitride (TaN) at the location of the first resistor pattern, thus completing the resistor layer in the area where the first resistor pattern is located.

[0060] S6, Third preparation of the resistive layer

[0061] A fourth resistor pattern is fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate as a resistor layer using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate, except for the area where the fourth resistor pattern is located, are removed using a lift-off process, leaving the tantalum nitride (TaN) at the location of the fourth resistor pattern. The resistor layer in the area where the fourth resistor pattern is located is then completed.

[0062] Only one or two specific resistor patterns are fabricated at a time, and the location of the tantalum nitride (TaN) resistive layer is precisely determined using photolithography. A thin film of tantalum nitride is deposited in the selected area using vacuum deposition techniques such as magnetron sputtering, serving as the resistive material. The unwanted photoresist and the corresponding TaN layer are then removed using a lift-off process, leaving only the designed resistor pattern. This process needs to be repeated three times to fabricate the first, second, third, and fourth resistor patterns, respectively.

[0063] S7, Attenuator Unit Cutting

[0064] The attenuator units obtained from steps S1 to S6 are cut using a dicing process to obtain several attenuators, thus completing the attenuator fabrication. A large area of ​​composite material is then divided into individual attenuator units using a precision dicing machine. Each unit contains a complete microstrip line and resistive layer structure.

[0065] The aforementioned fabrication method demonstrates a complete chain from substrate preparation to final product cutting, showcasing high-precision microelectronics manufacturing technology. Each step requires strict control of environmental conditions and technical parameters to ensure that the electrical characteristics and reliability of the final product meet design requirements. In particular, the two critical steps of photolithography and vacuum deposition directly determine the dimensional accuracy and flatness of the device, thus affecting its high-frequency performance. Furthermore, the entire process involves the compatibility and interface quality between multiple different material layers, all of which are key factors in ensuring high product performance.

[0066] The following specific embodiment describes the fabrication process of the precisely controllable resistive attenuator structure of the present invention:

[0067] (1) The ceramic substrate was cleaned using electronic cleaning agents of model DZ-1 and DZ-2 produced by Shandong Great Wall Electronic Cleaning Agent Co., Ltd. This step was to remove impurities from the surface of the substrate.

[0068] (2) A layer of titanium (Ti) is sputtered on the front side of the ceramic substrate using magnetron sputtering, with a thickness of 0.2–0.3 μm. The purpose of this step is to achieve metallization on the front side.

[0069] (3) Using positive photoresist of model RZJ-280 produced by Suzhou Ruihong Electronic Materials Factory, microstrip patterns were photolithographically formed on the titanium (Ti) layer on the front side of the ceramic substrate. The purpose of this step is to create microstrip patterns through photolithography and etching.

[0070] (4) A copper (Cu) / nickel (Ni) / gold (Au) layer is electroplated onto the microstrip pattern using a copper sulfate / nickel sulfamate / gold sulfite plating solution system. The thicknesses of the copper (Cu) / nickel (Ni) / gold (Au) layers are 3–5 μm, 0.2–0.3 μm, and 0.3–0.5 μm, respectively. This step thickens the microstrip pattern by electroplating copper (Cu) / nickel (Ni) / gold (Au) to meet the application requirements.

[0071] (5) Using negative photoresist of model RFJ-210 produced by Suzhou Ruihong Electronic Materials Factory, resistor patterns (region II and region III) are photolithographically formed on the front side of the ceramic substrate. The purpose of this step is to cover the areas outside the resistor patterns (region II and region III) with photoresist.

[0072] (6) A layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate using magnetron sputtering, with the sheet resistance of tantalum nitride (TaN) controlled at 50±1Ω / □. The purpose of this step is to create a resistive layer.

[0073] (7) The photoresist on the front side of the ceramic substrate was stripped using a stripping solution of model RBL-2203 produced by Suzhou Ruihong Electronic Materials Factory. The purpose of this step is to remove the photoresist and the tantalum nitride (TaN) on its surface, leaving the tantalum nitride (TaN) at locations II and III.

[0074] (8) Using negative photoresist of model RFJ-210 produced by Suzhou Ruihong Electronic Materials Factory, a resistor pattern (region I) is photolithographically formed on the front side of the ceramic substrate. The purpose of this step is to cover the area outside the resistor pattern (region I) with photoresist.

[0075] (9) A layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate using magnetron sputtering. The sheet resistance of the tantalum nitride (TaN) is controlled at 100±2Ω / □. The purpose of this step is to create a resistive layer.

[0076] (10) The photoresist on the front side of the ceramic substrate was stripped using a stripping solution of model RBL-2203 produced by Suzhou Ruihong Electronic Materials Factory. The purpose of this step is to remove the photoresist and the tantalum nitride (TaN) on its surface, leaving the tantalum nitride (TaN) at location I.

[0077] (11) Using negative photoresist of model RFJ-210 produced by Suzhou Ruihong Electronic Materials Factory, a resistor pattern (region IV) is photolithographically formed on the front side of the ceramic substrate. The purpose of this step is to cover the area outside the resistor pattern (region IV) with photoresist.

[0078] (12) A layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate using magnetron sputtering. The sheet resistance of the tantalum nitride (TaN) is controlled at 200±4Ω / □. The purpose of this step is to create a resistive layer.

[0079] (13) The photoresist on the front side of the ceramic substrate was stripped using a stripping solution of model RBL-2203 produced by Suzhou Ruihong Electronic Materials Factory. The purpose of this step is to remove the photoresist and the tantalum nitride (TaN) on its surface, leaving the tantalum nitride (TaN) at location IV.

[0080] (14) The attenuator unit is cut using a grinding wheel to form the final attenuator product. The purpose of this step is to separate the attenuator unit.

[0081] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. A precisely adjustable resistive attenuator structure, characterized in that, The attenuator includes a substrate (10) and a microstrip layer and a resistive layer disposed on the substrate (10); The substrate (10) is a ceramic substrate; The microstrip layer includes a first microstrip pattern (1), a second microstrip pattern (2), a third microstrip pattern (3), a fourth microstrip pattern (4), and a fifth microstrip pattern (5) disposed on the front side of the substrate (10). The resistive layer is disposed at the middle position on the front side of the substrate (10); the resistive layer includes a first resistive pattern (6), a second resistive pattern (7), a third resistive pattern (8) and a fourth resistive pattern (9) disposed on the front side of the substrate (10). The fifth microstrip pattern (5) is located in the center of the front side of the substrate (10); the first resistor pattern (6) is disposed on the rear side of the fifth microstrip pattern (5); the second resistor pattern (7) and the third resistor pattern (8) are disposed on the left and right sides of the fifth microstrip pattern (5) respectively; and the fourth resistor pattern (9) is disposed on the front side of the fifth microstrip pattern (5). The first microstrip pattern (1) is located to the left of the second resistor pattern (7), the second microstrip pattern (2) is located to the right of the third resistor pattern (8); the third microstrip pattern (3) is located behind the first resistor pattern (6), and the fourth microstrip pattern (4) is located in front of the fourth resistor pattern (9). The widths of the first microstrip pattern (1), the second microstrip pattern (2), the fifth microstrip pattern (5), the second resistor pattern (7), and the third resistor pattern (8) are equal, and the sum of their lengths is equal to the length of the substrate (10). The sum of the widths of the first resistor pattern (6), the fourth resistor pattern (9), the third microstrip pattern (3), the fourth microstrip pattern (4), and the fifth microstrip pattern (5) is equal to the width of the substrate (10); The resistive layer is made of TaN material, and its thickness can be adjusted according to product requirements. By controlling the thickness of the resistive layer, the resistance value of each resistor in the resistive layer can be precisely controlled so that the input / output impedance meets the requirement of 50±1Ω.

2. The precisely adjustable resistive attenuator structure according to claim 1, characterized in that, The widths of the first resistor pattern (6), the fourth resistor pattern (9), and the fifth microstrip pattern (5) are equal.

3. The precisely adjustable resistive attenuator structure according to claim 1, characterized in that, The lengths of the third microstrip pattern (3) and the fourth microstrip pattern (4) are both equal to the length of the substrate (10).

4. The precisely adjustable resistive attenuator structure according to claim 1, characterized in that, The substrate (10) is an alumina ceramic substrate with a thickness of 0.38 mm and a purity of 99.6%.

5. The precisely adjustable resistive attenuator structure according to claim 1, characterized in that, The microstrip layer has a symmetrical structure with input / output ports.

6. The precisely adjustable resistive attenuator structure according to claim 1, characterized in that, The microstrip layer is a titanium / copper / nickel / gold microstrip layer, wherein the thickness of the titanium layer is 0.2~0.3μm, the thickness of the copper layer is 3~5μm, the thickness of the nickel layer is 0.2~0.3μm, and the thickness of the gold layer is 0.3~0.5μm.

7. A method for fabricating a precisely adjustable resistive attenuator structure according to any one of claims 1 to 6, characterized in that, The method includes the following steps: S1. Fabrication of the substrate for the attenuator unit A ceramic substrate was selected as the substrate for the attenuator unit, and an electronic cleaning agent was used to clean the ceramic substrate. S2. Fabrication of microstrip patterns A layer of titanium is sputtered on the front side of a ceramic substrate using a vacuum deposition process, and a corresponding microstrip pattern is fabricated on the front side of the ceramic substrate using a photolithography process. S3, Electroplated Thickened Microstrip Pattern Copper / nickel / gold is electroplated onto the surface of the titanium layer on the ceramic substrate using an electroplating process to thicken the microstrip pattern; S4, First preparation of the resistive layer A second and third resistor pattern are fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate, except for the areas where the second and third resistor patterns are located, are removed using a lift-off process, leaving the tantalum nitride (TaN) at the locations of the second and third resistor patterns. The resistor layer in the areas where the second and third resistor patterns are located is then completed. S5, Second preparation of the resistive layer A first resistor pattern is fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate as a resistor layer using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate, except for the area where the first resistor pattern is located, are removed using a lift-off process, leaving the tantalum nitride (TaN) at the location of the first resistor pattern, thus completing the resistor layer in the area where the first resistor pattern is located. S6, Third preparation of the resistive layer A fourth resistor pattern is fabricated on the front side of a ceramic substrate using photolithography, and a layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate as a resistor layer using vacuum deposition. The photoresist on the front side of the ceramic substrate and the tantalum nitride (TaN) on the surface of the ceramic substrate except for the area where the fourth resistor pattern is located are removed using a lift-off process, leaving the tantalum nitride (TaN) at the location of the fourth resistor pattern, thus completing the resistor layer in the area where the fourth resistor pattern is located. S7, Attenuator Unit Cutting The attenuator units obtained from steps S1 to S6 are cut using a dicing process to obtain several attenuators, thus completing the attenuator fabrication.

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