Communication system
By introducing an analog interface signal processing module into the communication system and performing digital predistortion processing, the contradiction between signal linearity and system efficiency in the prior art is solved, and higher RF amplifier performance and lower cost are achieved.
Patent Information
- Application Number
- CN202510274572.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-06-25
- Filing Date
- 2025-03-10
- Publication Date
- 2025-04-08
- Estimated Expiration
- 2045-03-10
AI Technical Summary
While existing communication systems improve transmission power, efficiency and bandwidth, it is difficult to maintain the linearity of signals, resulting in reduced system efficiency and increased cost.
The analog interface signal processing module is adopted to perform digital predistortion processing on the signal between the baseband module and the RF front-end module through the signal processing device to improve the linearity of the RF signal.
On the premise of ensuring signal quality, the power, efficiency and bandwidth of the RF amplifier are improved, equipment costs are reduced, and the adaptability and performance of the system are enhanced.
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Figure CN119788100A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of communications, and in particular to a communication system. Background Art
[0002] The development of communication systems has always been limited by the material and process level of components, facing the contradiction between transmission bandwidth, transmission power, signal linearity and system efficiency. Increasing the transmission power may cause signal distortion or poor linearity, while pursuing linear signal without distortion may reduce system efficiency and increase heat dissipation burden.
[0003] Figures 1 to 3 This is a schematic diagram of the transmitting part of an existing communication system. A general communication system includes two parts: transmitting and receiving, and each part may have multiple channels working simultaneously or non-simultaneously.
[0004] RF power amplifiers (RF PAs or PAs) are used to amplify small RF signals to increase the transmission distance. Due to material limitations, the design of RF PAs requires trade-offs among important indicators such as output power, linearity, efficiency, and output bandwidth.
[0005] In order to reduce or eliminate nonlinear problems such as those caused by power amplifiers, current RF enhancement technologies are mainly concentrated in digital intermediate frequency positions or baseband chips. However, this solution has a high threshold for use and a fixed system structure, which limits the application of RF enhancement functions in the terminal field and is only used in a small range of high-power base station equipment.
[0006] like Figure 1 and Figure 2 The system in the embodiment requires FPGA to support the implementation of digital signal processing functions in the baseband to achieve the purpose of optimizing RF performance, such as reducing or eliminating the nonlinear effects caused by power amplifiers. In both schemes, the digital signal processing modules are located in the baseband chip / module and are usually implemented using FPGA. However, FPGA has a large area and high production cost, so the system performance and cost will be affected by the performance of FPGA and RF chip. The system shown in Figure 3 requires the FPGA in the baseband chip / module and the digital signal processing unit 310 in the highly integrated RF chip / module 300 to work together to achieve the purpose of optimizing RF performance. The digital signal processing unit 310 in the highly integrated RF module 300 has limited performance and poor adaptability and can only be used in limited application scenarios. The highly integrated RF module 300 needs to cooperate with the FPGA and needs to be connected using a high-speed digital interface. The high cost of this interface will increase the overall product cost. Summary of the invention
[0007] In response to the technical problems existing in the prior art, the present application proposes a communication system, comprising: a baseband module, a radio frequency module, and a radio frequency front-end module; and an analog interface signal processing module coupled between the baseband module and the radio frequency module; the analog interface signal processing module is configured to at least receive a first analog signal from the baseband module; wherein the analog interface signal processing module includes a signal processing device, and the signal processing device is configured to perform a digital predistortion operation based on at least the first analog signal, thereby obtaining a second analog signal with digital predistortion information.
[0008] In particular, in the system, the analog interface signal processing module also includes a feedback channel, which is configured to receive a RF feedback signal from the RF front-end module, convert the RF feedback signal into a third analog signal and provide it to the signal processing device.
[0009] In particular, the system, wherein the signal processing device includes: a first switch, configured to receive the first analog signal; a first analog-to-digital converter, coupled to the first switch, configured to convert the first analog signal into a first digital signal; a core processor, coupled to the first analog-to-digital converter, configured to process the first digital signal and output a second digital signal with at least digital predistortion information; a digital-to-analog converter, coupled to the core processor, configured to convert the second digital signal into a second analog signal; and a second switch, coupled to the digital-to-analog converter, configured to output the second analog signal.
[0010] In particular, in the system, the signal processing device also includes a second analog-to-digital converter coupled to the core processor, configured to receive the third analog signal and provide it to the core processor.
[0011] In particular, in the system, the signal processing device obtains a second digital signal with digital predistortion information based on the first analog signal and the third analog signal.
[0012] In particular, in the system, the analog interface signal processing module is also configured to receive multiple baseband analog signals and radio frequency feedback signals.
[0013] In particular, the system, wherein the feedback channel includes a feedback selection switch, coupled to the RF front-end module, configured to select and output multiple RF feedback signals; a down-conversion subunit, coupled between the feedback selection switch and the signal processing device, configured to down-convert the RF feedback signal and provide the third analog signal generated after the conversion to the signal processing device; a high-frequency clock subunit, coupled to the down-conversion subunit, configured to generate the local oscillator signal required by the down-conversion subunit.
[0014] In particular, in the system, the RF front-end module includes a power amplifier unit and a coupler coupled to the power amplifier unit, and the coupler is configured to provide the RF signal output by the power amplifier to the RF module.
[0015] In particular, the system, wherein the system is a WiFi router, wherein the analog interface signal processing module further comprises a plurality of transmit / receive switching switches configured to select whether to pass through the signal processing device in the analog interface signal processing device in the transmit or receive mode.
[0016] In particular, the system, wherein the system is a base station, further comprises an intermediate frequency processing module coupled between the baseband module and the analog interface signal processing module.
[0017] In particular, as described in any of the above communication systems, the communication system is a drone, a mobile phone, a walkie-talkie, a car, a satellite, or a wireless camera.
[0018] The solution proposed in this application can reduce or eliminate the nonlinear problem of the signal generated by the power amplifier. Under the premise of the same signal quality, the power, efficiency and bandwidth that the power amplifier can achieve are further improved, and the cost of the equipment is reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Below, the preferred embodiments of the present application will be further described in detail with reference to the accompanying drawings, wherein: Figures 1 to 3 It is a schematic diagram of the transmitting part of the existing communication system; Figure 4 FIG. 1 is a schematic diagram of some modules of a communication system according to an embodiment of the present application. Figure 5 Shown is a module schematic diagram of an analog interface signal processing module according to an embodiment of the present application; Figure 6 Shown is a module schematic diagram of a signal processing device according to an embodiment of the present application; Figure 7 Shown is a module schematic diagram of an existing base station; Figure 8Shown is a module schematic diagram of another existing base station; Fig. 9 Shown is a module schematic diagram of a base station according to an embodiment of the present application; Fig.10 Shown is a schematic diagram of some modules of an existing WiFi router; Fig.11 Shown is a partial module schematic diagram of a WiFi router according to an embodiment of the present application; Fig.12 Shown is a partial module schematic diagram of a WiFi router according to another embodiment of the present application. DETAILED DESCRIPTION
[0020] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0021] In the following detailed description, reference may be made to the various specification drawings that are part of the present application and are used to illustrate specific embodiments of the present application. In the accompanying drawings, similar reference numerals describe substantially similar components in different figures. The various specific embodiments of the present application are described below in sufficient detail so that a person of ordinary skill in the art with relevant knowledge and skills in the art can implement the technical solutions of the present application. It should be understood that other embodiments may also be used or structural, logical or electrical changes may be made to the embodiments of the present application.
[0022] The technologies, methods and devices known to those skilled in the art may not be discussed in detail, but where appropriate, the technologies, methods and devices shall be considered as part of the specification. The lines between the units in the drawings are only for the convenience of explanation, indicating that at least the units at both ends of the lines are communicating with each other, and are not intended to limit the unconnected units from being unable to communicate. In addition, the number of lines between two units is intended to indicate at least the number of signals involved in the communication between the two units or at least the output terminals, and is not intended to limit the two units to only be able to communicate with each other through the signals shown in the figure.
[0023] The current plan is through Figure 1 or Figure 2 The digital signal processing unit 120 or 220 or Figure 3The digital signal processing unit 310 in the compensation of the digital signal attempts to solve problems such as signal linearity. In addition, it is necessary to match peripheral devices such as ADC and DAC and corresponding clock circuits, which makes the system design face challenges in terms of interface and electrical characteristics matching, and will also further increase the cost, area and power consumption of the system. In addition, the signal processing algorithm is not targeted and cannot process the signal according to the usage scenario and signal quality. At present, there are some applications or devices that do not have such digital signal processing modules, such as WiFi routers. Or, based on cost considerations, for some equipment manufacturers such as base station manufacturers, the current expectation or trend is to provide base station equipment that does not include a digital processing module or only provides a digital processing module including basic functions. This situation causes the communication system to either reduce the efficiency of the power amplifier or exchange high costs for signal linearity performance. But more expectations are to achieve the improvement of linearity while achieving optimal efficiency at a lower cost and a better design solution.
[0024] The existing technology directly converts the baseband signal to generate a signal of the corresponding frequency, and then outputs it through the RF front-end module. The RF front-end module mainly completes the functions of sending and amplifying RF signals. The modulation devices and power amplifier devices included in it are analog semiconductor devices, and their performance is restricted by the physical properties of semiconductors. While ensuring low EVM / ACR, the signal transmission power and system transmission efficiency must be output as high as possible. The up-conversion module and the RF front-end module must have extremely high linearity, which greatly increases the requirements for hardware design.
[0025] The communication system proposed in the present application utilizes an analog interface signal processing module with pre-distortion processing capability to pre-compensate the RF signal, so that the RF signal has good linearity, improves the performance of the communication system, and greatly increases the adaptability of the high-performance pre-distortion method in the RF system, reducing the development complexity and application cost of the high-performance pre-distortion method.
[0026] Figure 4 The figure shows a schematic diagram of some modules of a communication system according to an embodiment of the present application. The system may include a baseband module 41, a radio frequency module 43 supporting multiple frequency bands, and a radio frequency front end 44 supporting multiple frequency bands. The radio frequency module 43 and the radio frequency front end module 44 may be integrated or discrete.
[0027] According to one embodiment, the RF front-end module 44 may include a power amplifier unit 441, which is coupled to the RF module 43 and configured to send RF signals outward. The RF front-end module 44 may also include a coupler coupled to the power amplifier 441. The coupler is configured to receive the RF signal output by the power amplifier and feed it back to the analog interface signal processing module 42.
[0028] According to one embodiment, an analog interface signal processing module 42 may also be coupled between the baseband module 41 and the RF module 43, and is configured to receive a baseband analog signal from the baseband module 41, perform digital mirror correction, digital predistortion processing, peak clipping processing and other operations on the baseband analog signal, and output a baseband analog transmission signal with predistortion information.
[0029] According to an embodiment, the analog interface signal processing module 42 can also track the output signal of the power amplifier unit in real time, thereby adjusting the baseband analog transmission signal with digital predistortion information. The RF feedback signal can be a RF signal with nonlinear information output by the power amplifier unit.
[0030] Figure 5 The module schematic diagram of the analog interface signal processing module according to one embodiment of the present application is shown. The analog interface signal processing module proposed in the present application can be used as an independent module, located between the baseband module and the radio frequency module that communicate using analog signals and are separate from each other. The signal-to-noise ratio of the module is relatively high, the cost is relatively low, and it is suitable for application scenarios with high requirements for background noise and phase noise.
[0031] According to one embodiment, as shown in the figure, the analog interface signal processing module 50 may include a signal processing device 510 .
[0032] According to one embodiment, the analog interface signal processing module 50 is configured to receive multiple baseband analog signals and RF feedback signals, and use the signal processing device 510 to process the baseband analog signals and RF feedback signals to generate and output a baseband analog transmission signal with digital predistortion information.
[0033] According to an embodiment, the digital pre-distortion function in the signal processing device 510 needs to use the feedback signal to monitor the correction state in real time, which requires obtaining the radio frequency feedback signal carrying nonlinear information.
[0034] According to one embodiment, the analog interface signal processing module 50 may also include a feedback channel, which may include a feedback selection switch 520, which may be coupled to a coupler in the RF front-end module, and whose state may be in the state of obtaining a feedback RF signal. A down-conversion subunit 530, coupled to the feedback selection switch 520 and a high-frequency clock subunit 540, may be configured to receive a RF feedback signal from the feedback selection switch 520; the high-frequency clock subunit 540 may be configured to generate a local oscillator signal and provide it to the down-conversion subunit 530. The frequency of the local oscillator signal provided by the high-frequency clock subunit 540 is greater than or equal to the frequency of the RF signal. The down-conversion subunit 530 may also be coupled to the signal processing device 510. The down-converted RF feedback signal may be provided to the signal processing device 510 for iterative optimization.
[0035] According to one embodiment, the analog interface signal processing module 50 may further include a control unit (not shown) configured to control the switching of the feedback module and control various parts in the analog interface signal processing module.
[0036] According to one embodiment, the analog interface signal processing module 50 supports multiple RF feedback signals to multiplex one feedback channel. The feedback selection switch 520 selects the multiple RF feedback signals.
[0037] According to one embodiment, the analog-to-digital conversion inlet and the digital-to-analog conversion outlet in the signal processing device 510 can be single-ended, differential, orthogonal IQ or non-orthogonal. The inlet of the down-conversion subunit 530 can be differential or single-ended input, and the inlet frequency can also be any frequency, as long as the high-frequency modulated signal at the inlet is reduced to a range that can be sampled by the signal processing device 510.
[0038] The analog interface signal processing module proposed in this application is independent of the baseband module and the RF module, eliminates the constraints and limitations brought by FPGA, has higher processing performance and higher adaptability, and users can obtain better linearity without changing the original architecture.
[0039] Figure 6 The module diagram of the signal processing device according to one embodiment of the present application is shown. In the present application, "analog" refers to a relatively low-frequency signal whose center frequency is near zero frequency; "radio frequency" refers to a relatively high-frequency signal whose center frequency is outside zero frequency, such as 900MHz.
[0040] As shown in the figure, the signal processing device 60 may include: a switch 630, an analog-to-digital converter 640 coupled thereto, the output end of the analog-to-digital converter 640 coupled to the input end of the core processor 650, the output end of the core processor 650 coupled to the input end of the digital-to-analog converter 640', the output end of the digital-to-analog converter 640' coupled to the switch 630', and the main control 610 coupled or electrically connected to all other units.
[0041] According to one embodiment, one output terminal of the switch 630 ′ is configured to provide a processed high-speed analog signal to the outside of the signal processing device 60 .
[0042] According to an embodiment, the switch 630 ′ may be coupled with the switch 630 to form a transceiver mode common to the analog interface.
[0043] According to one embodiment, the switch 630 and the switch 630 ′ may include high efficiency and high linearity switches.
[0044] According to other embodiments, in non-WiFi application scenarios, the signal processing device 60 may not include the switch 630 and the switch 630 ′.
[0045] According to one embodiment, the main control 610 can be electrically connected to all other units and configure the initialization parameters and startup processes of other units, communicate with external MCU and other control modules, exchange commands and data, and monitor the working status of the signal processing device 60 to perform abnormal recovery processing.
[0046] According to one embodiment, the switch 630 can be used as an intermediary for signal exchange between the signal processing device 60 and the external signal processing device 60, and can support two working modes: mode A: switching channels according to the instructions of the main control 610; mode B: switching channels according to the instructions of the external pin. By adapting the control signal to switch the uplink and downlink circuits, the uplink and downlink signal selection in the time division duplex (TDD) scenario can be supported, and it can also be always set to the TX or RX interval to be used as a dedicated processing channel for the corresponding channel.
[0047] According to one embodiment, the signal processing device 60 may include an uplink and downlink circuit / channel. When the signal processing device 60 is in a receiving mode (RX), the switch 630 and the switch 630' in the signal processing device are switched to an uplink mode to receive and transmit, for example, an analog signal from a radio frequency module. When the signal processing device 60 is in a transmitting mode (TX), the switches 630 and 630' in the signal processing device are switched to a downlink mode, and the downlink circuit / channel includes a switch 630, an analog-to-digital converter 640, a core processor 650, a digital-to-analog converter 640', and a switch 630'.
[0048] According to one embodiment, the analog-to-digital converter 640 or the digital-to-analog converter 640' can respectively adopt a high-precision and high-sampling rate ADC or DAC module, and can support conventional analog signal formats such as I_P / I_N / Q_P / Q_N; or I / Q single-ended; or single-channel. The analog-to-digital converter 640 is configured to convert the corresponding analog signal into a digital signal. The digital-to-analog converter 640' is configured to convert the digital signal processed by the core processor 650 into an analog signal.
[0049] According to one embodiment, in the analog-to-digital converter 640, the analog bandwidth of the ADC needs to be greater than the signal bandwidth, and its sampling rate is greater than twice the signal bandwidth. For high-speed communication systems such as WiFi and base stations, the sampling rate of the ADC generally needs to be above 160MHz. The accuracy of the ADC determines the upper limit of the signal-to-noise ratio SNR, which may vary depending on the system indicator requirements. In addition, the sampling rate and resolution indicators need to be balanced with the system requirements. For example, when the present application solution is applied to WiFi6, the sampling rate of the ADC can be 640MHz, with a resolution of 12Bit, and the analog bandwidth needs to be above 250MHz.
[0050] According to one embodiment, the requirements for the DAC resolution in the digital-to-analog converter 640' are similar to the requirements for the ADC resolution in the analog-to-digital converter 640. For example, when the present application is applied to WiFi6, the sampling rate of the DAC in the digital-to-analog converter 640' is at least 640MHz, the resolution is 12Bit, and the DAC analog bandwidth is above 250MHz.
[0051] According to one embodiment, the signal processing device 60 may further include an analog-to-digital converter 640", which may also include a high-precision and high-sampling rate ADC, whose input end is configured to receive a frequency-converted RF feedback signal, and whose output end is coupled to the input end of the core processor 650, thereby forming a feedback observation channel, which can collect observation point data of the target and observe external data in real time, so that the signal processing device 60 calculates the corresponding parameters. The feedback observation channel can greatly improve the tracking performance of the system, so that the signal processing device 60 can handle external scenarios such as rapid temperature drop, temperature rise, impedance change, and power amplifier aging.
[0052] According to an embodiment, the core processor 650 may have functions such as image correction (QEC), digital pre-distortion (PD), clipping processing (CFR), digital filtering (FIR), signal rate conversion (Resample), and direct current offset correction (DC-Offset EQ).
[0053] According to an embodiment, the CFR functional structure in the core processor 650 may be configured to perform clipping and peak suppression operations on the input signal, wherein the input signal may be a digital signal from the analog-to-digital converter 640 .
[0054] Clipping and Peak Reduction (CFR) technology is a method used to reduce signal peaks to improve power amplifier (PA) efficiency and reduce signal distortion. By monitoring the amplitude of the input signal, the peak part exceeding the set threshold is detected; the peak part exceeding the threshold is clipped to limit its amplitude to the set maximum value; filtering or other technologies are used to restore the signal quality and reduce the negative impact of clipping.
[0055] According to an embodiment, the EQ function structure in the core processor 50 is mainly used to compensate for the frequency response-related distortion and interference introduced in the channel, thereby restoring the original signal. The purpose of the equalization filter is to reverse the influence of the channel on the signal.
[0056] According to one embodiment, the image correction (QEC) function in the core processor 650 compensates for the IQ image problem caused by the inconsistency of the IQ signal link. The IQ image existing in the zero-IF signal bandwidth will have a great impact on the EVM performance of the entire system, and the image correction can reduce it to below the system EVM index.
[0057] According to one embodiment, the pre-distortion function structure in the core processor 650 is a function implemented in the digital domain, and its function is to introduce distortion opposite to the nonlinear characteristics of the power amplifier. After the output signal of the signal processing device after PD processing passes through the power amplifier, it can just balance the distortion generated by the power amplifier, so that the signal output by the RF front-end module can be restored to linearity.
[0058] According to an embodiment, the FIR functional structure in the core processor 650 can provide LPF filtering with a transition band <10Mhz suppression degree> 40dbc, which is more than 10 times better than the traditional analog LPF.
[0059] Figure 7 The figure shows a module schematic diagram of an existing base station. As can be seen from the figure, the FPGA processing unit 722 is responsible for processing the digital signal generated by the base station. The base station shown in the figure includes a baseband module 71, an intermediate frequency processing module 72, a radio frequency module 73 and a radio frequency front-end module 74. The intermediate frequency processing module 72 includes an FPGA processing unit 722 with signal processing capabilities. Since this solution needs to realize functions such as digital pre-distortion of the digital signal output by the baseband module 71, it has high requirements on the resources and performance of the FPGA processing unit 722, thereby greatly increasing the system cost, system power consumption and design cost.
[0060] Figure 8 The module schematic diagram of another existing base station is shown. The base station shown in the figure includes a baseband module 81, an intermediate frequency processing module 82, a highly integrated radio frequency module 83 and a radio frequency front-end module 84. The highly integrated radio frequency module 83 includes a digital signal processing unit 831, an up-conversion unit 832, and a down-conversion unit 833. As can be seen from the figure, the FPGA processing unit 822 and the digital signal processing unit 831 in the highly integrated radio frequency module 83 are jointly responsible for processing the digital signal generated by the base station. However, a high-speed digital interface must be used between the intermediate frequency processing module 82 and the highly integrated radio frequency module 83, and the cost of this interface is very high. In addition, the signal processing capability of the highly integrated radio frequency module cannot be guaranteed.
[0061] Fig. 9The figure shows a module schematic diagram of a base station according to an embodiment of the present application. This embodiment solves the problem of base station performance without changing the architecture of the existing base station. The base station shown in the figure includes a baseband module 91, an intermediate frequency processing module 92 coupled to the baseband module 91, a radio frequency module 94, and a radio frequency front-end module 95 coupled to the radio frequency module 94. Among them, the analog interface signal processing module 93 is coupled between the intermediate frequency processing module 92 and the radio frequency module 94, and is configured to receive the baseband analog signal output by the intermediate frequency processing module 92. The analog interface signal processing module 93 includes the aforementioned signal processing device configured to process the signal output by the intermediate frequency processing module 92, such as pre-distortion processing, etc. The radio frequency module includes up and down conversion subunits.
[0062] According to one embodiment, the intermediate frequency processing module 92 is configured to receive the baseband digital signal from the baseband module 91 and convert it into a baseband analog signal.
[0063] According to one embodiment, the power amplifier units 9510 to 951n in the RF front-end module 95 are configured to receive RF transmission signals. The RF front-end module 95 also includes couplers 9520 to 952n coupled to the output ends of the power amplifier units 9510 to 951n, configured to receive the output signals of the power amplifier units 9510 to 951n.
[0064] According to one embodiment, the analog interface signal processing module 93 is configured to receive the baseband analog signal from the intermediate frequency processing module 92 and the RF feedback signal with nonlinear information output from the couplers 9520 to 952n in the RF front-end module 95, and output the RF transmission signal with predistortion information after performing predistortion processing, for example. The analog interface signal processing module 93 in this embodiment can also be the signal processing device 60 mentioned above in this application, with the addition of a feedback selection switch, and the original Figure 7 The down-conversion structure of the RF module 73 is used to realize the analog interface signal processing module. The input and output interfaces of the analog interface signal processing module can be orthogonal (IQ) differential or single-ended interfaces.
[0065] According to one embodiment, the RF front-end module 95 may also feed back the RF signal it outputs to the down-conversion structure in the RF module, and then feed back to the analog interface signal processing module for iteration and optimization.
[0066] Fig.10 The figure shows a schematic diagram of some modules of an existing WiFi router. The WiFi router shown in the figure includes a baseband module 101, a radio frequency module 102 and a radio frequency front-end module 103. The signals in each channel are at the same frequency.
[0067] The power amplifiers used in current WiFi routers focus on linearity and output bandwidth but give up efficiency and output power. As a result, in high modulation scenarios (1024QAM and 4096QAM), the output power cannot meet the requirements, resulting in insufficient coverage area at high throughput and excessive heat generation. Currently, WiFi chip solution providers provide some signal processing and power amplifier linearization functions. However, these functions are currently integrated into the baseband module and have limited performance, which cannot meet the purpose of increasing output power to significantly increase coverage area at high throughput.
[0068] Fig.11 FIG. 1 is a schematic diagram of some modules of a WiFi router according to an embodiment of the present application. As can be seen from the figure, an analog interface signal processing module 112 is coupled between a baseband module 111 and a radio frequency module 113 . A radio frequency front-end module 114 is coupled to the radio frequency module 113 .
[0069] According to one embodiment, the analog interface signal processing module 112 inputs an output end thereof with analog signals (ie, low-frequency signals), which may be quadrature (IQ) differential or single-ended interfaces.
[0070] According to one embodiment, the transmit-receive switching switches 11210 to 1121n and the transmit-receive switching switches 11250 to 1125n in the analog interface signal processing module 112 can be used to select whether to pass through other modules in the analog interface signal processing module 1120 in the transmit or receive mode. For example, in the receiving scenario (uplink mode), the transmit-receive switch 11250 directly outputs the output of the RF module to the transmit-receive switching switch 11210; in the transmitting scenario (downlink mode), the transmit-receive switching switch 11210 provides the output signal of the baseband module to the signal processing device for processing, and then outputs it through the transmit-receive switch 11250.
[0071] According to one embodiment, the signal processing device 1122 in the analog interface signal processing module 112 (which may have the functions and structures described in the aforementioned embodiments) can provide a digital pre-distortion (DPD) processing function for the power amplifier, as well as a frequency response equalizer (EQ), peak-to-average ratio reduction technology (CFR), orthogonal imbalance calibration (QE), local oscillator leakage calibration (LOL), filter, power statistics and other functions.
[0072] According to one embodiment, the signal processing device 1122 may support a single channel or multiple channels. According to one embodiment, the system supports N channels, where N is an integer greater than or equal to 1. The frequencies of signals in different channels may be different.
[0073] According to one embodiment, if real-time tracking of RF performance is required, couplers 11430 to 1143n or power dividers need to be added to the output end of the power amplifier unit in the RF front-end module 114, and the output ports of the couplers 11430 to 1143n are coupled to the feedback selection switch 1123 in the analog interface signal processing module 112 for selecting the feedback channel that the analog interface signal processing module currently needs to observe.
[0074] According to one embodiment, the output of the feedback selection switch 1123 is connected to the down-conversion subunit 1127 to transfer the RF feedback signal to the baseband and provide it to the signal processing device 1122 for real-time observation of the RF transmission signal, calculation and real-time adjustment of the baseband analog transmission signal of the analog interface signal processing module.
[0075] According to one embodiment, the down-conversion subunit 1127 requires the high-frequency clock subunit 1126 to provide a local oscillator signal for down-conversion. The high-frequency clock subunit 1126 needs to be synchronized with the reference clock of the RF module 113. The low noise amplifiers 11420 to 1142n of the RF front-end module 114 are electrically connected to the receiving port of the RF module 113.
[0076] According to one embodiment, if there are multiple high-frequency clock subunits in the system, multiple clocks need to be selected by a clock switching switch before they can be given to the down-conversion subunit 1127 as local oscillator inputs. The selection of the clock switching switch is related to the RF feedback signal to be monitored. The feedback channel may also include a clock switching switch coupled to the multiple high-frequency clock subunits and coupled to the down-conversion subunit 1127. The clock switching switch is configured to select the local oscillator signals generated by the multiple high-frequency clock subunits based on the RF feedback signal to be observed, and select the same high-frequency clock source as the transmission link currently required to be monitored.
[0077] Fig.12 The figure shows a partial module schematic diagram of a WiFi router according to another embodiment of the present application. As can be seen from the figure, an analog interface signal processing module 122 is coupled between the baseband module 121 and the radio frequency module 123. The radio frequency module 123 is coupled to the radio frequency front-end module 124. The radio frequency front-end module 124 includes power amplifier units 12410 to 1241n, and couplers 12420 to 1242n coupled to the power amplifier units 12410 to 1241n, and the outputs of the couplers 12420 to 1242n are used for calibration.
[0078] According to one embodiment, the signal processing device 1225 in the analog interface signal processing module 122 (which may have the functions and structures described in the above embodiments) may provide functions such as digital pre-distortion (DPD) processing, etc. According to one embodiment, the signal processing device 1225 may support single channel or multiple channels.
[0079] According to one embodiment, the transmit-receive switching switches 12210 to 1221n and the transmit-receive switching switches 12250 to 1225n in the analog interface signal processing module 122 may be used to select whether to pass through other modules in the analog interface signal processing module 120 in the transmit or receive mode.
[0080] If there is no need to track the quality of the RF signal output by the power amplifier in real time, you can use Fig.12 The architecture shown. At this time, the output of the power amplifier will be used for factory coefficient calibration and the coefficients will be recorded in the non-volatile memory. Each time the power is turned on, the relevant links and modules including the coupler, power regulation, feedback selection switch, down-conversion of the feedback channel, high-frequency clock subunit, etc. are fed back. However, it is necessary to train in advance and record the coefficients in the non-volatile memory for the signal processing device 1225 to call each time it is powered on.
[0081] The analog interface signal processing module proposed in this application can be directly applied between the baseband and the RF module without changing the original Wifi router or base station framework to compensate the RF signal, so that the RF signal output by the power amplifier has good linearity, improves the performance of the communication system, and reduces the requirements for the physical properties of devices such as the power amplifier.
[0082] The above embodiments are only used to illustrate the present invention, but not to limit the present invention. Ordinary technicians in the relevant technical field can make various changes and modifications without departing from the scope of the present invention. Therefore, all equivalent technical solutions should also fall within the scope of the present invention.
Claims
1. A communication system, comprising: A baseband module, a radio frequency module, and a radio frequency front-end module; and an analog interface signal processing module coupled between the baseband module and the radio frequency module; the analog interface signal processing module is configured to at least receive a first analog signal from the baseband module; in, The analog interface signal processing module includes a signal processing device, and the signal processing device is configured to perform a digital pre-distortion operation based on at least the first analog signal, thereby obtaining a second analog signal with digital pre-distortion information.
2. The system according to claim 1, wherein: The analog interface signal processing module also includes a feedback channel, which is configured to receive a radio frequency feedback signal from the radio frequency front-end module, convert the radio frequency feedback signal into a third analog signal, and provide the third analog signal to the signal processing device.
3. The system according to claim 2, wherein: The signal processing device comprises: a first switch configured to receive the first analog signal; a first analog-to-digital converter, coupled to the first switch, configured to convert the first analog signal into a first digital signal; A core processor, coupled to the first analog-to-digital converter, configured to process the first digital signal and output a second digital signal with at least digital predistortion information; a digital-to-analog converter, coupled to the core processor, configured to convert the second digital signal into a second analog signal; The second switch is coupled to the digital-to-analog converter and configured to output the second analog signal.
4. The system according to claim 3, wherein: The signal processing device further includes a second analog-to-digital converter coupled to the core processor and configured to receive the third analog signal and provide the third analog signal to the core processor.
5. The system according to claim 4, wherein: The signal processing device obtains a second digital signal with digital predistortion information based on the first analog signal and the third analog signal.
6. The system according to claim 5, wherein: The analog interface signal processing module is also configured to receive multiple baseband analog signals and radio frequency feedback signals.
7. The system according to claim 6, wherein: The feedback channel includes: A feedback selection switch, coupled to the RF front-end module, configured to select and output multiple RF feedback signals; a down-conversion subunit, coupled between the feedback selection switch and the signal processing device, configured to perform a down-conversion operation on the RF feedback signal, and provide a third analog signal generated after the frequency conversion to the signal processing device; The high frequency clock subunit is coupled to the down conversion subunit and is configured to generate a local oscillator signal required by the down conversion subunit.
8. The system according to claim 7, wherein: The RF front-end module includes a power amplifier unit and a coupler coupled to the power amplifier unit, and the coupler is configured to provide the RF signal output by the power amplifier to the RF module.
9. The system according to claim 8, wherein: The system is a WiFi router, wherein the analog interface signal processing module further comprises a plurality of transmit / receive switching switches configured to select whether to pass through the signal processing device in the analog interface signal processing device in a transmit or receive mode.
10. The system according to claim 8, wherein: The system is a base station, and the base station further comprises an intermediate frequency processing module coupled between the baseband module and the analog interface signal processing module.
11. The communication system according to any one of claims 1-10, wherein the communication system is a drone, a mobile phone, a walkie-talkie, a car, a satellite, or a wireless camera.
Citation Information
Patent Citations
Adaptive pre-distortion
CN101473530A
Digital-predistortion power-magnifying method and device
CN101645860A
Digital predistortion linear broadband radio-frequency power amplifier device
CN101741317A
Radio frequency power amplifying device and analog predistortion correction method thereof
CN101807886A
Digital analog predistortion processing apparatus, signal transmission system and signal transmission method
CN102204200A
Cited By
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WO2026001643A1