Multi-groove diamond field effect transistor structure and preparation method thereof

Abstract

The invention relates to the technical field of semiconductor devices, and discloses a multi-groove diamond field effect transistor structure and a preparation method thereof.The multi-groove diamond field effect transistor structure comprises a diamond substrate, and a terminal surface is located on the surface of the diamond substrate and is formed by connecting the side faces and the bottom faces of a plurality of grooves and the top face of a fin-type mesa; the P + diamond layers are located at the two ends of the surface of the diamond terminal respectively, the source electrode is located on the P + diamond layer on one side of the surface of the terminal, the drain electrode is located on the P + diamond layer at the other end opposite to the source electrode on the surface of the terminal, the gate dielectric covers the surface of the terminal between the source electrode and the drain electrode, and the gate electrode is located on the gate dielectric. The gate electrode is arranged between the source electrode and the drain electrode, so that the density of surface two-dimensional hole gas is increased under the same horizontal lateral size, the current density of the diamond transistor is improved, the on-resistance of the diamond transistor is reduced, and the gate control capability of the gate electrode on a two-dimensional hole gas channel is also improved; and off-state current and power consumption of the diamond transistor are reduced.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor devices, in particular to a multi-groove diamond field effect transistor structure and a preparation method thereof. Background Art

[0002] In recent years, with the rapid development of microelectronics and integrated technology, diamond ultra-wide bandgap semiconductor materials have attracted attention from all walks of life. Although the processing technology of diamond is not as mature and perfect as that of silicon, it has excellent physical properties such as high carrier mobility, high breakdown electric field, and extremely high thermal conductivity, so it has a wide range of application prospects in power devices and power electronic devices.

[0003] Intrinsic diamond is not conductive. By doping with different elements, it can achieve n-type and p-type conductivity. Currently, the carrier activation rate of n-type doping is low, and the main application is p-type diamond after terminal surface treatment. Currently, almost all diamond field effect transistors (FETs) are based on p-type diamond materials.

[0004] By properly modifying the diamond surface and utilizing the principle of diamond surface transfer doping or spontaneous polarization, a two-dimensional hole gas (2DHG) can be formed on its surface, which becomes the surface channel of the device. Surface modification methods include hydrogen termination, oxygen termination and silicon termination treatment, but diamond field effect transistors with different termination treatments have problems such as high interface state density, low hole mobility and poor stability, which limit their further application as high-frequency and high-power devices. At the same time, for devices suitable for high-frequency and high-power, seeking highly stable and low-resistance ohmic contact materials is one of the key technologies. P-type diamond usually seeks ohmic contact materials with high work function and high negative charge to form a lower potential barrier. Commonly used materials include Au, Ti / Au or Ti / Pt / Au, among which the technology of single-layer Au is the most mature, and the obtained ohmic contact resistance and stability are considerable, but still not enough for practical applications. In short, the current density of diamond field effect transistors is still relatively low and the on-resistance is high.

[0005] To this end, we propose a multi-groove diamond field effect transistor structure and a preparation method thereof. The present invention increases the density of the two-dimensional hole gas on the surface at the same horizontal lateral size by adding multiple grooves to the surface of the diamond terminal, thereby improving the current density of the diamond transistor and reducing the on-resistance of the diamond transistor; in addition, the fin-type structure formed by the dense grooves also improves the gate control ability of the gate electrode to the two-dimensional hole gas channel, reducing the off-state current and power consumption of the diamond transistor. Summary of the invention

[0006] In order to make up for the deficiencies of the prior art, the present invention provides the following technical solutions: a multi-groove diamond field effect transistor structure, comprising a diamond substrate, a terminal surface located on the surface of the diamond substrate, and formed by connecting the side surfaces, bottom surfaces and top surfaces of fin-shaped terraces of a plurality of grooves, wherein a two-dimensional hole gas (2DHG) is formed;

[0007] P+ diamond layer, located at both ends of the terminal surface;

[0008] A source electrode, located on the P+ diamond layer at one end of the terminal surface;

[0009] A drain electrode is located on the P+ diamond layer at the other end of the terminal surface opposite to the source electrode;

[0010] A gate dielectric is located on the hydrogen terminal surface between the source electrode and the drain electrode and covers the bottom and side surfaces of the terminal surface trench;

[0011] The gate electrode is located on the gate dielectric and between the source electrode and the drain electrode, and is partially deposited at the bottom of the groove. The shapes of the grooves are not limited to those shown in the figure, including any one of a rectangle, a "V" shape and an inverted trapezoid. The depth of the grooves is 50-200nm.

[0012] Preferably, the diamond substrate is single crystal or polycrystalline diamond.

[0013] Preferably, the termination surface is hydrogen terminated or silicon terminated.

[0014] Preferably, the source electrode is made of Au, or Ti / Pt / Au and or Ti / Au, with a thickness of 50-200 nm.

[0015] Preferably, the material of the drain electrode is Au, or Ti / Pt / Au and or Ti / Au, and the thickness is 50-200 nm.

[0016] Preferably, the gate dielectric material is any one or more of MoO3, Al2O3, HfO2, WO3, ZrO2, BN or SiNx, with a thickness of 3-50 nm.

[0017] Preferably, the material of the gate electrode includes Al, and the thickness is 50-200 nm.

[0018] Preferably, the thickness of the P+ diamond layer is 50-200 nm, the doping impurity is B, and the doping concentration is 1×10 18 -1x10 21 cm -3 .

[0019] A method for preparing a multi-groove diamond field effect transistor structure specifically comprises the following steps:

[0020] Step 1: Substrate selection: Select a diamond substrate;

[0021] Step 2: Groove etching: Etching a groove on the surface of the diamond substrate with an etching depth of 50-200nm;

[0022] Step 3: Terminal surface treatment: pre-treating the diamond substrate, and then performing hydrogen termination or silicon termination treatment to form a terminal surface with two-dimensional vacancy gas;

[0023] Step 4: Growth of P+ diamond layer: Using MPCVD to grow a P+ diamond layer;

[0024] Step 5: Device isolation: Surface treatment is performed on some areas of the sample to transform the surface into a highly insulating surface, forming an isolation area between devices;

[0025] Step 6: Preparation of source electrode and drain electrode: depositing source electrode and drain electrode metal on the P+ diamond layer to form source electrode and drain electrode;

[0026] Step 7: Gate dielectric deposition: depositing dielectric material on the sample surface to form a gate dielectric;

[0027] Step 8: Gate electrode growth: Deposit gate metal between the source electrode and the drain electrode to form a gate electrode.

[0028] Beneficial Effects

[0029] Compared with the prior art, the present invention provides a multi-groove diamond field effect transistor structure and a preparation method thereof, which has the following beneficial effects:

[0030] 1. A multi-groove diamond field effect transistor structure and a preparation method thereof, by increasing grooves on the terminal surface, increases the density of two-dimensional hole gas on the surface at the same horizontal lateral size, thereby increasing the current density of the diamond transistor and reducing the on-resistance of the diamond transistor.

[0031] 2. This multi-groove diamond field effect transistor structure and its preparation method, the fin-type structure formed by dense grooves, improves the gate control ability of the gate electrode to the two-dimensional hole gas channel, and reduces the off-state current and power consumption of the diamond transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of the structure of a multi-trench diamond field effect transistor provided in Example 1 of the present invention;

[0033] Figure 2 A flow chart of a method for preparing a multi-trench diamond field effect transistor provided in Example 2 of the present invention.

[0034] In the figure: 1. Diamond substrate; 2. Terminal surface; 3. P+ diamond layer; 4. Source electrode; 5. Drain electrode; 6. Gate dielectric; 7. Gate electrode. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] Example 1

[0037] A multi-trench diamond field effect transistor structure of this embodiment is as follows Figure 1 As shown, it specifically includes a diamond substrate 1, a terminal surface 2 after surface modification is located on the surface of the diamond substrate 1, and is formed by connecting the side surfaces, bottom surfaces and top surfaces of a plurality of grooves of the fin-shaped table, wherein there is a two-dimensional hole gas (2DHG); a P+ diamond layer 3 treated with a terminal is respectively located at both ends of the terminal surface 2; a source electrode 4 is located on the P+ diamond layer 3 at one end of the terminal surface 2, a drain electrode 5 is located on the P+ diamond layer 3 at the other end of the terminal surface 2 opposite to the source electrode 4, a gate dielectric 6 is located on the hydrogen terminal surface 2 between the source electrode 4 and the drain electrode 5, and covers the bottom and side surfaces of the groove of the terminal surface 2, and a gate electrode 7 is located on the gate dielectric 6 and between the source electrode 4 and the drain electrode 5, and is partially deposited at the bottom of the groove.

[0038] Illustratively, the depth of the trench is 50-200 nm.

[0039] Preferably, the depth of the plurality of grooves is 80 nm.

[0040] Preferably, the shapes of the plurality of grooves are rectangular.

[0041] Preferably, the diamond substrate 1 is made of single crystal diamond grown by high temperature and high pressure method (HPHT), and has a smooth surface without chipped corners.

[0042] Preferably, the treatment method of the terminal surface 2 is hydrogen termination treatment to form surface CH bonds to form two-dimensional hole gas (2DHG).

[0043] Preferably, the P+ diamond layer 3 is selectively grown by MPCVD and has a thickness of 100 nm. It is slightly etched before growth and has good contact with the terminal surface 2 .

[0044] Preferably, the source electrode 4 and the drain electrode 5 are made of metal Au evaporated by electron beam, with a thickness of 100 nm.

[0045] Preferably, the gate electrode 7 is made of metal Al evaporated by electron beam, with a thickness of 100 nm.

[0046] Preferably, the gate dielectric 6 material is aluminum oxide (Al2O3) prepared by an atomic layer deposition (ALD) method, which serves as both the gate dielectric 6 and the passivation layer to help repair the interface state.

[0047] Example 2

[0048] The process of preparing a multi-groove diamond field effect transistor of this embodiment is as follows: Figure 2 As shown, the specific implementation steps are as follows:

[0049] Step 1: Substrate selection: selecting a single crystal diamond substrate 1 prepared by high temperature and high pressure method (HPHT);

[0050] Step 2: Groove etching: After forming a groove shape on the surface of the diamond substrate 1 by steps such as coating, pre-baking, exposure, post-baking and development, the metal material Au is formed as a masking layer by electron beam evaporation with a thickness of 50-150nm, and the groove is formed by ICP etching with an etching depth of 100nm. Finally, the Au masking layer is removed by wet etching using a mixed solution of potassium iodide (KI) and iodine (I2).

[0051] Step 3: terminal surface 2 treatment, pretreatment of the diamond substrate 1, including screening, pickling and cleaning with acetone, anhydrous ethanol and deionized water, and then placing the sample in a MPCVD chamber in a hydrogen plasma atmosphere for 15 min, with a H2 flow rate of 600 sccm, a power of 2 kW, and a chamber temperature of 900°C, and then taking it out after cooling to room temperature in the hydrogen plasma atmosphere;

[0052] Step 4: P+ diamond layer processing, using photolithography pattern transfer, electron beam evaporation equipment and wet etching to cover the terminal surface 2 except the source electrode 4 and the drain electrode 5 with Au, with a thickness of 50-150nm, and using MPCVD to form a P+ diamond layer 3 with a thickness of 160nm. Finally, wet etching is used to remove the Au covering the terminal surface 2.

[0053] Step 5: Active area photolithography: Au metal is evaporated on the surface of the sample after the P+ diamond layer 3 is processed by using an electron evaporation device with a thickness of 120nm, and then an active area masking pattern is formed through the steps of coating, pre-baking, exposure, post-baking and development;

[0054] Step 6: Device isolation, put the sample in the previous step into a KI / I2 mixed solution to remove the Au covering the active area, and then put it into the UVOzone reaction chamber and treat it in an oxygen plasma atmosphere with an O2 flow rate of 30sccm, a current of 80mA, and a voltage of 550V for 10min to modify the hydrogen terminal into a high-resistance oxygen terminal and achieve isolation between the active areas around the terminal surface 2;

[0055] Step 7: Gate window formation, the sample is coated with glue, pre-baked, exposed, post-baked and developed, and other photolithography steps form a gate window pattern, and the sample is cleaned with a KI / I2 mixed solution, and the Au left under the photoresist forms an ohmic contact between the source electrode 4 and the drain electrode 5, exposing the terminal surface 2 between them to form a gate window, and the spacing between the source electrode 4 and the drain electrode 5 is greater than the gate length to avoid short circuit between the gate electrode 7 and the source electrode 4 or the gate electrode 7 and the drain electrode 5;

[0056] Step 8: Deposition of gate dielectric 6: using ALD equipment to deposit an aluminum oxide (Al2O3) gate dielectric 6 layer at 120°C, which also serves as a surface passivation layer, covering the terminal surface 2 and the bottom and side surfaces of the groove, with a thickness of 20nm;

[0057] Step 9: Gate electrode growth, coating, pre-baking, exposure, post-baking and development to form a gate metal pattern. The gate metal window after development should be smaller than the spacing between the source and drain. Then, electron beam evaporation is used to evaporate a single layer of Al metal with a thickness of 120nm. After a lift-off process, a gate metal electrode is formed.

[0058] Example 3

[0059] A multi-groove diamond field effect transistor structure of the present embodiment specifically includes a diamond substrate 1, a terminal surface 2 after surface modification is located on the surface of the diamond substrate 1, and is formed by connecting the bottom and side surfaces of a plurality of grooves, wherein there is a two-dimensional hole gas (2DHG), a P+ diamond layer 3 treated with a terminal is respectively located at both ends of the terminal surface 2, a source electrode 4 is located on the P+ diamond layer 3 at one end of the terminal surface 2, a drain electrode 5 is located on the P+ diamond layer 3 at the other end of the terminal surface 2 opposite to the source electrode 4, a gate dielectric 6 is located on the hydrogen terminal surface 2 between the source electrode 4 and the drain electrode 5, and covers the bottom and side surfaces of the groove of the terminal surface 2, and a gate electrode 7 is located on the gate dielectric 6 and between the source electrode 4 and the drain electrode 5, and is partially deposited at the bottom of the groove.

[0060] The difference from the second embodiment is that the groove depth of the terminal surface 2 of the present embodiment is 50 nm and the shape is an inverted trapezoid.

[0061] The difference from the second embodiment is that the terminal surface 2 of the present embodiment uses a silicon terminal.

[0062] Specifically, in this embodiment, after the diamond substrate 1 is hydrogen terminated, the sample is placed in an ultra-high vacuum system equipped with a Si sublimation source. First, the sample is heated at 450°C for 45 minutes to remove adsorbents on the surface of the hydrogen-terminated diamond. When the sample temperature returns to room temperature, the Si sublimation source is electrically heated to achieve molecular beam deposition of Si on the diamond surface. The current is 50A and the deposition rate is The thickness of the deposited Si element is 0.5nm, equivalent to 1.85ML. After the deposition, the sample is subjected to in-situ vacuum annealing at 920℃ for 12min. Through this treatment, the C-H structure on the surface of the entire diamond sample can be transformed into a C-Si structure. C-Si diamond has a lower interface state density, higher threshold voltage, and higher hole mobility than C-H diamond. After the sample is taken out and the surface Si is oxidized, it becomes a C-Si-O / SiO2 structure.

[0063] The difference from the second embodiment is that the gate dielectric 6 of the present embodiment is a layer of MoO3 with a thickness of 20 nm deposited by thermal evaporation.

[0064] The difference from the second embodiment is that the metal of the source electrode 4 and the drain electrode 5 in this embodiment is Ti / Pt / Au, and the thickness is 150 nm.

[0065] The difference from the second embodiment is that the gate metal in this embodiment is 80nm Al.

[0066] Example 4

[0067] A multi-groove diamond field effect transistor structure of the present embodiment specifically includes a diamond substrate 1, a terminal surface 2 after surface modification is located on the surface of the diamond substrate 1, and is formed by connecting the bottom and side surfaces of a plurality of grooves, wherein there is a two-dimensional hole gas (2DHG), a P+ diamond layer 3 treated with a terminal is respectively located at both ends of the terminal surface 2, a source electrode 4 is located on the P+ diamond layer 3 at one end of the terminal surface 2, a drain electrode 5 is located on the P+ diamond layer 3 at the other end of the terminal surface 2 opposite to the source electrode 4, a gate dielectric 6 is located on the hydrogen terminal surface 2 between the source electrode 4 and the drain electrode 5, and covers the bottom and side surfaces of the groove of the terminal surface 2, and a gate electrode 7 is located on the gate dielectric 6 and between the source electrode 4 and the drain electrode 5, and is partially deposited at the bottom of the groove.

[0068] The method for preparing a multi-trench diamond field effect transistor of this embodiment is specifically implemented according to the following steps:

[0069] Step 1: selecting a substrate, selecting a single crystal diamond substrate 1 prepared by a high temperature and high pressure (HPHT) method;

[0070] Step 2: Groove etching: After forming a groove shape on the surface of the diamond substrate 1 by steps such as coating, pre-baking, exposure, post-baking and development, an electron beam evaporation is performed to form a metal Au material masking layer with a thickness of 20 nm. ICP etching is performed to form a groove with an etching depth of 150 nm and an inverted trapezoidal shape. Finally, a mixed solution of potassium iodide (KI) and iodine (I2) is used to wet etch and remove Au;

[0071] Step 3: Treatment of the terminal surface 2: pretreatment of the diamond substrate 1, including screening, pickling, and cleaning with acetone, anhydrous ethanol, and deionized water, placing the diamond substrate 1 in a hydrogen plasma in an MPCVD reaction chamber, introducing H2 at a flow rate of 700 sccm into the reaction chamber, setting the pressure to 100 mbar, and stopping for 15 minutes at a temperature of 875° C. and a microwave power of 2 kW to generate a hydrogen terminal surface 2 on the diamond substrate 1;

[0072] Step 4: P+ diamond layer treatment, including:

[0073] 4.1. Use electron beam evaporation technology to deposit a layer of Ti / Au (30 / 100nm thick) metal as a mask for the selective growth of the P+ diamond layer. Use ICP to etch the diamond area outside the Ti / Au mask, with the etching gas being O2 and the etching depth being 50nm, in order to make the subsequently grown P+ diamond layer and the channel part have better contact characteristics;

[0074] 4.2. Place the sample in a quartz tube MPCVD device for selective growth of a P+ diamond layer. The thickness of the P+ diamond layer is 100nm. Subsequently, the Ti / Au mask is removed by wet etching, leaving a clean diamond surface;

[0075] Step 5: Active area photolithography: Ti / Au metal is deposited on the surface of the sample after the P+ diamond layer is treated using an electron beam evaporation device with a thickness of 130nm, and then an active area masking pattern is formed through steps such as coating, pre-baking, exposure, post-baking and development;

[0076] Step 6: Device isolation, put the sample in the previous step into a KI / I2 mixed solution, remove the Au covering outside the active area, and place the etched sample in ICP O plasma for etching, and stop for 2 minutes to convert the exposed hydrogen terminal surface 2 into a fluorine terminal surface 2. Then soak the sample in acetone for 5 minutes, and then use ultrasound for 1 minute to remove the residual photoresist on the sample surface;

[0077] Step 7: Gate window formation, the sample is coated with glue, pre-baked, exposed, post-baked and developed, and other photolithography steps form the gate window pattern, and the sample is placed in a KI / I2 mixed solution for wet etching, and the gold left under the photoresist forms the source and drain electrodes to form the gate window, and then annealed in a H2 atmosphere at 500°C for 30 minutes to form a TiC metal compound at the Ti / diamond interface to form an ohmic contact. The terminal surface 2 between them is exposed to form a gate window;

[0078] Step 8: Deposition of gate dielectric 6: At 200°C, using Hf source (TDMAH) and H2O as precursors, an ALD device is used to deposit a 30nm thick HfO2 layer on the terminal surface 2, which also serves as a surface passivation layer, covering the terminal surface 2 and the bottom and side surfaces of the grooves;

[0079] Step 9: Gate electrode growth, coating, pre-baking, exposure, post-baking and development to form a gate metal pattern. The gate metal window after development should be smaller than the spacing between the source and drain. Then, electron beam evaporation is used to evaporate a single layer of Al metal with a thickness of 200nm. After a lift-off process, a gate metal electrode is formed.

[0080] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0081] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

[0082] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A multi-groove diamond field effect transistor structure, comprising a diamond substrate (1), characterized in that: The terminal surface (2) is located on the surface of the diamond substrate (1) and is formed by connecting the side surfaces, bottom surfaces and top surfaces of the fin-shaped terraces of a plurality of grooves, wherein a two-dimensional hole gas (2DHG) is formed; P+ diamond layers (3) are respectively located at two ends of the terminal surface (2); A source electrode (4) is located on the P+ diamond layer (3) at one end of the terminal surface (2); A drain electrode (5) is located on the P+ diamond layer (3) at the other end of the terminal surface (2) opposite to the source electrode (4); A gate dielectric (6) is located on the hydrogen terminal surface (2) between the source electrode (4) and the drain electrode (5), and covers the bottom and side surfaces of the trench on the terminal surface (2); The gate electrode (7) is located on the gate dielectric (6) and between the source electrode (4) and the drain electrode (5). The gate electrode (7) is partially deposited at the bottom of the groove. The shapes of the grooves are any one of a rectangular shape, a V shape and an inverted trapezoid. The depth of the grooves is 50-200 nm.

2. A multi-trench diamond field effect transistor structure according to claim 1, characterized in that: The diamond substrate (1) is single crystal or polycrystalline diamond.

3. A multi-trench diamond field effect transistor structure according to claim 1, characterized in that: The termination surface (2) is hydrogen terminated or silicon terminated.

4. A multi-trench diamond field effect transistor structure according to claim 1, characterized in that: The material of the source electrode (4) is Au, or Ti / Pt / Au and or Ti / Au, and the thickness is 50-200nm.

5. A multi-trench diamond field effect transistor structure according to claim 1, characterized in that: The material of the drain electrode (5) is Au, or Ti / Pt / Au and or Ti / Au, and the thickness is 50-200nm.

6. A multi-trench diamond field effect transistor structure according to claim 1, characterized in that: The gate dielectric (6) material is any one or more of MoO3, Al2O3, HfO2, WO3, ZrO2, BN or SiNx, and has a thickness of 3-50nm.

7. A multi-trench diamond field effect transistor structure according to claim 1, characterized in that: The material of the gate electrode (7) includes Al, and the thickness is 50-200 nm.

8. A multi-trench diamond field effect transistor structure according to claim 1, characterized in that: The thickness of the P+ diamond layer is 50-200nm, the doping impurity is B, and the doping concentration is 1x10 18 -1x10 21 cm -3 .

9. A method for preparing a multi-groove diamond field effect transistor structure according to claim 1, characterized in that: The specific steps include: Step 1: Substrate selection: Select a diamond substrate (1); Step 2: Groove etching: etching a groove on the surface of the diamond substrate (1) to a depth of 50-200 nm; Step 3: Terminal surface (2) treatment: pre-treating the diamond substrate (1) and performing hydrogen termination or silicon termination treatment to form a terminal surface (2) with two-dimensional vacancy gas; Step 4: Growth of P+ diamond layer (3): using MPCVD to grow a P+ diamond layer (3); Step 5: Device isolation: Surface treatment is performed on some areas of the sample to form isolation areas between devices; Step 6: Preparation of source electrode (4) and drain electrode (5): depositing source electrode and drain electrode metal on the P+ diamond layer (3) to form source electrode (4) and drain electrode (5); Step 7: Deposition of gate dielectric (6): depositing dielectric material on the surface of the sample to form a gate dielectric (6); Step 8: Growth of gate electrode (7): Deposit gate metal between the source electrode (4) and the drain electrode (5) to form the gate electrode (7).

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