Back contact battery and preparation method thereof

Abstract

The invention belongs to the technical field of back contact cells, and particularly relates to a back contact cell and a preparation method thereof, and the method comprises the following steps: S2, sequentially forming a first semiconductor layer and a mask layer on the back surface of a silicon wafer, the mask layer being a phosphorus-doped silicon oxide layer; s3, forming a second semiconductor opening region on the back surface; s4, a mixed solution containing hydrofluoric acid and hydrogen peroxide is adopted to remove the front surface winding coating film layer, and then texturing and cleaning are carried out; s5, sequentially forming a passivation layer and an anti-reflection layer on the front surface; s6, the anti-reflection layer winding plating layer and the passivation layer winding plating layer are removed, and then oxidation cleaning is carried out; the oxidation cleaning process comprises first oxidation, first acid washing, alkali washing and second oxidation which are sequentially carried out, and a mixed solution containing ozone and hydrochloric acid is adopted in the second acid washing, the first oxidation and the second oxidation; and S7, depositing a second semiconductor layer on the back surface. According to the process flow, two steps are directly shortened, the cost is low, meanwhile, the filling factor of the battery is improved, and the conversion efficiency and the yield of the battery are further improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of back contact batteries, and in particular relates to a back contact battery and a preparation method thereof. Background Art

[0002] At present, the process flow of back contact cells with low equipment cost is generally as follows: S101, providing a silicon wafer with a double-sided polishing structure; S102, coating a first semiconductor layer on the back of the silicon wafer in sequence, wherein the first semiconductor layer is formed by LPCVD or tubular PECVD, and the first semiconductor layer includes a tunneling oxide layer and a first doped polycrystalline layer; S103, cleaning and removing the PSG layer on the surface of the first semiconductor layer; S104, depositing a mask layer on the first semiconductor layer; S105, laser or etching an opening on the back side of the silicon wafer to remove the first mask layer and a portion of the first semiconductor layer to form an opening for the second semiconductor region; S106, texturing and cleaning, forming a texturing surface on the second semiconductor opening area on the back side and the front side, and removing more than half of the mask layer; S107, forming a passivation layer and an anti-reflection layer on the front side of the silicon wafer; S108, removing the coating and then backwashing; S109, forming a second semiconductor layer on the back side, the second semiconductor layer comprising an intrinsic amorphous silicon layer and a second doped P-type amorphous or microcrystalline silicon layer sequentially formed on the back side; S110, laser or etching openings are formed on the back side of the silicon wafer to form first semiconductor regions alternately arranged with second semiconductor regions; S111, depositing a conductive film on the back side of the silicon wafer; S112, forming an insulating groove between the first semiconductor region and the second semiconductor region by laser or etching; S113, forming metal electrodes on the first semiconductor region and the second semiconductor region of the silicon wafer.

[0003] However, the process of back-contact battery generally has more than 10 steps, including many process procedures and high consumption of chemical liquids and gases. On the one hand, this increases the cost, and on the other hand, the increase in process procedures reduces the battery conversion efficiency and yield rate.

[0004] It should be noted that this part of the present invention only provides background technology related to the present invention and does not necessarily constitute prior art or known technology. Summary of the invention

[0005] The purpose of the present invention is to overcome the defects of the prior art that the back-contact battery has many processes, resulting in high cost, low battery conversion efficiency and low yield, and to provide a back-contact battery and a preparation method thereof. The process flow of the present invention directly shortens two steps, has low cost, and at the same time improves the fill factor of the battery, thereby improving the battery conversion efficiency and yield.

[0006] In order to achieve the above object, in a first aspect, the present invention provides a method for preparing a back contact battery, comprising the following steps: S1, provide double-sided polished silicon wafers; S2, forming a first semiconductor layer and a mask layer on the back side of the silicon wafer in sequence, wherein the mask layer is a phosphorus-doped silicon oxide layer and the thickness of the phosphorus-doped silicon oxide layer is 20-60 nm, and a front-side coating layer is naturally formed; S3, etching an opening on the back surface obtained in S2 to form a second semiconductor opening region; S4, first using a mixed solution containing hydrofluoric acid and hydrogen peroxide to remove the front side coating layer, then using a texturing solution containing a film-forming protective agent to perform texturing cleaning, and at the same time forming a velvet surface on the front side of the silicon wafer and the second semiconductor opening area; S5, forming a passivation layer and an anti-reflection layer in sequence on the front surface; S6, removing the anti-reflection layer coating and the passivation layer coating, and then performing oxidation cleaning; the oxidation cleaning process includes sequentially performing a first oxidation, a first acid wash, an alkali wash, a second oxidation, and a second acid wash, and the first oxidation and the second oxidation both use a mixed solution containing ozone and hydrochloric acid; S7. Depositing a second semiconductor layer on the back side.

[0007] In some preferred embodiments of the present invention, in S4, the mass concentration of hydrofluoric acid in the mixed solution comprising hydrofluoric acid and hydrogen peroxide is 10%-15%, and the mass concentration of hydrogen peroxide is 2%-10%.

[0008] In some preferred embodiments of the present invention, in S4, the conditions for removing the front side coating layer include: a reaction temperature of 20-35° C. and a reaction time of 60-240 s.

[0009] In some preferred embodiments of the present invention, the mass content of the film-forming protective agent in the S4 texturing solution is 0.1%-1%.

[0010] In some preferred embodiments of the present invention, the film-forming protective agent is selected from sodium lignin sulfonate and / or sodium dodecylbenzene sulfonate.

[0011] In some preferred embodiments of the present invention, in S4, the texturing liquid further comprises alkali and a texturing additive, wherein the mass content of the alkali is 1%-5%, and the mass content of the texturing additive is 0.1%-1%.

[0012] In some preferred embodiments of the present invention, the conditions for the texturing and cleaning in S4 include: the texturing time is 6-10 minutes, and the texturing temperature is 65°C-85°C.

[0013] In some preferred embodiments of the present invention, the process of removing the anti-reflection layer wrapped around the coating and the passivation layer wrapped around the coating in S6 includes: first using an aqueous solution containing hydrofluoric acid to remove the anti-reflection layer wrapped around the coating, and then using a mixed solution containing alkali and hydrogen peroxide to remove the passivation layer wrapped around the coating; wherein the mass concentration of hydrofluoric acid in the aqueous solution containing hydrofluoric acid is 5%-10%, the mass concentration of alkali in the mixed solution containing alkali and hydrogen peroxide is 2%-5%, and the mass concentration of hydrogen peroxide is 0.2%-1%.

[0014] In some preferred embodiments of the present invention, in S6, a chain cleaning machine is used to remove the anti-reflection layer wrapped around the coating, and the conditions for removing the anti-reflection layer wrapped around the coating include: a reaction temperature of 20-35°C, and a chain machine drive roller speed of 1.2-3.0 m / min; a tank cleaning machine is used to remove the passivation layer wrapped around the coating, and the conditions for removing the passivation layer wrapped around the coating include: a reaction temperature of 25-35°C, and a reaction time of 60-240s.

[0015] In some preferred embodiments of the present invention, in S6, the ozone concentration in the mixed solution containing ozone and hydrochloric acid is 20-80 ppm, and the mass concentration of hydrochloric acid is 0.5%-4%.

[0016] In some preferred embodiments of the present invention, the ozone concentration in the mixed solution comprising ozone and hydrochloric acid used in the first oxidation is greater than the ozone concentration in the mixed solution comprising ozone and hydrochloric acid used in the second oxidation.

[0017] In some preferred embodiments of the present invention, in S6, the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is 50-80ppm, and the mass concentration of hydrochloric acid is 0.5%-4%; the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the second oxidation is 20-50ppm, and the mass concentration of hydrochloric acid is 0.5%-4%.

[0018] In some preferred embodiments of the present invention, in S6, the conditions for the first oxidation include: reaction time of 60-500 s, reaction temperature of 20-25°C; the conditions for the second oxidation include: reaction time of 60-240 s, reaction temperature of 20-25°C.

[0019] In some preferred embodiments of the present invention, in S6, the first pickling uses a first hydrofluoric acid solution with a hydrofluoric acid mass concentration of 0.1%-1%, and the second pickling uses a second hydrofluoric acid solution with a hydrofluoric acid mass concentration of 1%-5%; the reaction time of the first pickling is 15-30s, and the reaction time of the second pickling is 30-120s.

[0020] In some preferred embodiments of the present invention, in S6, the hydrofluoric acid concentration of the first hydrofluoric acid solution is less than the hydrofluoric acid concentration of the second hydrofluoric acid solution.

[0021] In some preferred embodiments of the present invention, in S6, alkaline washing adopts a mixed solution containing ammonia water or strong base and H2O2, the mass concentration of ammonia water or strong base is 2%-5%, and the mass concentration of H2O2 is 3%-5%; the conditions of alkaline washing include: reaction temperature is 60-80℃, and reaction time is 120-240s.

[0022] In some preferred embodiments of the present invention, in S6, the oxidation cleaning further includes the process of slow pulling and drying in sequence after the second pickling.

[0023] In some preferred embodiments of the present invention, in S2, the first semiconductor layer includes a first tunneling oxide layer and a first doped polysilicon layer, the first tunneling oxide layer has a thickness of 1-2 nm, and the first doped polysilicon layer has a thickness of 80-200 nm.

[0024] In some preferred embodiments of the present invention, the first semiconductor layer and the phosphorus-doped silicon oxide layer are formed by sequentially depositing and high-temperature annealing using a tubular PECVD method, with the deposition temperature controlled at 400-500°C and the high-temperature annealing temperature at 850-950°C.

[0025] In some preferred embodiments of the present invention, the formation process of the first semiconductor layer and the mask layer in S2 includes: in the first stage, nitrous oxide is introduced, the glow is turned on, and a first tunneling oxide layer is formed; in the second stage, silane, phosphine and hydrogen are introduced, the glow is turned on, and a first phosphorus-doped amorphous silicon layer with a thickness of 30-80nm is formed; in the third stage, silane, phosphine and hydrogen are introduced, the glow is turned on, and a second phosphorus-doped amorphous silicon layer with a thickness of 40-120nm is formed, and the phosphorus doping amount of the second phosphorus-doped amorphous silicon layer is higher than the phosphorus doping amount of the first phosphorus-doped amorphous silicon layer; in the fourth stage, silane and nitrous oxide are introduced, the glow is turned on, and a silicon oxide layer with a thickness of 20-60nm is formed; then, high-temperature annealing is performed under the condition of passing nitrogen, and the high-temperature annealing temperature is 850-950°C, each phosphorus-doped amorphous silicon layer forms a first phosphorus-doped polycrystalline silicon layer under the high-temperature annealing condition, and the silicon oxide layer forms a phosphorus-doped silicon oxide layer under the high-temperature annealing condition.

[0026] In some more preferred embodiments of the present invention, the laughing gas flow rate introduced in the first stage is 8000-30000sccm; the silane flow rate introduced in the second stage is 1000-3000sccm, the phosphine flow rate is 100-500sccm, and the hydrogen flow rate is 7000-9000sccm; the silane flow rate introduced in the third stage is 1000-3000sccm, the phosphine flow rate is 200-1000sccm, and the hydrogen flow rate is 7000-9000sccm; the silane flow rate introduced in the fourth stage is 500-1000sccm, and the laughing gas flow rate is 5000-8000sccm.

[0027] In some more preferred embodiments of the present invention, in the first stage, the reaction pressure is controlled to be 100-200Pa, the power is 3000-10000W, and the reaction time is 20-100s; in the second stage, the reaction pressure is controlled to be 300-500Pa, the power is 2000-4000W, and the reaction time is 300-1500s; in the third stage, the reaction pressure is controlled to be 300-500Pa, the power is 3000-7000W, and the reaction time is 200-1000s; in the fourth stage, the reaction pressure is controlled to be 300-500Pa, the power is 3000-7000W, and the reaction time is 50-200s; in high temperature annealing, the annealing pressure is controlled to be 5000-50000Pa, the annealing time is 60-120min, and the nitrogen flow rate is 2000sccm-8000sccm.

[0028] In some preferred embodiments of the present invention, in S4, the passivation layer includes a second tunneling oxide layer and a second doped amorphous silicon layer; the thickness of the second tunneling oxide layer is 1-2 nm, and the thickness of the second doped amorphous silicon layer is 1-10 nm.

[0029] In some preferred embodiments of the present invention, the anti-reflection layer is a stack comprising silicon nitride and silicon oxynitride arranged in sequence, the thickness ratio of silicon nitride to silicon oxynitride in the stack is 1-3:1, and the total thickness of the stack is 70-120 nm.

[0030] In some preferred embodiments of the present invention, in S4, the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer sequentially formed on the back side, the thickness of the intrinsic silicon layer is 5-15 nm, and the thickness of the second doped silicon layer is 5-20 nm.

[0031] In some preferred embodiments of the present invention, the method for preparing the back contact battery further comprises the following steps: S8, performing a second etching opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region; S9, depositing a conductive film layer on the back surface obtained in S8; S10, performing a third etching opening on a portion of the conductive film layer located between the first semiconductor opening region and the second semiconductor opening region to form an insulating groove; S11, forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

[0032] In a second aspect, the present invention provides a back-contact battery, which is prepared by the method for preparing a back-contact battery described in the first aspect.

[0033] Beneficial effects: Through the above technical solutions, especially S2, S4, and S6, the present invention directly shortens the process flow by two steps, while improving the filling factor of the battery, thereby improving the battery conversion efficiency and yield rate.

[0034] Among them, on the one hand, the present invention S2 adopts a phosphorus-doped silicon oxide layer as a mask layer, eliminating the steps of S103 one-step backwashing and S104 one-step mask layer plating required after the S102 step in the conventional method; but since the phosphorus-doped silicon oxide layer is used as a mask layer and is easily corroded, a texturing liquid containing a film-forming protective agent must be used to texturize the mask layer to protect the mask layer from corrosion. At the same time, the front winding coating layer corresponding to the first semiconductor layer (such as the tunneling oxide layer included) will also be protected, so the front winding coating area cannot be completely velveted, the velvet surface is uneven in size, and there is color difference; in this regard, the present invention S4 adopts a mixed solution containing hydrofluoric acid and hydrogen peroxide to remove the front winding coating layer. Since hydrogen peroxide can oxidize the polycrystalline layer, hydrofluoric acid can continuously corrode the oxide layer. In the repeated oxidation and removal process, the thinner winding coating layer on the front side is continuously removed, thereby ensuring that the front side can be velveted normally. Compared with the conventional method of etching the front side with strong acids such as nitric acid, the silicon wafer can be almost not etched, and the cost of chemicals and waste liquid treatment is greatly reduced.

[0035] On the other hand, since the phosphorus-doped silicon oxide layer is extremely susceptible to corrosion compared to the conventional silicon nitride mask layer, it will be removed during the S4 texturing and cleaning, and it is difficult to retain it after S4. Therefore, during the front coating process, the metal ions and other dirt on the back surface of the silicon wafer will diffuse into the silicon wafer body, and it cannot be completely removed by simple backwashing. In this regard, the present invention also uses a wet oxidation to grow an oxide layer on the back of the silicon wafer and then continuously removes it. The oxidation cleaning method allows the second semiconductor opening area to obtain a clean interface to facilitate the passivation of the second semiconductor opening area. The solution used in the two wet oxidations is a mixed solution containing ozone and hydrochloric acid, wherein the first oxidation is used. The strong oxidizing property of ozone is used to quickly form a thicker oxide layer on the interface to wrap the impurity pollution in the oxide layer, and then the oxide layer on the back of the silicon wafer is removed in a short time through the first acid washing. The alkaline washing can neutralize the acid and remove the organic matter on the surface of the silicon wafer. After the second oxidation, an oxide layer will be formed on the silicon wafer interface to further wrap the impurities deeper in the bulk silicon in the oxide layer. The second acid washing removes the oxide layer on the one hand, and on the other hand, effectively chemically passivates the second semiconductor opening area to reduce its interface state density, thereby obtaining a clean interface and improving passivation, and the filling factor of the battery is improved, thereby improving the battery conversion efficiency and yield rate. The preparation method of the present invention directly shortens the process flow by two steps, and at the same time, through the subsequent two oxidation cleaning methods, the filling factor of the battery is improved, thereby improving the battery conversion efficiency and yield rate. The present invention also adds a film-forming protective agent to the texturing solution, which will be adsorbed on the phosphorus-doped silicon oxide layer during the texturing process to protect the mask layer from being corroded, thereby protecting the film layer under the mask layer from being damaged during the texturing process, and removing the mask layer in the subsequent cleaning step of the texturing cleaning, thereby eliminating the two-step process of separate backwashing and mask layer plating, and simplifying the process flow.

[0036] In conventional processes, a mixed solution containing hydrofluoric acid, hydrochloric acid and ozone is usually used to remove surface impurities. However, since the first semiconductor layer is repeatedly oxidized and corroded in the above solution, the surface becomes black, the film layer is severely damaged, and the passivation effect is poor. In this regard, the present invention adopts an oxidation cleaning method of oxidation followed by corrosion to clean the silicon wafer after S5. On the one hand, the two oxidation and corrosion cleaning methods ensure the cleanliness of the tank solution, making the cleaning of the silicon wafer cleaner. On the other hand, after two wet oxidations, the second semiconductor opening area effectively removes the metal impurities introduced during the front coating process, reduces the recombination of carriers, and thus improves the battery's fill factor and battery conversion efficiency and yield. Among them, the first oxidation and the second oxidation both use a mixed solution containing ozone and hydrochloric acid. Adding hydrochloric acid to the corresponding mixed solution of the two-step oxidation can enhance the stability of ozone in the solution on the one hand, and can chelate and remove metal ions on the surface of the silicon wafer on the other hand. DETAILED DESCRIPTION In the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0037] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0038] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article. Among them, the terms "optional" and "optional" all mean that they may be included or not included (or may be present or not).

[0039] In the present invention, the area close to the silicon wafer is referred to as the inside, and the area far from the silicon wafer is referred to as the outside.

[0040] In a first aspect, the present invention provides a method for preparing a back contact battery, comprising the following steps: S1, provide double-sided polished silicon wafers; S2, forming a first semiconductor layer and a mask layer on the back side of the silicon wafer in sequence, wherein the mask layer is a phosphorus-doped silicon oxide layer and the thickness of the phosphorus-doped silicon oxide layer is 20-60 nm, and a front-side coating layer is naturally formed; S3, etching an opening on the back surface obtained in S2 to form a second semiconductor opening region; S4, first using a mixed solution containing hydrofluoric acid and hydrogen peroxide to remove the front side coating layer, then using a texturing solution containing a film-forming protective agent to perform texturing cleaning, and at the same time forming a velvet surface on the front side of the silicon wafer and the second semiconductor opening area; S5, forming a passivation layer and an anti-reflection layer in sequence on the front surface; S6, removing the anti-reflection layer coating and the passivation layer coating, and then performing oxidation cleaning; the oxidation cleaning process includes sequentially performing a first oxidation, a first acid wash, an alkali wash, a second oxidation, and a second acid wash, and the first oxidation and the second oxidation both use a mixed solution containing ozone and hydrochloric acid; S7. Depositing a second semiconductor layer on the back side.

[0041] The thickness of the phosphorus-doped silicon oxide layer is 20-60 nm, for example, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, etc. and the range between any two point values, preferably 20-46 nm.

[0042] In some preferred embodiments of the present invention, in S4, the mass concentration of hydrofluoric acid in the mixed solution comprising hydrofluoric acid and hydrogen peroxide is 10%-15%, and the mass concentration of hydrogen peroxide is 2%-10%.

[0043] In some preferred embodiments of the present invention, in S4, the conditions for removing the front side coating layer include: a reaction temperature of 20-35° C. and a reaction time of 60-240 s.

[0044] The device for removing the front-side coating layer in the present invention is preferably a chain cleaning machine.

[0045] S4 texturing and cleaning can remove the remaining mask layer and the first semiconductor layer in the second semiconductor opening area.

[0046] In some preferred embodiments of the present invention, the mass content of the film-forming protective agent in the S4 texturing solution is 0.1%-1%, for example, it can be 0.1%, 0.2%, 0.3%, 0.4%, 0.5%, 0.6%, 0.7%, 0.8%, 0.9%, 1%, etc. and the range between any two point values, preferably 0.6%-1%. Using an appropriate amount of film-forming protective agent is more conducive to protecting the passivation film layer under the phosphorus-doped silicon oxide layer from corrosion.

[0047] In some preferred embodiments of the present invention, the film-forming protective agent is selected from sodium lignin sulfonate and / or sodium dodecylbenzene sulfonate.

[0048] In some preferred embodiments of the present invention, in S4, the texturing liquid further comprises alkali and a texturing additive, wherein the mass content of the alkali is 1%-5%, and the mass content of the texturing additive is 0.1%-1%. The texturing additive is a commercially available product and will not be described in detail here.

[0049] More preferably, the base is selected from potassium hydroxide and / or sodium hydroxide.

[0050] In some preferred embodiments of the present invention, the conditions for the texturing and cleaning in S4 include: the texturing time is 6-10 minutes, and the texturing temperature is 65°C-85°C.

[0051] The texturing and cleaning of the present invention at least includes texturing and cleaning, and the mask layer will be removed in the cleaning step. Exemplarily, the texturing and cleaning process may include, for example, sequentially performing texturing, RCA standard cleaning method cleaning, and HF solution cleaning. In the HF solution cleaning, the mask layer will be almost completely removed, wherein the HF concentration can be determined according to the mask layer to be removed, as long as the desired purpose is achieved. The RCA standard solution adopted in the RCA standard cleaning method may be an existing corresponding cleaning solution such as No. 1 standard cleaning solution or No. 2 standard cleaning solution, which is a prior art and can be used in the present invention; wherein, the specific composition of No. 1 standard cleaning solution may be, for example, a mixture of ammonia water / hydrogen peroxide / water in a mass ratio of 1:1:5, and the specific composition of No. 2 standard cleaning solution may be, for example, a mixture of hydrochloric acid / hydrogen peroxide / water in a mass ratio of 1:1:6.

[0052] In some preferred embodiments of the present invention, the process of removing the anti-reflection coating and the passivation coating in S6 includes: first removing the anti-reflection coating with an aqueous solution containing hydrofluoric acid, and then removing the passivation coating with a mixed solution containing alkali and hydrogen peroxide. The preferred solution of removing different coatings with different solutions is more conducive to reducing damage to the passivation film layer.

[0053] More preferably, the mass concentration of hydrofluoric acid in the aqueous solution containing hydrofluoric acid is 5%-10%.

[0054] Further preferably, in the mixed solution comprising alkali and hydrogen peroxide, the mass concentration of alkali is 2%-5%, and the mass concentration of hydrogen peroxide is 0.2%-1%.

[0055] In some preferred embodiments of the present invention, in S6, a chain cleaning machine is used to remove the anti-reflection layer and the coating.

[0056] Further preferably, the conditions for removing the anti-reflection coating include: the reaction temperature is 20-35° C., and the speed of the chain conveyor roller is 1.2-3.0 m / min. This preferred solution is more conducive to protecting the anti-reflection layer on the front side from corrosion.

[0057] Preferably, in the present invention, a tank-type cleaning machine is used to remove the passivation layer and the plating layer.

[0058] Further preferably, the conditions for removing the passivation layer and the coating layer include: the reaction temperature is 25-35° C., and the reaction time is 60-240 seconds. This preferred solution is more conducive to completely not damaging the film layers on the front and back sides.

[0059] In some preferred embodiments of the present invention, in S6, the ozone concentration in the mixed solution containing ozone and hydrochloric acid is 20-80 ppm, and the mass concentration of hydrochloric acid is 0.5%-4%.

[0060] In some preferred embodiments of the present invention, the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is greater than the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the second oxidation. The use of this preferred solution is more conducive to the first oxidation to form a thicker oxide layer, thereby encapsulating impurities with a higher concentration on the interface and then removing them, thereby reducing the risk of contaminating the subsequent tank body and ensuring that the interface cleaned after the second oxidation is cleaner.

[0061] Further preferably, the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is 1-4 times, preferably 1.1-4 times, of the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the second oxidation, which is more conducive to forming a thicker oxide layer in a short time.

[0062] Preferably, in the present invention, the concentration of hydrochloric acid in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is less than the concentration of hydrochloric acid in the mixed solution containing ozone and hydrochloric acid used in the second oxidation, which is more conducive to enhancing the stability of ozone in the corresponding solution, more effectively chelating and effectively removing metal ions on the surface of the silicon wafer.

[0063] In some preferred embodiments of the present invention, in S6, the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is 50-80ppm, and the mass concentration of hydrochloric acid is 0.5%-4%; the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the second oxidation is 20-50ppm, and the mass concentration of hydrochloric acid is 0.5%-4%. With this preferred solution, different oxidations use ozone and hydrochloric acid concentrations in different suitable ranges, which is more conducive to effectively removing metal impurities introduced during the front coating process, reducing the recombination of carriers, thereby improving the fill factor and conversion efficiency of the battery.

[0064] In some preferred embodiments of the present invention, in S6, the conditions for the first oxidation include: a reaction time of 60-500 s and a reaction temperature of 20-25°C.

[0065] Preferably, the conditions for the second oxidation include: a reaction time of 60-240 s and a reaction temperature of 20-25°C.

[0066] In some preferred embodiments of the present invention, in S6, the first pickling adopts a first hydrofluoric acid solution with a hydrofluoric acid mass concentration of 0.1%-1%, and the reaction time of the first pickling is 15-30s. This preferred solution is more conducive to effectively removing the oxide film layer on the back side, while hardly damaging the anti-reflection layer on the front side.

[0067] Preferably, the second pickling adopts a second hydrofluoric acid solution with a hydrofluoric acid mass concentration of 1%-5%, and the reaction time of the second pickling is 30-120s. This preferred solution is more conducive to effectively chemically passivating the second semiconductor opening region while removing the back oxide layer, thereby reducing its interface state density.

[0068] In some preferred embodiments of the present invention, in S6, the hydrofluoric acid concentration of the first hydrofluoric acid solution is less than the hydrofluoric acid concentration of the second hydrofluoric acid solution. This preferred solution is more conducive to ensuring that the damage to the front anti-reflection film layer is reduced as much as possible under the premise of removing the oxide layer.

[0069] More preferably, the ratio of the hydrofluoric acid concentration of the first hydrofluoric acid solution to the hydrofluoric acid concentration of the second hydrofluoric acid solution is 1:1-50, preferably 1:1.1-50.

[0070] In some preferred embodiments of the present invention, in S6, the alkali washing uses a mixed solution containing ammonia water or a strong base and H2O2, the mass concentration of ammonia water or a strong base is 2%-5%, and the mass concentration of H2O2 is 3%-5%. The adoption of this preferred solution is more conducive to neutralizing the acid solution and removing organic matter on the surface of the silicon wafer. Further preferably, the mass concentration of ammonia water is higher, and the mass concentration of the strong base is lower than that of ammonia water.

[0071] Preferably, the strong base is KOH and / or NaOH.

[0072] Preferably, the conditions for alkali washing include: a reaction temperature of 60-80° C. and a reaction time of 120-240 s.

[0073] In some preferred embodiments of the present invention, in S6, the oxidation cleaning further includes the process of slow pulling and drying in sequence after the second pickling. The slow pulling is a conventional existing process and will not be described in detail here.

[0074] In the present invention S2, the first semiconductor layer includes a first tunneling oxide layer and a first doped polysilicon layer.

[0075] Preferably, the first tunneling oxide layer has a thickness of 1-2 nm, and the first doped polysilicon layer has a thickness of 80-200 nm.

[0076] In some preferred embodiments of the present invention, in S4, the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer sequentially formed on the back side. The second doped silicon layer can be doped amorphous silicon or microcrystalline silicon. The intrinsic silicon layer is preferably an intrinsic amorphous silicon layer. The present invention uses a tunneling polycrystalline first semiconductor layer and cooperates with the second semiconductor layer to form a joint passivation structure, which is more conducive to improving the open circuit voltage and battery conversion efficiency of the battery.

[0077] Preferably, the thickness of the intrinsic silicon layer is 5-15 nm, and the thickness of the second doped silicon layer is 5-20 nm.

[0078] In the present invention, one of the first doped polysilicon layer and the second doped silicon layer is N-type and the other is P-type. The doping concentrations of the first doped polysilicon layer and the second doped silicon layer can refer to the respective ranges of the prior art. For example, the effective doping concentration of the first doped polysilicon layer is 5e18cm -3 -1e21cm -3 , the effective doping concentration of the second doped silicon layer is 1e18cm -3 -5e19cm -3 .

[0079] In some preferred embodiments of the present invention, the first semiconductor layer and the phosphorus-doped silicon oxide layer are formed by sequentially depositing and high-temperature annealing using a tubular PECVD method, with the deposition temperature controlled at 400-500°C and the high-temperature annealing temperature at 850-950°C.

[0080] In some preferred embodiments of the present invention, the first semiconductor layer comprises a first tunneling oxide layer and a first phosphorus-doped polycrystalline silicon layer which are arranged in sequence. Correspondingly, the formation process of the first semiconductor layer and the mask layer in S2 comprises: in the first stage, laughing gas is introduced, the glow is turned on, and the first tunneling oxide layer is formed; in the second stage, silane, phosphine and hydrogen are introduced, the glow is turned on, and the first phosphorus-doped amorphous silicon layer with a thickness of 30-80nm is formed; in the third stage, silane, phosphine and hydrogen are introduced, the glow is turned on, and the second phosphorus-doped amorphous silicon layer with a thickness of 40-120nm is formed, and the phosphorus doping amount of the second phosphorus-doped amorphous silicon layer is higher than the phosphorus doping amount of the first phosphorus-doped amorphous silicon layer; in the fourth stage, silane and laughing gas are introduced, the glow is turned on, and the silicon oxide layer with a thickness of 20-60nm is formed; then, high-temperature annealing is performed under the condition of passing nitrogen, and the high-temperature annealing temperature is 850-950°C, each phosphorus-doped amorphous silicon layer forms a first phosphorus-doped polycrystalline silicon layer under the high-temperature annealing condition, and the silicon oxide layer forms a phosphorus-doped silicon oxide layer under the high-temperature annealing condition. The present invention forms a phosphorus-doped amorphous silicon layer twice, and then performs high-temperature annealing to form a first phosphorus-doped polysilicon layer, which is beneficial to improving the passivation level of the first semiconductor layer. The high-temperature annealing will naturally form a phosphorus-silicon glass layer, but the oxide layer is thin and has poor protection. In this regard, the present invention generates a controllable silicon oxide layer on the polycrystalline surface, and then performs high-temperature annealing to enhance the compactness of the silicon oxide layer and improve protection.

[0081] In some more preferred embodiments of the present invention, the laughing gas flow rate introduced in the first stage is 8000-30000sccm; the silane flow rate introduced in the second stage is 1000-3000sccm, the phosphine flow rate is 100-500sccm, and the hydrogen flow rate is 7000-9000sccm; the silane flow rate introduced in the third stage is 1000-3000sccm, the phosphine flow rate is 200-1000sccm, and the hydrogen flow rate is 7000-9000sccm; the silane flow rate introduced in the fourth stage is 500-1000sccm, and the laughing gas flow rate is 5000-8000sccm.

[0082] In some more preferred embodiments of the present invention, in the first stage, the reaction pressure is controlled to be 100-200Pa, the power is 3000-10000W, and the reaction time is 20-100s; in the second stage, the reaction pressure is controlled to be 300-500Pa, the power is 2000-4000W, and the reaction time is 300-1500s; in the third stage, the reaction pressure is controlled to be 300-500Pa, the power is 3000-7000W, and the reaction time is 200-1000s; in the fourth stage, the reaction pressure is controlled to be 300-500Pa, the power is 3000-7000W, and the reaction time is 50-200s; in high temperature annealing, the annealing pressure is controlled to be 5000-50000Pa, the annealing time is 60-120min, and the nitrogen flow rate is 2000sccm-8000sccm. The adoption of this preferred solution is more conducive to the distribution of phosphorus doping concentration of the first semiconductor layer and makes the mask layer more compact.

[0083] In some preferred embodiments of the present invention, in S4, the passivation layer includes a second tunneling oxide layer and a second doped amorphous silicon layer; the thickness of the second tunneling oxide layer is 1-2 nm, and the thickness of the second doped amorphous silicon layer is 1-10 nm.

[0084] In some preferred embodiments of the present invention, the anti-reflection layer is a stack of silicon nitride and silicon oxynitride arranged in sequence, and the total thickness of the stack is 70-120nm. This preferred solution is more conducive to enhancing the anti-reflection effect of the front side and improving the short-circuit current of the battery.

[0085] Further preferably, the thickness ratio of silicon nitride to silicon oxynitride in the stack is 1-3:1.

[0086] The second tunneling oxide layer, the second doped amorphous silicon layer, and the anti-reflection layer can be respectively formed by adopting a tubular PECVD method, for example.

[0087] In some preferred embodiments of the present invention, the method for preparing the back contact battery further comprises the following steps: S8, performing a second etching opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region; S9, depositing a conductive film layer on the back surface obtained in S8; S10, performing a third etching opening on a portion of the conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an insulating groove; S11, forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

[0088] In a second aspect, the present invention provides a back-contact battery, which is prepared by the method for preparing a back-contact battery described in the first aspect.

[0089] The embodiments of the present invention are described in detail below, which are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0090] Example 1 A back contact battery is prepared by the following preparation method: S1. Provide double-sided polished silicon wafers (N-type single crystal silicon wafers); S2, forming a first semiconductor layer and a phosphorus-doped silicon oxide layer mask layer in sequence on the back side of the S1 silicon wafer; The first semiconductor layer includes a first tunneling silicon oxide layer and an N-type first doped polysilicon layer formed in sequence, the first tunneling silicon oxide layer has a thickness of 1.5 nm, the first doped polysilicon layer has a thickness of 100 nm, and an effective doping concentration of 5e19 cm -3 The mask layer is a phosphorus-doped silicon oxide layer with a thickness of 30 nm.

[0091] The first tunneling silicon oxide layer, the first doped polysilicon layer and the mask layer are sequentially deposited and annealed at high temperature using a tubular PECVD method. The deposition temperature is 450°C. The specific preparation process is as follows: In the first stage, laughing gas is introduced, the glow is turned on, and the first tunneling silicon oxide layer is formed. During this period, the laughing gas flow rate is 8000sccm, the reaction time is 40s, the reaction pressure is 120Pa, and the power is 4000W; In the second stage, silane, phosphine and hydrogen are introduced, the flow rate of silane is 2000sccm, the flow rate of phosphine is 200sccm, the flow rate of hydrogen is 8000sccm, the glow is turned on, and the first phosphorus-doped amorphous silicon layer is formed. The reaction time is 1000s, the reaction pressure is 400Pa, the power is 3000W, and the thickness of the first phosphorus-doped amorphous silicon layer is 60nm; In the third stage, silane, phosphine and hydrogen are introduced, the flow rate of silane is 2000sccm, the flow rate of phosphine is 500sccm, the flow rate of hydrogen is 8000sccm, the glow is turned on, and the second phosphorus-doped amorphous silicon layer is formed. The reaction time is 450s, the reaction pressure is 400Pa, the power is 5000W, the thickness of the second phosphorus-doped amorphous silicon layer is 40nm, and the phosphorus doping amount of the second phosphorus-doped amorphous silicon layer is higher than the phosphorus doping amount of the first phosphorus-doped amorphous silicon layer; In the fourth stage, silane and nitrous oxide are introduced, the flow rate of silane is 600 sccm, the flow rate of nitrous oxide is 6000 sccm, the glow is turned on, and a silicon oxide layer with a thickness of 30 nm is formed. The reaction time is 100 s, the reaction pressure is 400 Pa, and the power is 4000 W; Then, high temperature annealing is performed under nitrogen flow conditions, with an annealing pressure of 10000 Pa, an annealing temperature of 900° C., an annealing time of 90 minutes, and a nitrogen flow rate of 3000 sccm. The phosphorus-doped amorphous silicon layer forms a phosphorus-doped polysilicon layer under the annealing conditions, and the silicon oxide layer forms a phosphorus-doped silicon oxide layer under the annealing conditions.

[0092] S3, performing a first etching on the first semiconductor layer on the mask layer on the back side of the S2 silicon wafer to remove a portion of the first semiconductor layer and its corresponding mask layer to form second semiconductor opening regions distributed at intervals; S4, removing the coating layer on the front side, and then performing texturing and cleaning, and forming a texturing surface in the second semiconductor opening area on the back side at the same time as on the front side; Specifically, a chain cleaning machine is used to remove the front side coating layer (i.e., the first semiconductor layer coating and the phosphorus-doped silicon oxide layer coating on the front side), and a mixed solution containing hydrofluoric acid and hydrogen peroxide is used to remove the front side coating, wherein the mass concentration of hydrofluoric acid is 12%, the mass concentration of hydrogen peroxide is 3%, and the balance is water. During this period, the reaction temperature is controlled at 25°C and the reaction time is 120s.

[0093] Then, the texturing cleaning is carried out. The texturing liquid is a mixed solution of potassium hydroxide, texturing additives (commercially available), film-forming protective agent and water, wherein the mass percentage of potassium hydroxide is 2%, the mass percentage of texturing additives is 0.2%, the mass percentage of film-forming protective agent (specifically sodium lignin sulfonate) is 0.8%, and the balance is water; the texturing time is 8 minutes, and the texturing temperature is 75°C. The texturing cleaning process includes texturing, RCA standard solution backwashing (RCA standard solution is standard cleaning solution No. 1, and the specific composition is ammonia water / hydrogen peroxide / water mixed in a mass ratio of 1:1:5), and HF solution (the concentration of HF in the HF solution is 2wt%) cleaning. In the HF solution cleaning, the mask layer will be almost completely removed.

[0094] S5. Forming a passivation layer and an anti-reflection layer on the front side of the silicon wafer in sequence, wherein the passivation layer comprises a second tunneling silicon oxide layer and an N-type second doped amorphous silicon layer in sequence; the second tunneling silicon oxide layer has a thickness of 1 nm, and the second doped amorphous silicon layer has a thickness of 5 nm, and is prepared by a tubular PECVD method; The anti-reflection layer is a stack of silicon nitride and silicon oxynitride arranged in sequence, the thickness ratio of silicon nitride to silicon oxynitride in the stack is 7:3, the total thickness of the stack is 100nm, and it is formed by a tubular PECVD method.

[0095] S6, remove the oxidation cleaning after the coating to obtain a clean interface; Specifically, a chain cleaning machine is used to remove the anti-reflection layer, the solution for removing the film layer is an aqueous solution containing hydrofluoric acid, the mass concentration of hydrofluoric acid is 6%, the reaction temperature is 25°C, and the chain machine drive roller speed is 2.4m / min.

[0096] A tank cleaning machine is used to remove the passivation layer. The solution for removing the film layer is a mixed solution of potassium hydroxide and hydrogen peroxide. The mass concentration of potassium hydroxide is 3%, the mass concentration of hydrogen peroxide is 0.5%, the reaction temperature is 30°C, and the reaction time is 150s.

[0097] The steps of oxidation cleaning are: first oxidation - first acid washing - alkali washing - second oxidation - second acid washing - slow pulling - drying.

[0098] The first oxidation solution is a mixed solution of ozone and hydrochloric acid, the ozone concentration is 60 ppm, the mass concentration of hydrochloric acid is 0.5%, the reaction time is 300 seconds, and the reaction temperature is 25° C. After the first oxidation, a thick oxide layer will be formed on the silicon wafer interface to wrap the impurity contamination in the oxide layer.

[0099] The first pickling solution is a first hydrofluoric acid solution, the mass concentration of hydrofluoric acid is 0.2%, the reaction temperature is room temperature, and the reaction time is 20 seconds. The first hydrofluoric acid solution of the first pickling can remove the oxide layer on the back of the silicon wafer in a short time.

[0100] The alkaline washing solution is a mixed solution of ammonia water and H2O2, the mass concentration of ammonia water is 5%, the mass concentration of H2O2 is 4%, the reaction temperature is 70°C, and the reaction time is 180s. Alkaline washing can neutralize the acid solution and remove organic matter on the surface of the silicon wafer.

[0101] The second oxidation solution is a mixed solution of ozone and hydrochloric acid, the concentration of ozone is 30ppm, the mass concentration of hydrochloric acid is 2%, the reaction time is 120s, and the reaction temperature is 25°C. After the second oxidation, an oxide layer will be formed on the interface of the silicon wafer, further encapsulating the impurities deeper in the bulk silicon in the oxide layer.

[0102] The second pickling solution is a second hydrofluoric acid solution, the mass concentration of hydrofluoric acid is 2%, the reaction temperature is room temperature, and the reaction time is 80s. The second pickling solution removes the oxide layer on the one hand, and on the other hand effectively chemically passivates the second semiconductor opening area to reduce its interface state density.

[0103] S7, forming a second semiconductor layer on the back side, the second semiconductor layer comprising an intrinsic amorphous silicon layer and a P-type second doped amorphous silicon layer sequentially formed on the back side; The thickness of the intrinsic amorphous silicon layer is 10 nm, the thickness of the second doped amorphous silicon layer is 15 nm, and the effective doping concentration is 5e18 cm -3 .

[0104] S8, performing a second etching on the polished area on the back side of the silicon wafer S7 to remove the second semiconductor layer, thereby forming a first semiconductor opening area spaced apart from the second semiconductor opening area; S9, forming a transparent conductive film layer on the back side of the silicon wafer to fully cover the entire surface; S10, performing a third etching on a portion of the transparent conductive film layer located in the overlapping area between the first semiconductor opening area and the second semiconductor opening area on the back side of the silicon wafer to form an insulating groove; after etching, the resistance between the first semiconductor and the second semiconductor is greater than 1 kΩ.

[0105] S11, forming metal electrodes at the outer surfaces of the first semiconductor opening region and the second semiconductor opening region corresponding to the back side of the silicon wafer.

[0106] Example 2 The method of Example 1 is referred to, except that in S2, the reaction time is adjusted so that the thickness of the mask layer is 50 nm.

[0107] Example 3 The method of Example 1 is referred to, except that in S4, the content of hydrogen peroxide is adjusted so that the mass concentration of hydrogen peroxide in the mixed solution containing hydrofluoric acid and hydrogen peroxide is 5%, and the concentration of hydrofluoric acid remains unchanged.

[0108] Example 4 The method of Example 1 is referred to, except that in S4, the content of the film-forming protective agent is adjusted so that the mass concentration of the film-forming protective agent in the texturing solution is 0.5%, and the concentrations of other solutes remain unchanged.

[0109] Example 5 The method of Example 1 is referred to, except that in S6, the ozone content is adjusted so that the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the first oxidation and the second oxidation is 50 ppm, and the concentration of other solutes remains unchanged.

[0110] Example 6 The method of Example 1 is referred to, except that in S6, the hydrochloric acid content is adjusted so that the mass concentration of hydrochloric acid in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is 1%, and the concentrations of other solutes remain unchanged.

[0111] Comparative Example 1 The method of Example 1 is referred to, except that in S2, the thickness of the mask layer is adjusted to 10 nm.

[0112] Comparative Example 2 The method of Example 1 is referred to, except that a hydrofluoric acid aqueous solution is used to remove the front side coating layer, that is, no hydrogen peroxide is added, and the concentration of hydrofluoric acid remains unchanged.

[0113] Comparative Example 3 The method of Example 1 is referred to, except that no film-forming protective agent is added to the texturing solution.

[0114] Comparative Example 4 The method of Example 1 is referred to, except that after removing the anti-reflection layer and the passivation layer in S6, alkaline washing is performed first and then oxidation washing. The oxidation washing adopts a conventional cleaning solution: a mixed solution containing hydrofluoric acid, hydrochloric acid, ozone and water, to perform one-step oxidation washing, replacing the multi-step oxidation washing in S6 (first oxidation, first acid washing, alkaline washing, second oxidation, second acid washing); wherein, the mass concentration of hydrofluoric acid in the mixed solution containing hydrofluoric acid, hydrochloric acid, ozone and water is 2%, the mass concentration of hydrochloric acid is 1%, and the mass concentration of ozone is 60 ppm.

[0115] Comparative Example 5 The method of Example 1 is used, except that the second oxidation and the second acid washing are not performed during the oxidation cleaning.

[0116] Test Case The back contact cells obtained in the above embodiments and comparative examples were subjected to performance tests, and the results are shown in Table 1. The fill factor was obtained by IV testing, and the test method for the cell yield rate was: in a batch of production, the number of cells with a yield rate ≥ 26.7% was divided by a cell efficiency of 26.7% / the total number of cells produced × 100%.

[0117] Table 1

[0118] From the above results, it can be seen that, compared with the comparative example, the embodiment of the present invention directly shortens the process by two steps, reduces the cost, and improves the filling factor of the battery, thereby improving the battery conversion efficiency and yield rate. Among them, in comparative example 3, since no film-forming protective agent is added, the PSG layer and the first semiconductor layer will be corroded during the texturing process, and there will be basically no high-efficiency battery cells, and the battery yield rate is extremely low.

[0119] Furthermore, according to Example 1 and Examples 2-6, it can be seen that the adoption of the preferred solution of the present invention is more conducive to improving the fill factor of the battery, thereby improving the battery conversion efficiency and yield rate.

[0120] The preferred embodiments of the present invention are described in detail above, but the present invention is not limited thereto. Within the technical concept of the present invention, the technical solution of the present invention can be subjected to a variety of simple modifications, including the combination of various technical features in any other suitable manner, and these simple modifications and combinations should also be regarded as the contents disclosed by the present invention and belong to the protection scope of the present invention.

Claims

1. A method for preparing a back contact battery, characterized in that: The steps include: S1, provide double-sided polished silicon wafers; S2, forming a first semiconductor layer and a mask layer on the back side of the silicon wafer in sequence, wherein the mask layer is a phosphorus-doped silicon oxide layer and the thickness of the phosphorus-doped silicon oxide layer is 20-60 nm, and a front-side coating layer is naturally formed at the same time; S3, etching an opening on the back surface obtained in S2 to form a second semiconductor opening region; S4, first using a mixed solution containing hydrofluoric acid and hydrogen peroxide to remove the front side coating layer, then using a texturing solution containing a film-forming protective agent to perform texturing cleaning, and at the same time forming a velvet surface on the front side of the silicon wafer and the second semiconductor opening area; S5, forming a passivation layer and an anti-reflection layer in sequence on the front surface; S6, removing the anti-reflection layer coating and the passivation layer coating, and then performing oxidation cleaning; the oxidation cleaning process includes sequentially performing a first oxidation, a first acid wash, an alkali wash, a second oxidation, and a second acid wash, and the first oxidation and the second oxidation both use a mixed solution containing ozone and hydrochloric acid; S7. Depositing a second semiconductor layer on the back side.

2. The method for preparing a back contact battery according to claim 1, characterized in that: In S4, the mass concentration of hydrofluoric acid in the mixed solution containing hydrofluoric acid and hydrogen peroxide is 10%-15%, and the mass concentration of hydrogen peroxide is 2%-10%; and / or, In S4, the conditions for removing the front side coating layer include: a reaction temperature of 20-35° C. and a reaction time of 60-240 s.

3. The method for preparing a back contact battery according to claim 1, characterized in that: The mass content of the film-forming protective agent in the S4 texturing solution is 0.1%-1%, and / or the film-forming protective agent is selected from sodium lignin sulfonate and / or sodium dodecylbenzene sulfonate.

4. The method for preparing a back contact battery according to claim 1, characterized in that: In S4, the texturing liquid also contains alkali and texturing additives, the mass content of the alkali is 1%-5%, and the mass content of the texturing additive is 0.1%-1%; And / or, the conditions for the texturing and cleaning in S4 include: the texturing time is 6-10 minutes, and the texturing temperature is 65°C-85°C.

5. The method for preparing a back contact battery according to claim 1, characterized in that: The process of removing the anti-reflection layer and the passivation layer in S6 includes: firstly removing the anti-reflection layer by using an aqueous solution containing hydrofluoric acid, and then removing the passivation layer by using a mixed solution containing alkali and hydrogen peroxide; wherein the mass concentration of hydrofluoric acid in the aqueous solution containing hydrofluoric acid is 5%-10%, the mass concentration of alkali in the mixed solution containing alkali and hydrogen peroxide is 2%-5%, and the mass concentration of hydrogen peroxide is 0.2%-1%; and / or, In S6, a chain cleaning machine is used to remove the anti-reflection layer, and the conditions for removing the anti-reflection layer include: a reaction temperature of 20-35°C, and a chain machine drive roller speed of 1.2-3.0m / min; a tank cleaning machine is used to remove the passivation layer, and the conditions for removing the passivation layer include: a reaction temperature of 25-35°C, and a reaction time of 60-240s.

6. The method for preparing a back contact battery according to claim 1, characterized in that: In S6, the ozone concentration in the mixed solution containing ozone and hydrochloric acid is 20-80 ppm, and the mass concentration of hydrochloric acid is 0.5%-4%; And / or, the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is greater than the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the second oxidation.

7. The method for preparing a back contact battery according to claim 6, characterized in that: In S6, the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the first oxidation is 50-80ppm, and the mass concentration of hydrochloric acid is 0.5%-4%; the ozone concentration in the mixed solution containing ozone and hydrochloric acid used in the second oxidation is 20-50ppm, and the mass concentration of hydrochloric acid is 0.5%-4%; and / or, In S6, the conditions for the first oxidation include: reaction time of 60-500 s, reaction temperature of 20-25°C; the conditions for the second oxidation include: reaction time of 60-240 s, reaction temperature of 20-25°C.

8. The method for preparing a back contact battery according to claim 1, characterized in that: In S6, the first pickling adopts a first hydrofluoric acid solution with a hydrofluoric acid mass concentration of 0.1%-1%, and the second pickling adopts a second hydrofluoric acid solution with a hydrofluoric acid mass concentration of 1%-5%; the reaction time of the first pickling is 15-30s, and the reaction time of the second pickling is 30-120s; And / or, in S6, the hydrofluoric acid concentration of the first hydrofluoric acid solution is lower than the hydrofluoric acid concentration of the second hydrofluoric acid solution.

9. The method for preparing a back contact battery according to claim 1, characterized in that: In S6, the alkali washing uses a mixed solution containing ammonia water or a strong base and H2O2, the mass concentration of ammonia water or a strong base is 2%-5%, and the mass concentration of H2O2 is 3%-5%; the conditions of the alkali washing include: a reaction temperature of 60-80°C, and a reaction time of 120-240s; and / or, In S6, the oxidation cleaning also includes the process of slow pulling and drying in sequence after the second pickling.

10. The method for preparing a back contact battery according to claim 1, characterized in that: In S2, the first semiconductor layer includes a first tunneling oxide layer and a first doped polysilicon layer, the first tunneling oxide layer has a thickness of 1-2 nm, and the first doped polysilicon layer has a thickness of 80-200 nm; and / or, The first semiconductor layer and the phosphorus-doped silicon oxide layer are formed by sequentially depositing and high-temperature annealing using a tubular PECVD method, with the deposition temperature controlled at 400-500°C and the high-temperature annealing temperature at 850-950°C.

11. The method for preparing a back contact battery according to claim 1 or 10, characterized in that: The formation process of the first semiconductor layer and the mask layer in S2 includes: in the first stage, nitrous oxide is introduced, the glow is turned on, and the first tunneling oxide layer is formed; in the second stage, silane, phosphine and hydrogen are introduced, the glow is turned on, and the first phosphorus-doped amorphous silicon layer with a thickness of 30-80nm is formed; in the third stage, silane, phosphine and hydrogen are introduced, the glow is turned on, and the second phosphorus-doped amorphous silicon layer with a thickness of 40-120nm is formed, and the phosphorus doping amount of the second phosphorus-doped amorphous silicon layer is higher than the phosphorus doping amount of the first phosphorus-doped amorphous silicon layer; in the fourth stage, silane and nitrous oxide are introduced, the glow is turned on, and the silicon oxide layer with a thickness of 20-60nm is formed; then, high-temperature annealing is performed under the condition of nitrogen introduction, and the high-temperature annealing temperature is 850-950°C, each phosphorus-doped amorphous silicon layer forms a first phosphorus-doped polycrystalline silicon layer under the high-temperature annealing condition, and the silicon oxide layer forms a phosphorus-doped silicon oxide layer under the high-temperature annealing condition; wherein, The laughing gas flow rate in the first stage is 8000-30000sccm; the silane flow rate in the second stage is 1000-3000sccm, the phosphine flow rate is 100-500sccm, and the hydrogen flow rate is 7000-9000sccm; the silane flow rate in the third stage is 1000-3000sccm, the phosphine flow rate is 200-1000sccm, and the hydrogen flow rate is 7000-9000sccm; the silane flow rate in the fourth stage is 500-1000sccm, and the laughing gas flow rate is 5000-8000sccm; and / or, In the first stage, the reaction pressure is controlled to be 100-200Pa, the power is 3000-10000W, and the reaction time is 20-100s; in the second stage, the reaction pressure is controlled to be 300-500Pa, the power is 2000-4000W, and the reaction time is 300-1500s; in the third stage, the reaction pressure is controlled to be 300-500Pa, the power is 3000-7000W, and the reaction time is 200-1000s; in the fourth stage, the reaction pressure is controlled to be 300-500Pa, the power is 3000-7000W, and the reaction time is 50-200s; in high temperature annealing, the annealing pressure is controlled to be 5000-50000Pa, the annealing time is 60-120min, and the nitrogen flow rate is 2000sccm-8000sccm.

12. The method for preparing a back contact battery according to claim 1, characterized in that: In S4, the passivation layer includes a second tunneling oxide layer and a second doped amorphous silicon layer; the thickness of the second tunneling oxide layer is 1-2 nm, and the thickness of the second doped amorphous silicon layer is 1-10 nm; and / or, The anti-reflection layer is a stacked layer comprising silicon nitride and silicon oxynitride arranged in sequence, the thickness ratio of silicon nitride to silicon oxynitride in the stacked layer is 1-3:1, and the total thickness of the stacked layer is 70-120nm.

13. The method for preparing a back contact battery according to claim 1, characterized in that: In S4, the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer sequentially formed on the back side, the intrinsic silicon layer has a thickness of 5-15 nm, and the second doped silicon layer has a thickness of 5-20 nm; and / or, The method for preparing the back contact battery further comprises the following steps: S8, performing a second etching opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region; S9, depositing a conductive film layer on the back surface obtained in S8; S10, performing a third etching opening on a portion of the conductive film layer located between the first semiconductor opening region and the second semiconductor opening region to form an insulating groove; S11, forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

14. A back contact battery, characterized in that: The back contact battery is prepared by the method for preparing a back contact battery as claimed in any one of claims 1 to 13.

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