Preparation method of solar cell

Abstract

The invention relates to a solar cell preparation method comprising the steps that a first conductive type substrate is provided, and the front side of the substrate comprises a second conductive type diffusion layer and a first protection layer which are sequentially stacked in the first direction away from the substrate; the back surface of the substrate comprises a gate structure and a sacrificial layer covering the gate structure; adopting etching laser to form an initial groove recessed towards the substrate in the gate structure; scanning the initial groove by using a target laser beam, then scanning the initial groove by using spraying water vapor, and physically splitting the substrate into a fragmented battery; processing the split cross section of the fragmented battery by adopting a target alkali solution, and simultaneously removing a laser damage layer and a sacrificial layer to obtain a target cross section with target flatness; and forming a dielectric layer at least covering the gate structure and the target section by adopting a target deposition process, wherein the dielectric layer has a target thickness. At least the flatness of the section of the solar cell can be improved, and the carrier transmission efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic manufacturing technology, and in particular to a method for preparing a solar cell. Background Art

[0002] Solar cells are thin sheets of optoelectronic semiconductors that use sunlight to generate electricity directly. They are also called "solar chips" or "photovoltaic cells". As long as the illumination meets certain illumination conditions, they can instantly output voltage and generate current in the presence of a circuit. As the market demand for scenario-based applications of solar cells continues to increase, it is generally necessary to cut the prepared cells into the required size and then package them to form solar panels that meet customer needs.

[0003] However, the traditional method of splitting a cell into multiple solar panels will form an irregular, uneven damage layer on the cross section of the solar panel, which will form a large number of recombination centers after passivation, affecting the transmission effect of carriers and reducing the performance and reliability of the manufactured solar cell. Summary of the invention

[0004] Based on this, it is necessary to provide a method for preparing solar cells in response to the above technical problems, which can at least improve the flatness of the cross-section of the solar cell, improve the carrier transfer efficiency, reduce the complexity and cost of the preparation process, and improve the performance and reliability of the manufactured solar cell.

[0005] In order to achieve the above objectives and other objectives, according to various embodiments of the present disclosure, a method for preparing a solar cell is provided, comprising:

[0006] A first conductive type substrate is provided, wherein the front side and the back side of the first conductive type substrate which are opposite to each other both comprise a texture structure, the front side of the substrate comprises a second conductive type diffusion layer and a first protective layer which are sequentially stacked along a first direction away from the substrate; and the back side of the substrate comprises a gate structure and a sacrificial layer covering the gate structure;

[0007] Using an etching laser to form an initial groove in the gate structure that is recessed toward the substrate;

[0008] The target laser beam is used to scan the initial groove and then the water vapor is used to scan the initial groove, and the substrate is physically split into sliced ​​cells;

[0009] The target alkaline solution is used to treat the split cross section of the split battery, and the laser damaged layer and the sacrificial layer are removed at the same time to obtain a target cross section with a target flatness;

[0010] A target deposition process is used to form a dielectric layer that at least covers the gate structure and the target cross section, and the dielectric layer has a target thickness.

[0011] In the method for preparing a solar cell in the above-mentioned embodiment, a second conductive type diffusion layer and a first protective layer are formed on the front side of a first conductive type substrate including a textured structure on both the front and back sides, and are stacked in sequence along a first direction away from the substrate. The back side of the substrate includes a gate structure and a sacrificial layer covering the gate structure. An etching laser is then used to form an initial groove recessed toward the substrate in the gate structure. The initial groove is used as a split guide groove. A target laser beam is used to scan the initial groove, and then a water vapor is used to scan the initial groove. The target laser beam is used to provide a heat flow for splitting, and the water vapor is used to provide a cold flow for splitting. The heat flow and the cold flow provide a temperature difference to the substrate along the initial groove, so that the substrate expands and contracts with heat and contracts with cold, and is physically fractured to form a split cell, thereby avoiding the bending of the split slices or the cutting of the split slices caused by a single stress on the crystal surface caused by a single heat flow or a cold flow. The target alkaline solution is then used to treat the split cross section of the sliced ​​battery, and the laser damaged layer and the sacrificial layer are removed at the same time to obtain a target cross section with a target flatness. The sacrificial layer is used to protect the gate structure from being damaged by the target alkaline solution, and the increase in the preparation process due to the introduction of the sacrificial layer is avoided, so as to ensure that the split cross section of the sliced ​​battery includes a target cross section with a target flatness; then a target deposition process is used to form a dielectric layer that at least covers the gate structure and the target cross section, and the dielectric layer has a target thickness. While protecting the target cross section, the density and surface flatness of the dielectric layer are ensured, the carrier transmission efficiency is improved, and the performance and reliability of the manufactured solar cell are improved; because the split cross section of the sliced ​​battery has the target flatness, the passivation layer deposition process used to fill the split cross section can be reduced, and the complexity and cost of the preparation process are reduced. In some embodiments, the power of the etching laser is greater than the power of the target laser, and the frequency of the etching laser is equal to the frequency of the target laser; the temperature difference of the initial groove after spraying water vapor and scanning the target laser beam is 150 degrees Celsius to 200 degrees Celsius, so that the substrate expands and contracts with heat and breaks physically to form a split battery, thereby avoiding the single stress generated by a single heat flow or cold flow on the crystal surface, causing the split piece to bend, or the irregular texture shape of the split cross section.

[0012] In some embodiments, the method for preparing a solar cell comprises at least one of the following features: the power of the etching laser is 30W-100W; the power of the target laser is 300W-600W; the spot diameter of the target laser beam is 1mm-2mm, and the scanning speed is 500 mm / s-800mm / s; the temperature of the sprayed water vapor is greater than 0 degrees Celsius and less than or equal to 25 degrees Celsius. With a target laser beam having a spot diameter of 1mm-2mm, a power of 300W-600W, and a scanning speed of 500 mm / s-800mm / s, the initial groove is used as a split guide groove, and the initial groove is scanned to cause thermal expansion of the substrate, and then the sprayed water vapor is used to provide a uniform cold source to generate regular thermal expansion and contraction stimulation, so that the substrate is physically broken to form a split cell, thereby avoiding the single stress generated by a single heat flow or cold flow on the crystal surface, which causes the split piece to bend, or the irregular texture shape of the split cross section.

[0013] In some embodiments, the target alkaline solution has an etching depth of 5μm-10μm on the split section; the target flatness includes: the average target size of the tower base is 20μ-50μm, the average height of the tower base is 0-2μm, the target size is at least used to characterize the length along the direction parallel to the split section, and the height is at least used to characterize the length along the direction perpendicular to the split section. By using the target alkaline solution to corrode the split section of the split battery, the etching depth is 5μm-10μm, and a target section with target flatness is obtained, so that the average height of the tower base of the target section is 0-2μm, and the average target size of the tower base is 20μ-50μm. While removing the laser damaged layer, the sacrificial layer is removed, which can reduce or avoid the passivation layer deposition process for filling the split section, and avoid the additional sacrificial layer removal process steps, reducing the complexity and cost of the preparation process. In some embodiments, the target alkaline solution includes potassium hydroxide solution and polishing additives, wherein the potassium hydroxide solution is 20L-40L, the polishing additive is 2L-5L, and the temperature of the target alkaline solution is 60 degrees Celsius-80 degrees Celsius. Potassium hydroxide solution is used to corrode the split cross-section of the split battery, and polishing additives are used to perform flattening polishing. Potassium hydroxide solution and polishing additives at appropriate temperatures can remove the laser damaged layer and the sacrificial layer at the same time, obtaining a target cross-section with a target flatness.

[0014] In some embodiments, the dielectric layer includes a silicon oxide layer; and forming the dielectric layer using a target deposition process includes:

[0015] An atomic layer deposition process is used to form a silicon oxide layer that at least covers the gate structure and the target cross-section, with a target thickness of 5nm-20nm. While protecting the target cross-section, the density and surface flatness of the dielectric layer are ensured, the carrier transfer efficiency is improved, and the performance and reliability of the manufactured solar cell are improved.

[0016] In some embodiments, a first conductive type substrate is provided, including: providing an initial first conductive type substrate; texturing the front and back sides of the initial first conductive type substrate to obtain a texture structure including a target pyramid, wherein the bottom size of the target pyramid is 1um-2um, and the tower height of the target pyramid is 1um-2um. The texture structure including the target pyramid can increase the roughness of the silicon wafer surface, reduce the reflection of light, and allow more light to enter the solar cell, thereby generating more photogenerated carriers. This structure utilizes the light trapping effect to extend the optical path of light in the silicon wafer, increase the absorption of light, and can improve the photoelectric conversion efficiency, improve the transmission characteristics of electron carriers, and enhance the stability and durability of the battery.

[0017] In some embodiments, the first protective layer includes an oxide layer; providing a first conductive type substrate includes: after forming a texture structure on both the front and back sides of the substrate, forming a second conductive type diffusion layer by a first diffusion doping process; the second conductive type diffusion layer is used to form a PN junction with the first conductive type substrate; and an oxide layer is formed on the surface of the second conductive type diffusion layer away from the substrate. The oxide layer is used to protect the texture structure and the PN junction from being corroded by the target alkaline solution in the subsequent process, thereby improving the performance and reliability of the manufactured solar cell.

[0018] In some embodiments, after the oxide layer is formed, the back side of the substrate is alkaline polished, and the base size of the back side of the substrate after polishing is 5um-20um. The back side of the substrate is flattened, and the impurity layer is removed to facilitate the growth of a tunneling oxide layer on the flush back side of the substrate, so as to improve the performance and reliability of the subsequent gate structure.

[0019] In some embodiments, after the back side of the substrate is treated with alkali polishing, forming a gate structure includes: forming a tunneling oxide layer on the back side of the substrate; using a second diffusion doping process to form a gate conductive layer on the surface of the tunneling oxide layer away from the substrate, and a sacrificial layer covering the gate conductive layer; the tunneling oxide layer and the gate conductive layer are used to jointly constitute a gate structure. In the process step of forming the gate conductive layer, a sacrificial layer covering the gate conductive layer is formed at the same time, and the sacrificial layer is used to protect the gate structure from being damaged by the target alkali solution, while avoiding the increase of the preparation process due to the introduction of the sacrificial layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1A schematic diagram of a partial enlargement of a scanning electron microscope photograph of a split cross section of a solar cell provided in an embodiment obtained by scanning with an optical microscope;

[0022] Figure 2 A schematic diagram of a process for preparing a solar cell provided in an embodiment of the present application;

[0023] Figure 3 A schematic diagram of the cross-sectional structure of a substrate in a method for preparing a solar cell provided in an embodiment of the present application;

[0024] Figure 4 It is a schematic cross-sectional structure diagram of a structure obtained after a first protective layer and a gate structure are formed in a method for preparing a solar cell provided in an embodiment of the present application;

[0025] Figure 5 It is a schematic cross-sectional structure diagram of a structure obtained after an initial groove is formed in a method for preparing a solar cell provided in an embodiment of the present application;

[0026] Figure 6 A schematic diagram of the cross-sectional structure of a split cell formed in a method for preparing a solar cell provided in an embodiment of the present application;

[0027] Figure 7 for Figure 6 The target cross section of the sliced ​​battery obtained in the experiment is a partially enlarged schematic diagram of a scanning electron microscope photograph obtained by scanning with an optical microscope;

[0028] Figure 8 It is a schematic cross-sectional structure diagram of a structure obtained after a dielectric layer is formed in a method for preparing a solar cell provided in an embodiment of the present application.

[0029] Description of reference numerals:

[0030] 10. Laser damaged layer; 101. Texture curve; 100. First conductive type substrate; 100a. Front side; 100b. Back side; 200. Second conductive type diffusion layer; 300. First protective layer; 41. Tunneling oxide layer; 42. Gate conductive layer; 40. Gate structure; 400. Tower base; 50. Initial groove; 60. Sacrificial layer; 70. Dielectric layer. DETAILED DESCRIPTION

[0031] In order to facilitate understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thorough and comprehensive.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0033] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0034] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0035] When used herein, the singular forms "a", "an" and " / the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of features, integers, steps, operations, elements and / or components can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0036] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic representations of ideal embodiments (and intermediate structures) of the present disclosure, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Thus, embodiments of the present disclosure should not be limited to the particular shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the present disclosure.

[0037] In the related half-cell preparation technology, the finished cell with printed electrodes is laser slotted and split into two symmetrical half-cells, and then the cross section of the half-cell is fixed in a metal boat using a specific fixture for deposition process to generate an aluminum oxide passivation layer at the cross section. The partial top view of the cross section of the half-cell is shown in the figure. Figure 1 As shown. Due to the laser grooving, an irregular and uneven laser damaged layer 10 is formed on the cross section of the half-cell, and a tilted or curved texture curve 101 appears locally. After the aluminum oxide passivation layer is deposited, a large number of recombination centers are formed at the laser damaged layer 10. The irregular cross-sectional morphology not only affects the carrier transmission effect, but also causes the aluminum oxide growth uniformity and density to deteriorate, affecting the passivation effect.

[0038] In order to improve the surface flatness of the aluminum oxide passivation layer as much as possible, the surface dangling bonds are passivated and the surface state density is reduced by generally increasing the thickness of the aluminum oxide passivation layer or regenerating a layer of aluminum oxide passivation layer.

[0039] The conventional solution is to optimize the laser grooving process as much as possible to reduce cross-section damage, and to increase the uniformity and density of the aluminum oxide passivation layer by increasing the deposition process of aluminum oxide and increasing the film thickness. However, since the laser damage layer of the cross section persists after grooving, the aforementioned negative effects have not been eradicated.

[0040] Based on this, the present application aims to provide a method for preparing a solar cell, which can at least improve the flatness of the cross section of the solar cell, improve the carrier transfer efficiency, reduce the complexity and cost of the preparation process, and improve the performance and reliability of the manufactured solar cell.

[0041] In some embodiments, please refer to Figure 2 , provides a method for preparing a solar cell, comprising:

[0042] Step S10: providing a first conductive type substrate, wherein the front side and the back side of the first conductive type substrate which are opposite to each other both comprise a texture structure, the front side of the substrate comprises a second conductive type diffusion layer and a first protective layer which are sequentially stacked along a first direction away from the substrate; and the back side of the substrate comprises a gate structure and a sacrificial layer covering the gate structure;

[0043] Step S20: using an etching laser to form an initial groove in the gate structure that is recessed toward the substrate;

[0044] Step S30: scanning the initial groove with a target laser beam and then scanning the initial groove with spray water vapor to physically split the substrate into sliced ​​cells;

[0045] Step S40: treating the split cross section of the split battery with a target alkaline solution, removing the laser damaged layer and the sacrificial layer at the same time, and obtaining a target cross section with a target flatness;

[0046] Step S50: using a target deposition process to form a dielectric layer that at least covers the gate structure and the target cross section, wherein the dielectric layer has a target thickness.

[0047] As an example, see Figure 3In step S10, an initial first conductive type substrate 100 is provided, and the initial first conductive type substrate 100 includes a front side 100a and a back side 100b that are opposite to each other. Then, the front side 100a and the back side 100b of the initial first conductive type substrate 100 are subjected to a texturing treatment, so that the front side 100a and the back side 100b of the initial first conductive type substrate 100 both include a texture structure having a target pyramid, the bottom size of the target pyramid is 1um-2um, and the tower height of the target pyramid is 1um-2um. For example, the bottom size of the target pyramid can be 1um, 1.5um, or 2um, etc., and the bottom size here can be obtained by measuring the length of the bottom surface of the target pyramid; the tower height of the target pyramid can be 1um, 1.5um, or 2um, etc., and the tower height here can be obtained by measuring the vertical distance from the vertex of the target pyramid to the bottom surface of the target pyramid. By texturing the front side 100a and the back side 100b of the initial first conductive type substrate 100, the roughness of the surface of the prepared silicon wafer can be increased, the reflection of light can be reduced, and more light can enter the solar cell, thereby generating more photogenerated carriers. This structure uses the light trapping effect to extend the optical path of light in the silicon wafer, increase light absorption, improve the photoelectric conversion efficiency, improve the transmission characteristics of electronic carriers, and enhance the stability and durability of the battery.

[0048] For example, after the front and back sides of the initial first conductive type substrate are textured, the pyramid-like structure can be rounded to obtain the target pyramid. The unrounded pyramid-like structure has sharp edges, and the top, sides and bottom of the pyramid are all pointed, which is not conducive to film uniformity and has a great impact on the passivation effect of solar cells. The target pyramid structure obtained after rounding can extend the optical path of light in the silicon wafer by using the light trapping effect, increase the absorption of light, improve the photoelectric conversion efficiency, improve the transmission characteristics of electron carriers, and enhance the stability and durability of the battery.

[0049] As an example, see Figure 4In step S10, after the texture structure is formed on the front side 100a and the back side 100b of the initial first conductive type substrate 100, the first conductive type substrate 100 can be placed in a diffusion furnace, and the first conductive type substrate 100 is treated by a first thermal diffusion doping process to form a second conductive type diffusion layer 200 on the front side 100a of the first conductive type substrate 100. The second conductive type diffusion layer 200 is used to form a PN junction with the first conductive type substrate 100, and the diffusion square resistance is 200 ohms / square to 400 ohms / square, such as 200 ohms / square, 300 ohms / square or 400 ohms / square. Afterwards, a tubular / chain oxidation process can be used to form an oxide layer on the surface of the second conductive type diffusion layer 200 away from the substrate 100, and the oxide layer is used to form a first protective layer 300. Thus, the oxide layer is used to protect the texture structure and the PN junction from being corroded by the target alkaline solution in the subsequent process, thereby improving the performance and reliability of the manufactured solar cell. For example, the temperature of the diffusion furnace can be 700°C-1000°C, such as 700°C, 810°C, 900°C, 940°C, 950°C or 1000°C, etc.; the diffusion time can be 1h-3h, such as 1h, 1.5h, 2.3h, 2.9h or 3h, etc.

[0050] For example, the material of the substrate may be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon or microcrystalline silicon.

[0051] For example, the first conductive type substrate may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type doping element, and the N-type doping element may be any one of the V group elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As). The P-type semiconductor substrate is doped with a P-type element, and the P-type doping element may be any one of the III group elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0052] As an example, please refer to Figure 4In step S10, after the oxide layer is formed, chain HF can be used to remove the borosilicate glass (BSG) on the back side 100b and the side (not shown), and then the back side 100b of the substrate is treated with alkali polishing. After polishing, the size of the tower base 400 on the back side 100b of the substrate is 5um-20um, for example, the size of the tower base 400 can be 5um, 10um, 15um or 20um, etc. The back side 100b of the substrate is planarized and the impurity layer is removed, so as to facilitate the growth of the tunneling oxide layer 41 on the flush back side 100b of the substrate, so as to improve the performance and reliability of the subsequent preparation of the gate structure 40. As an example, the concentration of hydrofluoric acid is 1%-20%, for example, 1%, 3%, 8%, 10%, 14%, 19% or 20%, etc.; the cleaning time is 5s-60s, for example, 5s, 10s, 15s, 20s, 25s, 30s, 40s, 50s or 60s, etc.

[0053] As an example, please refer to Figure 4 In step S10, after the back side 100b of the substrate is subjected to alkali polishing treatment, a gate structure 40 is formed, including: forming a tunneling oxide layer 41 on the back side 100b of the substrate; using a second diffusion doping process to form a gate conductive layer 42 on the surface of the tunneling oxide layer 41 away from the substrate, and a sacrificial layer 60 covering the gate conductive layer 42; the tunneling oxide layer 41 and the gate conductive layer 42 are used to jointly constitute the gate structure 40.

[0054] As an example, please refer to Figure 4 In step S10, after the back side 100b of the substrate is alkaline polished, an oxide layer or an amorphous silicon layer may be grown on the back side 100b of the substrate. The thickness of the oxide layer may be 1nm-2nm, such as 1nm, 1.5nm or 2nm, etc.; the thickness of the amorphous silicon layer may be 50nm, 100nm, 150nm or 200nm, etc.

[0055] As an example, please refer to Figure 4In step S10, after forming the amorphous silicon layer, a phosphorus diffusion process is used to crystallize the amorphous silicon into a polycrystalline structure during a high temperature annealing process, and the phosphorus element diffuses inwardly with a square resistance of 40 ohms / square to 100 ohms / square, such as 40 ohms / square, 60 ohms / square, 80 ohms / square or 100 ohms / square, etc. At the same time, 30nm-50nm phosphorus silicon glass is formed on the surface of the polycrystalline structure, for example, the thickness of the phosphorus silicon glass can be 30nm, 40nm or 50nm, etc. The phosphorus silicon glass is used to form the sacrificial layer 60, the polycrystalline structure is used to form the gate conductive layer 42, the oxide layer is used to form the tunneling oxide layer 41, and the tunneling oxide layer 41 and the gate conductive layer 42 are used to form the gate structure 40. The material of the tunneling oxide layer 41 can include any dielectric material having a tunneling passivation effect. For example, the material of the tunneling oxide layer 41 may include one or more of silicon oxide, aluminum oxide, titanium oxide, hafnium dioxide, gallium oxide, tantalum pentoxide, niobium pentoxide, silicon nitride, silicon carbonitride, aluminum nitride, titanium nitride, and titanium nitride carbide. The material of the gate conductive layer 42 may also include at least one of conductive materials such as copper, aluminum, nickel, or tin. The thickness of the tunneling oxide layer 41 is 1 nm-2 nm, such as 1 nm, 1.5 nm, or 2 nm, etc.; the thickness of the gate conductive layer 42 is 50 nm-200 nm, such as 50 nm, 100 nm, 150 nm, or 200 nm, etc.

[0056] As an example, please refer to Figure 4 In the process step of forming the gate conductive layer 42, a sacrificial layer 60 covering the gate conductive layer 42 is simultaneously formed. The sacrificial layer 60 is used to protect the gate structure 40 from being damaged by the target alkaline solution, while avoiding an increase in the preparation process due to the introduction of the sacrificial layer 60.

[0057] As an example, see Figure 5 In step S20, after an initial groove 50 recessed toward the substrate is formed in the gate structure 40 by etching laser, a red-na laser can be used to etch the initial groove 50 in the middle position of the substrate perpendicular to the main gate direction, and the angle between the laser incident angle and the substrate surface is 0-90°, such as 10°, 20°, 30°, 40°, 50°, 60°, 70°, 80° or 90°, etc., the laser power is 30-100W, such as 30W, 50W, 70W, 80W or 100W, etc.; the laser frequency is 50Khz-200Khz, such as 50Khz, 100Khz, 150Khz or 200Khz, etc.

[0058] As an example, see Figure 6In step S30, the initial groove 50 is scanned by a target laser beam and then scanned by spraying water vapor to physically split the substrate into sliced ​​cells; the power of the target laser is 300W-600W, such as 300W, 400W, 500W or 600W, etc.; the spot diameter of the target laser beam is 1mm-2mm, such as 1mm, 1.5mm or 2mm, etc., and the scanning speed is 500 mm / s-800mm / s, such as 500 mm / s, 600 mm / s, 700 mm / s or 800mm / s, etc.; the temperature of the spraying water vapor is greater than 0 degrees Celsius and less than or equal to 25 degrees Celsius, such as the temperature of the spraying water vapor is 1 degree Celsius, 5 degrees Celsius, 10 degrees Celsius, 15 degrees Celsius, 20 degrees Celsius or 25 degrees Celsius, etc. With a target laser beam having a spot diameter of 1 mm-2 mm, a power of 300 W-600 W, and a scanning speed of 500 mm / s-800 mm / s, the initial groove 50 is used as a split guide groove, and the initial groove 50 is scanned to cause thermal expansion of the substrate, and then spray water vapor is used to provide a uniform cold source to produce regular thermal expansion and contraction stimulation, so that the substrate is physically broken to form a split battery, thereby avoiding the single stress generated by a single heat flow or cold flow on the crystal surface, which causes the split piece to bend, or the irregular texture shape of the split cross section.

[0059] It should be noted that the split battery in the embodiment of the present application is formed by physically splitting the whole battery, and can be multiple splits, such as two splits (half splits), three splits or four splits, etc., and the embodiment of the present application does not make specific limitations.

[0060] In some embodiments, the sliced ​​cell can be any one of a Passivated Emitter and Rear Cell (PERC), a Passivated Emitter and Rear Totally Diffused Cell (PERT), a Tunnel Oxide Passivated Contact Cell (TOPCon), a Heterojunction Technology (HIT / HJT) or a Back Contact Cell (BC).

[0061] In some embodiments, the sliced ​​cells can be monocrystalline silicon photovoltaic cells, polycrystalline silicon photovoltaic cells, amorphous silicon photovoltaic cells or multi-compound photovoltaic cells. The multi-compound photovoltaic cells can specifically be cadmium sulfide photovoltaic cells, gallium arsenide photovoltaic cells, copper indium selenide photovoltaic cells or perovskite photovoltaic cells.

[0062] As an example, see Figure 5-Figure 7In step S40, the target alkaline solution is used to treat the split cross section of the split battery, and the laser damaged layer 10 and the sacrificial layer 60 are removed at the same time to obtain a target cross section with a target flatness. The corrosion depth of the target alkaline solution on the split cross section is 5μm-10μm, such as 5μm, 7μm, 9μm or 10μm, etc. The target flatness includes: the average target size of the tower base 400 is 20μm-50μm, such as 20μm, 30μm, 40μm or 50μm, etc.; the average height of the tower base 400 is 0-2μm, such as 0.2μm, 0.6μm, 0.8μm, 1.2μm, 1.5μm, 1.7μm, 1.8μm or 2μm, etc.; the height direction is consistent with the corrosion depth direction of the target alkaline solution. The target size is at least used to characterize the length along the direction parallel to the split cross section, and the height is at least used to characterize the length along the direction perpendicular to the split cross section. By using a target alkaline solution to corrode the split cross-section of the split battery, the corrosion depth is 5μm-10μm, for example, 5μm, 6μm, 7μm, 8μm, 9μm or 10μm, etc., a target cross-section with a target flatness is obtained, so that the average height of the tower base 400 of the target cross-section is 0-2μm, and the average target size of the tower base 400 is 20μ-50μm. While removing the laser damaged layer 10, the sacrificial layer 60 is removed, which can reduce or avoid the passivation layer deposition process for filling the split cross-section, and avoid the additional sacrificial layer 60 removal process steps, thereby reducing the complexity and cost of the preparation process.

[0063] For example, in the embodiments of the present application, a Zeta3D microscope may be used to measure the tower base size or tower base height in a target cross section.

[0064] As an example, please refer to Figure 7 , since the top of the tower is removed by the target alkaline solution, the surface of the tower base 400 of the target cross section is basically quadrilateral (such as a rectangle), and the long side length of the rectangular surface is 20μ-50μm, such as 20μm, 30μm, 40μm or 50μm, etc., and the long side length of the rectangular tower base surface can be used to represent the target size of the tower base of the target cross section. However, it should be noted that due to the influence of the process in mass production, other types of polygons will also appear on the surface of the tower base of the target cross section, such as non-strictly regular pentagons, hexagons, heptagons or octagons, etc. The polygonal tower base 400 surface and the flush surface are both conducive to improving the flatness of the split cross section, which in turn helps to reduce the dangling bonds and recombination centers on the surface of the split cross section, and helps to reduce the recombination current at the edge of the split battery, thereby improving the performance of the split battery.

[0065] In some embodiments, the target alkaline solution includes a potassium hydroxide solution and a polishing additive, wherein the potassium hydroxide solution is 20L-40L, such as 20L, 30L or 40L, etc.; the polishing additive is 2L-5L, such as 2L, 3L, 4L or 5L, etc.; the temperature of the target alkaline solution is 60 degrees Celsius-80 degrees Celsius, such as 60 degrees Celsius, 70 degrees Celsius or 80 degrees Celsius, etc. The potassium hydroxide solution is used to etch the split cross section of the split battery, and the polishing additive is used to perform a flattening polishing process; the potassium hydroxide solution and the polishing additive at a suitable temperature can remove the laser damaged layer and the sacrificial layer at the same time, and obtain a target cross section with a target flatness.

[0066] As an example, see Figure 8 In step S50, an atomic layer deposition process may be used to form a silicon oxide layer that at least covers the gate structure 40 and the target cross section. The silicon oxide layer is used to form a dielectric layer 70. The dielectric layer 70 has a target thickness of 5nm-20nm, such as 5nm, 10nm, 15nm or 20nm, etc. The use of an atomic layer deposition process to form the dielectric layer 70 can improve the thickness uniformity, density and step coverage of the dielectric layer 70, protect the target cross section, ensure the density and surface flatness of the dielectric layer 70, improve the carrier transmission efficiency, and improve the performance and reliability of the manufactured solar cell.

[0067] By way of example, the material of the dielectric layer may include at least one of silicon oxide, silicon nitride, silicon oxynitride, and silicon carbide.

[0068] Please continue to refer to Figure 2-Figure 8, a second conductive type diffusion layer 200 and a first protective layer 300 are formed on a front side 100a of a first conductive type substrate 100 including a texture structure, and are stacked in sequence along a first direction away from the substrate. The back side 100b of the substrate includes a gate structure 40 and a sacrificial layer 60 covering the gate structure 40. Then, an initial groove 50 recessed toward the substrate is formed in the gate structure 40 using an etching laser. The initial groove 50 is used as a split guide groove. A target laser beam is used to scan the initial groove 50, and then a spray water vapor is used to scan the initial groove 50. The target laser beam is used to provide a heat flow for splitting, and the spray water vapor is used to provide a cold flow for splitting. The heat flow and the cold flow provide a temperature difference to the substrate along the initial groove 50, so that the substrate expands and contracts with heat and contracts with cold, and is physically broken to form a split battery, thereby avoiding the bending of the split slices or the unevenness of the split cross section caused by a single stress caused by a single heat flow or a cold flow on the crystal plane. Regular texture shape; then the target alkaline solution is used to treat the split cross section of the sliced ​​battery, and the laser damaged layer 10 and the sacrificial layer 60 are removed at the same time to obtain a target cross section with a target flatness. The sacrificial layer 60 is used to protect the gate structure 40 from being damaged by the target alkaline solution, while avoiding the increase of the preparation process due to the introduction of the sacrificial layer 60, so as to ensure that the split cross section of the sliced ​​battery includes a target cross section with a target flatness; then a target deposition process is used to form a dielectric layer 70 that at least covers the gate structure 40 and the target cross section, and the dielectric layer 70 has a target thickness. While protecting the target cross section, the density and surface flatness of the dielectric layer 70 are ensured, thereby improving the carrier transmission efficiency and improving the performance and reliability of the manufactured solar cell; since the split cross section of the sliced ​​battery has the target flatness, the passivation layer deposition process used to fill the split cross section can be reduced, thereby reducing the complexity and cost of the preparation process. In some embodiments, the power of the etching laser is greater than the power of the target laser, and the frequency of the etching laser is equal to the frequency of the target laser; the temperature difference of the initial groove 50 after spraying water vapor and scanning the target laser beam is 150 degrees Celsius-200 degrees Celsius, so that the substrate expands and contracts with heat and breaks physically to form a split battery, thereby avoiding the single stress generated by a single heat flow or cold flow on the crystal surface, causing the split piece to bend, or the irregular texture shape of the split cross section.

[0069] As an example, after forming the dielectric layer, at least one of plasma enhanced chemical vapor deposition (PECVD), physical vapor deposition (PVD), plasma enhanced atomic layer deposition (PEALD), etc. can be used to deposit at least one passivation film on the front and back sides of the substrate, and the passivation film includes at least one of silicon nitride, silicon oxynitride, silicon oxide, etc. Then, a metal electrode is prepared by screen printing process, and sintered under high temperature conditions of 700°C-800°C to form a good ohmic contact, for example, the sintering temperature can be 700°C, 720°C, 750°C, 780°C or 800°C, etc.

[0070] In some embodiments, the embodiments of the present disclosure also provide a photovoltaic module, including: a battery string, a packaging film and a cover plate, the battery string includes the sliced ​​battery of any of the above embodiments; the packaging film is used to cover the surface of the battery string; the cover plate is used to cover the surface of the packaging film away from the battery string.

[0071] In some embodiments, adjacent slice batteries are connected via a connecting component, which is located on a surface of the slice battery where the main grid is away from the battery body and is in electrical contact with the main grid. One end of the connecting component is electrically connected to the main grid of one slice battery, and the other end of the connecting component is electrically connected to the main grid of another adjacent slice battery. The connecting component can be welded to a welding portion of the main grid to electrically connect the connecting component to the main grid, and multiple slice batteries are connected in series via the connecting component.

[0072] In some embodiments, the connecting component may be composed of a conductive layer and a welding layer wrapping the surface of the conductive layer, wherein the material of the conductive layer includes conductive materials with good conductivity such as copper, nickel, gold, silver, or alloy materials with low resistivity; the material of the welding layer includes materials with low melting points such as tin-zinc alloy, tin-bismuth alloy, or tin-indium alloy.

[0073] In some embodiments, the encapsulation film may be an organic encapsulation film such as an ethylene-vinyl acetate copolymer film, a polyethylene-octene co-elastic film, or a polyvinyl butyral film. The encapsulation film can prevent the photovoltaic cell from being damaged by a harsh environment (such as rain, snow, sand, dust, heat, etc.), thereby improving the durability of the photovoltaic cell and extending the life of the photovoltaic cell.

[0074] In some embodiments, the cover plate may be a glass cover plate, a plastic cover plate or the like with a light-transmitting function. The cover plate can prevent the photovoltaic cells from being affected by the environment and improve the service life and stability of the photovoltaic module.

[0075] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0076] The above embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure shall be subject to the attached claims.

Claims

1. A method for preparing a solar cell, characterized in that: include: A first conductive type substrate is provided, wherein the front side and the back side of the first conductive type substrate which are opposite to each other both comprise a texture structure, the front side of the substrate comprises a second conductive type diffusion layer and a first protective layer which are sequentially stacked along a first direction away from the substrate; the back side of the substrate comprises a gate structure and a sacrificial layer covering the gate structure; Using an etching laser to form an initial groove in the gate structure that is recessed toward the substrate; Scanning the initial groove with a target laser beam and then scanning the initial groove with spray water vapor to physically split the substrate into sliced ​​cells; The target alkaline solution is used to treat the split cross section of the split battery, and the laser damaged layer and the sacrificial layer are removed at the same time to obtain a target cross section with a target flatness; A target deposition process is used to form a dielectric layer that at least covers the gate structure and the target cross section, and the dielectric layer has a target thickness.

2. The method for preparing a solar cell according to claim 1, characterized in that: The power of the etching laser is greater than the power of the target laser, and the frequency of the etching laser is equal to the frequency of the target laser; The temperature difference between the sprayed water vapor and the initial groove after the target laser beam scans is 150 degrees Celsius to 200 degrees Celsius.

3. The method for preparing a solar cell according to claim 1, characterized in that: Includes at least one of the following features: The power of the etching laser is 30W-100W; the power of the target laser is 300W-600W; The spot diameter of the target laser beam is 1mm-2mm, and the scanning speed is 500 mm / s-800mm / s; The temperature of the sprayed water vapor is greater than 0 degrees Celsius and less than or equal to 25 degrees Celsius.

4. The method for preparing a solar cell according to claim 1, characterized in that: The corrosion depth of the target alkaline solution on the split cross section is 5 μm-10 μm; The target flatness includes: an average target size of the tower base is 20μ-50μm, an average height of the tower base is 0-2μm, the target size is at least used to characterize the length along the direction parallel to the split section, and the height is at least used to characterize the length along the direction perpendicular to the split section.

5. The method for preparing a solar cell according to claim 1, characterized in that: The target alkaline solution includes a potassium hydroxide solution and a polishing additive, wherein the potassium hydroxide solution is 20L-40L, the polishing additive is 2L-5L, and the temperature of the target alkaline solution is 60 degrees Celsius-80 degrees Celsius.

6. The method for preparing a solar cell according to any one of claims 1 to 5, characterized in that: The dielectric layer includes a silicon oxide layer; and forming the dielectric layer using a target deposition process includes: An atomic layer deposition process is used to form a silicon oxide layer that at least covers the gate structure and the target cross section, and the target thickness is 5nm-20nm.

7. The method for preparing a solar cell according to any one of claims 1 to 5, characterized in that: The providing of a first conductive type substrate comprises: providing an initial first conductivity type substrate; The front and back sides of the initial first conductive type substrate are subjected to texturing treatment to obtain a texture structure including a target pyramid, wherein the bottom size of the target pyramid is 1um-2um, and the height of the target pyramid is 1um-2um.

8. The method for preparing a solar cell according to any one of claims 1 to 5, characterized in that: The first protective layer includes an oxide layer; The providing of a first conductive type substrate comprises: After the texture structures are formed on the front and back sides of the substrate, a first diffusion doping process is used to form a second conductive type diffusion layer; the second conductive type diffusion layer is used to form a PN junction with the first conductive type substrate; The oxide layer is formed on a surface of the second conductive type diffusion layer facing away from the substrate.

9. The method for preparing a solar cell according to claim 8, characterized in that: After the oxide layer is formed, the back side of the substrate is subjected to alkali polishing, and the tower base size of the back side of the substrate after polishing is 5um-20um.

10. The method for preparing a solar cell according to claim 9, characterized in that: After the back side of the substrate is subjected to alkali polishing, forming the gate structure comprises: forming a tunneling oxide layer on the back side of the substrate; A second diffusion doping process is used to form a gate conductive layer on the surface of the tunneling oxide layer away from the substrate, and a sacrificial layer covering the gate conductive layer; the tunneling oxide layer and the gate conductive layer are used to jointly constitute the gate structure.

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