LED epitaxial structure and LED chip

Abstract

The invention provides an LED epitaxial structure and an LED chip, and relates to the technical field of semiconductor light emitting diodes. According to the LED epitaxial structure provided by the invention, the structural design of the N-type temporary substrate is adopted, so that the preparation cost of the LED epitaxial structure and a chip is reduced; and by adopting the structural design of the composite buffer layer, the transition from an N-type material to a P-type material is realized, the generation of lattice defects is reduced, and the preparation quality of the LED epitaxial structure is improved. According to the LED chip provided by the invention, N-type and P-type inverted epitaxial structures are realized, so that the LED chip forms a mesa structure for exposing the N-type layer at the device region, and the carrier mobility of the N-type layer is greater than that of the P-type layer, so that the current expansion effect of the LED chip at the mesa structure is higher, the current expansion capability of the LED chip is improved, and the service life of the LED chip is prolonged. The photoelectric performance and the antistatic capability of the LED chip are improved, and the performance of the LED chip is improved.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor light-emitting diodes (ELDs), and more specifically, to an LED epitaxial structure and an LED chip. Background Art

[0002] As a new generation of green lighting energy, LED has been widely used in many fields. LED lighting has now completely replaced traditional lighting sources, and LED has also occupied an important position in the display industry, and its market share and application areas are constantly expanding. In particular, as the resolution of LED display devices becomes higher and higher, micro-LED devices (such as Mini / MicroLED) have become the new favorite in the display field. Compared with traditional display devices, display devices composed of micro-LED devices have the advantages of fast response, high color gamut, high PPI, and low energy consumption. Although LED devices have many advantages, with the gradual development of LED display technology and higher demands, the performance of LED devices needs to be further improved. Summary of the invention

[0003] In view of this, the present application provides an LED epitaxial structure and an LED chip, which effectively solve the technical problems existing in the prior art, improve the preparation quality of the LED epitaxial structure, and improve the performance of the LED chip.

[0004] To achieve the above objectives, the technical solutions provided by this application are as follows:

[0005] An LED epitaxial structure, comprising:

[0006] An N-type temporary substrate, a composite buffer layer, a P-type corrosion stop layer, a P-type ohmic contact layer, a P-type layer, an active layer and an N-type layer are sequentially stacked and grown;

[0007] The composite buffer layer comprises an N-type buffer layer, a non-doped buffer layer and a P-type buffer layer which are grown in sequence and stacked together, wherein the N-type buffer layer is located between the N-type temporary substrate and the non-doped buffer layer.

[0008] Optionally, the P-type layer includes a P-type current spreading layer and a P-type limiting layer that are grown in sequence and stacked together, wherein the P-type current spreading layer is located between the P-type ohmic contact layer and the P-type limiting layer.

[0009] Optionally, the N-type layer includes an N-type confinement layer, an N-type ohmic contact layer and an N-type current spreading layer that are grown in sequence, wherein the N-type confinement layer is located between the active layer and the N-type ohmic contact layer.

[0010] Optionally, the N-type ohmic contact layer is an N-type GaInP ohmic contact layer;

[0011] And / or, the N-type current spreading layer is an N-type AlGaInP current spreading layer.

[0012] Based on the same inventive concept, the present application also provides an LED chip, the LED chip comprising:

[0013] fixing the substrate;

[0014] An N-type layer, the N-type layer is located on one side of the fixed substrate, and the fixed substrate and the N-type layer are bonded and fixed, wherein a surface of the N-type layer facing away from the fixed substrate includes a device region and a first electrode region;

[0015] an active layer, the active layer being located on a side of the N-type layer away from the fixed substrate, and the active layer being located in the device region;

[0016] A P-type layer, the P-type layer is located on a side of the active layer away from the N-type layer, and a surface of the P-type layer on a side away from the fixed substrate includes a second electrode region;

[0017] a P-type ohmic contact layer, the P-type ohmic contact layer being located at a side of the P-type layer away from the fixed substrate, and the P-type ohmic contact layer being located at the second electrode region;

[0018] An N-type electrode and a P-type electrode, wherein the N-type electrode is located on a side of the N-type layer away from the fixed substrate, and the N-type layer is located at the first electrode region; the P-type electrode is located on a side of the P-type ohmic contact layer away from the fixed substrate, and the P-type electrode is located at the second electrode region.

[0019] Optionally, the P-type layer includes a P-type current spreading layer and a P-type limiting layer that are grown in sequence and stacked, wherein the P-type current spreading layer is located between the P-type ohmic contact layer and the P-type limiting layer;

[0020] And / or, the N-type layer includes an N-type restriction layer, an N-type ohmic contact layer and an N-type current spreading layer that are grown in sequence, wherein the N-type restriction layer is located between the active layer and the N-type ohmic contact layer; in the device area, the N-type layer exposes the N-type ohmic contact layer, and the N-type electrode is in contact and electrically connected with the N-type ohmic contact layer.

[0021] Optionally, the P-type current spreading layer is a P-type AlGaInP current spreading layer;

[0022] And / or, the N-type ohmic contact layer is an N-type GaInP ohmic contact layer;

[0023] And / or, the N-type current spreading layer is an N-type AlGaInP current spreading layer.

[0024] Optionally, a surface of the N-type layer facing the fixed substrate is a roughened surface.

[0025] Optionally, the LED chip further includes:

[0026] A protective film layer, the protective film layer covers the exposed surfaces of the N-type layer, the active layer, the P-type layer and the P-type ohmic contact layer, and the protective film layer includes a first hollowing out that exposes at least a portion of the N-type electrode, and a second hollowing out that exposes at least a portion of the P-type electrode;

[0027] A first pad and a second pad, wherein the first pad is electrically connected to the N-type electrode through the first hollowing out, and the second pad is electrically connected to the P-type electrode through the second hollowing out.

[0028] Optionally, the protective film layer is an insulating isolation layer or a DBR layer.

[0029] Compared with the prior art, the technical solution provided by this application has at least the following advantages:

[0030] The present application provides an LED epitaxial structure and an LED chip, wherein the LED epitaxial structure comprises: an N-type temporary substrate, a composite buffer layer, a P-type corrosion stop layer, a P-type ohmic contact layer, a P-type layer, an active layer and an N-type layer grown in sequence; the composite buffer layer comprises an N-type buffer layer, an undoped buffer layer and a P-type buffer layer grown in sequence, wherein the N-type buffer layer is located between the N-type temporary substrate and the undoped buffer layer. And, the LED chip includes: a fixed substrate; an N-type layer, the N-type layer is located on one side of the fixed substrate, and the fixed substrate and the N-type layer are bonded and fixed, wherein the surface of the N-type layer away from the fixed substrate includes a device area and a first electrode area; an active layer, the active layer is located on the side of the N-type layer away from the fixed substrate, and the active layer is located at the device area; a P-type layer, the P-type layer is located on the side of the active layer away from the N-type layer, and the surface of the P-type layer away from the fixed substrate includes a second electrode area; a P-type ohmic contact layer, the P-type ohmic contact layer is located on the side of the P-type layer away from the fixed substrate, and the P-type ohmic contact layer is located at the second electrode area; an N-type electrode and a P-type electrode, the N-type electrode is located on the side of the N-type layer away from the fixed substrate, and the N-type layer is located at the first electrode area; the P-type electrode is located on the side of the P-type ohmic contact layer away from the fixed substrate, and the P-type electrode is located at the second electrode area.

[0031] From the above content, it can be seen that the LED epitaxial structure provided by the present application adopts the structural design of the N-type temporary substrate, which reduces the preparation cost of the LED epitaxial structure and the chip; and the LED epitaxial structure adopts the structural design of the composite buffer layer, and the composite buffer layer includes an N-type buffer layer, a non-doped buffer layer and a P-type buffer layer that are sequentially superimposed and grown, thereby realizing the transition from N-type material to P-type material, reducing the generation of lattice defects, and improving the preparation quality of the LED epitaxial structure. In addition, the LED chip provided by the present application realizes an inverted epitaxial structure of N-type and P-type, so that the LED chip forms a mesa structure with an exposed N-type layer in the device area, and because the carrier mobility of the N-type layer is greater than the carrier mobility of the P-type layer, the current expansion effect of the LED chip at the mesa structure is higher, which improves the current expansion capability of the LED chip, enhances the photoelectric performance and antistatic capability of the LED chip, and improves the performance of the LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0033] Figure 1 A schematic diagram of the structure of an LED epitaxial structure provided in an embodiment of the present application;

[0034] Figure 2 A schematic diagram of another LED epitaxial structure provided in an embodiment of the present application;

[0035] Figure 3 A flow chart of a method for preparing an LED epitaxial structure provided in an embodiment of the present application;

[0036] Figure 4 A schematic diagram of the structure of an LED chip provided in an embodiment of the present application;

[0037] Figure 5 A schematic diagram of the structure of another LED chip provided in an embodiment of the present application;

[0038] Figure 6 This is a schematic diagram of the structure of another LED chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0040] As described in the background technology, LED, as a new generation of green lighting energy, has been widely used in many fields. LED lighting has now completely replaced traditional lighting sources, and LED has also occupied an important position in the display industry, and its market share and application areas are constantly expanding. In particular, as the resolution of LED display devices becomes higher and higher, micro LED devices (such as Mini / Micro LED) have become the new favorite in the display field. Compared with traditional display devices, display devices composed of micro LED devices have the advantages of fast response, high color gamut, high PPI, low energy consumption, etc. Although LED devices have many advantages, with the gradual development of LED display technology and higher demands, the performance of LED devices needs to be further improved.

[0041] Based on this, the embodiments of the present application provide an LED epitaxial structure and an LED chip, which effectively solve the technical problems existing in the prior art, improve the preparation quality of the LED epitaxial structure, and improve the performance of the LED chip.

[0042] To achieve the above purpose, the technical solution provided in the embodiment of the present application is as follows, specifically combined with Figures 1 to 6 The technical solution provided in the embodiments of the present application is described in detail.

[0043] refer to Figure 1 , which is a schematic diagram of a structure of an LED epitaxial structure provided in an embodiment of the present application, wherein the LED epitaxial structure provided in an embodiment of the present application comprises: an N-type temporary substrate 11, a composite buffer layer 12, a P-type corrosion stop layer 13, a P-type ohmic contact layer 14, a P-type layer 15, an active layer 16 and an N-type layer 17 grown in sequence. The composite buffer layer 12 comprises an N-type buffer layer 121, an undoped buffer layer 122 and a P-type buffer layer 123 grown in sequence, wherein the N-type buffer layer 121 is located between the N-type temporary substrate 11 and the undoped buffer layer 122.

[0044] From the above content, it can be seen that the LED epitaxial structure provided in the embodiment of the present application adopts the structural design of the N-type temporary substrate 11, which reduces the preparation cost of the LED epitaxial structure and the chip; and the LED epitaxial structure adopts the structural design of the composite buffer layer 12, and the composite buffer layer 12 includes an N-type buffer layer 121, a non-doped buffer layer 122 and a P-type buffer layer 123 that are sequentially superimposed and grown, thereby realizing the transition from N-type material to P-type material, reducing the generation of lattice defects, and improving the preparation quality of the LED epitaxial structure. In addition, the LED epitaxial structure provided in the embodiment of the present application realizes the inversion of N-type and P-type, and a mesa structure of the exposed N-type layer 17 will be formed when the LED chip is prepared later, and because the carrier mobility of the N-type layer 17 is greater than the carrier mobility of the P-type layer 15, the current expansion effect of the prepared LED chip at the mesa structure is higher, which improves the current expansion capability of the LED chip, enhances the photoelectric performance and antistatic capability of the LED chip, and improves the performance of the LED chip.

[0045] refer to Figure 2 As shown, it is a schematic diagram of the structure of another LED epitaxial structure provided by the embodiment of the present application, wherein the P-type layer 15 provided by the embodiment of the present application includes a P-type current expansion layer 151 and a P-type limiting layer 152 which are grown in sequence, wherein the P-type current expansion layer 151 is located between the P-type ohmic contact layer 14 and the P-type limiting layer 152, thereby further improving the current expansion capability of the subsequently prepared LED chip through the design of the P-type current expansion layer 151, and improving the performance of the LED chip. Figure 2 As shown, the N-type layer 17 provided in the embodiment of the present application includes an N-type limiting layer 171, an N-type ohmic contact layer 172 and an N-type current expansion layer 173 which are sequentially stacked and grown, wherein the N-type limiting layer 171 is located between the active layer 16 and the N-type ohmic contact layer 172, thereby improving the ohmic contact performance of the epitaxial structure through the design of the N-type ohmic contact layer 172; and through the design of the N-type current expansion layer 173, the current expansion capability of the LED chip prepared subsequently is further improved, and the performance of the LED chip is improved. In addition, the LED epitaxial structure provided in the embodiment of the present application realizes the inversion of the N-type and P-type, and a mesa structure with the exposed N-type ohmic contact layer 172 will be formed when the LED chip is prepared subsequently, and because the carrier mobility of the N-type current expansion layer 173 is greater than the carrier mobility of the P-type current expansion layer 151, the current expansion effect of the prepared LED chip at the mesa structure is higher, the current expansion capability of the LED chip is improved, the photoelectric performance and antistatic ability of the LED chip are improved, and the performance of the LED chip is improved.

[0046] In some embodiments, the N-type ohmic contact layer 172 provided in the embodiment of the present application is an N-type GaInP ohmic contact layer, whose band gap is larger than the existing ohmic contact layer made of GaAs material, thereby avoiding the absorption of light and improving the light extraction efficiency; and because the GaInP material does not contain Al components compared to the AlGaInP material, it is easier to form an ohmic contact, thereby reducing the voltage. And / or, the N-type current expansion layer 173 provided in the embodiment of the present application is an N-type AlGaInP current expansion layer, and the P-type current expansion layer 151 is a P-type AlGaInP current expansion layer. Compared with the existing current expansion layer made of GaP material, there is no lattice mismatch problem between the AlGaInP current expansion layer provided in the embodiment of the present application and the substrate, which improves the crystal quality of the LED epitaxial structure.

[0047] refer to Figure 3 FIG. 1 is a flow chart of a method for preparing an LED epitaxial structure provided in an embodiment of the present application. Figure 2 Taking the LED epitaxial structure shown in the figure as an example, the method for preparing the LED epitaxial structure provided in the embodiment of the present application includes:

[0048] S1. Provide an N-type temporary substrate 11. The N-type temporary substrate 11 provided in the embodiment of the present application may be an N-type GaAs substrate, specifically an N-type GaAs 15° substrate. The N-type temporary substrate 11 is placed in a reaction chamber and heated to perform subsequent epitaxial structure growth.

[0049] S2. A composite buffer layer 12 is grown on one side of the N-type temporary substrate 11, wherein the composite buffer layer 12 includes an N-type buffer layer 121, an undoped buffer layer 122, and a P-type buffer layer 123 that are grown in sequence. The composite buffer layer 12 provided in the embodiment of the present application may be a composite GaAs buffer layer. Specifically, the N-type buffer layer 121 may be an N-type GaAs buffer layer, and the doping element of the N-type GaAs buffer layer may be Si / Te, and its doping concentration may be 1 to 5E18 / cm 3 , and its thickness can be 1000 to 4000 angstroms. The non-doped buffer layer 122 can be a non-doped GaAs buffer layer, and the thickness of the non-doped GaAs buffer layer can be 500 to 2000 angstroms. And, the P-type buffer layer 123 can be a P-type GaAs buffer layer, and the doping element of the P-type GaAs buffer layer can be Mg / Zn, and its doping concentration can be 1 to 5E18 / cm 3 , and its thickness can be 1000 to 4000 angstroms.

[0050] S3, growing a P-type corrosion stop layer 13 on the composite buffer layer 12. The P-type corrosion stop layer 13 provided in the embodiment of the present application may be a P-type GaInP corrosion stop layer, and its doping element may be Mg / Zn, and its doping concentration may be 0.5-5E18 / cm 3 .

[0051] S4, growing a P-type ohmic contact layer 14 on the P-type corrosion stop layer 13. The P-type ohmic contact layer 14 provided in the embodiment of the present application may be a P-type GaAs ohmic contact layer, and its doping element may be Mg / Zn, and its doping concentration may be 1 to 5E18 / cm 3 .

[0052] S5. Growing a P-type layer 15 on the P-type ohmic contact layer 14, wherein the P-type layer 15 includes a P-type current spreading layer 151 and a P-type limiting layer 152 that are grown in sequence. The P-type current spreading layer 151 provided in the embodiment of the present application may be a P-type AlGaInP current spreading layer, and its doping element may be Mg / Zn, and its doping concentration may be 0.5 to 5E18 / cm 3 Furthermore, the P-type confinement layer 152 provided in the embodiment of the present application may be a P-type AlInP confinement layer, the doping element thereof may be Mg / Zn, and the doping concentration thereof may be 0.5 to 3E18 / cm 3 .

[0053] S6. Growing an active layer 16 on the P-type layer 15. The active layer 16 provided in the embodiment of the present application may be a multiple quantum well (MQW) active layer.

[0054] S7, growing an N-type layer 17 on the active layer 16, wherein the N-type layer 17 includes an N-type confinement layer 171, an N-type ohmic contact layer 172 and an N-type current spreading layer 173 that are sequentially grown in a stacked manner. The N-type confinement layer 171 provided in the embodiment of the present application may be an N-type AlInP confinement layer, and the doping element of the N-type AlInP confinement layer may be Si / Te, and its doping concentration may be 0.5 to 3E18 / cm 3 The N-type ohmic contact layer 172 may be an N-type GaInP ohmic contact layer. The doping element of the N-type GaInP ohmic contact layer may be Si / Te, and the doping concentration thereof may be 1 to 5E18 / cm 3 Furthermore, the N-type current spreading layer 173 may be an N-type AlGaInP current spreading layer, and the doping element of the N-type AlGaInP current spreading layer may be Si / Te, and its doping concentration may be 1 to 5E18 / cm 3 .

[0055] Based on the same inventive concept, the embodiment of the present application further provides an LED chip, which is prepared by using the LED epitaxial structure provided by any of the above embodiments. Figure 4 As shown, it is a schematic diagram of the structure of an LED chip provided in an embodiment of the present application, wherein the LED chip provided in an embodiment of the present application comprises: a fixed substrate 21. An N-type layer 22, wherein the N-type layer 22 is located on one side of the fixed substrate 21, and the fixed substrate 21 and the N-type layer 22 are bonded and fixed, wherein a bonding layer 28 is provided between the fixed substrate 21 and the N-type layer 22 (optionally, the bonding layer 28 can be a SiO2 bonding layer), and the surface of the N-type layer 22 on the side away from the fixed substrate 21 includes a device region and a first electrode region. An active layer 23, wherein the active layer 23 is located on the side of the N-type layer 22 away from the fixed substrate 21, and the active layer 23 is located at the device region. A P-type layer 24, wherein the P-type layer 24 is located on the side of the active layer 23 away from the N-type layer 22, and the surface of the P-type layer 24 on the side away from the fixed substrate 21 includes a second electrode region. A P-type ohmic contact layer 25, the P-type ohmic contact layer 25 is located on the side of the P-type layer 24 away from the fixed substrate 21, and the P-type ohmic contact layer 25 is located at the second electrode region. An N-type electrode 26 and a P-type electrode 27, the N-type electrode 26 is located on the side of the N-type layer 22 away from the fixed substrate 21, and the N-type layer 22 is located at the first electrode region; the P-type electrode 27 is located on the side of the P-type ohmic contact layer 25 away from the fixed substrate 21, and the P-type electrode 27 is located at the second electrode region.

[0056] It can be understood that the N-type layer 22 in the LED chip provided in the embodiment of the present application is prepared from the N-type layer 17 of the LED epitaxial structure, the active layer 23 in the LED chip is prepared from the active layer 16 of the LED epitaxial structure, and the P-type layer 24 in the LED chip is prepared from the P-type layer 15 of the LED epitaxial structure. Among them, the LED chip provided in the embodiment of the present application is prepared using the LED epitaxial structure provided in any of the above embodiments, and the crystal quality of the epitaxial structure in the LED chip is high, which improves the performance of the LED chip. In addition, the LED epitaxial structure provided in the embodiment of the present application realizes the inversion of N-type and P-type, and the LED chip prepared based on this forms a mesa structure with the exposed N-type layer 22 at the device area, and because the carrier mobility of the N-type layer 22 is greater than the carrier mobility of the P-type layer 24, the prepared LED chip has a higher current expansion effect at the mesa structure, which improves the current expansion capability of the LED chip, enhances the photoelectric performance and antistatic capability of the LED chip, and improves the performance of the LED chip.

[0057] refer to Figure 5As shown, it is a schematic diagram of the structure of another LED chip provided in an embodiment of the present application, wherein the P-type layer 24 provided in the embodiment of the present application includes a P-type current expansion layer 241 and a P-type limiting layer 242 that are grown in sequence and stacked, wherein the P-type current expansion layer 241 is located between the P-type ohmic contact layer 25 and the P-type limiting layer 242, thereby further improving the current expansion capability of the LED chip through the design of the P-type current expansion layer 241, and improving the performance of the LED chip. And / or, the N-type layer 22 provided in the embodiment of the present application includes an N-type restriction layer 221, an N-type ohmic contact layer 222 and an N-type current expansion layer 223 that are grown in sequence, wherein the N-type restriction layer 221 is located between the active layer 23 and the N-type ohmic contact layer 222; at the device area, the N-type layer 22 exposes the N-type ohmic contact layer 222, and the N-type electrode 26 is in contact and electrically connected with the N-type ohmic contact layer 222, thereby improving the ohmic contact performance of the epitaxial structure through the design of the N-type ohmic contact layer 222; and through the design of the N-type current expansion layer 223, the current expansion capability of the LED chip is further improved, and the performance of the LED chip is improved. In addition, the LED epitaxial structure provided in the embodiment of the present application realizes the inversion of N-type and P-type, so that the prepared LED chip forms a table structure with an exposed N-type ohmic contact layer 222, and because the carrier mobility of the N-type current expansion layer 223 is greater than the carrier mobility of the P-type current expansion layer 241, the current expansion effect of the prepared LED chip at the table structure is higher, which improves the current expansion capability of the LED chip, enhances the photoelectric performance and antistatic ability of the LED chip, and improves the performance of the LED chip.

[0058] In some embodiments, the N-type ohmic contact layer 222 provided in the embodiment of the present application is an N-type GaInP ohmic contact layer, whose band gap is larger than the existing ohmic contact layer made of GaAs material, thereby avoiding the absorption of light and improving the light extraction efficiency; and because the GaInP material does not contain Al components compared to the AlGaInP material, it is easier to form an ohmic contact, thereby reducing the voltage. And / or, the N-type current expansion layer 223 provided in the embodiment of the present application is an N-type AlGaInP current expansion layer, and / or, the P-type current expansion layer 241 is a P-type AlGaInP current expansion layer. Compared with the existing current expansion layer made of GaP material, there is no lattice mismatch problem between the AlGaInP current expansion layer provided in the embodiment of the present application and the substrate, which improves the crystal quality of the LED epitaxial structure.

[0059] refer to Figure 6, which is a schematic diagram of the structure of another LED chip provided in an embodiment of the present application, wherein the surface of the N-type layer 22 provided in the embodiment of the present application facing the fixed substrate 21 is a roughened surface. When the N-type layer 22 includes an N-type confinement layer 221, an N-type ohmic contact layer 222 and an N-type current spreading layer 223 that are sequentially stacked and grown, the roughened surface is the surface of the N-type current spreading layer 223 facing the fixed substrate 21, thereby further improving the performance of the LED chip. Figure 6 As shown, the LED chip provided in the embodiment of the present application also includes: a protective film layer 29, the protective film layer 29 covers the exposed surfaces of the N-type layer 22, the active layer 23, the P-type layer 24 and the P-type ohmic contact layer 25, and extends to cover at least part of the surface of the N-type electrode 26 and the P-type electrode 27, that is, the protective film layer 29 includes a first hollowing out that exposes at least part of the area of ​​the N-type electrode 26, and a second hollowing out that exposes at least part of the area of ​​the P-type electrode 27. A first solder pad 211 and a second solder pad 212, the first solder pad 211 is in contact and electrically connected with the N-type electrode 26 through the first hollowing out, and the second solder pad 212 is in contact and electrically connected with the P-type electrode 27 through the second hollowing out. In some embodiments, the protective film layer 29 provided in the embodiment of the present application can be an insulating isolation layer (such as an ISO isolation layer) or a DBR (Distributed Bragg Reflector) layer.

[0060] The technical solution provided by the embodiment of the present application is described in more detail below through the preparation method of the LED chip. Figure 6 Taking the LED chip shown in the figure as an example, the method for preparing the LED chip provided in the embodiment of the present application includes:

[0061] S11, provide an LED epitaxial structure as shown in any of the above embodiments. Figure 3 Take the schematic LED epitaxial structure as an example.

[0062] S12, roughening the N-type current spreading layer 173 in the LED epitaxial structure to form a roughened surface.

[0063] S13, bonding the N-type current spreading layer 173 and the fixed substrate 21 to form a bonding layer 28. The fixed substrate 21 provided in the embodiment of the present application may be a sapphire substrate, which is not specifically limited in the present application.

[0064] S14, removing the N-type temporary substrate 11, the composite buffer layer 12 and the P-type corrosion stop layer 13 in the LED epitaxial structure, exposing the P-type ohmic contact layer 14 in the LED epitaxial structure.

[0065] S15, using an etching process to etch the P-type ohmic contact layer 14, the P-type current spreading layer 151, the P-type limiting layer 152, the active layer 16 and the N-type limiting layer 171 in the LED epitaxial structure, until the N-type ohmic contact layer 172 in the exposed LED epitaxial structure forms a mesa structure, thereby obtaining the P-type current spreading layer 241, the P-type limiting layer 242, the active layer 23, the N-type limiting layer 221, the N-type ohmic contact layer 222 and the N-type current spreading layer 223 of the LED chip. Optionally, the etching process provided in the embodiment of the present application can be an ICP dry etching process.

[0066] S16, vapor-depositing an N-type electrode 26 on the N-type ohmic contact layer 222 at the mesa structure (device area), and further etching the P-type ohmic contact layer etched in step S15 to form a P-type ohmic contact layer 25 of the LED chip, and vapor-depositing a P-type electrode 27 on the P-type ohmic contact layer 25.

[0067] S17, using an etching process to etch and obtain a cutting path pattern, wherein the etching process can also use an ICP dry etching process.

[0068] S18, evaporate a protective film and use an etching process to form a first hollow and a second hollow, thereby obtaining a protective film layer 29. The etching process may use an ICP dry etching process.

[0069] S19, evaporating the first solder pad 211 and the second solder pad 212, and then cutting and splitting to obtain LED chips.

[0070] In summary, the embodiments of the present application provide an LED epitaxial structure and an LED chip, wherein the LED epitaxial structure comprises: an N-type temporary substrate, a composite buffer layer, a P-type corrosion stop layer, a P-type ohmic contact layer, a P-type layer, an active layer and an N-type layer grown in sequence; the composite buffer layer comprises an N-type buffer layer, an undoped buffer layer and a P-type buffer layer grown in sequence, wherein the N-type buffer layer is located between the N-type temporary substrate and the undoped buffer layer. And, the LED chip includes: a fixed substrate; an N-type layer, the N-type layer is located on one side of the fixed substrate, and the fixed substrate and the N-type layer are bonded and fixed, wherein the surface of the N-type layer away from the fixed substrate includes a device area and a first electrode area; an active layer, the active layer is located on the side of the N-type layer away from the fixed substrate, and the active layer is located at the device area; a P-type layer, the P-type layer is located on the side of the active layer away from the N-type layer, and the surface of the P-type layer away from the fixed substrate includes a second electrode area; a P-type ohmic contact layer, the P-type ohmic contact layer is located on the side of the P-type layer away from the fixed substrate, and the P-type ohmic contact layer is located at the second electrode area; an N-type electrode and a P-type electrode, the N-type electrode is located on the side of the N-type layer away from the fixed substrate, and the N-type layer is located at the first electrode area; the P-type electrode is located on the side of the P-type ohmic contact layer away from the fixed substrate, and the P-type electrode is located at the second electrode area.

[0071] From the above content, it can be seen that the LED epitaxial structure provided in the embodiment of the present application adopts the structural design of the N-type temporary substrate, which reduces the preparation cost of the LED epitaxial structure and the chip; and the LED epitaxial structure adopts the structural design of the composite buffer layer, and the composite buffer layer includes an N-type buffer layer, a non-doped buffer layer and a P-type buffer layer that are sequentially superimposed and grown, thereby realizing the transition from N-type material to P-type material, reducing the generation of lattice defects, and improving the preparation quality of the LED epitaxial structure. In addition, the LED chip provided in the embodiment of the present application realizes an inverted epitaxial structure of N-type and P-type, so that the LED chip forms a mesa structure with an exposed N-type layer in the device area, and because the carrier mobility of the N-type layer is greater than the carrier mobility of the P-type layer, the current expansion effect of the LED chip at the mesa structure is higher, which improves the current expansion capability of the LED chip, enhances the photoelectric performance and antistatic capability of the LED chip, and improves the performance of the LED chip.

[0072] In the description of the embodiments of the present application, it needs to be understood that the orientation or position relationship indicated by terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0073] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the embodiments of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0074] In the embodiments of the present application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection, an electrical connection, or communication with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0075] In the embodiments of the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0076] In the embodiments of the present application, if the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" appear, it means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradicting each other.

[0077] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. An LED epitaxial structure, characterized in that: The LED epitaxial structure comprises: An N-type temporary substrate, a composite buffer layer, a P-type corrosion stop layer, a P-type ohmic contact layer, a P-type layer, an active layer and an N-type layer are sequentially stacked and grown; The composite buffer layer comprises an N-type buffer layer, a non-doped buffer layer and a P-type buffer layer which are grown in sequence and stacked together, wherein the N-type buffer layer is located between the N-type temporary substrate and the non-doped buffer layer.

2. The LED epitaxial structure according to claim 1, characterized in that: The P-type layer includes a P-type current spreading layer and a P-type limiting layer which are grown in sequence and stacked together, wherein the P-type current spreading layer is located between the P-type ohmic contact layer and the P-type limiting layer.

3. The LED epitaxial structure according to claim 1, characterized in that: The N-type layer includes an N-type confinement layer, an N-type ohmic contact layer and an N-type current spreading layer which are grown in sequence, wherein the N-type confinement layer is located between the active layer and the N-type ohmic contact layer.

4. The LED epitaxial structure according to claim 3, characterized in that: The N-type ohmic contact layer is an N-type GaInP ohmic contact layer; And / or, the N-type current spreading layer is an N-type AlGaInP current spreading layer.

5. An LED chip, characterized in that: The LED chip comprises: fixing the substrate; An N-type layer, the N-type layer is located on one side of the fixed substrate, and the fixed substrate and the N-type layer are bonded and fixed, wherein a surface of the N-type layer facing away from the fixed substrate includes a device region and a first electrode region; an active layer, the active layer being located on a side of the N-type layer away from the fixed substrate, and the active layer being located in the device region; A P-type layer, the P-type layer is located on a side of the active layer away from the N-type layer, and a surface of the P-type layer on a side away from the fixed substrate includes a second electrode region; a P-type ohmic contact layer, the P-type ohmic contact layer being located at a side of the P-type layer away from the fixed substrate, and the P-type ohmic contact layer being located at the second electrode region; An N-type electrode and a P-type electrode, wherein the N-type electrode is located on a side of the N-type layer away from the fixed substrate, and the N-type layer is located at the first electrode region; the P-type electrode is located on a side of the P-type ohmic contact layer away from the fixed substrate, and the P-type electrode is located at the second electrode region.

6. The LED chip according to claim 5, characterized in that: The P-type layer includes a P-type current spreading layer and a P-type limiting layer which are grown in sequence and stacked, wherein the P-type current spreading layer is located between the P-type ohmic contact layer and the P-type limiting layer; And / or, the N-type layer includes an N-type restriction layer, an N-type ohmic contact layer and an N-type current spreading layer that are grown in sequence, wherein the N-type restriction layer is located between the active layer and the N-type ohmic contact layer; in the device area, the N-type layer exposes the N-type ohmic contact layer, and the N-type electrode is in contact and electrically connected with the N-type ohmic contact layer.

7. The LED chip according to claim 6, characterized in that: The P-type current spreading layer is a P-type AlGaInP current spreading layer; And / or, the N-type ohmic contact layer is an N-type GaInP ohmic contact layer; And / or, the N-type current spreading layer is an N-type AlGaInP current spreading layer.

8. The LED chip according to claim 5, characterized in that: The surface of the N-type layer facing the fixed substrate is a roughened surface.

9. The LED chip according to claim 5, characterized in that: The LED chip further comprises: A protective film layer, the protective film layer covers the exposed surfaces of the N-type layer, the active layer, the P-type layer and the P-type ohmic contact layer, and the protective film layer includes a first hollowing out that exposes at least a portion of the N-type electrode, and a second hollowing out that exposes at least a portion of the P-type electrode; A first pad and a second pad, wherein the first pad is electrically connected to the N-type electrode through the first hollowing out, and the second pad is electrically connected to the P-type electrode through the second hollowing out.

10. The LED chip according to claim 9, characterized in that: The protective film layer is an insulating isolation layer or a DBR layer.

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