Method for monitoring a cleaning brush offset anomaly of a grinder table
By forming a semiconductor structure with a PN junction conduction loop on the substrate, performing chemical mechanical polishing (CMP) and defect detection, the problem of traditional monitoring methods being unable to monitor abnormal cleaning brush offset is solved, enabling timely and effective monitoring of cleaning brush offset and avoiding metal layer corrosion defects.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUA HONG SEMICON WUXI LTD
- Filing Date
- 2025-01-14
- Publication Date
- 2026-05-29
AI Technical Summary
Traditional methods for monitoring abnormalities in grinding machines cannot effectively monitor abnormal deviations in the cleaning brushes, resulting in insufficient cleaning capacity and corrosion defects in the metal layer on the surface of the components.
By forming a semiconductor structure with a PN junction conduction loop on a substrate, performing a chemical mechanical polishing process, and subsequently conducting defect detection, the electronic conduction characteristics of the PN junction loop are used to monitor cleaning brush misalignment anomalies.
It enables timely and effective monitoring of abnormal brush offset on the grinding machine, avoiding corrosion defects in the metal layer and ensuring cleaning effect.
Smart Images
Figure CN119795017B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing technology, and more specifically to a method for monitoring abnormal offset of the cleaning brush of a grinding machine. Background Technology
[0002] Cleaning brushes for CMP (Chemical Mechanical Polishing) machines are widely used in semiconductor device manufacturing lines. For example, in the CMOS device manufacturing process, after PMOS and NMOS devices are formed on the substrate surface, it is usually necessary to use a grinding machine to polish the device surface. However, after polishing the device surface, a large number of grinding by-products will accumulate on the device surface, which need to be removed by using a cleaning brush and chemical solution.
[0003] Currently, the industry typically uses ammonium hydroxide (NH4OH) diluted with deionized water to rinse the cleaning brush, thereby continuously removing grinding byproducts from the device surface. When the cleaning brush is misaligned (the gap between the cleaning brush and the device surface does not meet the operational requirements), it will result in insufficient cleaning capacity, leaving residual cleaning solution on the device surface and causing corrosion defects in the metal layer of the device surface.
[0004] The relatively low linear velocity in the center region of the wafer makes it more prone to chemical residue. In this case, the metal layer connecting the N-well in the substrate is prone to losing electrons in the chemical environment, resulting in corrosion. This enables electron conduction in the PN junction circuit (P-doped region of PMOS device → N-doped region of NMOS device). As a result, the metal layer connecting the P-doped region of PMOS device loses electrons and transfers them to the metal layer connecting the N-doped region of NMOS device. This causes the metal layer connecting the P-doped region of PMOS device to generate Loss defects (corrosion void defects), resulting in local metal connection abnormalities.
[0005] The common method for monitoring anomalies in grinding machines is to first deposit a TEOS film on the wafer, then perform CMP on the TEOS film, and finally perform defect detection on the surface of the ground wafer. It can be seen that the traditional method for monitoring anomalies in grinding machines cannot effectively monitor the abnormal state of the cleaning brush offset of the grinding machine. Summary of the Invention
[0006] This application provides a method for monitoring abnormal offset of the cleaning brush of a grinding machine, which can solve the problem that traditional abnormal monitoring methods for grinding machines cannot effectively monitor the abnormal offset state of the cleaning brush of the grinding machine.
[0007] This application provides a method for monitoring abnormal cleaning brush offset in a grinding machine, including:
[0008] Provide a substrate;
[0009] A semiconductor device is formed in the substrate and on the surface of the substrate, and a PN junction conduction loop is formed in the semiconductor device and the substrate;
[0010] A patterned metal layer is formed on the semiconductor device, and the patterned metal layer is connected to the PN junction conduction loop;
[0011] A chemical mechanical polishing process is performed on the semiconductor structure after the patterned metal layer is formed to planarize the surface of the metal layer. In the chemical mechanical polishing process, the polishing byproducts on the surface of the metal layer are cleaned by using a cleaning brush of the polishing machine in conjunction with a cleaning solution.
[0012] Defect detection is performed on the surface of semiconductor structures after chemical mechanical polishing (CMP) to monitor whether the cleaning brushes of the polishing machine are misaligned.
[0013] Optionally, in the method for monitoring abnormal cleaning brush offset of the grinding machine, the step of forming a semiconductor device in the substrate and on the substrate surface, wherein a PN junction conduction loop is formed in the semiconductor device and in the substrate, includes:
[0014] A PMOS device and an NMOS device are formed in and on the substrate, with the NMOS device located on the side of the PMOS device. The PMOS device includes at least: an N-well in the substrate, a gate structure I on the substrate, a source-end doped region I and a drain-end doped region I in the N-well located on both sides of the gate structure, and a conductive plug I and a conductive plug II connecting the source-end doped region I. The NMOS device includes at least: a P-well in the substrate, a gate structure II on the substrate, a source-end doped region II and a drain-end doped region II in the P-well located on both sides of the gate structure, and a conductive plug III and a conductive plug IV connecting the source-end doped region II.
[0015] Optionally, in the method for monitoring abnormal cleaning brush offset of the grinding machine, the step of forming a patterned metal layer on the semiconductor device, wherein the patterned metal layer is connected to the PN junction conduction loop, includes:
[0016] A patterned metal layer is formed, which is connected to the first conductive plug, the second conductive plug, the third conductive plug, and the fourth conductive plug, respectively.
[0017] Optionally, in the method for monitoring abnormal displacement of the cleaning brush of the polishing machine, the step of performing defect detection on the surface of the semiconductor structure after chemical mechanical polishing to monitor whether the cleaning brush of the polishing machine has experienced abnormal displacement includes:
[0018] Defect detection is performed on the surface of a semiconductor structure after chemical mechanical polishing. If corrosion defects are found in the patterned metal layer on the surface of the semiconductor structure, it is determined that the cleaning brush of the polishing machine has deviated abnormally; if there are no corrosion defects in the patterned metal layer on the surface of the semiconductor structure, it is determined that the cleaning brush of the polishing machine has not deviated.
[0019] Optionally, in the method for monitoring abnormal deviation of the cleaning brush on the grinding machine, the cleaning solution is an alkaline solution.
[0020] Optionally, in the method for monitoring abnormal deviation of the cleaning brush on the grinding machine, the cleaning solution is an ammonium hydroxide solution diluted with deionized water.
[0021] Optionally, in the monitoring method for abnormal displacement of the cleaning brush of the grinding machine, when the cleaning brush of the grinding machine is abnormally displaced, the cleaning solution remains on the surface of the patterned metal layer, so that the patterned metal layer is prone to losing electrons in the solution environment, and a PN junction conduction circuit is formed between the PMOS device and the NMOS device, thereby causing corrosion defects in the patterned metal layer.
[0022] Optionally, in the monitoring method for abnormal cleaning brush offset of the grinding machine, the PMOS device and the NMOS device further include: an interlayer dielectric layer, the interlayer dielectric layer covering the gate structure one and the gate structure two, and the conductive plug one, the conductive plug two, the conductive plug three and the conductive plug four respectively penetrating the interlayer dielectric layer.
[0023] Optionally, in the method for monitoring abnormal offset of the cleaning brush on the grinding machine, the patterned metal layer is made of copper.
[0024] The technical solution of this application has at least the following advantages:
[0025] This application utilizes a semiconductor structure with a PN junction circuit (which enables electronic conduction) to perform a CMP process on the back-end metal layer. This allows anomalies such as the cleaning brush offset of the polishing machine to be detected in subsequent defect detection through corrosion defects in the metal layer on the surface of the semiconductor structure with the PN junction circuit. This enables timely and effective monitoring of the cleaning brush offset anomalies on the polishing machine after the back-end metal layer CMP process. Attached Figure Description
[0026] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0027] Figure 1 This is a flowchart of a method for monitoring abnormal cleaning brush offset of a grinding machine according to an embodiment of the present invention;
[0028] Figure 2 This is a schematic diagram of the semiconductor structure after forming a semiconductor device with a PN junction conduction loop according to an embodiment of the present invention;
[0029] Figure 3 This is a schematic diagram of the cleaning brush of the grinding machine in an embodiment of the present invention performing a cleaning operation on a semiconductor structure;
[0030] The reference numerals in the attached figures are explained as follows:
[0031] 101 - Semiconductor structure after forming a semiconductor device with a PN junction conduction loop; 102 - Cleaning brush of the grinding machine; 103 - Liquid conduit; 104 - Liquid nozzle.
[0032] 10-Substrate, 11-N-well, 12-Source-end doped region one, 13-Drain-end doped region one, 14-Heavily doped region one, 15-Heavily doped region two, 16-Gate one, 17-Sidewall one, 18-Conductive plug one, 19-Conductive plug two, 20-Shallow trench isolation structure, 21-P-well, 22-Source-end doped region two, 23-Drain-end doped region two, 24-Heavily doped region three, 25-Heavily doped region four, 26-Gate two, 27-Sidewall two, 28-Conductive plug three, 29-Conductive plug four, 30-Interlayer dielectric layer one, 40-Interlayer dielectric layer two, 50-Patterned metal layer. Detailed Implementation
[0033] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0034] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0035] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0036] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.
[0037] This application provides a method for monitoring abnormal cleaning brush offset in a grinding machine, referring to... Figure 1 , Figure 1 This is a flowchart of a method for monitoring abnormal offset of the cleaning brush of a grinding machine according to an embodiment of the present invention. The method for monitoring abnormal offset of the cleaning brush of a grinding machine includes:
[0038] First, perform step S1: provide a substrate 10.
[0039] Then, step S2 is performed: a semiconductor device is formed in the substrate 10 and on the surface of the substrate 10, and a PN junction conduction loop is formed in the semiconductor device and the substrate 10.
[0040] This embodiment takes the formation of CMOS devices in and on the substrate as an example. For details, please refer to... Figure 2 , Figure 2 This is a schematic diagram of the semiconductor structure after forming a semiconductor device with a PN junction conduction loop according to an embodiment of the present invention. In this embodiment, the step of forming a semiconductor device with a PN junction conduction loop in the substrate and on the substrate surface may specifically include:
[0041] A PMOS device and an NMOS device are formed in and on the surface of the substrate 10. The NMOS device is located on the side of the PMOS device, and the NMOS device and the PMOS device are isolated by a shallow trench isolation structure 20.
[0042] The PMOS device includes at least: an N-well 11 located in the substrate 10, a gate structure I located on the substrate 10, a source-doped region I 12 and a drain-doped region I 13 located on both sides of the gate structure in the N-well 11, and a conductive plug I 18 connecting the source-doped region I 12 and a conductive plug II 19 connecting the drain-doped region I 13; the gate structure I includes: a gate oxide layer I (not shown), a gate I 16, and a sidewall I 17. A heavily doped region I 14 is also formed on the surface of the source-doped region I 12, and a heavily doped region II 15 is also formed on the surface of the drain-doped region I 13. The conductive plug I 18 is in contact with the heavily doped region I 14, and the conductive plug II 19 is in contact with the heavily doped region II 15.
[0043] Furthermore, the NMOS device includes at least: a P-well 21 located in the substrate, a second gate structure located on the substrate, a second source-end doped region 22 and a second drain-end doped region 23 located on both sides of the gate structure in the P-well 21, and a third conductive plug 28 connecting the second source-end doped region 22 and a fourth conductive plug 29 connecting the second drain-end doped region 23. The second gate structure includes: a second gate oxide layer (not shown), a second gate 26, and a second sidewall 27. A third heavily doped region 24 is also formed on the surface of the second source-end doped region 22, and a fourth heavily doped region 25 is also formed on the surface of the second drain-end doped region 23. The third conductive plug 28 is in contact with the third heavily doped region 24, and the fourth conductive plug 29 is in contact with the fourth heavily doped region 25.
[0044] In this embodiment, the PMOS device and the NMOS device may further include: an interlayer dielectric layer 30, which covers the gate structure 1 and the gate structure 2, and the conductive plug 1, the conductive plug 2, the conductive plug 3 and the conductive plug 4 respectively penetrate the interlayer dielectric layer 30.
[0045] Next, step S3 is performed: a patterned metal layer 50 is formed on the semiconductor device, and the patterned metal layer 50 is connected to the PN junction conduction loop.
[0046] In this embodiment, the step of forming a patterned metal layer on the semiconductor device that is connected to the PN junction conduction loop may specifically include: continuing to refer to Figure 2A patterned metal layer 50 is formed, which is connected to the first conductive plug 18, the second conductive plug 19, the third conductive plug 28, and the fourth conductive plug 29, respectively.
[0047] In this embodiment, the PMOS device and the NMOS device may further include: a second interlayer dielectric layer 40, which covers the patterned metal layer 50 and the first interlayer dielectric layer 30.
[0048] Preferably, the patterned metal layer 50 is made of copper.
[0049] Further, step S4 is performed: chemical mechanical polishing is performed on the semiconductor structure 101 after the semiconductor device with PN junction conduction circuit is formed, to polish and remove the interlayer dielectric layer 40 that extends beyond the surface of the metal layer 50 and to polish and remove a certain thickness of the metal layer 50, so as to planarize the surface of the metal layer 50. The chemical mechanical polishing process includes at least multiple processes such as polishing and cleaning.
[0050] refer to Figure 3 , Figure 3 This is a schematic diagram illustrating the cleaning operation of a grinding machine's cleaning brush on a semiconductor structure according to an embodiment of the present invention. In the chemical mechanical polishing process, the cleaning brush 102 of the grinding machine, in conjunction with a cleaning solution, cleans the grinding byproducts on the surface of the metal layer 50. The semiconductor structure 101, after forming a semiconductor device with a PN junction conduction loop, is placed between two cleaning brushes 102. The cleaning brushes 102 do not contact the semiconductor structure 101 after forming the semiconductor device with a PN junction conduction loop; that is, a certain gap is maintained between the cleaning brushes 102 and the semiconductor structure 101 after forming the semiconductor device with a PN junction conduction loop. The cleaning solution enters the process chamber through the solution conduit 103 and is sprayed onto the cleaning brushes 102 of the grinding machine through the solution nozzle 104, rinsing the continuously rolling cleaning brushes 102 and thereby continuously removing the grinding byproducts from the surface of the metal layer 50 on the semiconductor structure 101.
[0051] Preferably, the cleaning solution is an alkaline solution.
[0052] In this embodiment, the cleaning solution is an ammonium hydroxide solution diluted with deionized water.
[0053] Finally, step S5 is performed: defect detection is performed on the surface of the semiconductor structure after the chemical mechanical polishing process to monitor whether the cleaning brush 102 of the polishing machine has deviated abnormally.
[0054] In this embodiment, the step of performing defect detection on the surface of the semiconductor structure after chemical mechanical polishing (CMP) to monitor whether the cleaning brush 102 of the polishing machine has deviated abnormally may specifically include: performing defect detection on the surface of the semiconductor structure after CMP; if corrosion defects are detected in the patterned metal layer 50 on the surface of the semiconductor structure, it is determined that the cleaning brush 102 of the polishing machine has deviated abnormally; if no corrosion defects are detected in the patterned metal layer 50 on the surface of the semiconductor structure, it is determined that the cleaning brush 102 of the polishing machine has not deviated.
[0055] When the cleaning brushes of the grinding machine are abnormally misaligned, the gap between the two cleaning brushes 102 and the semiconductor structure 101 does not meet the cleaning requirements. This can easily cause the surface of the patterned metal layer to be too close to the cleaning brushes 102. As a result, the cleaning solution on the cleaning brushes 102 will remain on the surface of the patterned metal layer, making the patterned metal layer prone to losing electrons in the solution environment. This allows electrons to conduct in the PN junction circuit (P-type drain doped region 13 of the PMOS device → N-type source doped region 22 of the NMOS device), causing electron migration. This results in the metal layer connecting the P-type drain doped region 13 of the PMOS device losing electrons and transferring them to the metal layer connecting the N-type source doped region 22 of the NMOS device. Consequently, the metal layer 50 connecting the P-type drain doped region 13 of the PMOS device generates a loss defect (corrosion pit defect), causing local metal connection abnormalities.
[0056] Preferably, a wafer inspection machine can be used to obtain a defect map of the semiconductor structure surface. Furthermore, defect detection on the surface of the semiconductor structure after chemical mechanical polishing can also be performed using macroscopic methods such as infrared spectroscopy or visual inspection to detect surface defects.
[0057] In this application, a semiconductor structure with a PN junction circuit (which enables electronic conduction) is used to perform a CMP process on the back-end metal layer, and the surface of the semiconductor structure after the chemical mechanical polishing process is used for defect detection. This allows anomalies such as the cleaning brush offset of the polishing machine to be clearly manifested (characterized) through the corrosion defects of the metal layer on the surface of the semiconductor structure with the PN junction circuit during defect detection. This enables timely and effective monitoring of the cleaning brush offset anomalies of the polishing machine after the back-end metal layer CMP process.
[0058] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.
Claims
1. A method for monitoring abnormal offset of the cleaning brush in a grinding machine, characterized in that, include: Provide a substrate; A semiconductor device is formed in the substrate and on the surface of the substrate, and a PN junction conduction loop is formed in the semiconductor device and the substrate; A patterned metal layer is formed on the semiconductor device, and the patterned metal layer is connected to the PN junction conduction loop; A chemical mechanical polishing process is performed on the semiconductor structure after the patterned metal layer is formed to planarize the surface of the metal layer. In the chemical mechanical polishing process, the polishing byproducts on the surface of the metal layer are cleaned by using a cleaning brush of the polishing machine in conjunction with a cleaning solution. Defect detection is performed on the surface of semiconductor structures after chemical mechanical polishing to monitor whether the cleaning brush of the polishing machine has deviated abnormally. When the cleaning brush of the grinding machine deviates abnormally, the cleaning solution remains on the surface of the patterned metal layer, making the patterned metal layer prone to losing electrons in the solution environment. This causes a PN junction conduction circuit to form between the PMOS and NMOS devices formed in the substrate and on the substrate surface, resulting in corrosion defects in the patterned metal layer.
2. The method for monitoring abnormal offset of the cleaning brush of the grinding machine according to claim 1, characterized in that, The step of forming a semiconductor device in the substrate and on the surface of the substrate, wherein a PN junction conduction loop is formed in the semiconductor device and in the substrate, includes: A PMOS device and an NMOS device are formed in and on the substrate, with the NMOS device located on one side of the PMOS device. The PMOS device includes at least: an N-well in the substrate, a first gate structure on the substrate, a first source-end doped region and a first drain-end doped region in the N-well located on both sides of the gate structure, and a first conductive plug connected to the first source-end doped region and a second conductive plug connected to the first drain-end doped region. The NMOS device includes at least: a P-well in the substrate, a second gate structure on the substrate, a second source-end doped region and a second drain-end doped region in the P-well located on both sides of the gate structure, and a third conductive plug connected to the second source-end doped region and a fourth conductive plug connected to the second drain-end doped region.
3. The method for monitoring abnormal offset of the cleaning brush of the grinding machine according to claim 2, characterized in that, The step of forming a patterned metal layer on the semiconductor device, wherein the patterned metal layer is connected to the PN junction conduction loop, includes: A patterned metal layer is formed, which is connected to the first conductive plug, the second conductive plug, the third conductive plug, and the fourth conductive plug, respectively.
4. The method for monitoring abnormal offset of the cleaning brush of the grinding machine according to claim 1, characterized in that, The steps for defect detection on the surface of a semiconductor structure after chemical mechanical polishing (CMP) to monitor for abnormal displacement of the cleaning brushes in the polishing machine include: Defect detection is performed on the surface of a semiconductor structure after chemical mechanical polishing. If corrosion defects are found in the patterned metal layer on the surface of the semiconductor structure, it is determined that the cleaning brush of the polishing machine has deviated abnormally; if there are no corrosion defects in the patterned metal layer on the surface of the semiconductor structure, it is determined that the cleaning brush of the polishing machine has not deviated.
5. The method for monitoring abnormal offset of the cleaning brush of the grinding machine according to claim 1, characterized in that, The cleaning solution is an alkaline solution.
6. The method for monitoring abnormal offset of the cleaning brush of the grinding machine according to claim 5, characterized in that, The cleaning solution is an ammonium hydroxide solution diluted with deionized water.
7. The method for monitoring abnormal offset of the cleaning brush of the grinding machine according to claim 2, characterized in that, The PMOS device and the NMOS device further include: an interlayer dielectric layer, which covers the first gate structure and the second gate structure, and the first conductive plug, the second conductive plug, the third conductive plug, and the fourth conductive plug respectively penetrate the interlayer dielectric layer.
8. The method for monitoring abnormal offset of the cleaning brush of the grinding machine according to claim 1, characterized in that, The patterned metal layer is made of copper.