A chain structure access system for GPU registers

Abstract

The present application relates to the field of chip architecture technology, and in particular to a chain structure access system for GPU registers, wherein the system forms a register access chain by modules in the same module set, and when faced with different types of first access requests, determines the module to receive the first access request and the transmission of the first access request along the chain structure through the chain structure, thereby enabling register access to multiple modules to be achieved with only one first access request, and being compatible with register access requirements for only a single module, and effectively reducing the number of access requests without affecting the access function, thereby avoiding the situation of causing competition for hardware resources, and further effectively improving the access efficiency of the registers.

Description

Technical Field

[0001] The present invention relates to the technical field of chip architecture, and in particular to a chain structure access system for GPU registers. Background Art

[0002] The registers in the GPU chip are small storage units inside the GPU chip that can be used to store and quickly access data, and can quickly record and read information. These registers play a key role in the GPU chip performing various tasks, such as rendering graphics, model reasoning, and computing.

[0003] In the GPU chip architecture, the GPU chip usually contains multiple modules, each module contains several registers. When multiple registers need to be accessed, the existing technology usually needs to send access instructions to multiple modules. This method may cause hardware resource competition, resulting in blockage of the register access path and reduced register access efficiency.

[0004] Therefore, how to improve the efficiency of register access has become an urgent problem to be solved. Summary of the invention

[0005] In view of the above technical problems, the technical solution adopted by the present invention is:

[0006] A chain structure access system for GPU registers, the system comprising: a GPU chip, a processor and a memory storing a computer program, wherein the GPU chip comprises a set of M modules {a1, a2, ..., a m , …, a M}, a m is the mth module set, where m is an integer in the range [1, M], and a m ={b m 1, b m 2, …, b m n(m) , …, b m N(m)}, b m n(m) is the n(m)th module in the mth module set, n(m) is an integer in the range [1, N(m)], N(m) is the number of modules contained in the mth module set, b m n(m) Corresponds to register c m n(m) , when the computer program is executed by a processor, the following steps are implemented:

[0007] S101, by a m Included b m 1, b m 2, …, bm n(m) , …, b m N(m) Form register access chain D m .

[0008] S102, D m Module b in m n(m) Assign the corresponding reference number E m n(m) .

[0009] S103, when a first access request is obtained, according to the access type corresponding to the first access request, a number of register access chains matching the access type are determined, and all register access chains matching the access type are respectively used as target access chains, wherein the first access request includes an access type and an access tag.

[0010] S104, access chain D for the target i , sending the first access request to D i Module b in i j , i is an integer in the range [1, M], and the initial value of j is 1.

[0011] S105, according to the access mark and b i j Corresponding reference number E i j , determine b i j A first determination result of whether to receive the first access request.

[0012] S106: Determine b according to the first access request and the first judgment result. i j Whether to send the first access request to b i j+1 .

[0013] S107, if b is determined i j Do not send the first access request to b i j+1 , stop transmitting the first access request.

[0014] S108, if b is determined i j Send the first access request to b i j+1 , then update j=j+1, and return to execute step S105 until step S107 is executed or j=N(i), completing the transmission of the first access request.

[0015] Compared with the prior art, the present invention has obvious beneficial effects. By means of the above technical solution, a chain structure access system for GPU registers provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects:

[0016] The present invention provides a chain structure access system for GPU registers, the system comprising: a GPU chip, a processor and a memory storing a computer program, wherein the GPU chip comprises a set of M modules {a1, a2, ..., a m , …, a M}, a m is the mth module set, where m is an integer in the range [1, M], and a m ={b m 1, b m 2, …, b m n(m) , …, b m N(m)}, b m n(m) is the n(m)th module in the mth module set, n(m) is an integer in the range [1, N(m)], N(m) is the number of modules contained in the mth module set, b m n(m) Corresponds to register c m n(m) When the computer program is executed by a processor, the following steps are implemented: S101, by a m Included b m 1, b m 2, …, b m n(m) , …, b m N(m) Form register access chain D m , S102, for D m Module b in m n(m) Assign the corresponding reference number E m n(m) , S103, when a first access request is obtained, according to the access type corresponding to the first access request, a number of register access chains matching the access type are determined, and all register access chains matching the access type are respectively used as target access chains, wherein the first access request includes an access type and an access tag, S104, for the target access chain D i , sending the first access request to D i Module b in i j, i is an integer in the range of [1, M], j is initially set to 1, S105, based on the access tag and b i j Corresponding reference number E i j , determine b i j Whether to receive a first judgment result of the first access request, S106, determining b according to the first access request and the first judgment result i j Whether to send the first access request to b i j+1 , S107, if b is determined i j Do not send the first access request to b i j+1 , stop the transmission of the first access request, S108, if it is determined that b i j Send the first access request to b i j+1 , then update j=j+1, and return to execute step S105 until step S107 is executed or j=N(i), completing the transmission of the first access request.

[0017] It can be seen that a register access chain is formed by each module in the same module set. When facing different types of first access requests, the module to receive the first access request and the transmission of the first access request along the chain structure are determined through the chain structure. Therefore, register access to multiple modules can be achieved when only one first access request needs to be sent, and it is compatible with the register access requirements of only a single module. Without affecting the access function, the number of access requests is effectively reduced, thereby avoiding the situation of causing hardware resource competition, and effectively improving the access efficiency of the register. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 A flowchart of a chain structure access system for a GPU register provided in the first embodiment of the present invention when a computer program is executed by a processor;

[0020] Figure 2A schematic diagram of a flow chart of a computer program being executed by a processor in a GPU register restricted access system provided in Embodiment 2 of the present invention;

[0021] Figure 3 A flowchart of a computer program being executed by a processor in a GPU register copy access system provided in Embodiment 3 of the present invention. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0023] This embodiment provides a chain structure access system for GPU registers, see Figure 1 , is a flowchart of a chain structure access system of a GPU register provided in Embodiment 1 of the present invention when a computer program is executed by a processor, the system comprising: a GPU chip, a processor and a memory storing a computer program, wherein the GPU chip comprises a set of M modules {a1, a2, ..., a m , …, a M}, a m is the mth module set, where m is an integer in the range [1, M], and a m ={b m 1, b m 2, …, b m n(m) , …, b m N(m)}, b m n(m) is the n(m)th module in the mth module set, n(m) is an integer in the range [1, N(m)], N(m) is the number of modules contained in the mth module set, b m n(m) Corresponds to register c m n(m) , when the computer program is executed by a processor, the following steps are implemented:

[0024] S101, by a m Included b m 1, b m 2, …, b m n(m) , …, b m N(m) Form register access chain D m ;

[0025] S102, D m Module b in m n(m) Assign the corresponding reference number E m n(m) ;

[0026] S103, when a first access request is obtained, according to an access type corresponding to the first access request, a plurality of register access chains matching the access type are determined, and all register access chains matching the access type are respectively used as target access chains, wherein the first access request includes an access type and an access tag;

[0027] S104, access chain D for the target i , sending the first access request to D i Module b in i j , i is an integer in the range [1, M], and the initial value of j is 1;

[0028] S105, according to the access mark and b i j Corresponding reference number E i j , determine b i j a first determination result of whether to receive the first access request;

[0029] S106: Determine b according to the first access request and the first judgment result. i j Whether to send the first access request to b i j+1 ;

[0030] S107, if b is determined i j Do not send the first access request to b i j+1 , stopping the transmission of the first access request;

[0031] S108, if b is determined i j Send the first access request to b i j+1 , then update j=j+1, and return to execute step S105 until step S107 is executed or j=N(i), completing the transmission of the first access request.

[0032] Among them, the module in the GP chip refers to a combination of independent or relatively independent hardware units with specific functions. Usually, a GPU chip requires multiple modules to work together to implement specific functions. In this embodiment, a module set is formed by modules corresponding to specific functions. The specific function can be called the module type of the corresponding module set. The module type may include types such as an operator, a graphic calculator, and a resource manager.

[0033] It should be noted that, generally, a module includes multiple registers, but the distinction between registers in the same module does not affect the description of this embodiment. Therefore, for the sake of simplicity of description, this embodiment is described as one module corresponding to one register.

[0034] The register access chain can be used to perform chain access to registers corresponding to the modules contained therein, and the register access chain can correspond to a module set.

[0035] The reference tag can be used to identify the corresponding module in the register access chain, the first access request can refer to an access request to the register, the access type can be used to characterize the specific function corresponding to the module to which the register to be accessed belongs, and the access tag can be used to identify the register to be accessed.

[0036] In a specific implementation, step S101 includes the following steps:

[0037] By a m Included b m 1, b m 2, …, b m n(m) , …, b m N(m) , forming a register access chain D according to the preset order m , wherein the preset order is b m n(m) Located in m n(m)-1 after.

[0038] The register access chain is used for chain access, and chain access has an access sequence. Therefore, in this embodiment, a m Included b m 1, b m 2, …, b m n(m) , …, b m N(m) , forming a register access chain D according to the preset order m , the preset order is determined by the position of the module in the module collection.

[0039] In one implementation, the implementer may also adjust the preset order according to factors such as dependencies between modules and data synchronization requirements.

[0040] In a specific implementation, the first access request corresponds to an access attribute, and the access attribute includes a shared register access, a type register access, and a module register access.

[0041] Among them, shared register access may mean that all modules in each module set need to be accessed, type register access may mean that all modules in a single module set need to be accessed, and module register access may mean that a single module in a single module set needs to be accessed.

[0042] In a specific implementation, the register access chain D m Corresponds to a value of type F m , when the access attribute corresponding to the first access request belongs to shared register access, the access type corresponding to the first access request is a first preset value;

[0043] The determining, according to the access type corresponding to the first access request, a plurality of register access chains matching the access type includes:

[0044] When the access type corresponding to the first access request is a first preset value, determining that all register access chains match the access type;

[0045] Otherwise, it is determined that a register access chain corresponding to the same type value as the access type matches the access type.

[0046] The first preset value may represent that the first access request needs to access all modules in each module set, and the type value may represent a specific function corresponding to the corresponding register access chain.

[0047] Specifically, the type value and the access type can be represented in a coded form. When the access type corresponding to the first access request is the first preset value, it means that all modules in all register access chains need to receive the first access request at this time, so it is determined that all register access chains match the access type. Otherwise, it means that the access attribute of the first access request at this time is type register access or module register access, and both type register access and module register access only require a single register access chain to receive the first access request. Therefore, the register access chain corresponding to the type value with the same access type can be directly matched with the access type.

[0048] In a specific implementation, when the access attribute corresponding to the first access request belongs to shared register access or type register access, the access mark corresponding to the first access request is a second preset value.

[0049] The second preset value may be used to indicate that the first access request needs to access all modules in a plurality of matching register access chains.

[0050] In a specific implementation, the first judgment result includes acceptance and non-acceptance;

[0051] The access tag and b i j Corresponding reference number E i j , determine b i j The first determination result of whether to receive the first access request includes:

[0052] When the access mark corresponding to the first access request is a second preset value, determining that the first judgment result is acceptance;

[0053] Otherwise, compare the access tag with E i j Are they the same?

[0054] If the access token and E i j If the two data are the same, the first judgment result is determined to be acceptance;

[0055] If the access token and E i j If they are different, the first judgment result is determined to be not accepted.

[0056] Among them, when the access mark corresponding to the first access request is the second preset value, it means that all modules in the matching register access chain need to receive the first access request at this time, so the first judgment result is determined to be received; otherwise, it means that only one module needs to receive the first access request, so a comparison is performed based on the access mark and the reference mark corresponding to the module. If the comparison is consistent, the first judgment result is determined to be received; otherwise, it is determined to be not received.

[0057] In a specific implementation manner, the determining b according to the first access request and the first judgment result i j Whether to send the first access request to b i j+1 ,include:

[0058] When the access attribute corresponding to the first access request belongs to shared register access or type register access, determine b i j Send the first access request to b i j+1 ;

[0059] When the access attribute corresponding to the first access request belongs to module register access, and the first judgment result is not received, determining b i j Send the first access request to b i j+1 ;

[0060] When the access attribute corresponding to the first access request belongs to module register access and the first judgment result is received, determine b i j Do not send the first access request to b i j+1 .

[0061] When the access attribute corresponding to the first access request belongs to shared register access or type register access, the first access request needs to be sent to all modules in the matching register access chain. Therefore, by default, the current module needs to send the first access request to the next module, that is, determine b i j Send the first access request to b i j+1 .

[0062] When the access attribute corresponding to the first access request belongs to module register access and the first judgment result is not received, determine b i j Send the first access request to b i j+1 , the first access request needs to be sent to a single module in the matching register access chain, and the first judgment result is not received, indicating that the first access request has not been sent to the corresponding module through the chain structure at this time, so the current module needs to send the first access request to the next module.

[0063] When the access attribute corresponding to the first access request belongs to module register access and the first judgment result is received, the first access request needs to be sent to a single module in the matching register access chain. The first judgment result is received, which means that the first access request has been sent to the corresponding module through the chain structure. Therefore, the current module does not need to send the first access request to the next module.

[0064] In a specific embodiment, in b i j When receiving the first access request, register c i j Respond to the first access request.

[0065] Since the first access request is used to access a register, when the corresponding module receives the first access request, the register inside the corresponding module responds to the first access request.

[0066] Specifically, the first access request may further include a register address, and accordingly, a register corresponding to the register address in the module responds to the first access request.

[0067] It can be seen that in this embodiment, a register access chain is formed by each module in the same module set. When facing different types of first access requests, the module to receive the first access request and the transmission of the first access request along the chain structure are determined through the chain structure. Therefore, register access to multiple modules can be achieved by sending only one first access request, and it is compatible with the register access requirements of only a single module. Without affecting the access function, the number of access requests is effectively reduced, thereby avoiding the situation of causing hardware resource competition, and effectively improving the access efficiency of the register.

[0068] This embodiment 2 provides a GPU register restricted access system, see Figure 2 , is a flow chart of a computer program executed by a processor in a GPU register restricted access system provided in Embodiment 2 of the present invention, wherein the system comprises: a GPU chip, a processor, and a memory storing the computer program, wherein the GPU chip comprises configuration registers {h1, h2, ..., h3, h4, h5, h6, h7, h8, h9, h10, h11, h12, h13, h14, h15, h16, h17, h18, h1 g ,…,h G}, h g is the configuration register corresponding to the g-th user, g is an integer in the range [1, G], h g Contains K(g) sub-register groups {l g 1, l g 2,…,l g k(g) ,…,l g K(g)}, l g k(g) is the k(g)th sub-register group in the configuration register corresponding to the g-th user, k(g) is an integer in the range [1, K(g)], and the g-th user corresponds to the first security level r g ,h g Corresponding to the second security level s g , l g k(g) Corresponding to the third security level t g k(g) , when the computer program is executed by a processor, the following steps are implemented:

[0069] S201, obtaining a second access request, where the second access request includes a user identifier and an access address;

[0070] S202, obtaining a first inspection result according to a preset inspection table and the user identifier;

[0071] S203, if the first check result meets the first preset condition, obtaining the first security level corresponding to the user identifier; otherwise, rejecting the second access request;

[0072] S204, determining a second security level of the configuration register corresponding to the access address;

[0073] S205, obtaining a second checking result according to the second security level of the configuration register corresponding to the access address and the first security level corresponding to the user identifier;

[0074] S206, if the second check result satisfies a second preset condition, obtaining a third security level of the sub-register group corresponding to the access address; otherwise, rejecting the second access request;

[0075] S207, obtaining a third checking result according to the third security level of the sub-register group corresponding to the access address and the first security level corresponding to the user identifier;

[0076] S208: If the third check result satisfies a third preset condition, allowing the second access request to access the sub-register group corresponding to the access address; otherwise, rejecting the second access request.

[0077] Among them, the configuration register can be used to store user configuration information, the configuration register can include several sub-register groups, and the sub-register group can include several sub-registers. It should be noted that in this embodiment, the sub-register group is the minimum granularity of user configuration, and the distinction between each sub-register in the same sub-register group does not affect the description of this embodiment. Therefore, for the sake of simplicity of description, this embodiment is described with the sub-register as the object.

[0078] The first security level, the second security level, and the third security level may be used to determine the user's access rights to the configuration register or the sub-register group.

[0079] The second access request may refer to an access request to several sub-register groups related to the user configuration, the user identifier may be used to identify the legitimacy of the user, and the access address may refer to an address corresponding to the sub-register group.

[0080] The first check result can be used to characterize the legitimacy of the user, the first preset condition can be used to judge the legitimacy of the user, the second check result can be used to characterize the comparison result of the first security level of the user and the second security level of the configuration register, the second preset condition can be used to judge whether the user has the authority to access the configuration register, and the third check result can be used to characterize the comparison result of the first security level of the user and the third security level of the sub-register group, and the third preset condition can be used to judge whether the user has the authority to access the sub-register.

[0081] In a specific embodiment, h g The corresponding second security level s g The method of determining is:

[0082] h g The minimum value of the third security level corresponding to all sub-register groups in h g The corresponding second security level s g .

[0083] Among them, for any configuration register, this embodiment uses the minimum value of the third security level corresponding to each sub-register group in the configuration register as the second security level of the configuration register, so that when the user has a sub-register group configuration that can be shared, the third security level of the sub-register group that can be shared can be set to a lower level, and the third security level of the sub-register group that is not shared can be set to a higher level. Combined with the second security level, other users can access the configuration register and access the sharable sub-register group from the configuration register, but cannot access the unshared sub-register group.

[0084] In a specific implementation, the preset check list includes legal identifications corresponding to the G users respectively;

[0085] The obtaining of a first inspection result according to the preset inspection table and the user identifier includes:

[0086] The user identification is compared with each legal identification in the preset inspection table. If any legal identification is consistent with the user identification, the first inspection result is determined to be passed. Otherwise, the first inspection result is determined to be failed.

[0087] The legal identification can be used to identify a legal user. When a legal identification that is consistent with the user identification exists in the preset check table, it can be determined that the first check result is passed.

[0088] In a specific implementation, the first preset condition is: the first inspection result is inspection passed.

[0089] When the first check result is that the check is passed, the first security level corresponding to the user identifier is obtained; otherwise, the second access request is rejected.

[0090] In a specific implementation manner, obtaining the second inspection result according to the second security level of the configuration register corresponding to the access address and the first security level corresponding to the user identifier includes:

[0091] The second security level of the configuration register corresponding to the access address and the first security level corresponding to the user identifier are compared; if the second security level of the configuration register corresponding to the access address is less than or equal to the first security level corresponding to the user identifier, then the second check result is determined to be passed; otherwise, the second check result is determined to be failed.

[0092] In this embodiment, the higher the security level, the higher the access permission or the access permission required. Therefore, when the second security level of the configuration register corresponding to the access address is less than or equal to the first security level corresponding to the user identifier, it means that the access permission of the first security level corresponding to the user identifier is higher than the access permission required for the second security level of the configuration register corresponding to the access address, and the second check result is determined to be check passed.

[0093] In a specific implementation, the second preset condition is: the second inspection result is inspection passed.

[0094] When the second check result is that the check is passed, the third security level of the sub-register group corresponding to the access address is obtained; otherwise, the second access request is rejected.

[0095] In a specific implementation manner, obtaining a third check result according to the third security level of the subregister group corresponding to the access address and the first security level corresponding to the user identifier includes:

[0096] The third security level of the subregister group corresponding to the access address and the first security level corresponding to the user identifier are compared; if the third security level of the subregister group corresponding to the access address is less than or equal to the first security level corresponding to the user identifier, the third check result is determined to be a passed check; otherwise, the third check result is determined to be a failed check.

[0097] Among them, when the third security level of the sub-register group corresponding to the access address is less than or equal to the first security level corresponding to the user identifier, it means that the access permission of the first security level corresponding to the user identifier is higher than the access permission required for the third security level of the sub-register group corresponding to the access address, and the third check result is determined to be passed.

[0098] In a specific implementation, the third preset condition is: the third inspection result is inspection passed.

[0099] When the third check result is that the check is passed, the second access request is allowed to access the sub-register group corresponding to the access address; otherwise, the second access request is rejected.

[0100] It should be noted that the restricted access system for GPU registers provided in this embodiment can be coupled with the chain structure access system for GPU registers provided in Example 1. Accordingly, the second access request can be included in the first access request, and the first access request is sent to the corresponding register through chain access. The register can be a configuration register. Then, according to the user identifier and access address included in the second access request, the first security level corresponding to the user identifier in the second access request, the second security level of the configuration register corresponding to the access address, and the third security level of the sub-register group corresponding to the access address can be determined, and then it is determined whether the first access request can access the configuration register and the sub-register group that can be accessed in the configuration register. This ensures that the register access efficiency is high while preventing the user configuration information from being read by other users who do not have permission, thereby improving the security of register access.

[0101] It can be seen that this embodiment performs multi-stage judgment on whether the second access request can access the sub-register group according to the user identifier in the second access request and its corresponding first security level, the second security level of the configuration register corresponding to the access address, and the third security level of the sub-register group corresponding to the access address, thereby improving the security of register access, and through the second security level and the third security level, the second access request can only access the sub-register group allowed to be shared by the user, thereby improving the flexibility of register access in restricted access scenarios.

[0102] This embodiment 3 provides a GPU register copy access system, see Figure 3 , is a flowchart of a computer program executed by a processor in a GPU register copy access system provided in Embodiment 3 of the present invention, the system comprising: a GPU chip, a processor and a memory storing the computer program, wherein the GPU chip comprises U modules, the modules comprise W(U) registers, U and W(U) are both positive integers, and when the computer program is executed by the processor, the following steps are implemented:

[0103] S301, obtaining V user configuration information, wherein the user configuration information includes a plurality of configuration items and configuration values ​​corresponding to each configuration item, and V is a positive integer;

[0104] S302, extracting initial configuration information from the V user configuration information;

[0105] S303, determining a register corresponding to the initial configuration information as an initial register;

[0106] S304, configuring the modules to which the initial registers belong according to the initial configuration information;

[0107] S305, when the target application is obtained, a copy command is sent to a module corresponding to the target application, and one target application corresponds to one user configuration information;

[0108] S306, using the user configuration information corresponding to the target application as target configuration information;

[0109] S307, after receiving the copy command, the module corresponding to the target application copies the initial configuration information from the module to which any initial register belongs to the register corresponding to the target configuration information;

[0110] S308, determining difference configuration information according to the target configuration information and the initial configuration information;

[0111] S309: Configure the module corresponding to the target application according to the difference configuration information.

[0112] Among them, the V user configuration information may refer to V user configuration information having some configuration items and corresponding configuration values ​​that are the same, and the configuration items may be initialization status, instruction access rights, register identification, register size and bit width, etc.

[0113] The initial configuration information may be used as a basic configuration, so as to facilitate subsequent configuration by copying the initial configuration information. The initial register may refer to a register required to be configured by the initial configuration information.

[0114] In a specific implementation manner, extracting the initial configuration information from the V user configuration information includes:

[0115] Taking the configuration items included in the V user configuration information as temporary items;

[0116] If the configuration values ​​corresponding to the temporary item are the same in the V user configurations, then determining that the temporary item is an initial configuration item;

[0117] The initial configuration information is formed by all the initial configuration items and the configuration values ​​corresponding to each initial configuration item.

[0118] Among them, the temporary item may refer to a configuration item existing in V user configuration information, but since the configuration values ​​corresponding to the temporary item in the V user configuration information may be different, the temporary item is determined to be the initial configuration item only when the configuration values ​​corresponding to the temporary item are the same in the V user configurations.

[0119] The initial configuration information may include several initial configuration items and their corresponding configuration values.

[0120] In a specific implementation, the initial configuration information corresponds to a number of registers;

[0121] Accordingly, determining the register corresponding to the initial configuration information as the initial register includes:

[0122] Each register corresponding to the initial configuration information is determined as an initial register.

[0123] In the GPU chip register configuration scenario, the initial configuration information may correspond to multiple registers, and therefore, each register corresponding to the initial configuration information is used as an initial register.

[0124] In a specific implementation, configuring the modules to which the initial registers belong respectively according to the initial configuration information includes:

[0125] For a module to which any initial register belongs, the initial register in the module is configured according to the initial configuration information.

[0126] Configuring the initial register in the module according to the initial configuration information may refer to writing the initial configuration information into the initial register in the module.

[0127] In a specific implementation, the target application corresponds to a number of modules;

[0128] Accordingly, sending a copy command to a module corresponding to the target application includes:

[0129] The copy command is sent to each module corresponding to the target application.

[0130] The target application may correspond to multiple modules. Therefore, when it is necessary to configure the register corresponding to the target application, a copy command needs to be sent to each module corresponding to the target application.

[0131] In a specific implementation, copying the initial configuration information to a register corresponding to the target configuration information from a module to which any initial register belongs includes:

[0132] From the module to which any initial register belongs, extracting the initial configuration information from the initial register;

[0133] The initial configuration information is copied to a register corresponding to the target configuration information.

[0134] Copying the initial configuration information to a register corresponding to the target configuration information may refer to writing the extracted initial configuration information into a register corresponding to the target configuration information.

[0135] In a specific implementation, the target configuration information corresponds to a number of registers;

[0136] Accordingly, copying the initial configuration information to a register corresponding to the target configuration information includes:

[0137] The initial configuration information is copied to each register corresponding to the target configuration information.

[0138] The target configuration information may correspond to multiple registers, so the initial configuration information needs to be copied to each register corresponding to the target configuration information.

[0139] In a specific implementation manner, determining the difference configuration information according to the target configuration information and the initial configuration information includes:

[0140] For any configuration item in the target configuration information, if the configuration item is not included in the initial configuration information, determining the configuration item as a difference item;

[0141] If the configuration item is included in the initial configuration information, and the configuration value corresponding to the configuration item in the target configuration information is different from the configuration value corresponding to the configuration item in the initial configuration information, then determining that the configuration item is a difference item;

[0142] The difference configuration information is formed by all difference items and their corresponding configuration values ​​in the target configuration information.

[0143] The difference configuration information may refer to information that is not included in the initial configuration information but is included in the target configuration information.

[0144] It should be noted that the GPU register copy access system provided in this embodiment can be coupled with the GPU register chain access system provided in the first embodiment and / or the GPU register restricted access system provided in the second embodiment. For example, in this embodiment, the user configuration information can be regarded as a first access request to the corresponding register. Therefore, the user configuration information can be sent to the register in a chain structure, and the register corresponding to the user configuration information is usually a configuration register. In this embodiment, when a copy operation is required, the copy operation can be regarded as a second access request to the corresponding configuration register.

[0145] It can be seen that in this embodiment, the initial configuration information is obtained by analyzing V user configuration information, and the initial configuration information is configured to the modules to which each initial register belongs. When the target application needs to be executed, the initial configuration information is copied from the module to which the initial register belongs to the register corresponding to the target configuration information. There is no need to fully configure the registers one by one. Only the difference configuration information needs to be configured to quickly configure the target configuration information of the target application to the register corresponding to the target configuration information, thereby effectively improving the efficiency of register configuration.

[0146] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are intended to be illustrative only and not to limit the scope of the present invention. It will also be appreciated by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A chain structure access system for GPU registers, characterized in that: The system comprises: a GPU chip, a processor and a memory storing a computer program, wherein the GPU chip comprises a set of M modules {a1, a2, ..., a m , …, a M }, a m is the mth module set, where m is an integer in the range [1, M], and a m ={b m 1, b m 2, …, b m n(m) , …, b m N(m) }, b m n(m) is the n(m)th module in the mth module set, n(m) is an integer in the range [1, N(m)], N(m) is the number of modules contained in the mth module set, b m n(m) Corresponds to register c m n(m) , when the computer program is executed by a processor, the following steps are implemented: S101, by a m Included b m 1, b m 2, …, b m n(m) , …, b m N(m) Form register access chain D m ; S102, D m Module b in m n(m) Assign the corresponding reference number E m n(m) ; S103, when a first access request is obtained, according to an access type corresponding to the first access request, a plurality of register access chains matching the access type are determined, and all register access chains matching the access type are respectively used as target access chains, wherein the first access request includes an access type and an access tag; S104, access chain D for the target i , sending the first access request to D i Module b in i j , i is an integer in the range [1, M], and the initial value of j is 1; S105, according to the access mark and b i j Corresponding reference number E i j , determine b i j a first determination result of whether to receive the first access request; S106: Determine b according to the first access request and the first judgment result. i j Whether to send the first access request to b i j+1 ; S107, if b is determined i j Do not send the first access request to b i j+1 , stopping the transmission of the first access request; S108, if b is determined i j Send the first access request to b i j+1 , then update j=j+1, and return to step S105, until step S107 is executed or j=N(i), completing the transmission of the first access request.

2. The chain structure access system according to claim 1, characterized in that: Step S101 includes the following steps: By a m Included b m 1, b m 2, …, b m n(m) , …, b m N(m) , forming a register access chain D according to the preset order m , wherein the preset order is b m n(m) Located in m n(m)-1 after.

3. The chain structure access system according to claim 1, characterized in that: The first access request corresponds to an access attribute, and the access attribute includes a shared register access, a type register access, and a module register access.

4. The chain structure access system according to claim 3, characterized in that: Register access chain D m Corresponds to a value of type F m , when the access attribute corresponding to the first access request belongs to shared register access, the access type corresponding to the first access request is a first preset value; The determining, according to the access type corresponding to the first access request, a plurality of register access chains matching the access type includes: When the access type corresponding to the first access request is a first preset value, determining that all register access chains match the access type; Otherwise, it is determined that a register access chain corresponding to the same type value as the access type matches the access type.

5. The chain structure access system according to claim 3, characterized in that: When the access attribute corresponding to the first access request belongs to shared register access or type register access, the access mark corresponding to the first access request is a second preset value.

6. The chain structure access system according to claim 5, characterized in that: The first judgment result includes acceptance and non-acceptance; The access tag and b i j Corresponding reference number E i j , determine b i j The first determination result of whether to receive the first access request includes: When the access mark corresponding to the first access request is a second preset value, determining that the first judgment result is acceptance; Otherwise, compare the access tag with E i j Are they the same? If the access token and E i j If the two data are the same, the first judgment result is determined to be acceptance; If the access token and E i j If they are different, the first judgment result is determined to be not accepted.

7. The chain structure access system according to claim 6, characterized in that: The step of determining b according to the first access request and the first judgment result i j Whether to send the first access request to b i j+1 ,include: When the access attribute corresponding to the first access request belongs to shared register access or type register access, determine b i j Send the first access request to b i j+1 ; When the access attribute corresponding to the first access request belongs to module register access, and the first judgment result is not received, determining b i j Send the first access request to b i j+1 ; When the access attribute corresponding to the first access request belongs to module register access and the first judgment result is received, determine b i j Do not send the first access request to b i j+1 .

8. The chain structure access system according to claim 1, characterized in that: In b i j When receiving the first access request, register c i j Respond to the first access request.

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