A fraud detection method and system based on topology analysis and quantum graph neural network

Abstract

The application relates to a fraud detection method and system based on topology analysis and a quantum graph neural network, and specifically comprises the following steps: constructing a graph structure, wherein nodes in the graph structure represent transaction entities, and edges represent transaction relationships between the entities; extracting a node feature vector; processing the graph structure by using topology data analysis and projecting nodes of the graph structure to a low-dimensional space to form a one-dimensional scatter plot; clustering nodes of the scatter plot to form node features; mapping the clustering features to a quantum state by using an angle coding technology to generate quantum coding data; mapping the quantum coding data to a variational quantum circuit and extracting quantum features; inputting the quantum features to a pooling layer and a linear layer of a neural network to generate a risk score. Therefore, the technical scheme can more accurately identify fraud by combining topology analysis and a quantum graph neural network, can improve fraud detection speed, can continuously learn and identify new fraud patterns, and can improve the detection capability for new types of fraud.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of quantum computing and machine learning, and specifically discloses a fraud detection method and system based on topological analysis and quantum graph neural networks. BACKGROUND

[0002] With the advancement of digital economy, financial digital transformation has brought many conveniences, but at the same time it has also provided new opportunities for financial fraud. From simple credit card fraud to complex identity impersonation and financial fraud, financial fraud methods are emerging in an endless stream, not only damaging the economic interests of individual users, but also seriously threatening the reputation and asset safety of financial institutions.

[0003] In the prior art, financial institutions use rule engines and machine learning models to build fraud detection systems, however, rule engines need to be frequently updated to adapt to changing fraud methods, and are inefficient in processing large-scale data; machine learning models, such as decision trees, support vector machines, etc., are often limited by linear assumptions and local feature extraction when processing high-dimensional, strongly correlated financial data, making it difficult to capture complex patterns and deep relationships in the data, and currently in financial transaction data, the interaction between entities often exists in the form of a graph, graph structure data contains rich information, which is crucial for revealing the internal connection of fraud behavior, however, existing fraud detection methods often ignore graph structure information, or lack effective methods to analyze and utilize this information.

[0004] With the rise of quantum computing technology, quantum graph neural networks (QGNNs) provide a new approach to processing such graph structure data, QGNNs take advantage of quantum computing to efficiently process and analyze graph structure data, capturing complex relationships between entities, and showing great potential in the field of fraud detection.

[0005] Therefore, the present application aims to provide a fraud detection method and system based on topological analysis and quantum graph neural networks to solve the above problems, by combining topological analysis and quantum graph neural networks to more efficiently process and analyze graph structure information in financial transaction data, capturing complex relationships between entities, more accurately identifying fraudulent behavior, using the self-learning and adaptive ability of quantum graph neural networks to continuously learn and identify new fraud patterns, improving the detection ability of new types of fraud behavior, and using the super parallelism of quantum computing to improve fraud detection speed. SUMMARY

[0006] To solve the problems of the prior art, the present application proposes a fraud detection method and system based on topological analysis and quantum graph neural networks.

[0007] To achieve the above purpose, the technical solution adopted by the present application includes:

[0008] A fraud detection method based on topology analysis and quantum graph neural network, characterized in that it comprises:

[0009] Constructing a graph structure, the graph structure comprising nodes and edges, the nodes being entities in transactions, and the edges being transaction relationships between entities;

[0010] Extracting feature vectors of the nodes;

[0011] Extracting topology features of the nodes in the graph structure using a topology data analysis method, and projecting the nodes to a low-dimensional space based on the topology features to form a one-dimensional scatter plot;

[0012] Clustering the nodes in the scatter plot to obtain clustered node features;

[0013] Mapping the clustered node features to quantum states through angle encoding technology to generate quantum encoding data;

[0014] Mapping the quantum encoding data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum encoding data;

[0015] Processing the quantum encoding data through the variational quantum circuit to extract quantum features;

[0016] Inputting the quantum features into the pooling layer and linear layer of a neural network to generate a risk score.

[0017] Further, extracting the topology features of the nodes in the graph structure using a topology data analysis method, and projecting the nodes to a low-dimensional space based on the topology features to form a one-dimensional scatter plot specifically comprises:

[0018] Calculating the topology features of the nodes through topology data analysis;

[0019] Based on the topology features, constructing a filter function through the Mapper algorithm to project the nodes to a low-dimensional space to form a one-dimensional scatter plot.

[0020] Further, the variational quantum circuit specifically has a multi-layer structure, each layer of which includes a rotation gate and a CNOT gate, and the angles of the rotation gate and the CNOT gate are adjusted to match the quantum encoding data.

[0021] Further, the method further comprises:

[0022] Based on the risk score, converting the continuous risk score into discrete category labels through the best threshold to realize binary classification.

[0023] Further, the method further comprises:

[0024] training the neural network using a cross-entropy loss function.

[0025] Further, the method further comprises:

[0026] The pooling layer is an average pooling layer, and the quantum features are input to a linear layer after being processed by merging.

[0027] In addition, the present application also relates to a fraud detection system based on topology analysis and quantum graph neural network, characterized by comprising:

[0028] a graph structure construction module, configured to construct a graph structure, the graph structure comprising nodes and edges, the nodes representing entities in transactions, and the edges representing transaction relationships between entities;

[0029] a feature extraction module, configured to extract feature vectors of the nodes;

[0030] a topology analysis processing module, configured to extract topology features of the nodes in the graph structure by using a topology data analysis method, and project the nodes into a low-dimensional space based on the topology features to form a one-dimensional scatter plot;

[0031] a clustering module, configured to cluster the nodes in the scatter plot to obtain clustered node features;

[0032] a quantum encoding module, configured to map the clustered node features into quantum states by using an angle encoding technology to generate quantum encoding data;

[0033] a variational quantum circuit mapping module, configured to map the quantum encoding data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum encoding data;

[0034] a quantum feature extraction module, configured to process the quantum encoding data by using the variational quantum circuit to extract quantum features;

[0035] a neural network processing module, configured to input the quantum features to a pooling layer and a linear layer of a neural network to generate a risk score.

[0036] Further, the topology analysis processing module is further configured to:

[0037] calculate the topology features of the nodes by using topology data analysis;

[0038] project the nodes into a low-dimensional space based on the topology features by using a Mapper algorithm to form a one-dimensional scatter plot.

[0039] In addition, the present application also relates to an electronic device, characterized by comprising a processor and a memory;

[0040] the memory, configured to store operation instructions;

[0041] the processor, configured to execute the method by calling the operation instructions.

[0042] In addition, the application also relates to a computer readable storage medium, characterized in that the storage medium stores a computer program, and the computer program is executed by a processor to realize the method.

[0043] The application discloses a fraud detection method and system based on topology analysis and quantum graph neural network, including the following steps: constructing a graph structure, in which nodes represent transaction entities and edges represent transaction relationships between entities; extracting node feature vectors; processing the graph structure using topology data analysis and projecting its nodes into a low-dimensional space to form a one-dimensional scatter plot; clustering the scatter plot nodes to form node features; mapping the clustered features to quantum states using angle encoding technology to generate quantum encoding data; mapping the quantum encoding data to a variational quantum circuit and extracting quantum features; inputting the quantum features into the pooling layer and linear layer of a neural network to generate a risk score. Therefore, the technical solution can more deeply mine complex features in the graph structure by combining topology analysis and quantum graph neural network, thereby more accurately identifying fraudulent behavior, improving fraud detection speed using the super parallelism of quantum computing, and continuously learning and identifying new fraud patterns using the self-learning and adaptability of quantum graph neural networks, thereby improving the detection capability for new types of fraudulent behavior. BRIEF DESCRIPTION OF DRAWINGS

[0044] Figure 1 A fraud detection method based on topology analysis and quantum graph neural network provided by the embodiment of the application;

[0045] Figure 2 A variational quantum circuit design schematic diagram provided by the embodiment of the application;

[0046] Figure 3 A fraud detection system based on topology analysis and quantum graph neural network provided by the embodiment of the application;

[0047] Figure 4 A structure schematic diagram of an electronic device provided by the embodiment of the application. DETAILED DESCRIPTION

[0048] The embodiments of the application are described in detail below, and examples of the embodiments are shown in the drawings, in which the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the application, and cannot be interpreted as a limitation on the application.

[0049] Those skilled in the art can understand that, unless specifically stated, the singular forms "a", "an", "said" and "the" used herein also include the plural forms, wherein "first", "second" and the like are only for clear introduction of the scheme and are not limited to the objects themselves. Of course, the objects defined by "first" and "second" may be the same terminal, device and user, etc. It should be further understood that the phrase "comprising" used in the specification of the present application means that the features, integers, steps, operations, elements and / or components exist, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or their combinations. The phrase "and / or" used herein includes all or any single unit and all combinations of the associated listed items.

[0050] The technical scheme of the present application and how the technical scheme of the present application solves the above technical problems will be described in detail below with specific examples. The following examples can be combined with each other, and the same or similar concepts or processes may not be described again in some examples.

[0051] In the financial field, each transaction can be regarded as an entity, and the interaction between entities constitutes the edges of the transaction network. Converting these transaction data into a graph structure is a key step to realize effective fraud detection. Using the method of graph theory to construct the graph model of financial transactions helps to reveal the complex relationships between transactions.

[0052] Therefore, the present scheme proposes a fraud detection method based on topology analysis and quantum graph neural network, as shown in Figure 1 The structure includes:

[0053] S1. Constructing a graph structure, the graph structure including nodes and edges, the nodes being entities in transactions, and the edges being transaction relationships between entities, i.e. fund flows;

[0054] S2. Extracting a feature vector x i of the node, the feature vector x i of the node can include transaction amount, timestamp, geographic location, etc.

[0055] S3. Calculating the topological features of the nodes through topology data analysis, the topological features including at least one of degree centrality and clustering coefficient;

[0056] Based on the topological features, a filter function is constructed through the Mapper algorithm to project the nodes to a low-dimensional space to form a one-dimensional scatter plot;

[0057] S4. Clustering the nodes in the scatter plot to obtain the clustered node features;

[0058] Specifically, by clustering to encapsulate the initial characteristics, the computing resource requirement is minimized, which helps to identify outliers and potential fraud patterns, wherein the node features are used to represent the location attribute of each node on a one-dimensional scatter plot.

[0059] S5. The clustered node features are mapped into quantum states by an angle encoding technique to generate quantum encoding data;

[0060] Specifically, angle encoding is a method of mapping real values to quantum states, which uses the superposition principle of quantum bits to represent data. For the jth feature vector in the X feature vector of i nodes, it is mapped to an angle θ ij :

[0061]

[0062] Further mapping to quantum state |ψ i >, as follows:

[0063]

[0064] where d is the dimension of the feature vector, x ij is the ith feature value, and θ ij is the corresponding phase angle.

[0065] S6. Map the quantum encoding data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum encoding data;

[0066] Specifically, the design diagram of the variational quantum circuit is as shown in Figure 2 The variational quantum circuit has six quantum bits and a total of seven layers of structure, each quantum bit represents a node in the graph structure, and the quantum bits correspond to the quantum encoding data.

[0067] The multi-layer structure of the circuit captures the deep structure information of the graph, wherein each layer can be regarded as a message passing iteration of the graph. By increasing the number of layers, the circuit can capture more complex graph structure patterns.

[0068] The variational quantum circuit allows independent quantum state encoding and processing of the features of each node. The multi-layer structure is designed to enhance the node features, and the variational quantum circuit learns complex patterns in the data by adjusting parameters;

[0069] Each layer of the variational quantum circuit includes rotation gates Ry and Rx gates and CNOT gates, which match the quantum encoding data by adjusting the angle parameters. The parameters are adjusted to maximize the network's ability to identify fraud patterns.

[0070] S7. Processing the quantum encoded data through the variational quantum circuit to extract quantum features;

[0071] Specifically, quantum features are extracted through the variational quantum circuit, and the quantum features contain deep information of the graph structure data, including complex relationships and interaction patterns between nodes.

[0072] S8. Inputting the quantum features into a pooling layer and a linear layer of a neural network to generate a risk score.

[0073] Specifically, the neural network is pre-trained using a cross-entropy loss function;

[0074] The pooling layer is an average pooling layer, and the quantum features are input into the linear layer after being processed by the pooling layer. The linear layer is a set of weight matrices, which is used to map input features to an output space. In the quantum graph neural network, the linear layer is used to convert the feature vector after average pooling into the final output, i.e., the risk score.

[0075] S9. Based on the risk score, a best threshold is used to convert the continuous risk score into a discrete class label, realizing binary classification;

[0076] Specifically, the best threshold is achieved by analyzing the receiver operating characteristic (ROC) curve and the precision-recall (PR) curve. In the ROC curve, the best threshold usually corresponds to the point closest to the upper left corner of the curve, while in the PR curve, the best threshold maximizes the product of precision and recall.

[0077] If the risk score of a sample is greater than or equal to the best threshold, the sample is classified as positive (e.g., indicating fraudulent behavior); if the risk score is less than the threshold, it is classified as negative (e.g., indicating non-fraudulent behavior).

[0078] The following is another embodiment of a financial fraud detection method based on a quantum graph neural network, which represents financial transaction data in a graph structure for financial fraud detection, including the following steps:

[0079] Suppose a financial transaction network contains 1000 accounts, each account is regarded as a node, and the transactions between accounts are regarded as edges, a weighted graph G=(V,E) is constructed, the vertices V={v1,v2,…,c 1000} represent 1000 account nodes, and the edges E={(v i ,v j ,w ij )∣v i ,v j ∈V} represent the connection between i vertices and j vertices with transaction amount as edge, where w ij is the transaction amount.

[0080] Suppose there is a transaction of 1000 yuan between accounts v1 and v2, add an edge e 12 = (v1, v2, 1000) to the graph.

[0081] Each node v i has the following features: account balance b i , transaction frequency f i (number of transactions in the past 30 days), average transaction amount a i .

[0082] Each edge e ij has the following features: transaction amount w ij , transaction timestamp t ij .

[0083] Using topological data analysis methods to extract the topological features of nodes in the graph structure, and projecting the nodes to a low-dimensional space based on the topological features, forming a one-dimensional scatter plot:

[0084] (1) Calculate the topological features of each node, such as degree centrality (DC), betweenness centrality (BC), clustering coefficient (CC), and eigenvector centrality (EC). The formulas for degree centrality and clustering coefficient are as follows, where N i is the set of neighbor nodes of v i , E i is the number of edges actually existing between the neighbor nodes of node v i :

[0085] Degree centrality:

[0086] Clustering coefficient:

[0087] (2) Construct a filter function through the Mapper algorithm to project high-dimensional topological data to a low-dimensional space:

[0088] f(v i ) = w1DC(v i ) + w2BC(v i ) + w3CC(v i ) + w4EC(v i )

[0089] (3) Through data coverage and local clustering, perform clustering operations, such as clustering 1000 account nodes into K nodes:

[0090] C k ← f(v i )

[0091] Map the features of the original nodes to the clustered node features, N is the number of original account nodes, x i,j For the jth feature of the i account:

[0092]

[0093] Encode the node features into quantum states using angle encoding techniques. For y i in the feature Y of node v i , map it to angle θ i :

[0094]

[0095] Then encode θ i into quantum state |ψ i >:

[0096] |ψ i > = cos(θ i / 2) |0> + sin(θ i / 2) |1>

[0097] If y i = 0.5, max(Y) = 1, then:

[0098]

[0099] Design a variational quantum circuit (VQC) containing 6 quantum bits, each representing a node feature in the graph. The VQC contains 7 layers, and each layer has the following structure:

[0100] 1. Rx(θ1) gate acting on each quantum bit;

[0101] 2. CNOT gate connecting adjacent quantum bits;

[0102] 3. Rx(θ2) gate acting on each quantum bit;

[0103] 4. Ry(θ3) gate acting on each quantum bit;

[0104] 5. CNOT gate connecting adjacent quantum bits;

[0105] 6. Rx(θ4) gate acting on each quantum bit;

[0106] 7. Ry(θ5) gate acting on each quantum bit;

[0107] Where θ1, θ2, θ3, θ4, θ5 are trainable parameters.

[0108] For the first quantum bit in the first layer:

[0109] |ψ1> = Rx(θ1)|ψ1> = cos(θ1 / 2)|ψ1> - i sin((θ1 / 2)X|ψ1>

[0110] where X is the Pauli X matrix, the operation of the CNOT gate can be represented as: where denotes the XOR operation.

[0111] Processing the quantum encoding data through the variational quantum circuit to extract quantum features:

[0112] The measurement results of 6 quantum bits are processed to obtain a 6-dimensional classical vector h = [h1, h2, …, h6]. where σ z is the Pauli Z matrix.

[0113] Map h to a two-dimensional output space using the weight matrix W and the bias vector b: o = Wh + b. Where W is a 2x6 matrix and b is a 2-dimensional vector. The final output is:

[0114]

[0115] Based on the risk score, convert the continuous risk score to a discrete class label by the best threshold to realize binary classification;

[0116] Find the best classification threshold using the ROC curve. For different thresholds t, calculate the true positive rate (TPR) and false positive rate (FPR):

[0117]

[0118] Select t that makes TPR(t)-FPR(t) maximum as the best threshold.

[0119] Calculate evaluation metrics: accuracy

[0120] Recall

[0121]

[0122] AUC-PR: Calculate the area under the Precision-Recall curve.

[0123] Example calculation:

[0124] Suppose the test set contains 100 samples, of which 20 are fraud cases. The model's prediction results at the best threshold of 0.6 are as follows: TP = 15, FP = 5, TN = 75, FN = 5.

[0125] Precision = TP / (TP+FP) = 15 / (15+5) = 0.75 = 75%

[0126] Recall = TP / (TP+FN) = 15 / (15+5) = 0.75 = 75%

[0127] F1 Score = 2*(Precision*Recall) / (Precision+Recall) = 2*(0.75*0.75) / (0.75+0.75) = 0.75 = 75%

[0128] The calculation of AUC-PR requires precision and recall values at multiple thresholds. If the calculation results in AUC-PR = 0.80, it indicates that the model has good performance in distinguishing between fraudulent and non-fraudulent cases. Assuming that for a real fraudulent case (y = 1), the model predicts a probability of 0.8

[0129] The loss of a single sample = -(1*log(0.8) + (1-1)*log(1-0.8)) = -log(0.8) ≈ 0.223.

[0130] Therefore, the technical solution can more deeply mine complex features in the graph structure by combining topology analysis and quantum graph neural networks, thereby more accurately identifying fraudulent behavior. It utilizes the super parallelism of quantum computing to improve fraud detection speed and the self-learning and adaptive capabilities of quantum graph neural networks to continuously learn and identify new fraud patterns, improving detection capabilities for new types of fraudulent behavior.

[0131] In addition, another aspect relates to a fraud detection system based on topology analysis and quantum graph neural networks, which has the structure as shown in Figure 3 The fraud detection system includes:

[0132] A graph structure construction module 301 is configured to construct a graph structure, wherein the graph structure includes nodes and edges, the nodes represent entities in transactions, and the edges represent transaction relationships between entities.

[0133] A feature extraction module 302 is configured to extract feature vectors of the nodes.

[0134] A topology analysis processing module 303 is configured to process the graph structure through topology data analysis and project it into a low-dimensional space to form a one-dimensional scatter plot.

[0135] A clustering module 304 is configured to cluster the nodes in the scatter plot to obtain clustered node features.

[0136] A quantum encoding module 305 is configured to map the clustered node features into quantum states through angle encoding technology to generate quantum encoding data.

[0137] The variational quantum circuit mapping module 306 is configured to map the quantum encoding data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum encoding data.

[0138] The quantum feature extraction module 307 is configured to process the quantum encoding data through the variational quantum circuit to extract quantum features.

[0139] The neural network processing module 308 is configured to input the quantum features into a pooling layer and a linear layer of a neural network to generate a risk score, wherein the neural network is trained using a cross-entropy loss function, and the pooling layer is an average pooling layer.

[0140] Further, the topology analysis processing module 303 is specifically configured to:

[0141] calculate the topology features of the nodes through topology data analysis;

[0142] project the nodes to a low-dimensional space based on the topology features through a Mapper algorithm to form a one-dimensional scatter plot.

[0143] Further, the variational quantum circuit specifically has a multi-layer structure, each layer of which includes a rotation gate and a CNOT gate, and the rotation gate and the CNOT gate are adjusted in angle to match the quantum encoding data.

[0144] Further, the system further includes a binary classification module 309, which is specifically configured to:

[0145] convert the continuous risk score into discrete category labels through an optimal threshold based on the risk score to realize binary classification.

[0146] By using the system, the above method can be performed, and the corresponding technical effects can be achieved.

[0147] Embodiments of the present application also provide an electronic device for executing the above method, as an implementation device of the method, including a processor and a memory.

[0148] The memory is configured to store operation instructions.

[0149] The processor is configured to execute the fraud detection method based on topology analysis and quantum graph neural network provided in any of the embodiments of the present application by calling the operation instructions.

[0150] As an example, Figure 4A structural schematic diagram of an electronic device to which an embodiment of the present application is applied is shown. The electronic device 400 includes a processor 401 and a memory 403. The processor 401 and the memory 403 are connected, for example, through a bus 402. Optionally, the electronic device 400 can further include a transceiver 404. It should be noted that the transceiver 404 is not limited to one in actual application. It can be understood that the structure shown in the embodiment of the present application does not constitute a specific limitation on the specific structure of the electronic device 400. In another embodiment of the present application, the electronic device 400 can include more or fewer components than those shown in the figure, or combine some components, or split some components, or different arrangement of components. The components shown in the figure can be implemented in hardware, software or a combination of software and hardware. Optionally, the electronic device can further include a display screen 305 for displaying images or receiving user operation instructions when necessary.

[0151] The processor 401 is applied to the embodiments of the present application and used to implement the method shown in the method embodiments. The transceiver 404 can include a receiver and a transmitter. The transceiver 404 is applied to the embodiments of the present application and used to perform the function of communication between the electronic device of the embodiments of the present application and other devices.

[0152] The processor 401 can be a CPU (Central Processing Unit, central processor), a general-purpose processor, a DSP (Digital Signal Processor, data signal processor), an ASIC (Application Specific Integrated Circuit, application specific integrated circuit), an FPGA (Field Programmable Gate Array, field programmable gate array) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logical blocks, modules and circuits described in combination with the disclosure of the present application. The processor 401 can also be a combination of computing functions, such as one or more microprocessor combinations, combinations of DSP and microprocessor, etc.

[0153] Processor 401 may also include one or more processing units, such as an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processing unit (NPU). Different processing units can be independent devices or integrated into one or more processors. The controller can be the central nervous system and command center of the electronic device 400. The controller can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution. Processor 401 may also include memory for storing instructions and data. In some embodiments, the memory in processor 401 is a cache memory. This memory can store instructions or data that the processor 401 has recently used or is recurring.

[0154] The processor 401 can run the fraud detection method based on topology analysis and quantum graph neural network provided in the embodiments of this application. The processor 401 may include different devices, such as when integrating a CPU and a GPU, the CPU and GPU can cooperate to execute the fraud detection method based on topology analysis and quantum graph neural network provided in the embodiments of this application. Some algorithms are executed by the CPU and other algorithms are executed by the GPU to obtain faster processing efficiency.

[0155] Bus 402 may include a pathway for transmitting information between the aforementioned components. Bus 402 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. Bus 402 can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 4 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0156] The memory 403 may be ROM (Read Only Memory) or other types of static storage devices capable of storing static information and instructions, RAM (Random Access Memory) or other types of dynamic storage devices capable of storing information and instructions, or EEPROM (Electrically Erasable Programmable Read Only Memory), CD-ROM (Compact Disc Read Only Memory), or high-speed random access memory. It may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), or other optical disc storage, optical disk storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto.

[0157] Optionally, the memory 403 is used to store application code that executes the scheme of this application, and the execution is controlled by the processor 401. The processor 401 is used to execute the application code stored in the memory 403 to implement the fraud detection method based on topology analysis and quantum graph neural network provided in any embodiment of this application.

[0158] The memory 403 can be used to store computer executable program code, which includes instructions. The processor 401 executes various functional applications and data processing of the electronic device 400 by running the instructions stored in the memory 403. The memory 403 may include a program storage area and a data storage area. The program storage area can store the operating system, application code, etc. The data storage area can store data created during the use of the electronic device 400 (such as images and videos captured by a camera application).

[0159] The memory 403 may also store one or more computer programs corresponding to the fraud detection method based on topology analysis and quantum graph neural networks provided in the embodiments of this application. These one or more computer programs are stored in the memory 403 and configured to be executed by the one or more processors 401. The one or more computer programs include instructions that can be used to perform the various steps in the corresponding embodiments described above.

[0160] Of course, the code for the fraud detection method based on topology analysis and quantum graph neural network provided in this application embodiment can also be stored in external memory.

[0161] The display screen 405 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a minimized LED, a microLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 400 may include one or N displays 405, where N is a positive integer greater than 1. The display screen 405 can be used to display information input by the user or information provided to the user, as well as various graphical user interfaces (GUIs). For example, the display screen 405 can display photos, videos, web pages, or documents.

[0162] The electronic device provided in this application is applicable to any of the above-described methods. Therefore, the beneficial effects it can achieve can be referred to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0163] Embodiments of the present invention also provide a computer-readable storage medium capable of implementing all the steps of the methods in the above embodiments, wherein the computer-readable storage medium stores a computer program that, when executed by a processor, implements all the steps of the methods in the above embodiments.

[0164] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0165] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A system that specifies functions in one or more boxes.

[0166] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including an instruction set implemented in a process. Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0167] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the functions specified in one or more boxes. Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the invention.

[0168] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A fraud detection method based on topological analysis and quantum graph neural networks, characterized in that, include: Construct a graph structure, which includes nodes and edges, where nodes are entities in a transaction and edges represent transaction relationships between entities; Extract the feature vector of the node; The topological features of the nodes in the graph structure are extracted using topological data analysis methods, and the nodes are projected into a low-dimensional space based on the topological features to form a one-dimensional scatter plot. Cluster the nodes in the scatter plot to obtain the clustered node features; The clustered node features are mapped to quantum states using angle encoding technology to generate quantum encoded data. The quantum-coded data is mapped to a variable quantum circuit, wherein the variable quantum circuit has qubits and the qubits correspond to the quantum-coded data; The quantum-coded data is processed by the variable quantum circuit to extract quantum features; The quantum features are input into the pooling and linear layers of the neural network to generate a risk score.

2. The method according to claim 1, characterized in that, The process of extracting topological features of nodes in the graph structure using topological data analysis methods, and projecting these features onto a low-dimensional space to form a one-dimensional scatter plot, specifically includes: The topological characteristics of nodes are calculated through topological data analysis; Based on the aforementioned topological features, a filtering function is constructed using the Mapper algorithm to project the nodes into a low-dimensional space, forming a one-dimensional scatter plot.

3. The method according to claim 1, characterized in that, The variable quantum circuit is specifically a multi-layer structure, with each layer including a rotating gate and a CNOT gate. The angle between the rotating gate and the CNOT gate is adjusted to match the quantum encoded data.

4. The method according to claim 1, characterized in that, Also includes: Based on the risk score, the continuous risk score is converted into discrete category labels by using an optimal threshold, thus achieving binary classification.

5. The method according to claim 1, characterized in that, Also includes: The neural network is trained using the cross-entropy loss function.

6. The method according to claim 1, characterized in that, The pooling layer is an average pooling layer, which is input to the linear layer after merging the quantum features.

7. A fraud detection system based on topological analysis and quantum graph neural networks, characterized in that, include: The graph structure construction module is used to construct a graph structure, which includes nodes and edges. The nodes represent entities in a transaction, and the edges represent transaction relationships between entities. The feature extraction module is used to extract the feature vector of the node; The topology analysis and processing module is used to process the graph structure through topology data analysis and project it into a low-dimensional space to form a one-dimensional scatter plot. The clustering module is used to cluster the nodes in the scatter plot to obtain the features of the clustered nodes; The quantum coding module is used to map the clustered node features to quantum states using angle coding technology to generate quantum coded data. A variable quantum circuit mapping module is used to map the quantum-encoded data to a variable quantum circuit, wherein the variable quantum circuit has qubits, and the qubits correspond to the quantum-encoded data; A quantum feature extraction module is used to process the quantum-coded data through the variable quantum circuit to extract quantum features; The neural network processing module is used to input the quantum features into the pooling layer and linear layer of the neural network to generate a risk score.

8. The system according to claim 7, characterized in that, The topology analysis and processing module is also used for: The topological features of the nodes are calculated, and the topological features include at least one of degree centrality and clustering coefficient; Based on the aforementioned topological features, a filtering function is constructed using the Mapper algorithm to project the data of the graph structure into a one-dimensional space.

9. An electronic device, characterized in that, Including processor and memory; The memory is used to store operation instructions; The processor is configured to execute the method of any one of claims 1-6 by invoking the operation instructions.

10. A computer-readable storage medium, characterized in that, The storage medium stores a computer program, which, when executed by a processor, implements the method of any one of claims 1-6.

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