Epitaxial test piece, method of manufacturing the same, and method of epitaxial growth test
By performing inversion doping in the first region of a semiconductor substrate to form a heavily doped region, and then epitaxially growing an epitaxial layer on the first and second regions, the problem of high cost of epitaxial growth testing in the prior art is solved, enabling thickness and resistivity testing of a single semiconductor substrate and reducing costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GTA SEMICON CO LTD
- Filing Date
- 2025-01-02
- Publication Date
- 2026-07-24
AI Technical Summary
Existing technologies require the use of two semiconductor substrates with different doping concentrations to measure thickness and resistivity during epitaxial growth testing, resulting in high testing costs.
By performing inversion doping in a first region of a semiconductor substrate to form a heavily doped region, and then epitaxially growing an epitaxial layer on a second region, an epitaxial test wafer is formed. The difference in doping concentration is used to achieve monolithic testing of thickness and resistivity.
This technology enables the testing of epitaxial layer thickness and resistivity using a single semiconductor substrate, reducing product and process costs.
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Figure CN119812165B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to an epitaxial test wafer and its fabrication method, and an epitaxial growth testing method. Background Technology
[0002] Epitaxial growth is a process of growing ordered single-crystal layers on a substrate. Epitaxial growth is widely used in semiconductor manufacturing, such as epitaxial silicon wafers in the integrated circuit industry.
[0003] Monitoring the quality of epitaxial growth processes is one of the most important topics.
[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention
[0005] In view of the problems in the prior art, the purpose of this invention is to provide an epitaxial test wafer and its manufacturing method, as well as an epitaxial growth testing method, which overcomes the difficulties of the prior art and can reduce the cost of epitaxial growth testing.
[0006] The first aspect of this disclosure provides a method for fabricating an epitaxial test piece, comprising:
[0007] A semiconductor substrate is provided, the semiconductor substrate containing a doped material, the semiconductor substrate being divided into a first region and a second region;
[0008] Inversion doping is performed in the first region to form an inversion doped region, which is a heavily doped region compared to the semiconductor substrate;
[0009] After inversion doping in the first region, an epitaxial layer is epitaxially grown on the inversion doped region and the second region to obtain an epitaxial test wafer. The epitaxial layer has an inversion dopant relative to the doped material, and the inversion doped region is a heavily doped region compared to the epitaxial layer.
[0010] In some embodiments, the first region is inversely doped to form an inverse-doped region, including:
[0011] A patterned mask layer is formed on the semiconductor substrate, the patterned mask layer exposing the first region;
[0012] Using the patterned mask layer as a mask, inversion doping material is implanted into the first region to form the inversion doped region, and then the patterned mask layer is removed.
[0013] In some embodiments, the patterned mask layer is a photoresist layer.
[0014] In some embodiments, the dopant in the semiconductor substrate is an N-type dopant, and the inversion doped region and the epitaxial layer have P-type dopant; or...
[0015] The semiconductor substrate is doped with P-type dopant, and the inversion doped region and the epitaxial layer contain N-type dopant.
[0016] In some embodiments, the doping concentration of the inversion doped region is at least two orders of magnitude higher than the doping concentration of the epitaxial layer.
[0017] In some embodiments, the first region is adjacent to the second region.
[0018] A second aspect of this disclosure provides an epitaxial test piece, comprising:
[0019] A semiconductor substrate having a doped material in the semiconductor substrate, the semiconductor substrate being divided into a first region and a second region;
[0020] An inversion doped region is formed in the first region, and the inversion doped region is a heavily doped region compared to the semiconductor substrate;
[0021] An epitaxial layer is formed on the inversion doped region and the second region, the epitaxial layer having an inversion dopant relative to the dopant, and the inversion doped region being a heavily doped region compared to the epitaxial layer.
[0022] In some embodiments, the doping concentration of the inversion doped region is at least two orders of magnitude higher than the doping concentration of the epitaxial layer.
[0023] A third aspect of this disclosure provides an epitaxial growth testing method, comprising:
[0024] An epitaxial test wafer is fabricated, the epitaxial test wafer comprising a semiconductor substrate containing a dopant, the semiconductor substrate being divided into a first region and a second region, an inversion doped region being formed in the first region, the inversion doped region being a heavily doped region compared to the semiconductor substrate, an epitaxial layer being formed on the inversion doped region and the second region, the epitaxial layer having an inversion dopant relative to the dopant, the inversion doped region being a heavily doped region compared to the epitaxial layer;
[0025] The thickness of the epitaxial layer portion on the first region was measured using a thickness gauge;
[0026] The resistivity of the epitaxial layer portion on the second region was measured using a resistivity measuring machine.
[0027] In some embodiments, the fabrication of the epitaxial test piece includes:
[0028] The semiconductor substrate is provided and inversion doping is performed in the first region to form the inversion doped region, wherein the inversion doped region is a heavily doped region compared to the semiconductor substrate;
[0029] After inversion doping in the first region, the epitaxial layer is epitaxially grown on the inversion doped region and the second region to obtain the epitaxial test wafer.
[0030] In this embodiment, prior to epitaxial growth, a first region in the semiconductor substrate is heavily doped to form the aforementioned inversion-doped region. This inversion-doped region is heavily doped compared to the second region in the semiconductor substrate and the epitaxial layer. Therefore, the semiconductor substrate includes a heavily doped region relative to the epitaxial layer and a lightly doped region relative to the heavily doped region. Thus, after epitaxial growth, the thickness of the epitaxial layer can be measured at the location of the heavily doped region in the semiconductor substrate, and the resistivity of the epitaxial layer can be measured at the location of the lightly doped region in the semiconductor substrate.
[0031] Therefore, the epitaxial test wafer fabricated using the method of this embodiment can be used to test the thickness and resistivity of the epitaxial layer by performing epitaxial growth once on a single semiconductor substrate. This reduces product cost and process cost, and further reduces testing cost.
[0032] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0033] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.
[0034] Figure 1 This is a flowchart of the method for fabricating an epitaxial test piece provided in the embodiments of this disclosure.
[0035] Figures 2-7 yes Figure 1 The diagram shows the structure of the epitaxial test piece at each stage of the manufacturing process.
[0036] Figure 8 A flowchart illustrating the epitaxial growth testing method provided in the embodiments of this disclosure is shown.
[0037] Figure 9 Demonstration and use Figure 7 The diagram shows the principle of measuring epitaxial layer thickness and resistivity on the epitaxial test piece. Detailed Implementation
[0038] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
[0039] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.
[0040] Furthermore, the concepts of "first" and "second" mentioned in this disclosure are used only to distinguish different devices, modules or units, and are not used to define the order of functions performed by these devices, modules or units or their interdependencies.
[0041] In related technologies, epitaxial growth testing includes measuring the thickness and resistivity of the epitaxial layer, both of which are related to the doping concentration in the epitaxial layer. For measuring the epitaxial layer thickness, a heavily doped semiconductor substrate is used relative to the epitaxial layer, allowing for thickness measurement based on the light reflection mechanism due to the difference in doping concentration. For measuring the epitaxial layer resistivity, a lightly doped semiconductor substrate is used relative to the epitaxial layer.
[0042] Therefore, in epitaxial growth testing, existing technologies use two semiconductor substrates with different doping concentrations to perform thickness and resistivity measurements separately, which undoubtedly increases testing costs.
[0043] To address the cost issues inherent in existing technologies, this disclosure proposes a technical solution to reduce the cost of epitaxial growth testing.
[0044] like Figure 1 As shown, this disclosure provides a method for fabricating an epitaxial test piece, which includes, but is not limited to, the following steps:
[0045] Step 110: Provide a semiconductor substrate containing doped material, the semiconductor substrate being divided into a first region and a second region;
[0046] Step 120: Perform inversion doping in the first region to form an inversion doped region, wherein the inversion doped region is a heavily doped region compared to the semiconductor substrate;
[0047] Step 130: After performing inversion doping in the first region, an epitaxial layer is epitaxially grown on the inversion doped region and the second region to obtain an epitaxial test wafer. The epitaxial layer has an inversion dopant relative to the doped material, and the inversion doped region is a heavily doped region compared to the epitaxial layer.
[0048] In this embodiment, prior to epitaxial growth, a first region in the semiconductor substrate is heavily doped to form the aforementioned inversion-doped region. This inversion-doped region is more heavily doped than the second region in the semiconductor substrate. Therefore, the semiconductor substrate includes a heavily doped region and a lightly doped region relative to the heavily doped region. Thus, after epitaxial growth, the thickness of the epitaxial layer can be measured at the location of the heavily doped region in the semiconductor substrate, and the resistivity of the epitaxial layer can be measured at the location of the lightly doped region in the semiconductor substrate.
[0049] Therefore, the epitaxial test wafer fabricated using the method of this embodiment can be used to test the thickness and resistivity of the epitaxial layer by performing epitaxial growth once on a single semiconductor substrate. This reduces product cost and process cost, and further reduces testing cost.
[0050] The following is a detailed explanation. Figure 1 The structure of the epitaxial test piece at each stage of the fabrication process is shown.
[0051] like Figure 2 As shown, a semiconductor substrate 1 is provided.
[0052] In this embodiment of the disclosure, the semiconductor substrate 1 provides the basis for subsequent process operations.
[0053] Optionally, the semiconductor substrate 1 can be a third-generation wide-bandgap semiconductor material such as silicon carbide or gallium nitride. In other embodiments, the semiconductor substrate 1 can also be made of other materials such as silicon, germanium, silicon germanide, gallium arsenide, or indium gallium nitride. The semiconductor substrate 1 can also be other types of substrates such as a silicon-on-insulator substrate or a germanium-on-insulator substrate. The material of the semiconductor substrate 1 can be a material suitable for process requirements or easy to integrate.
[0054] A doped material is formed in the semiconductor substrate 1. When the doped material is N-type, the semiconductor substrate 1 is an N-type semiconductor substrate. When the doped material is P-type, the semiconductor substrate 1 is a P-type semiconductor substrate.
[0055] In this process, the N-type dopant consists of a small amount of pentavalent element impurities, such as phosphorus, antimony, and / or arsenic. As the pure semiconductor atoms (e.g., silicon atoms) are replaced by these N-type atoms, the pentavalent impurities (taking phosphorus as an example) interact with the pure semiconductor atoms. Four of the five outer electrons of the phosphorus atom form covalent bonds with the surrounding semiconductor atoms, leaving the extra electron almost unbound and more easily becoming a free electron. Thus, the N-type semiconductor substrate becomes a semiconductor substrate with a high concentration of free electrons, and its conductivity is primarily due to the conductivity of free electrons.
[0056] In this process, the P-type dopant consists of a small amount of trivalent element impurities, such as boron, aluminum, gallium, and / or indium. Because the semiconductor atoms (such as silicon atoms) in semiconductor substrate 1 are replaced by impurity atoms, the trivalent impurities (taking boron as an example) interact with the pure semiconductor. When the three outer electrons of the boron atom form covalent bonds with the surrounding semiconductor atoms, a "hole" (electrical void) is created. This hole may attract bound electrons to "fill" it, making the boron atom a negatively charged ion. Thus, semiconductor substrate 1, containing a high concentration of "holes" ("equivalent" to positive charge), becomes a conductive semiconductor substrate.
[0057] In this embodiment, combined with Figure 3 As shown in the top view, the semiconductor substrate 1 is divided into a first region s1 and a second region s2, wherein the first region s1 will serve as the thickness measurement area for the subsequent epitaxial layer, and the second region s2 will serve as the resistivity measurement area for the subsequent epitaxial layer.
[0058] exist Figure 3 In this example, the first region s1 and the second region s2 are adjacent. In another example, s1 and s2 may not be adjacent. Additionally, Figure 3 The first region s1 and the second region s2 are represented by different shapes, which is for the purpose of differentiation and does not constitute a restriction on the shape of the corresponding regions.
[0059] In addition, multiple sets of first regions s1 and second regions s2 are formed in the semiconductor substrate 1. The specific number of these regions can be set according to actual testing requirements, such as one set or multiple sets.
[0060] like Figure 4 As shown, a patterned mask layer 2 is formed on a semiconductor substrate 1, which exposes a first region s1.
[0061] In this embodiment, the patterned mask layer 2 is selected as a photoresist layer. Photoresist, also known as photoresist, is an etch-resistant thin film material whose solubility changes after being exposed to light or radiation such as ultraviolet light, deep ultraviolet light, electron beam, ion beam, and X-rays. It is a key material in the photolithography process.
[0062] When using a photoresist layer, the patterned mask layer 2 described above is fabricated using exposure and development techniques. Specifically, a photoresist layer is deposited on the semiconductor substrate 1, then the photoresist layer of the first region s1 is exposed, and after exposure, it is placed in a developing solution, causing the photoresist layer in the exposed area to partially dissolve to form a window exposing the first region s1. This method is applicable to positive photoresists.
[0063] In another embodiment, if a negative photoresist is used, the photoresist layer portion outside the first region s1 is exposed, and after exposure, it is placed in a corresponding developer solution, so that the photoresist portion at the location of the first region s1 outside the exposed area is dissolved to form a window exposing the first region s1.
[0064] like Figure 5 As shown, using the patterned mask layer 2 as a mask, inversion doping material is implanted into the first region s1 to form an inversion doped region s3. The inversion doped region s3 is a heavily doped region compared to the semiconductor substrate 1.
[0065] In this embodiment, an ion implantation process is used to implant an inversion dopant into the first region s1. Here, the inversion dopant is relative to the dopant in the semiconductor substrate 1. When the semiconductor substrate 1 has N-type dopant, the inversion dopant is a P-type dopant. When the semiconductor substrate 1 has P-type dopant, the inversion dopant is an N-type dopant.
[0066] Ion implantation is a doping process that uses a high-energy charged ion beam to forcibly incorporate the aforementioned inversion dopant into a semiconductor substrate 1. Using ion implantation, the inversion dopant can be conveniently delivered below the substrate surface, for example, to at least a partial depth within the semiconductor substrate 1. This embodiment does not impose a specific limitation on the depth of the inversion doped region s3; it can be selected as needed.
[0067] In another embodiment, inversion dopant can also be doped by diffusion.
[0068] like Figure 6 As shown, the graphical mask layer 2 (e.g.) is removed. Figure 5 As shown in the figure, an inversion doped region s3 is finally formed in the semiconductor substrate 1. The inversion doped region s3 is a heavily doped region relative to the semiconductor substrate 1.
[0069] In another embodiment, the patterned mask layer uses other materials, such as hard mask materials.
[0070] like Figure 7As shown, an epitaxial layer 3 is epitaxially grown on the inversion-doped region s3 and the second region s2 to obtain an epitaxial test wafer 10. The epitaxial layer 3 contains inversion-doped material relative to the doped material in the semiconductor substrate 1, and the inversion-doped region s3 is a heavily doped region compared to the epitaxial layer 3. At this time, both the second region s2 of the semiconductor substrate 1 and the epitaxial layer 3 are lightly doped regions, or the doping concentration of the second region s2 is not significantly different from that of the epitaxial layer 3.
[0071] Thus, the epitaxial layer portion above the inversion-doped region s3 is used to measure the thickness, while the epitaxial layer portion above the second region s2 is used to measure the resistivity.
[0072] In integrated circuit manufacturing, epitaxial growth methods include solid-phase epitaxy and vapor-phase epitaxy. Solid-phase epitaxy refers to the growth of a single crystal layer on a substrate using a solid source. For example, thermal annealing after ion implantation is actually a solid-phase epitaxy process.
[0073] Vapor phase epitaxy (CVD) growth methods include chemical vapor phase epitaxy (CVE), molecular beam epitaxy (MBE), and atomic layer epitaxy (ALE). Among these, CVD and chemical vapor deposition (CVD) share essentially the same principle: both utilize a mixture of gases to undergo a chemical reaction on the surface of a semiconductor substrate to deposit a thin film.
[0074] The embodiments disclosed herein do not limit the specific method of epitaxial growth, but can be selected according to the specific epitaxial growth testing requirements.
[0075] In one embodiment, the doping concentration of the inversion doped region s3 is at least two orders of magnitude higher than that of the epitaxial layer 3. A Fourier transform infrared (FTIR) thickness gauge is used during thickness measurement; this device utilizes infrared technology to measure film thickness by measuring the transmittance of infrared light. Therefore, because the doping concentration of the inversion doped region s3 is at least two orders of magnitude higher than that of the epitaxial layer 3, infrared light can pass through the epitaxial layer 3 and be reflected at the surface of the inversion doped region s3. The reflected light then transmits back through the epitaxial layer 3, allowing the thickness of the epitaxial layer 3 to be measured by measuring the transmittance of infrared light.
[0076] In this embodiment, an epitaxial layer 3 is generated on a monolithic semiconductor substrate 1 through a single epitaxial growth. Since an inverse doped region s3, which serves as a heavily doped region, is formed inside the semiconductor substrate 1 beforehand, thickness measurement and resistivity measurement can be completed by relying on this single epitaxial growth and the epitaxial layer 3 formed, effectively reducing product cost and process cost.
[0077] This disclosure also provides an epitaxial test piece, the structure of which can be as follows: Figure 7 As shown, it includes:
[0078] A semiconductor substrate 1, wherein the semiconductor substrate 1 contains a doped material, and the semiconductor substrate 1 is divided into a first region s1 and a second region s2;
[0079] An inversion doped region s3 is formed in the first region s1, and the inversion doped region s3 is a heavily doped region compared to the semiconductor substrate 1;
[0080] An epitaxial layer 3 is formed on the inversion doped region s3 and the second region s2. The epitaxial layer 3 has an inversion dopant relative to the doped material. The inversion doped region s3 is a heavily doped region compared to the epitaxial layer 3.
[0081] Figure 7 The epitaxial test piece shown is used Figure 1 The method shown is used to prepare it. In another embodiment, it can also be prepared by other feasible methods. Figure 7 The epitaxial test piece is shown.
[0082] In this disclosure, Figure 7 The epitaxial test piece shown can be subsequently transferred to a corresponding epitaxial testing device for epitaxial growth testing. In another embodiment, the epitaxial test piece can also be fabricated during the epitaxial growth testing process.
[0083] like Figure 8 As shown, the epitaxial growth testing method includes the following steps:
[0084] Step 810: Fabricate an epitaxial test wafer, the epitaxial test wafer comprising a semiconductor substrate containing a dopant, the semiconductor substrate being divided into a first region and a second region, an inversion doped region being formed in the first region, the inversion doped region being a heavily doped region relative to the semiconductor substrate, an epitaxial layer being formed on the inversion doped region and the second region, the epitaxial layer having an inversion dopant relative to the dopant, the inversion doped region being a heavily doped region relative to the epitaxial layer;
[0085] Step 820: Measure the thickness of the epitaxial layer portion on the first region using a thickness gauge;
[0086] Step 830: Measure the resistivity of the epitaxial layer portion on the second region using a resistivity measuring machine.
[0087] Using the epitaxial growth testing method of this embodiment, only one semiconductor substrate is needed and one epitaxial growth is performed to complete two testing options, significantly reducing product cost and process cost.
[0088] like Figure 9 The arrow indicates the position of the inversion-doped region s3. The thickness measuring instrument emits infrared light, which is reflected from the surface of the epitaxial layer 3 and refracted into it. The refracted light is reflected at the interface between the epitaxial layer 3 and the inversion-doped region s3, and the reflected light exits through the epitaxial layer 3. Because the inversion-doped region s3 and the epitaxial layer 3 have different doping concentrations, they have different refractive indices. Therefore, the final captured reflection spectrum will show continuous interference fringes reflecting the thickness of the epitaxial layer 3. When the optical path difference between the beam reflected from the surface of the epitaxial layer 3 and the beam reflected from the interface of the inversion-doped region s3 is an integer multiple of half the wavelength, maximum and minimum values can be observed in the final reflection spectrum. The thickness of the epitaxial layer 3 can be calculated based on the extreme peak positions, optical constants, and incident angle of the interference fringes in the reflection spectrum.
[0089] like Figure 9 As shown, the resistivity measuring machine 9 can be a four-probe resistivity tester or other resistivity testers.
[0090] In one optional embodiment, the method for fabricating an epitaxial test piece specifically includes the following steps:
[0091] The semiconductor substrate is provided and inversion doping is performed in the first region to form the inversion doped region, wherein the inversion doped region is a heavily doped region compared to the semiconductor substrate;
[0092] After inversion doping in the first region, the epitaxial layer is epitaxially grown on the inversion doped region and the second region to obtain the epitaxial test wafer.
[0093] For methods on preparing epitaxial test pieces, please refer to [reference needed]. Figure 1 The specific implementation methods are not described in detail here.
[0094] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.
Claims
1. A method for fabricating an epitaxial test piece, characterized in that, include: A semiconductor substrate is provided, the semiconductor substrate containing a doped material, the semiconductor substrate being divided into a first region and a second region; Inversion doping is performed in the first region to form an inversion doped region, which is a heavily doped region compared to the semiconductor substrate; After inversion doping in the first region, an epitaxial growth is performed on the inversion doped region and the second region to form an epitaxial layer, thereby obtaining an epitaxial test wafer. The epitaxial layer contains an inversion dopant relative to the doped material, and the inversion doped region is a heavily doped region compared to the epitaxial layer. The epitaxial layer portion in the first region is used for thickness measurement, and the epitaxial layer portion in the second region is used for resistivity measurement.
2. The method for fabricating an epitaxial test piece according to claim 1, characterized in that, The first region is inversion-doped to form an inversion-doped region, including: A patterned mask layer is formed on the semiconductor substrate, the patterned mask layer exposing the first region; Using the patterned mask layer as a mask, inversion doping material is implanted into the first region to form the inversion doped region, and then the patterned mask layer is removed.
3. The method for fabricating an epitaxial test piece according to claim 2, characterized in that, The patterned mask layer is a photoresist layer.
4. The method for fabricating an epitaxial test piece according to claim 1, characterized in that, The semiconductor substrate contains N-type dopant, and the inversion doped region and the epitaxial layer contain P-type dopant; or... The semiconductor substrate is doped with P-type dopant, and the inversion doped region and the epitaxial layer contain N-type dopant.
5. The method for fabricating an epitaxial test piece according to claim 1, characterized in that, The doping concentration of the inversion doped region is at least two orders of magnitude higher than that of the epitaxial layer.
6. The method for fabricating an epitaxial test piece according to claim 1, characterized in that, The first region is adjacent to the second region.
7. An epitaxial test piece, characterized in that, include: A semiconductor substrate having a doped material in the semiconductor substrate, the semiconductor substrate being divided into a first region and a second region; An inversion doped region is formed in the first region, and the inversion doped region is a heavily doped region compared to the semiconductor substrate; An epitaxial layer obtained by a single epitaxial growth is formed on the inversion doped region and the second region. The epitaxial layer has an inversion dopant relative to the doped material, and the inversion doped region is a heavily doped region compared to the epitaxial layer. The epitaxial layer portion in the first region is used for thickness measurement, and the epitaxial layer portion in the second region is used for resistivity measurement.
8. The epitaxial test piece according to claim 7, characterized in that, The doping concentration of the inversion doped region is at least two orders of magnitude higher than that of the epitaxial layer.
9. A method for testing epitaxial growth, characterized in that, include: An epitaxial test wafer is fabricated, the epitaxial test wafer comprising a semiconductor substrate containing a dopant, the semiconductor substrate being divided into a first region and a second region, an inversion doped region being formed in the first region, the inversion doped region being a heavily doped region compared to the semiconductor substrate, and an epitaxial layer obtained by a single epitaxial growth being formed on the inversion doped region and the second region, the epitaxial layer having an inversion dopant relative to the dopant, the inversion doped region being a heavily doped region compared to the epitaxial layer; The thickness of the epitaxial layer portion on the first region was measured using a thickness gauge; The resistivity of the epitaxial layer portion on the second region was measured using a resistivity measuring machine.
10. The epitaxial growth testing method according to claim 9, characterized in that, The fabrication of the epitaxial test piece includes: The semiconductor substrate is provided and inversion doping is performed in the first region to form the inversion doped region, wherein the inversion doped region is a heavily doped region compared to the semiconductor substrate; After inversion doping in the first region, the epitaxial layer is epitaxially grown on the inversion doped region and the second region to obtain the epitaxial test wafer.