Semiconductor epitaxial layer resistivity measurement device and method

Abstract

The application belongs to the technical field of semiconductor testing and relates to a semiconductor epitaxial layer resistivity measuring device and method. The measuring device comprises a sample table for placing a sample to be measured, a pretreatment unit for stabilizing the surface charge of the sample to be measured and a measuring unit for detecting the resistivity of the sample to be measured. The pretreatment unit comprises a second electrode and a first voltage source. The second electrode is connected to the front surface of the sample to be measured. The first voltage source forms a first closed loop with the second electrode and a first electrode on the back surface of the sample to be measured. The first voltage source provides a first voltage to the second electrode. The pretreatment unit provided in the application directly stabilizes the surface charge of the sample to be measured by actively applying an electric field, greatly improves the repeatability of CV measurement, effectively suppresses the flat-band voltage drift phenomenon and thus obtains more real and accurate resistivity values of the sample to be measured.

Description

Technical Field

[0001] This application relates to the field of semiconductor testing technology, specifically to a device and method for measuring the resistivity of semiconductor epitaxial layers. Background Technology

[0002] In semiconductor manufacturing processes, epitaxial layer resistivity is a core parameter characterizing the conductivity of materials and ensuring device performance and yield. Mercury probe capacitive transducer (CV) measurement, with its advantages of not requiring Schottky junction fabrication, non-destructive testing, and high efficiency, is widely used for detecting epitaxial layer resistivity and carrier concentration distribution. This method forms a Schottky barrier between a mercury droplet and the semiconductor surface, and calculates epitaxial layer parameters through capacitance-voltage (CV) scanning.

[0003] In actual testing, surface states and adsorbed charges naturally exist on the surface of semiconductor samples. These charges can interfere with the formation and distribution of the depletion layer of the Schottky junction, causing CV curve distortion and flat band voltage drift. This directly leads to poor repeatability and low accuracy of resistivity measurement results, which is particularly prominent in the testing of high-resistivity epitaxial materials and seriously affects the reliability of process monitoring.

[0004] The industry commonly employs wet or dry surface pretreatment methods to mitigate the influence of surface charge: wet pretreatment involves HF immersion, deionized water rinsing, hydrogen peroxide oxidation, and nitrogen drying; dry pretreatment uses ozone and ultraviolet light to grow the oxide layer. These methods can only passively alleviate surface charge interference and cannot achieve stable control of the surface charge. They still suffer from defects such as uneven oxide layer, surface state fluctuations, and uneven residual charge distribution, and the problems of measurement stability and consistency remain unresolved. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a semiconductor epitaxial layer resistivity measurement device and method, which, by applying a controllable electrical excitation before formal measurement, enables the surface states and interface charges of the sample to be measured to quickly reach a stable state, thereby significantly improving the stability, repeatability and accuracy of resistivity measurement.

[0006] On the one hand, this application provides a semiconductor epitaxial layer resistivity measurement device, including a sample stage, a preprocessing unit and a measurement unit;

[0007] The sample stage is used to place the sample to be tested. The sample to be tested has a front and a back that are arranged opposite to each other. A first electrode is connected to the back of the sample to be tested, and the first electrode is grounded.

[0008] The pretreatment unit includes a second electrode and a first voltage source. The second electrode is connected to the front side of the sample to be tested, and the first voltage source is connected to the second electrode and the first electrode to form a first closed loop and provide a first voltage to the second electrode.

[0009] The measurement unit is connected to the front side of the sample to be tested and the first electrode, and is used to measure the resistivity of the sample to be tested.

[0010] In an optional embodiment, the measurement unit includes a third electrode, a second voltage source, a third voltage source, a signal processing module, and a data processing module. The third electrode is connected to the front side of the sample under test and is connected to the signal processing module. The second voltage source and the third voltage source are both connected to the signal processing module and the first electrode, forming a second closed loop and a third closed loop, respectively. The second voltage source and the third voltage source provide a second voltage and a third voltage to the third electrode, respectively. The data processing module is connected to the third closed loop to detect the resistivity of the sample under test.

[0011] In an optional embodiment, the second electrode is made of a metal or alloy material.

[0012] In an optional embodiment, the shape of the second electrode can be dot-shaped, ring-shaped, sheet-shaped, or grid-shaped.

[0013] In an optional embodiment, a first contact surface is formed between the second electrode and the sample to be tested, and a second contact surface is formed between the third electrode and the sample to be tested, wherein the area of ​​the first contact surface is greater than or equal to the area of ​​the second contact surface.

[0014] In an optional embodiment, the first voltage source is a DC voltage source, an AC voltage source, or a DC-AC voltage source.

[0015] In an optional embodiment, the first voltage provided by the first voltage source is between -10V and +10V.

[0016] In an optional embodiment, the second voltage source is a DC voltage source, and the third voltage source is an AC voltage source.

[0017] On the other hand, this application provides a method for measuring the resistivity of a semiconductor epitaxial layer, comprising the following steps:

[0018] A semiconductor epitaxial layer resistivity measuring device is provided in any one of the above embodiments, wherein the first electrode is connected to the back side of the sample to be tested, and the sample to be tested is placed on the sample stage;

[0019] The second electrode is connected to the front side of the sample to be tested, and the two ends of the first voltage source are connected to the first electrode and the second electrode respectively to form the first closed circuit;

[0020] The first voltage source is controlled to apply the first voltage to the second electrode, and after maintaining it for a first time, the connection between the second electrode and the sample to be tested is disconnected.

[0021] The measurement unit is connected to the front side of the sample to be tested and the first electrode to measure the resistivity of the sample to be tested.

[0022] In an optional embodiment, before connecting the second electrode to the front side of the sample to be tested, the sample to be tested is subjected to surface passivation treatment, which is a dry pretreatment, a wet pretreatment, or a combination of dry and wet pretreatment.

[0023] As described above, compared with the prior art, the semiconductor epitaxial layer resistivity measurement device and method provided in this application have at least the following advantages:

[0024] The semiconductor epitaxial layer resistivity measurement device provided in this application stabilizes the surface charge of the sample under test through active electric field modulation. Before measurement, a controllable electrical excitation is applied to the sample under test through a preprocessing unit to quickly stabilize the surface states and charge distribution of the sample. Then, a standard CV scan is performed and the resistivity is calculated. This invention fundamentally suppresses interference from the surface charge of the sample under test, significantly improving measurement stability, repeatability, and accuracy. The device has a simple structure, low modification cost, and strong environmental compatibility. It is particularly suitable for high-precision detection of high-resistivity epitaxial layers and can effectively improve the reliability of semiconductor process monitoring.

[0025] The semiconductor epitaxial layer resistivity measurement method of this application uses the above-mentioned semiconductor epitaxial layer resistivity measurement device to measure the resistivity of the sample to be tested, and therefore also has the above-mentioned beneficial effects. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 The diagram shown is a schematic diagram of a semiconductor epitaxial layer resistivity measuring device provided in Embodiment 1 of this application.

[0028] Figure 2 The diagram shown is a flowchart of a semiconductor epitaxial layer resistivity measurement method provided in Embodiment 2 of this application.

[0029] Figure 3 The diagram shown is a schematic diagram of the distribution of measurement points provided in Embodiment 2 of this application.

[0030] Figure 4 The data curves are shown as resistivity repeatability test data obtained using conventional dry pretreatment methods in the prior art.

[0031] Figure 5 The data curves shown are resistivity repeatability test data obtained using the semiconductor epitaxial layer resistivity measurement method provided in Embodiment 2 of this application.

[0032] In the figure: 1. Sample stage; 2. Sample to be tested; 3. First electrode; 41. Second electrode; 42. First voltage source; 43. First closed loop; 51. Third electrode; 52. Signal processing module; 53. Second voltage source; 54. Third voltage source; 55. Data processing module; 56. Second closed loop; 57. Third closed loop. Detailed Implementation

[0033] To make the technical objectives, technical solutions, and technical effects of this application clearer, the technical solutions in this application will be clearly and completely described below in conjunction with embodiments. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of embodiments of this application is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0035] In the description of this application, it should be noted that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0036] In the description of this application, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly, for example, referring to both fixed connections and detachable connections. Furthermore, the descriptions using terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples" indicate that a specific feature, structure, material, or characteristic described in connection with an implementation or example is included in at least one implementation or example of this application. In this specification, illustrative expressions of the above terms do not necessarily refer to the same implementation or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more implementations or examples.

[0037] Example 1

[0038] To address the problems of unstable resistivity measurement and poor repeatability caused by surface charge interference of the sample under test in the prior art, a semiconductor epitaxial layer resistivity measurement device is provided. By applying a controllable electrical excitation before the formal measurement, the stability, repeatability and accuracy of the resistivity measurement of the sample under test are significantly improved.

[0039] Reference Figure 1 The semiconductor epitaxial layer resistivity measurement device provided in this embodiment includes a sample stage 1, a preprocessing unit 4, and a measurement unit 5;

[0040] The sample stage 1 is used to place the sample 2 to be tested. The sample 2 to be tested has a front and a back that are set opposite to each other. The back of the sample 2 to be tested is connected to the first electrode 3, and the first electrode 3 is grounded.

[0041] The pretreatment unit 4 includes a second electrode 41 and a first voltage source 42. The second electrode 41 is connected to the front side of the sample 2 to be tested. The first voltage source 42 is connected to the second electrode 41 and the first electrode 3 to form a first closed loop 43 and to provide a first voltage to the second electrode 41.

[0042] The measurement unit 5 includes a third electrode 51, a second voltage source 53, a third voltage source 54, a signal processing module 52, and a data processing module 55. The third electrode 51 is connected to the front side of the sample 2 to be tested and is connected to the signal processing module 52. The second voltage source 53 and the third voltage source 54 are both connected to the signal processing module 52 and the first electrode 3, forming a second closed loop 56 and a third closed loop 57, respectively. The second voltage source 53 and the third voltage source 54 provide a second voltage and a third voltage to the third electrode 51, respectively. The data processing module 55 is connected to the third closed loop 57 to detect the resistivity of the sample 2 to be tested.

[0043] In practical applications, before measuring resistivity, a controllable electrical excitation is first applied to the sample 2 under test by the preprocessing unit 4 to quickly stabilize the surface states and charge distribution of the sample 2. Then, the measurement unit 5 performs a standard CV scan on the stable region of the sample 2 under test and calculates the resistivity. The controllable electrical excitation applied to the sample 2 under test by the preprocessing unit 4 can suppress surface charge interference at the source, significantly improving the stability, repeatability, and accuracy of resistivity measurement.

[0044] In this embodiment, the sample 2 to be tested is placed on the sample stage 1, and a first electrode 3 is connected to the back of the sample 2 to be tested, and the first electrode 3 is grounded. Optionally, the first electrode 3 can be directly grounded through a wire, or the sample stage 1 can be grounded, and the first electrode 3 can be indirectly grounded through contact with the sample stage 1. Grounding serves two purposes: firstly, it ensures that the first electrode 3 and the second electrode 41 maintain a 0V reference with the earth, making the first voltage applied to the surface of the sample 2 to be tested accurate, controllable, and drift-free; secondly, it allows excess charge, floating charge, and environmental static electricity on the surface of the sample 2 to be directly discharged to the ground, preventing repeated charge accumulation that could lead to CV curve distortion.

[0045] In this embodiment, the pretreatment unit 4 includes a second electrode 41 and a first voltage source 42. The second electrode 41 is connected to the front side of the sample 2 to be tested. The two ends of the first voltage source 42 are connected to the second electrode 41 and the first electrode 3, respectively, to form a first closed loop 43 consisting of "first voltage source 42 - second electrode 41 - sample 2 to be tested - first electrode 3 (ground) - first voltage source 42". The material used to prepare the second electrode 41 can be a metal, alloy, or other material with good conductivity. Preferably, the material used to prepare the second electrode 41 is mercury to ensure that the bias electric field is uniformly and stably applied to the surface of the sample 2 to be tested, and to avoid secondary interference to the sample surface state, thus ensuring the reliability of the electrical pretreatment effect. The shape of the second electrode 41 can be dot-shaped, ring-shaped, sheet-shaped, or grid-shaped. Specifically, the shape of the second electrode 41 can be flexibly selected according to the area, surface state, and equipment structure of the sample 2 to improve the compatibility and applicability of the measurement device.

[0046] In this embodiment, the first voltage source 42 in the first closed loop 43 is used to provide a controllable first voltage input to the second electrode 41. The first voltage source 42 can be one or more of a DC voltage source, an AC voltage source, or a combination of a DC and AC voltage source. The DC voltage source can provide a stable electric field to achieve directional stabilization of surface charge; the AC voltage source can dynamically relax the trapped surface charge to avoid interface damage; the DC and AC voltage source can balance stability and relaxation effects, and is suitable for complex scenarios such as high-resistivity epitaxial materials. Specifically, the type of first voltage source 42 can be designed according to actual needs to adapt to different conductivity types (N-type / P-type), different surface charge properties, and different high-resistivity epitaxial materials, so as to achieve the most stable, fastest, and non-destructive electrical pretreatment of the surface charge of the sample 2 under test, and improve the versatility and stability of measurement.

[0047] In this embodiment, the first voltage provided by the first voltage source 42 is between -10V and +10V to adapt to different conductivity types of the test sample 2, different surface charge properties, and different resistivities of the epitaxial layer. Specifically, it can be flexibly selected according to the actual measurement situation and operating conditions, and no specific limitation is made here. For example, in a conventional cleanroom environment, the first voltage applied to the N-type silicon wafer is -10±2V. Specifically, the first voltage applied to the N-type silicon wafer can be -8V, -9V, -10V, and -12V. Preferably, the first voltage applied to the N-type silicon wafer is -10V.

[0048] In this embodiment, the measurement unit 5 includes a third electrode 51, a second voltage source 53, a third voltage source 54, a signal processing module 52, and a data processing module 55. The third electrode 51 is connected to the front side of the sample 2 to be tested and is connected to the signal processing module 52. The second voltage source 53 and the third voltage source 54 are both connected to the signal processing module 52 and the first electrode 3, forming a second closed loop 56 and a third closed loop 57, respectively. The signal processing module 52 is used to perform interference-free coupling and superposition of the second voltage and the third voltage. The data processing module 55 is connected to the third closed loop 57 to detect the resistivity of the sample 2 to be tested.

[0049] In this embodiment, the second voltage source 53 and the third voltage source 54 provide a second voltage and a third voltage to the third electrode 51, respectively. The second voltage source 53 is a DC voltage source, and the second voltage provided to the third electrode 51 is a slowly varying DC signal, used to adjust the width of the depletion layer on the surface of the sample 2 under test, providing different operating states for capacitance measurement. The third voltage source 54 is an AC voltage source, and the third voltage provided to the third electrode 51 is a high-frequency, small-amplitude sine wave signal, which is superimposed on the second voltage by the signal processing module 52 to detect the capacitance data of the depletion layer under the corresponding second voltage.

[0050] In this embodiment, a first contact surface is formed between the second electrode 41 and the sample 2 to be tested, and a second contact surface is formed between the third electrode 51 and the sample 2 to be tested. The area of ​​the first contact surface is greater than or equal to the area of ​​the second contact surface, so as to ensure that the control electric field applied by the second electrode 41 can completely cover the measurement point of the third electrode 51, so that the surface charge and surface state of the sample 2 to be tested are sufficiently and uniformly stabilized, avoiding interference from local unstable areas on the measurement results, thereby further improving the stability and accuracy of resistivity measurement.

[0051] Example 2

[0052] This embodiment provides a method for measuring the resistivity of semiconductor epitaxial layers, which enables accurate measurement of the resistivity of semiconductor epitaxial layers.

[0053] Reference Figure 2 The method for measuring the resistivity of a semiconductor epitaxial layer provided in this embodiment includes the following steps:

[0054] Provide any of the semiconductor epitaxial layer resistivity measuring devices described in Embodiment 1, connect the first electrode 3 to the back side of the sample 2 to be tested, and place the sample 2 to be tested face up on the sample stage 1, with the sample stage 1 grounded.

[0055] The second electrode 41 is connected to the front side of the sample 2 to be tested, and the area where the front side of the sample 2 to be tested contacts the second electrode 41 is defined as the stable area; the two ends of the first voltage source 42 are connected to the first electrode 3 and the second electrode 41 respectively to form a first closed loop 43.

[0056] The first voltage source 42 is controlled to apply a first voltage to the second electrode 41, and after maintaining it for a first time, the connection between the second electrode 41 and the sample 2 to be tested is disconnected.

[0057] The third electrode 51 is connected to the stable region of the sample 2 to be tested, and the signal processing module 52 is connected to the third electrode 51; the two ends of the second voltage source 53 are respectively connected to the signal processing module 52 and the first electrode 3 to form a second closed loop 56; the two ends of the third voltage source 54 are respectively connected to the signal processing module 52 and the data processing module 55, and the data processing module 55 is connected to the first electrode 3 to form a third closed loop 57.

[0058] The second voltage source 53 and the third voltage source 54 are controlled to output the second voltage and the third voltage respectively. The signal processing module 52 performs interference-free coupling and superposition of the second voltage and the third voltage and transmits it to the third electrode 51.

[0059] The data processing module 55 receives the CV curve of the sample 2 under test and calculates the resistivity of the sample 2 under test.

[0060] First, the first electrode 3 is connected to the back of the sample 2 to be tested, and the sample 2 is placed face up on the sample stage 1. In this embodiment, the sample stage 1 is grounded, and the first electrode 3 is indirectly grounded through contact with the sample stage 1. In an optional embodiment, the first electrode 3 is directly grounded through a wire. Grounding serves two purposes: firstly, it ensures that the first electrode 3 and the second electrode 41 maintain a 0V reference with the earth, making the first voltage applied to the surface of the sample 2 accurate, controllable, and drift-free; secondly, it allows excess charge, floating charge, and environmental static electricity on the surface of the sample 2 to be directly discharged to the ground, preventing repeated charge accumulation that could lead to CV curve distortion.

[0061] Next, the second electrode 41 is connected to the front side of the sample 2 to be tested, and the area where the front side of the sample 2 to be tested contacts the second electrode 41 is defined as the stable area; the two ends of the first voltage source 42 are connected to the first electrode 3 and the second electrode 41 respectively, forming a first closed loop 43 consisting of "first voltage source 42-second electrode 41-sample 2 to be tested-first electrode 3 (ground)-first voltage source 42".

[0062] In this embodiment, the material used to prepare the second electrode 41 can be a metal, alloy, or other material with good conductivity. Preferably, the material used to prepare the second electrode 41 is mercury to ensure that the bias electric field is uniformly and stably applied to the surface of the sample 2 to be tested, and to avoid causing secondary interference to the surface state of the sample, thus ensuring the reliability of the electrical pretreatment effect. The shape of the second electrode 41 can be dot-shaped, ring-shaped, sheet-shaped, or grid-shaped. Specifically, the shape of the second electrode 41 can be flexibly selected according to the area, surface state, and equipment structure of the sample 2 to improve the compatibility and applicability of the measuring device.

[0063] Next, the first voltage source 42 is controlled to apply a first voltage to the second electrode 41. After maintaining this voltage for a first time, the connection between the second electrode 41 and the sample 2 under test is disconnected. The first voltage source 42 can be one or more of a DC voltage source, an AC voltage source, or a combination of a DC and AC voltage source. A DC voltage source can provide a stable electric field to achieve directional stabilization of surface charges; an AC voltage source can dynamically relax trapped charges on the surface to avoid interface damage; a DC and AC voltage source can balance stabilization and relaxation effects, making it suitable for complex scenarios such as high-resistivity epitaxial materials. Specifically, the type of first voltage source 42 can be designed according to actual needs to adapt to different conductivity types (N-type / P-type), different surface charge properties, and different high-resistivity epitaxial materials, achieving the most stable, fastest, and non-destructive electrical pretreatment of the surface charge of the sample 2 under test, thus improving the versatility and stability of the measurement.

[0064] In this embodiment, the first voltage provided by the first voltage source 42 is between -10V and +10V to adapt to different conductivity types of the test sample 2, different surface charge properties, and different resistivities of the epitaxial layer. Specifically, it can be flexibly selected according to the actual measurement situation and operating conditions, and no specific limitation is made here. For example, in a conventional cleanroom environment, the first voltage applied to the N-type silicon wafer is -10±2V. Specifically, the first voltage applied to the N-type silicon wafer can be -8V, -9V, -10V, and -12V. Preferably, the first voltage applied to the N-type silicon wafer is -10V.

[0065] In this embodiment, the first time is set to 5~30s. Specifically, the first time can be 5s, 8s, 14s, 26s, 30s, or other suitable values ​​to allow the surface states, charge distribution, and junction electrical states of the sample 2 to reach a stable state. After the surface states, charge distribution, and junction electrical states of the sample 2 reach a stable state, the preprocessing unit 4 is moved to disconnect the connection between the second electrode 41 and the sample 2, providing sufficient space for the third electrode 51 in the measurement unit 5 to access the stable region on the surface of the sample 2.

[0066] Next, the third electrode 51 is connected to the stable region of the sample 2 to be tested, and the signal processing module 52 is connected to the third electrode 51; the two ends of the second voltage source 53 are respectively connected to the signal processing module 52 and the first electrode 3 to form a second closed loop 56; the two ends of the third voltage source 54 are respectively connected to the signal processing module 52 and the data processing module 55, and the data processing module 55 is connected to the first electrode 3 to form a third closed loop 57.

[0067] In this embodiment, the third electrode 51 is connected to the stable region of the sample 2 under test because the stable region has been electrically stimulated by the preprocessing unit 4. The surface state, charge distribution and junction electrical state of the stable region have all reached a stable state, which will improve the stability and accuracy of the resistivity measurement of the sample 2 under test.

[0068] In this embodiment, a first contact surface is formed between the second electrode 41 and the sample 2 to be tested, and a second contact surface is formed between the third electrode 51 and the sample 2 to be tested. The area of ​​the first contact surface is greater than or equal to the area of ​​the second contact surface, so as to ensure that the control electric field applied by the second electrode 41 can completely cover the measurement area of ​​the third electrode 51, so that the surface charge and surface state of the sample 2 to be tested are sufficiently and uniformly stabilized, avoiding interference from local unstable areas on the measurement results, thereby further improving the stability and accuracy of resistivity measurement.

[0069] Finally, the second voltage source 53 and the third voltage source 54 are controlled to output the second voltage and the third voltage respectively. The signal processing module 52 performs interference-free coupling superposition of the second voltage and the third voltage and transmits it to the third electrode 51. The CV curve of the sample 2 under test is received by the data processing module 55 and the resistivity of the sample 2 under test is calculated.

[0070] In this embodiment, the second voltage source 53 is a DC voltage source, and the second voltage provided to the third electrode 51 is a slowly changing DC signal, which is used to adjust the width of the depletion layer on the surface of the sample 2 to provide different working states for capacitance measurement; the third voltage source 54 is an AC voltage source, and the third voltage provided to the third electrode 51 is a high-frequency, small-amplitude sine wave signal, which is superimposed on the second voltage through the signal processing module 52 to detect the capacitance data of the depletion layer under the corresponding second voltage.

[0071] In this embodiment, since the Fermi levels of the third electrode 51 and the sample 2 under test are different, a Schottky barrier is formed at the contact surface between the sample 2 under test and the third electrode 51. Charge carriers in the sample 2 under test are pushed away from the contact surface by the barrier, causing the charge carriers at the contact surface to be consumed, forming a depletion layer. The second voltage source 53 provides a second voltage to the third electrode 51 to control the width of the depletion layer, causing a change in the capacitance of the depletion layer. The third voltage source 54 provides a third voltage to the third electrode 51, and this third voltage is superimposed on the second voltage by the signal processing module 52 to detect the capacitance data of the depletion layer under the current second voltage, without affecting the stable state of the depletion layer. Finally, the data processing module 55 obtains the capacitance data of the depletion layer under different second voltages, plots CV curves, and calculates the resistivity of the sample 2 under test based on the CV curves.

[0072] In an optional embodiment, before connecting the second electrode 41 to the front side of the sample 2 to be tested, that is, before applying controllable electrical excitation to the sample 2 to be tested using the pretreatment unit 4, the sample 2 to be tested is first subjected to surface passivation treatment. The surface passivation treatment can be dry pretreatment, wet pretreatment, or a combination of dry and wet pretreatment, in order to reduce the surface state density of the sample 2 to reduce adsorbed charge and residual impurities. The surface passivation treatment and the controllable electrical excitation applied by the subsequent pretreatment unit 4 form a synergistic effect, which can further improve the surface charge stability of the sample 2 to be tested, making the resistivity measurement more accurate and more repeatable.

[0073] It should be noted that the resistivity measurement of sample 2 should employ a "multi-point measurement and averaging" method to improve the accuracy of the measurement data and avoid the randomness of single-point measurements. (Refer to...) Figure 3, in this embodiment, 67 points in a "rice" shape are selected for resistivity measurement respectively to eliminate the random error of single-point measurement, more truly characterize the resistivity level of the待测 sample 2, and improve the representativeness, consistency and credibility of the measurement results. Optionally, the positions, layouts of the selected measurement points and the number of measurement points can be flexibly set according to actual needs, and no specific restrictions are made here.

[0074] Refer to Figure 4 and Figure 5 , in this embodiment, Figure 4 shows the data curve obtained by preprocessing the待测 sample 2 using the conventional dry method in the prior art and then performing resistivity repeatability testing on the待测 sample 2; Figure 5 shows the data curve obtained by performing resistivity repeatability testing on the待测 sample 2 using the resistivity measurement device and method in this application. Obviously, Figure 4 the fluctuation differences of the resistivity data obtained from the two tests of Test1 and Test2 in Figure 5 are relatively large, while the fluctuation differences of the resistivity data obtained from the two tests of Test1 and Test2 in

[0075] are relatively small. It can be seen that after electrical excitation is applied to the待测 sample 2 using the resistivity measurement device and method provided in this application, the repeatability of resistivity measurement of the待测 sample 2 is significantly improved. The above are only some preferred embodiments of this application and are not used to limit this application. For those skilled in the art, this application can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of this application shall be included within the protection scope of this application.

Claims

1. A device for measuring the resistivity of a semiconductor epitaxial layer, characterized in that, Includes a sample stage, a pretreatment unit, and a measurement unit; The sample stage is used to place the sample to be tested. The sample to be tested has a front and a back that are arranged opposite to each other. A first electrode is connected to the back of the sample to be tested, and the first electrode is grounded. The pretreatment unit includes a second electrode and a first voltage source. The second electrode is connected to the front side of the sample to be tested, and the first voltage source is connected to the second electrode and the first electrode to form a first closed loop and provide a first voltage to the second electrode. The measurement unit is connected to the front side of the sample to be tested and the first electrode, and is used to measure the resistivity of the sample to be tested.

2. The semiconductor epitaxial layer resistivity measuring device according to claim 1, characterized in that, The measurement unit includes a third electrode, a second voltage source, a third voltage source, a signal processing module, and a data processing module. The third electrode is connected to the front side of the sample under test and is connected to the signal processing module. The second voltage source and the third voltage source are both connected to the signal processing module and the first electrode, forming a second closed loop and a third closed loop, respectively. The second voltage source and the third voltage source provide a second voltage and a third voltage to the third electrode, respectively. The data processing module is connected to the third closed loop to detect the resistivity of the sample under test.

3. The semiconductor epitaxial layer resistivity measuring device according to claim 1, characterized in that, The second electrode is made of metal or alloy material.

4. The semiconductor epitaxial layer resistivity measuring device according to claim 1, characterized in that, The shape of the second electrode can be dot-shaped, ring-shaped, sheet-shaped, or grid-shaped.

5. The semiconductor epitaxial layer resistivity measuring device according to claim 2, characterized in that, The second electrode forms a first contact surface with the sample to be tested, and the third electrode forms a second contact surface with the sample to be tested. The area of ​​the first contact surface is greater than or equal to the area of ​​the second contact surface.

6. The semiconductor epitaxial layer resistivity measuring device according to claim 1, characterized in that, The first voltage source is a DC voltage source, an AC voltage source, or a DC-AC voltage source.

7. The semiconductor epitaxial layer resistivity measuring device according to claim 1, characterized in that, The first voltage provided by the first voltage source is between -10V and +10V.

8. The semiconductor epitaxial layer resistivity measuring device according to claim 2, characterized in that, The second voltage source is a DC voltage source, and the third voltage source is an AC voltage source.

9. A method for measuring the resistivity of a semiconductor epitaxial layer, characterized in that, Includes the following steps: A semiconductor epitaxial layer resistivity measuring apparatus according to any one of claims 1-8 is provided, wherein the first electrode is connected to the back side of the sample to be tested, and the sample to be tested is placed on the sample stage; The second electrode is connected to the front side of the sample to be tested, and the two ends of the first voltage source are connected to the first electrode and the second electrode respectively to form the first closed circuit; The first voltage source is controlled to apply the first voltage to the second electrode, and after maintaining it for a first time, the connection between the second electrode and the sample to be tested is disconnected. The measurement unit is connected to the front side of the sample to be tested and the first electrode to measure the resistivity of the sample to be tested.

10. The method for measuring the resistivity of a semiconductor epitaxial layer according to claim 9, characterized in that, Before connecting the second electrode to the front side of the sample to be tested, the sample to be tested is subjected to surface passivation treatment, which is a dry pretreatment, a wet pretreatment, or a combination of dry and wet pretreatment.

Images