Methods, devices, electronic equipment, and storage media for adjusting transmission bandwidth

Abstract

This disclosure discloses a method, apparatus, electronic device, and storage medium for adjusting transmission bandwidth, relating to the field of interface technology. First, the current buffer occupancy is determined. Then, based on the current buffer occupancy, the number of currently active first transmission channels is adjusted. This enables more precise and timely dynamic adjustment of transmission bandwidth, improving the effective utilization of transmission bandwidth and providing conditions for reducing power consumption.

Description

Technical Field

[0001] This disclosure relates to the field of interface technology, and in particular to a method, apparatus, electronic device and storage medium for adjusting transmission bandwidth. Background Technology

[0002] Existing technologies typically set transmission bandwidth based on the static requirements of users or applications. However, this method cannot dynamically adjust the transmission bandwidth, which may affect the effective utilization of bandwidth and increase device power consumption. Therefore, providing a method for adjusting transmission bandwidth to improve its effective utilization and reduce device power consumption is a pressing issue that needs to be addressed. Summary of the Invention

[0003] This disclosure aims to at least partially address one of the technical problems in the related art.

[0004] The first aspect of this disclosure provides a method for adjusting transmission bandwidth, comprising:

[0005] Determine the current buffer usage;

[0006] Based on the current buffer occupancy, the number of the first transmission channels currently in active state is adjusted.

[0007] A second aspect of this disclosure provides a transmission bandwidth adjustment device, comprising:

[0008] The first determining module is used to determine the current buffer occupancy.

[0009] The adjustment module is used to adjust the number of the first transmission channels that are currently active based on the current buffer occupancy.

[0010] A third aspect of this disclosure provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements the method for adjusting transmission bandwidth as proposed in the first aspect of this disclosure.

[0011] A fourth aspect of this disclosure provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the transmission bandwidth adjustment method as proposed in the first aspect of this disclosure.

[0012] A fifth aspect of this disclosure provides a chip including a processing circuit and an interface circuit; wherein the interface circuit is used to acquire instructions and send the instructions to the processing circuit, and the processing circuit is used to execute the instructions to implement the transmission bandwidth adjustment method proposed in the first aspect of this disclosure.

[0013] A sixth aspect of this disclosure provides a computer program product including a computer program that, when executed by a processor, implements the method for adjusting transmission bandwidth as proposed in a first aspect of this disclosure.

[0014] The method, apparatus, electronic device, and storage medium for adjusting transmission bandwidth provided in this disclosure have the following beneficial effects:

[0015] In this embodiment, the current buffer occupancy is first determined, and then the number of currently active first transmission channels is adjusted based on the current buffer occupancy. Thus, by adjusting the number of currently active transmission channels based on the current buffer occupancy, more precise and timely dynamic adjustment of transmission bandwidth is achieved, improving the effective utilization of transmission bandwidth and providing conditions for reducing power consumption.

[0016] Additional aspects and advantages of this disclosure will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this disclosure. Attached Figure Description

[0017] The above and / or additional aspects and advantages of this disclosure will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, in which:

[0018] Figure 1 This is a schematic flowchart illustrating a method for adjusting transmission bandwidth according to an embodiment of the present disclosure.

[0019] Figure 2 This is a schematic diagram illustrating an application scenario of the transmission bandwidth adjustment method proposed in this disclosure;

[0020] Figure 3 A schematic flowchart illustrating a method for adjusting transmission bandwidth according to another embodiment of this disclosure;

[0021] Figure 4 A schematic flowchart illustrating a method for adjusting transmission bandwidth according to another embodiment of this disclosure;

[0022] Figure 5 A schematic flowchart illustrating a method for adjusting transmission bandwidth according to another embodiment of this disclosure;

[0023] Figure 6 This is a schematic diagram of the system logic for the transmission bandwidth adjustment method proposed in the embodiments of this disclosure;

[0024] Figure 7 A schematic diagram of the structure of a transmission bandwidth adjustment device provided in another embodiment of this disclosure;

[0025] Figure 8A block diagram of an exemplary electronic device suitable for implementing embodiments of the present disclosure is shown;

[0026] Figure 9 This is a schematic diagram of the chip structure proposed in the embodiments of this disclosure. Detailed Implementation

[0027] Embodiments of this disclosure are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this disclosure, and should not be construed as limiting this disclosure.

[0028] The following description, with reference to the accompanying drawings, outlines a method, apparatus, electronic device, and storage medium for adjusting transmission bandwidth according to embodiments of the present disclosure.

[0029] Figure 1 This is a schematic flowchart illustrating a method for adjusting transmission bandwidth provided in an embodiment of this disclosure.

[0030] It should be noted that the transmission bandwidth adjustment method of the present disclosure embodiments can be applied to a transmission bandwidth adjustment device. In some possible embodiments, the device can be configured in an electronic device or chip so that the electronic device or chip can execute the transmission bandwidth adjustment method proposed in the present disclosure embodiments.

[0031] like Figure 1 As shown, the method for adjusting the transmission bandwidth may include the following steps:

[0032] Step 101: Determine the current buffer usage.

[0033] It should be noted that the method for adjusting transmission bandwidth provided in this disclosure can be applied to scenarios where systems with processors and memory transmit data via a PCIe interface connected to network devices. For example, using... Figure 2 For example, Figure 2 This is a schematic diagram illustrating an application scenario of the transmission bandwidth adjustment method proposed in this disclosure.

[0034] Figure 2 In Chinese, CPU is short for Central Processing Unit.

[0035] AP is short for Application Processor.

[0036] PCIe stands for Peripheral Component Interconnect Express, which is a high-speed serial computer expansion bus standard.

[0037] RC stands for Root Complex; EP stands for Endpoint, which refers to a PCIe device.

[0038] DDR is short for Double Data Rate Synchronous Dynamic Random Access Memory (DDR).

[0039] SDRAM is short for Synchronous Dynamic Random-Access Memory.

[0040] WIFI is short for Wireless Fidelity; Modem is a modem.

[0041] like Figure 2 As shown, the application scenarios of the transmission bandwidth adjustment method provided in this disclosure can be scenarios where a computer system (host) transmits data with a wired network card or a wireless network card through a PCIe bandwidth transmission channel, or scenarios where a mobile phone system (application processor AP) transmits data with a wireless cellular data processor through a PCIe bandwidth transmission channel. This disclosure does not limit these scenarios.

[0042] It should be noted that the buffer can be set in the DDR on the host or application processor side, and it can be a data buffer used for PCIe transmission. This disclosure does not limit it in this regard.

[0043] In this disclosure, before adjusting the transmission bandwidth, in order to improve the effective utilization rate of the adjusted transmission bandwidth and realize the dynamic adjustment of the transmission bandwidth, the current buffer occupancy can be determined first, thereby providing conditions for determining the transmission bandwidth adjustment strategy.

[0044] Step 102: Adjust the number of active first transmission channels based on the current buffer occupancy.

[0045] The transmission channel can be a transmission channel (Lane) with PCIe bandwidth.

[0046] It should be noted that when adjusting the number of active first transmission channels based on the current buffer occupancy, the adjustment method can be to keep the number of active first transmission channels unchanged, or to increase the number of active first transmission channels, or to decrease the number of active first transmission channels. This disclosure does not limit this method.

[0047] In this disclosure, after determining the current buffer occupancy, the number of active first transmission channels can be adjusted based on the current buffer occupancy, thereby achieving dynamic adjustment of transmission bandwidth and improving the accuracy of transmission bandwidth adjustment.

[0048] In this embodiment, the current buffer occupancy is first determined, and then the number of currently active first transmission channels is adjusted based on the current buffer occupancy. Thus, by adjusting the number of currently active transmission channels based on the current buffer occupancy, precise and timely dynamic adjustment of transmission bandwidth is achieved, improving the effective utilization of transmission bandwidth and providing conditions for reducing power consumption.

[0049] Figure 3 This is a schematic flowchart illustrating a method for adjusting transmission bandwidth provided in an embodiment of this disclosure.

[0050] like Figure 3 As shown, the method for adjusting the transmission bandwidth may include the following steps:

[0051] Step 301: Determine the current buffer occupancy.

[0052] The specific implementation of step 301 can be found in the detailed description of other embodiments of this disclosure, and will not be repeated here.

[0053] Step 302: Determine the bandwidth adjustment strategy based on the relationship between the current buffer occupancy and the first interval, where the first interval is the buffer range corresponding to the number of the first transmission channels.

[0054] The first interval refers to the range of buffer occupancy corresponding to the number of first transmission channels. For example, when the total buffer capacity is 100MB, and the range of buffer occupancy corresponding to the number of first transmission channels is 25MB to 50MB, the first interval can be a range of buffer occupancy from 25MB to 50MB. This disclosure does not limit this range.

[0055] The bandwidth adjustment strategy can be a strategy for adjusting the number of currently active transmission channels. For example, it can keep the number unchanged, increase the number, or decrease the number; this disclosure does not limit this.

[0056] It should be noted that the relationship between the current buffer occupancy and the first interval can be that the buffer occupancy belongs to the first interval, or that the buffer occupancy is greater than or equal to the maximum value in the first interval, or that the buffer occupancy is less than or equal to the minimum value in the first interval. This disclosure does not limit this.

[0057] In this disclosure, the correspondence between buffer occupancy and the number of transmission channels that need to be activated can be determined through simulation. For example, if the PCIe bandwidth includes 16 transmission channels, and the total capacity of the buffer is 100 megabytes (MB) with an occupancy of 50MB, simulation can determine that when the buffer occupancy is 50MB, 8 transmission channels in the PCIe bandwidth need to be activated, etc. This disclosure does not limit this.

[0058] Optionally, when setting the intervals of the buffer, this disclosure can determine each interval of the system and the endpoint value of each interval based on a preset interval setting method.

[0059] The interval setting method can be determined according to actual needs. It can be a uniform setting or a non-uniform setting. For example, when the total buffer capacity is 100MB, a waterline can be set at 25MB, 50MB, 75MB, and 100MB. Then, a corresponding interval can be set for the buffer occupancy ranges of less than or equal to 25MB, 25MB to 50MB, 50MB to 75MB, and 75MB to 100MB. Each interval has the same length. Alternatively, the range can be divided non-uniformly according to the buffer occupancy, so the interval length of each range may be different. This disclosure does not limit this.

[0060] Optionally, when setting the buffer intervals, this disclosure can first determine the number of intervals corresponding to the system based on the total number of transmission channels contained in the system (which can be the same as the number of transmission channels). Since the correspondence between the buffer occupancy and the number of transmission channels in the PCIe bandwidth can be determined through simulation, the endpoint values ​​corresponding to each interval, i.e., the maximum buffer occupancy and the minimum buffer occupancy, can be determined based on the number of intervals corresponding to the system and the correspondence, thereby improving the precision of the interval setting.

[0061] It should be noted that, when setting the intervals of the buffer in this disclosure, the selection can also be set according to the total capacity of the buffer. For example, the larger the total capacity of the buffer, the more intervals may need to be set, thereby ensuring the fineness of the intervals and improving the accuracy of the transmission bandwidth adjustment. This disclosure does not limit this.

[0062] Optionally, when determining the total capacity of the buffer, this disclosure may determine the total capacity of the buffer based on at least one of the total transmission bandwidth of the system and the application type currently in operation.

[0063] The application type can be any type. For example, the application type can be video, or it can be social, etc. This disclosure does not limit it.

[0064] It should be noted that different types of applications currently in operation may require different transmission bandwidths. For example, video applications require more transmission bandwidth, while social applications require less, and so on. This disclosure does not impose any limitations on this.

[0065] In this disclosure, after determining the current buffer occupancy, in order to enable the transmission bandwidth to be dynamically adjusted according to the current data transmission traffic demand, a bandwidth adjustment strategy can be determined based on the relationship between the current buffer occupancy and the first interval.

[0066] Step 303: Adjust the number of the first transmission channels based on the bandwidth adjustment strategy.

[0067] In this disclosure, after determining the bandwidth adjustment strategy, the number of the first transmission channels can be adjusted based on the bandwidth adjustment strategy, thereby realizing the automatic dynamic adjustment of the transmission bandwidth, improving the effective utilization rate of the transmission bandwidth, and reducing the computing power requirements of the processor.

[0068] In this embodiment, the current buffer occupancy is first determined. Then, based on the relationship between the current buffer occupancy and a first interval, a bandwidth adjustment strategy is determined. Finally, based on the bandwidth adjustment strategy, the number of first transmission channels is adjusted. Thus, by adjusting the number of active transmission channels through the relationship between the current buffer occupancy and the buffer range corresponding to the number of currently active transmission channels, more accurate and timely adjustment of transmission bandwidth is achieved, improving the reliability of transmission bandwidth adjustment.

[0069] Figure 4 This is a schematic flowchart illustrating a method for adjusting transmission bandwidth according to another embodiment of the present disclosure.

[0070] like Figure 4 As shown, the method for adjusting the transmission bandwidth may include the following steps:

[0071] Step 401: Determine the current buffer usage.

[0072] Step 402: Determine the bandwidth adjustment strategy based on the relationship between the current buffer occupancy and the first interval, where the first interval is the buffer range corresponding to the number of the first transmission channels.

[0073] Optionally, if the buffer occupancy is within the first range, it can be determined that the number of currently active transmission channels can meet the data transmission traffic demand. In this case, the bandwidth adjustment strategy can be determined to keep the number of currently active transmission channels unchanged.

[0074] Optionally, if the buffer occupancy is greater than or equal to the maximum value in the first interval, it can be determined that the current buffer occupancy has exceeded the buffer occupancy range corresponding to the first interval. In order to ensure the stability and reliability of data transmission, the bandwidth adjustment strategy can be determined to increase the number of active transmission channels.

[0075] Optionally, if the buffer occupancy is less than or equal to the minimum value in the first interval, it can be determined that the current buffer occupancy is reduced. In order to improve the effective utilization of transmission bandwidth and avoid resource waste, the bandwidth adjustment strategy can be determined to reduce the number of transmission channels in the active state.

[0076] The specific implementation of steps 401 to 402 can be found in the detailed description of other embodiments of this disclosure, and will not be repeated here.

[0077] Step 403: When the bandwidth adjustment strategy is to increase or decrease the active transmission channels, determine the second interval to which the buffer occupancy belongs.

[0078] In this disclosure, after determining the bandwidth adjustment strategy, if the bandwidth adjustment strategy is to increase or decrease the number of active transmission channels, in order to improve the determination of the number of transmission channels to be increased or decreased, the second interval to which the current buffer occupancy belongs can be determined first.

[0079] Step 404: Determine the difference between the number of second transmission channels associated with the second interval and the number of first transmission channels as the number of transmission channels to be added or reduced.

[0080] In this disclosure, when the bandwidth adjustment strategy is to increase the number of active transmission channels, the number of second transmission channels associated with the second interval is greater than the number of first transmission channels. In this case, the difference between the second transmission channels and the first transmission channels can be determined as the number of transmission channels to be added.

[0081] For example, if the current buffer occupancy is 45MB, the maximum value in the first interval is 25MB, the number of first transmission channels is 4, the second interval is 25MB to 50MB, the associated second transmission channels are 8, the number of transmission channels currently active is 4, and the total transmission bandwidth is 16 transmission channels, since the current buffer occupancy of 50MB is greater than 25MB but less than 50MB, it belongs to the second interval, and the number of second transmission channels associated with the second interval is 8, in order to ensure the stability of data transmission, it can be determined that the number of transmission channels to be added is 4. This disclosure does not limit this.

[0082] In this disclosure, when the bandwidth adjustment strategy is to reduce the number of active transmission channels, the number of second transmission channels associated with the second interval is less than the number of first transmission channels. In this case, the difference between the first and second transmission channels can be determined as the number of transmission channels to be reduced.

[0083] For example, if the current buffer occupancy is 20MB, the minimum value in the first interval is 25MB, the number of first transmission channels is 8, the second interval is from 0MB to 25MB, the associated second transmission channels are 4, the number of transmission channels currently active is 8, and the total transmission bandwidth is 16 transmission channels, since the current buffer occupancy of 20MB is less than 25MB, it belongs to the second interval, and the second interval is associated with 4 second transmission channels. In order to reduce the waste of transmission bandwidth, it can be determined that the number of transmission channels to be reduced is 4. This disclosure does not limit this.

[0084] Step 405: Adjust the number of the first transmission channels based on the current number of transmission channels to be increased or decreased.

[0085] In this disclosure, after determining the number of transmission channels to be increased or decreased, the number of the first transmission channels can be adjusted based on the number of transmission channels to be increased or decreased, thereby achieving more precise dynamic real-time adjustment of the number of active transmission channels and more effectively reducing the power consumption of PCIe devices.

[0086] In this embodiment, the current buffer occupancy is first determined. Then, based on the relationship between the current buffer occupancy and a first interval, a bandwidth adjustment strategy is determined. If the bandwidth adjustment strategy is to increase or decrease the number of active transmission channels, the second interval to which the buffer occupancy belongs is determined. The difference between the number of second transmission channels associated with the second interval and the number of first transmission channels is then determined as the number of transmission channels to be increased or decreased. Finally, the number of first transmission channels is adjusted based on the number of transmission channels to be increased or decreased. Thus, by determining the bandwidth adjustment strategy based on the relationship between the current buffer occupancy and the buffer range corresponding to the number of currently active transmission channels, and by determining the number of transmission channels to be increased or decreased based on the difference between the number of transmission channels associated with the interval to which the buffer capacity currently belongs and the number of transmission channels associated with the interval corresponding to the number of currently active transmission channels, the number of active transmission channels is adjusted, thereby achieving dynamic adjustment of the transmission bandwidth and improving the accuracy of the transmission bandwidth adjustment.

[0087] Figure 5 This is a schematic flowchart illustrating a method for adjusting transmission bandwidth according to another embodiment of the present disclosure.

[0088] like Figure 5 As shown, the method for adjusting the transmission bandwidth may include the following steps:

[0089] Step 501: Upon receiving a buffer update request, determine the type of the update request and the first buffer capacity included in the update request, wherein the type of the update request is any of the following: an occupation request or a release request.

[0090] It should be noted that when the update request type is an occupy request, the first buffer capacity can be the buffer capacity that needs to be occupied; when the update request type is a release request, the first buffer capacity can be the buffer capacity that needs to be released.

[0091] Among them, an occupy request can be a request to occupy buffer capacity, and a release request can be a request to release the occupied buffer capacity.

[0092] In some embodiments, upon receiving a buffer update request, the buffer can be updated via a memory block descriptor.

[0093] The memory block descriptor can be used to map memory blocks in the buffer. It can include parameters such as memory block address, page table, size, etc., so that the memory blocks in the buffer can be managed through the address and page table in the memory block descriptor. This disclosure does not limit this.

[0094] In this disclosure, when the type of update request is an occupancy request, the update request can be received through the memory allocation interface, and the capacity of the first buffer included in the update request can be obtained. The memory block to be allocated in the buffer can be determined through the memory block descriptor. This disclosure does not limit this.

[0095] In this disclosure, when the update request type is release type, the update request can be received through the memory release interface, and the first buffer capacity in the update request can be obtained. The memory block to be released in the buffer can be determined through the memory block descriptor. This disclosure does not limit this.

[0096] For example, if users 1, 2, and 3 request or release buffer capacity, when the update request is a request to occupy, the update request may include user 1 requesting a first buffer capacity of 5MB and the corresponding memory block descriptor, which contains information such as the address of the memory block to be occupied; user 2 requesting a first buffer capacity of 15MB and the corresponding memory block descriptor; and user 3 requesting a first buffer capacity of 20MB and the corresponding memory block descriptor. When the update request is a request to release, the update request may include user 1 requesting a first buffer capacity of 5MB to be released and the corresponding memory block descriptor, which contains information such as the address of the memory block to be released; user 2 requesting a first buffer capacity of 10MB to be released and the corresponding memory block descriptor; and user 3 requesting a first buffer capacity of 10MB to be released and the corresponding memory block descriptor.

[0097] Step 502: Determine the currently occupied capacity of the second buffer.

[0098] In this disclosure, after determining the type of update request and the first buffer capacity included in the update request, the second buffer capacity currently occupied in the buffer can be determined, thereby providing a data basis for buffer updates.

[0099] Step 503: Determine the current buffer occupancy based on the type of update request, the capacity of the first buffer, and the capacity of the second buffer.

[0100] In this disclosure, after determining the currently occupied second buffer capacity, the current buffer occupancy can be determined based on the type of update request and the first buffer capacity, thereby adjusting the transmission bandwidth based on the current buffer occupancy.

[0101] Optionally, if the update request is of the type of occupancy request, the sum of the first buffer capacity and the second buffer capacity can be used to determine the current buffer occupancy.

[0102] Taking the above example, assuming the currently occupied second buffer capacity is 0MB, when the update request type is an occupation request, user 1 requests 5MB of the first buffer capacity, user 2 requests 15MB of the first buffer capacity, and user 3 requests 20MB of the first buffer capacity. After the memory allocation management module allocates the corresponding memory blocks to the corresponding users based on the memory block addresses and other information in the memory block descriptors corresponding to user 1, user 2, and user 3, since the currently occupied second buffer capacity is 0MB, the current buffer occupancy is the sum of the first buffer capacities corresponding to user 1, user 2, and user 3, which is 40MB. This disclosure does not limit this.

[0103] Optionally, if the update request is of the type of release request, the difference between the second buffer capacity and the first buffer capacity can be determined as the current buffer occupancy.

[0104] Taking the above example, assuming the currently occupied second buffer capacity is 40MB, and the update request type is a release request, user 1 requests to release 5MB of the first buffer capacity, user 2 requests to release 10MB of the first buffer capacity, and user 3 requests to release 10MB of the first buffer capacity. After the memory return management module releases and returns the corresponding memory blocks to the buffer based on the addresses of the memory blocks requested for release in the memory block descriptors corresponding to user 1, user 2, and user 3, the current buffer occupancy is the second buffer capacity corresponding to the buffer, 40MB. The difference between this and the sum of the first buffer capacities corresponding to user 1, user 2, and user 3 is 15MB. This disclosure does not limit this.

[0105] Step 504: Adjust the number of active first transmission channels based on the current buffer occupancy.

[0106] The specific implementation of step 504 can be found in the detailed description of other embodiments of this disclosure, and will not be repeated here.

[0107] In this embodiment, upon receiving a buffer update request, the type of the update request and the first buffer capacity included in the update request are first determined, and the currently occupied second buffer capacity is also determined. Then, based on the type of the update request, the first buffer capacity, and the second buffer capacity, the current buffer occupancy is determined. Finally, based on the current buffer occupancy, the number of currently active first transmission channels is adjusted. Therefore, upon receiving a buffer update request, the current buffer occupancy is determined based on the type of the update request, the buffer capacity included in the update request, and the currently occupied buffer capacity. The number of currently active transmission channels is then adjusted based on the current occupancy, thereby improving the reliability and accuracy of transmission bandwidth adjustment.

[0108] The following is combined with Figure 6 The present disclosure provides an example of the method for adjusting the transmission bandwidth. Figure 6 This is a system logic diagram of the transmission bandwidth adjustment method proposed in the embodiments of this disclosure.

[0109] like Figure 6 As shown, the system logic of the transmission bandwidth adjustment method proposed in this disclosure includes five modules: a memory allocation FIFO management module, a memory return FIFO management module, a buffer and management module, a buffer interval calculation and management module, and a PCIe bandwidth configuration module. Here, FIFO is short for First Input First Output.

[0110] The memory allocation FIFO management module can include an interface for users to allocate memory, and a FIFO queue composed of memory block descriptors (containing parameters such as the address, page table, and size of the memory block). It can replenish memory block descriptors and obtain corresponding memory blocks from the buffer by monitoring the usage of the user's allocated memory descriptor FIFO (such as by comparing and calculating read and write pointers).

[0111] The memory return FIFO management module can include an interface for users to release and return memory, and a memory descriptor FIFO queue. It can return the corresponding memory block to the buffer by monitoring the user's return of memory block descriptors.

[0112] The buffer and management module can obtain memory blocks of different sizes from the buffer. It can manage memory blocks through page tables and indexes, and provide interfaces for allocating and returning memory.

[0113] The buffer zone calculation and management module can dynamically analyze and calculate the usage of the PCIe buffer, set the corresponding zone according to the relationship between the number of transmission channels and the range of buffer occupancy, update the zone to which the current buffer occupancy belongs, and trigger an interrupt or notify the PCIe bandwidth configuration module according to the different zones set.

[0114] The PCIe bandwidth configuration module can receive notifications from the buffer zone calculation and management module, triggering the bandwidth adjustment process of the PCIe controller to make the PCIe work within the specified bandwidth (number of active transmission channels).

[0115] In this disclosure, by establishing a buffer and management module, users can request memory blocks from the buffer through a unified memory request FIFO management module. After use, the memory blocks are released back to the buffer by returning them to the FIFO management module, thus achieving dynamic memory management and flow. Furthermore, different intervals are set through the buffer interval calculation and management module, and interval endpoint interrupts or notifications are triggered to the PCIe bandwidth configuration module to execute bandwidth configuration and apply it to the PCIe hardware, thereby achieving dynamic adjustment of transmission bandwidth and saving PCIe hardware power consumption.

[0116] It should be noted that PCIe bandwidth configuration can be performed by triggering an interrupt service routine through the interval endpoint in software, or the relevant processing flow can be implemented through chip hardware. This disclosure does not limit this approach.

[0117] It should be noted that the unified memory request and memory return interfaces in the transmission bandwidth adjustment method provided in this disclosure can support applications and users to dynamically increase or decrease memory without modifying code or hardware, thereby improving the efficiency of transmission bandwidth adjustment.

[0118] To achieve the above embodiments, this disclosure also proposes a transmission bandwidth adjustment device.

[0119] Figure 7 This is a schematic diagram of the transmission bandwidth adjustment device provided in another embodiment of the present disclosure.

[0120] like Figure 7 As shown, the transmission bandwidth adjustment device 700 may include: a first determining module 701 and an adjustment module 702.

[0121] The first determining module 701 is used to determine the current buffer occupancy.

[0122] The adjustment module 702 is used to adjust the number of first transmission channels currently in active state according to the current buffer occupancy.

[0123] Optionally, the aforementioned adjustment module 702 is specifically used for:

[0124] Based on the relationship between the current buffer occupancy and the first interval, a bandwidth adjustment strategy is determined, wherein the first interval is the buffer range corresponding to the number of the first transmission channels;

[0125] Based on the bandwidth adjustment strategy, the number of the first transmission channels is adjusted.

[0126] Optionally, the adjustment module 702 described above is also used for any of the following:

[0127] If the buffer occupancy falls within the first range, the bandwidth adjustment strategy is determined to keep the number of currently active transmission channels unchanged.

[0128] If the buffer occupancy is greater than or equal to the maximum value in the first interval, the bandwidth adjustment strategy is determined to be to increase the active transmission channels.

[0129] If the buffer occupancy is less than or equal to the minimum value in the first interval, the bandwidth adjustment strategy is determined to reduce the number of active transmission channels.

[0130] Optionally, the adjustment module 702 described above is also used for:

[0131] When the bandwidth adjustment strategy is to increase or decrease the active transmission channels, determine the second interval to which the buffer occupancy belongs;

[0132] The difference between the number of second transmission channels associated with the second interval and the number of first transmission channels is determined as the number of transmission channels to be added or reduced.

[0133] The number of the first transmission channels is adjusted based on the current number of transmission channels to be increased or decreased.

[0134] Optionally, the first determining module 701 described above is specifically used for:

[0135] Upon receiving a buffer update request, determine the type of the update request and the first buffer capacity included in the update request, wherein the type of the update request is any one of the following: an occupation request, or a release request;

[0136] Determine the currently occupied capacity of the second buffer;

[0137] The current buffer occupancy is determined based on the type of the update request, the capacity of the first buffer, and the capacity of the second buffer.

[0138] Optionally, the first determining module 701 described above is further used for any of the following:

[0139] If the type of the update request is a occupancy request, the sum of the first buffer capacity and the second buffer capacity is determined as the current buffer occupancy.

[0140] When the update request is of the type of release request, the difference between the second buffer capacity and the first buffer capacity is determined as the current buffer occupancy.

[0141] Optionally, it also includes:

[0142] The second determining module (not shown in the figure) is used to determine the total capacity of the buffer based on at least one of the total transmission bandwidth of the system and the application type currently in operation.

[0143] Optionally, it also includes:

[0144] The third determining module (not shown in the figure) is used to determine each interval of the system and the endpoint value of each interval based on the preset interval setting method.

[0145] Optionally, it also includes:

[0146] The fourth determining module (not shown in the figure) is used to determine the number of intervals corresponding to the system based on the total number of transmission channels contained in the system.

[0147] The fifth determining module (not shown in the figure) is used to determine the endpoint value corresponding to each interval based on the number of intervals in the system.

[0148] The functions and specific implementation principles of the modules described in this embodiment can be found in the above method embodiments, and will not be repeated here.

[0149] The transmission bandwidth adjustment apparatus of this disclosure first determines the current buffer occupancy, and then adjusts the number of currently active first transmission channels based on the current buffer occupancy. Thus, by adjusting the number of currently active transmission channels based on the current buffer occupancy, precise and timely dynamic adjustment of the transmission bandwidth is achieved, improving the effective utilization rate of the transmission bandwidth and providing conditions for reducing power consumption.

[0150] Figure 8 A block diagram of an exemplary electronic device suitable for implementing embodiments of the present disclosure is shown. Figure 8 The electronic device 800 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.

[0151] like Figure 8As shown, the electronic device 800 is presented in the form of a general-purpose computing device. The components of the electronic device 800 may include, but are not limited to: one or more processors or processing units 816, system memory 828, and bus 818 connecting different system components (including system memory 828 and processing unit 816).

[0152] Bus 818 represents one or more of several bus architectures, including memory buses or memory controllers, peripheral buses, graphics acceleration ports, processors, or local buses using any of the various bus architectures. Examples of these architectures include, but are not limited to, Industry Standard Architecture (ISA) buses, Micro Channel Architecture (MCA) buses, Enhanced ISA buses, Video Electronics Standards Association (VESA) local buses, and Peripheral Component Interconnect (PCI) buses.

[0153] Electronic device 800 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by electronic device 800, including volatile and non-volatile media, removable and non-removable media.

[0154] Memory 828 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 830 and / or cache memory 832. Electronic device 800 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 834 may be used to read and write non-removable, non-volatile magnetic media (…). Figure 8 Not shown; usually referred to as a "hard drive"). Although Figure 8Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk") and an optical disc drive for reading and writing to a removable non-volatile optical disc (e.g., a compact disc read-only memory (CD-ROM), a digital video disc read-only memory (DVD-ROM), or other optical media) may be provided. In these cases, each drive may be connected to bus 818 via one or more data media interfaces. Memory 828 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of this disclosure.

[0155] A program / utility 840 having a set (at least one) of program modules 842 may be stored, for example, in memory 828. Such program modules 842 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. Program modules 842 typically perform the functions and / or methods described in the embodiments of this disclosure.

[0156] Electronic device 800 can also communicate with one or more external devices 814 (e.g., keyboard, pointing device, display 824, etc.), and with one or more devices that enable a user to interact with electronic device 800, and / or with any device that enables electronic device 800 to communicate with one or more other computing devices (e.g., network card, modem, etc.). This communication can be performed via input / output (I / O) interface 822. Furthermore, electronic device 800 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 820. As shown, network adapter 820 communicates with other modules of electronic device 800 via bus 818. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 800, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0157] The processing unit 816 executes various functional applications and data processing by running programs stored in the system memory 828, such as implementing the methods mentioned in the foregoing embodiments.

[0158] To implement the above embodiments, this disclosure also proposes a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the transmission bandwidth adjustment method proposed in the above embodiments of this disclosure.

[0159] To implement the above embodiments, this disclosure also proposes a computer program product, including a computer program that, when executed by a processor, implements the transmission bandwidth adjustment method proposed in the above embodiments of this disclosure.

[0160] Figure 9 This is a schematic diagram of the chip structure proposed in an embodiment of this disclosure. See also... Figure 9 The diagram shown is a schematic representation of the structure of chip 900, but it is not limited to this.

[0161] Chip 900 includes processing circuitry 901, which is configured to perform any of the above methods.

[0162] In some embodiments, the chip 900 further includes one or more interface circuits 902. Optionally, the interface circuit 902 is connected to the memory 903, and the interface circuit 902 can be used to receive signals from the memory 903 or other devices, and the interface circuit 902 can be used to send signals to the memory 903 or other devices. For example, the interface circuit 902 can read instructions stored in the memory 903 and send the instructions to the processing circuit 901.

[0163] In some embodiments, the interface circuit 902 performs at least one of the communication steps such as sending and / or receiving in the above method, and the processing circuit 901 performs other steps.

[0164] In some embodiments, the terms interface circuit, interface, transceiver pin, transceiver, etc., can be used interchangeably.

[0165] In some embodiments, chip 900 further includes one or more memories 903 for storing instructions. Optionally, all or part of the memories 903 may be located outside of chip 900.

[0166] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0167] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0168] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of preferred embodiments of this disclosure includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of this disclosure pertain.

[0169] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0170] It should be understood that various parts of this disclosure can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0171] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0172] Furthermore, the functional units in the various embodiments of this disclosure can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0173] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of the present disclosure have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.

Claims

1. A method for adjusting transmission bandwidth, characterized in that, include: Upon receiving a buffer update request, the type of the update request, the first buffer capacity included in the update request, and the currently occupied second buffer capacity are determined. Based on the type of the update request, the first buffer capacity, and the second buffer capacity, the current buffer occupancy is determined. The type of the update request is any one of the following: an occupation request or a release request. A bandwidth adjustment strategy is determined based on the relationship between the current buffer occupancy and the first interval; if the bandwidth adjustment strategy is to increase or decrease the active transmission channels, the second interval to which the buffer occupancy belongs is determined; the difference between the number of second transmission channels associated with the second interval and the number of first transmission channels is determined as the number of transmission channels to be increased or decreased; based on the number of transmission channels to be increased or decreased, the number of first transmission channels currently in the active state is adjusted; wherein, the first interval is the buffer range corresponding to the number of first transmission channels.

2. The method as described in claim 1, characterized in that, The method for determining the bandwidth adjustment strategy includes any of the following: If the buffer occupancy falls within the first range, the bandwidth adjustment strategy is determined to keep the number of currently active transmission channels unchanged. If the buffer occupancy is greater than or equal to the maximum value in the first interval, the bandwidth adjustment strategy is determined to be to increase the active transmission channels. If the buffer occupancy is less than or equal to the minimum value in the first interval, the bandwidth adjustment strategy is determined to reduce the number of active transmission channels.

3. The method as described in claim 1, characterized in that, Determining the current buffer occupancy based on the type of the update request, the capacity of the first buffer, and the capacity of the second buffer includes any one of the following: If the type of the update request is a occupancy request, the sum of the first buffer capacity and the second buffer capacity is determined as the current buffer occupancy. When the update request is of the type of release request, the difference between the second buffer capacity and the first buffer capacity is determined as the current buffer occupancy.

4. The method according to any one of claims 1-3, characterized in that, The method further includes: The total capacity of the buffer is determined based on at least one of the system's total transmission bandwidth and the application type currently in operation.

5. The method as described in claim 4, characterized in that, The method further includes: Based on a preset interval setting method, the system determines each interval and the endpoint value corresponding to each interval.

6. The method as described in claim 4, characterized in that, The method further includes: The number of intervals corresponding to the system is determined based on the total number of transmission channels contained in the system. Based on the number of intervals corresponding to the system, determine the endpoint value corresponding to each interval.

7. A transmission bandwidth adjustment device, characterized in that, The device includes: The first determining module is configured to, upon receiving a buffer update request, determine the type of the update request, the first buffer capacity included in the update request, and the currently occupied second buffer capacity, and determine the current buffer occupancy based on the type of the update request, the first buffer capacity, and the second buffer capacity; wherein the type of the update request is any one of the following: an occupation request or a release request; An adjustment module is used to determine a bandwidth adjustment strategy based on the relationship between the current buffer occupancy and a first interval; when the bandwidth adjustment strategy is to increase or decrease the active transmission channels, it determines the second interval to which the buffer occupancy belongs; it determines the difference between the number of second transmission channels associated with the second interval and the number of first transmission channels as the number of transmission channels to be increased or decreased; and it adjusts the number of first transmission channels currently in the active state based on the number of transmission channels to be increased or decreased; wherein, the first interval is the buffer range corresponding to the number of first transmission channels.

8. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements the method for adjusting the transmission bandwidth as described in any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, implement the method for adjusting transmission bandwidth as described in any one of claims 1-6.

10. A chip, characterized in that, The chip includes a processing circuit and an interface circuit; wherein the interface circuit is used to acquire instructions and send the instructions to the processing circuit, and the processing circuit is used to execute the instructions to implement the transmission bandwidth adjustment method as described in any one of claims 1-6.

11. A computer program product comprising a computer program that, when executed by a processor, implements the method for adjusting transmission bandwidth according to any one of claims 1-6.

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