Micro light-emitting device display panel

Abstract

The invention discloses a micro light-emitting device display panel, which comprises a driving substrate, a plurality of pixels and a second common electrode layer, the plurality of pixels are arranged on the driving substrate at intervals, and each pixel comprises three sub-pixels with different light-emitting colors, each sub-pixel comprises a first common electrode layer, a first epitaxial layer, a first conductive layer, a second epitaxial layer, a second conductive layer, a third epitaxial layer and a third conductive layer which are stacked, and the first conductive layer, the second conductive layer and the third conductive layer are electrically connected with the driving substrate; the second common electrode layer is arranged on the side, away from the driving substrate, of the third conductive layer and comprises a first electrode wire, a second electrode wire and a third electrode wire, the first electrode wire is electrically connected with the first common electrode layer through a first via hole, and the second electrode wire is electrically connected with the second epitaxial layer through a second via hole; the third electrode wire third via hole is electrically connected with the third epitaxial layer, and at least two of the first electrode wire, the second electrode wire and the third electrode wire are electrically connected.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a micro-luminescent device display panel. Background Art

[0002] The micro-luminescent device display panel is a display panel that uses Si-uLED (silicon-based micro-light emitting diode) display technology. The micro-luminescent device display panel has the advantages of high brightness and high contrast. In order to achieve vertical full-color display of the micro-luminescent device display panel, the traditional micro-luminescent device display panel stacks red light emitting devices, green light emitting devices, and blue light emitting devices in the vertical direction of each sub-pixel, so that each different color of light can be irradiated to the outside world from different film layers. However, the micro-luminescent device display panel of this solution has a large resistance, which causes the micro-luminescent device display panel to heat up a lot, causing the micro-luminescent device display panel to work abnormally. Summary of the invention

[0003] The embodiments of the present application provide a micro-light emitting device display panel to improve the problem that the micro-light emitting device display panel generates high heat, causing abnormal operation of the micro-light emitting device display panel.

[0004] An embodiment of the present application provides a micro-light emitting device display panel, comprising:

[0005] Driver substrate;

[0006] A plurality of pixels, wherein the plurality of pixels are arranged at intervals on the driving substrate, each of the pixels comprises three sub-pixels with different luminous colors, each of the sub-pixels comprises a first common electrode layer, a first epitaxial layer, a first conductive layer, a second epitaxial layer, a second conductive layer, a third epitaxial layer and a third conductive layer which are stacked, and the first conductive layer, the second conductive layer and the third conductive layer are electrically connected to the driving substrate;

[0007] A second common electrode layer, the second common electrode layer is arranged on a side of the third conductive layer away from the driving substrate, the second common electrode layer includes a first electrode line, a second electrode line and a third electrode line, the first electrode line is electrically connected to the first common electrode layer through a first via hole, the second electrode line is electrically connected to the second epitaxial layer through a second via hole, the third electrode line is electrically connected to the third epitaxial layer through a third via hole, and at least two of the first electrode line, the second electrode line and the third electrode line are electrically connected.

[0008] Furthermore, the second common electrode layer further includes a fourth electrode line, wherein the first electrode line and the third electrode line extend along the column direction of the micro-light-emitting device display panel, the second electrode line and the fourth electrode line extend along the row direction of the micro-light-emitting device display panel, the first electrode line and the third electrode line are respectively located between two columns of pixels at different positions, and the second electrode line and the fourth electrode line are respectively located between two rows of pixels at different positions;

[0009] In a top view of the micro light emitting device display panel, the first electrode line intersects with the second electrode line and the fourth electrode line, and the third electrode line intersects with the second electrode line and the fourth electrode line.

[0010] Furthermore, the first electrode line is located between two adjacent third electrode lines, and the second electrode line is located between two adjacent fourth electrode lines.

[0011] Furthermore, the number of columns of the pixels between the adjacent first electrode lines and the third electrode lines is the same, and the number of rows of the pixels between the adjacent second electrode lines and the fourth electrode lines is the same.

[0012] Furthermore, the number of the pixels between the adjacent first electrode line and the third electrode line is 2 columns, and the number of the pixels between the adjacent second electrode line and the fourth electrode line is 2 rows.

[0013] Furthermore, the second epitaxial layers of the two rows of pixels located on both sides of the second electrode line are electrically connected through a first connecting portion, and the second electrode line is electrically connected to the first connecting portion through a second via hole, and the third epitaxial layers of the two columns of pixels located on both sides of the third electrode line are electrically connected through a second connecting portion, and the third electrode line is electrically connected to the second connecting portion through a third via hole, wherein the first connecting portion is located between the second epitaxial layers of the sub-pixels of the two rows of pixels, and the first connecting portion is in the same layer as the second epitaxial layer, and the second connecting portion is located between the third epitaxial layers of the sub-pixels of the two columns of pixels, and the second connecting portion is in the same layer as the third epitaxial layer.

[0014] Furthermore, the first conductive layer is electrically connected to the driving substrate through a fourth via hole, the second conductive layer is electrically connected to the driving substrate through a fifth via hole, and the third conductive layer is electrically connected to the driving substrate through a sixth via hole.

[0015] Furthermore, the opening area of ​​the third via hole is smaller than the opening area of ​​the second via hole, the opening area of ​​the second via hole is smaller than the opening area of ​​the first via hole, the opening area of ​​the fourth via hole is smaller than the opening area of ​​the fifth via hole, and the opening area of ​​the fifth via hole is smaller than the opening area of ​​the sixth via hole.

[0016] Furthermore, the first via hole, the second via hole, the fifth via hole and the sixth via hole are in a stepped shape.

[0017] Furthermore, the arrangement positions of the sub-pixels of the two columns of pixels located on both sides of the first electrode line are symmetrically arranged with the first electrode line as the center axis, the arrangement positions of the sub-pixels of the two columns of pixels located on both sides of the third electrode line are symmetrically arranged with the third electrode line as the center axis, the arrangement positions of the sub-pixels of the two rows of pixels located on both sides of the second electrode line are symmetrically arranged with the second electrode line as the center axis, and the arrangement positions of the sub-pixels of the two rows of pixels located on both sides of the fourth electrode line are symmetrically arranged with the fourth electrode line as the center axis.

[0018] Beneficial effects of this application:

[0019] The present application provides a micro-light-emitting device display panel, which includes a second common electrode layer, the second common electrode layer is arranged on a side of the third conductive layer away from the driving substrate, the second common electrode layer includes a first electrode line, a second electrode line and a third electrode line, the first electrode line is electrically connected to the first common electrode layer through a first via hole, the second electrode line is electrically connected to the second epitaxial layer through a second via hole, the third electrode line is electrically connected to the third epitaxial layer through a third via hole, and at least two of the first electrode line, the second electrode line and the third electrode line are electrically connected; so that the first common electrode layer and the second common electrode layer of all sub-pixels of the micro-light-emitting device display panel can be effectively interconnected, thereby reducing the resistance of the micro-light-emitting device display panel and improving the problem of abnormal operation of the micro-light-emitting device display panel due to the large heat generation of the micro-light-emitting device display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic diagram of the structure of a conventional micro-light emitting device display panel;

[0021] Figure 2 is a schematic diagram of a micro-light-emitting device display panel of the present application;

[0022] Figure 3 yes Figure 2 A cross-sectional view of the micro-light emitting device display panel taken at AA′;

[0023] Figure 4 yes Figure 2 A cross-sectional view of the micro-light-emitting device display panel at BB′ shown;

[0024] Figure 5 yes Figure 2 The cross-sectional view of the micro-light-emitting device display panel at CC′ is shown.

[0025] 100-driving substrate; 200-sub-pixel, pixel, 210-first common electrode layer, 220-first epitaxial layer, 230-first conductive layer, 240-second epitaxial layer, 241-first connecting portion, 250-second conductive layer, 260-third epitaxial layer, 261-second connecting portion, 270-third conductive layer; 300-second common electrode layer, 310-first electrode line, 320-second electrode line, 330-third electrode line, 34 0-fourth electrode line; 400-fourth via hole, 500-fifth via hole; 600-sixth via hole, 610-first sub-hole, 620-second sub-hole, 630-third sub-hole; 700-first via hole, 710-fourth sub-hole, 720-fifth sub-hole, 730-sixth sub-hole; 800-second via hole; 900-third via hole; 1000-seventh via hole; 1100-lens layer; 1200-first bonding layer; 1300-second bonding layer.

[0026] 10-red light emitting device; 20-green light emitting device; 30-blue light emitting device; 40-common electrode DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. The technical solutions described below are only used to explain and illustrate the ideas of the present application and should not be regarded as limiting the scope of protection of the present application.

[0028] In addition, the terms "first", "second" and similar words do not indicate any order, quantity or importance, but are only used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise clearly defined.

[0029] The micro-light emitting device display panel is a display panel that uses Si-uLED (silicon-based micro-light emitting diode) display technology. The micro-light emitting device display panel has the advantages of high brightness and high contrast. Figure 1In order to realize vertical full-color display of the micro-luminescent device display panel, the traditional micro-luminescent device display panel stacks red light emitting devices, green light emitting devices and blue light emitting devices in the vertical direction of each sub-pixel, so that each different color of light can be irradiated to the outside world from different film layers. However, the micro-luminescent device display panel of this scheme has a large resistance, which causes the micro-luminescent device display panel to generate a large amount of heat, causing the micro-luminescent device display panel to work abnormally; at the same time, when the PN electrodes of the red light emitting devices, green light emitting devices and blue light emitting devices of the sub-pixels of the micro-luminescent device display panel are led out, it is necessary to form multiple steps in the sub-pixels of the micro-luminescent device display panel. Since the sub-pixels of the micro-luminescent device display panel are stacked with too high a thickness, and the micro-luminescent device display panel has a high PPI (Pixels Per Inch) requirement makes the pixel space of the micro-luminescent device display panel smaller, and due to the limitation of the manufacturing process of the micro-luminescent device display panel, the length of the step of the sub-pixel of the micro-luminescent device display panel in the horizontal direction is too short, and the length of the step of the sub-pixel of the micro-luminescent device display panel in the horizontal direction has certain requirements. Therefore, in order to increase the length of the step of the sub-pixel in the horizontal direction, only the effective light-emitting area of ​​the sub-pixel can be occupied, but this leads to a decrease in the aperture ratio of the micro-luminescent device display panel.

[0030] Therefore, the embodiment of the present application provides a micro-light emitting device display panel, referring to Figure 2-Figure 5 The micro light emitting device display panel includes a driving substrate 100 , a plurality of pixels 200 and a second common electrode layer 300 .

[0031] Specifically, a plurality of pixels 200 are arranged at intervals on the driving substrate 100, each pixel 200 includes three sub-pixels 200 with different luminous colors, each sub-pixel 200 includes a first common electrode layer 210, a first epitaxial layer 220, a first conductive layer 230, a second epitaxial layer 240, a second conductive layer 250, a third epitaxial layer 260 and a third conductive layer 270 which are stacked, the first conductive layer 230, the second conductive layer 250 and the third conductive layer 270 are electrically connected to the driving substrate 100; the second common electrode layer 300 is arranged on the third conductive layer 270 away from the driving substrate 100; On one side of the dynamic substrate 100, the second common electrode layer 300 includes a first electrode line 310, a second electrode line 320 and a third electrode line 330. The first electrode line 310 is electrically connected to the first common electrode layer 210 through a first via hole 700, the second electrode line 320 is electrically connected to the second epitaxial layer 240 located between the second conductive layer 250 of two adjacent sub-pixels 200 through a second via hole 800, the third electrode line 330 is electrically connected to the third epitaxial layer 260 through a third via hole 900, and at least two of the first electrode line 310, the second electrode line 320 and the third electrode line 330 are electrically connected.

[0032] The micro-luminescent device display panel includes a second common electrode layer 300, the second common electrode layer 300 is arranged on the side of the third conductive layer 270 away from the driving substrate, the second common electrode layer 300 includes a first electrode line 310, a second electrode line 320 and a third electrode line 330, the first electrode line 310 is electrically connected to the first common electrode layer 210 through a first via hole 700, the second electrode line 320 is electrically connected to the second epitaxial layer 240 through a second via hole 800, the third electrode line 330 is electrically connected to the third epitaxial layer 260 through a third via hole 900, and at least two of the first electrode line 310, the second electrode line 320 and the third electrode line 330 are electrically connected; so that the first common electrode layer 210 and the second common electrode layer 300 of all sub-pixels 200 of the micro-luminescent device display panel can be effectively interconnected, thereby reducing the resistance of the micro-luminescent device display panel and improving the problem of abnormal operation of the micro-luminescent device display panel due to the large heat generation of the micro-luminescent device display panel.

[0033] In this embodiment, the first epitaxial layer 220 is used to emit red light, the second epitaxial layer 240 is used to emit red and green light, and the third epitaxial layer 260 is used to emit blue light.

[0034] In this embodiment, the micro-luminescent device display panel further includes a first bonding layer 1200 and a second bonding layer 1300 . The first bonding layer 1200 is located between the first conductive layer 230 and the second epitaxial layer 240 , and the second bonding layer 1300 is located between the second conductive layer 250 and the third epitaxial layer 260 .

[0035] In the present embodiment, in the top view of the micro-light emitting device display panel, the first epitaxial layer 220 , the second epitaxial layer 240 and the third epitaxial layer 260 of each sub-pixel 200 overlap.

[0036] In the present embodiment, the second common electrode layer 300 also includes a fourth electrode line 340, wherein the first electrode line 310 and the third electrode line 330 extend along the column direction Y of the micro-light-emitting device display panel, the second electrode line 320 and the fourth electrode line 340 extend along the row direction X of the micro-light-emitting device display panel, the first electrode line 310 and the third electrode line 330 are respectively located between two columns of pixels 200 at different positions, and the second electrode line 320 and the fourth electrode line 340 are respectively located between two rows of pixels 200 at different positions; in the top view of the micro-light-emitting device display panel, the first electrode line 310 intersects with the second electrode line 320 and the fourth electrode line 340, and the third electrode line 330 intersects with the second electrode line 320 and the fourth electrode line 340. By arranging the first electrode line 310 and the third electrode line 330 to extend along the column direction Y of the micro-light-emitting device display panel, and the second electrode line 320 and the fourth electrode line 340 to extend along the row direction X of the micro-light-emitting device display panel, the first electrode line 310 and the third electrode line 330 are respectively located between two columns of pixels 200 at different positions, and the second electrode line 320 and the fourth electrode line 340 are respectively located between two rows of pixels 200 at different positions; in the top view of the micro-light-emitting device display panel, the first electrode line 310 and the second electrode line 320 and The fourth electrode lines 340 intersect, and the third electrode lines 330 intersect with the second electrode lines 320 and the fourth electrode lines 340, so that the first common electrode layer 210 and the second common electrode layer 300 of all sub-pixels 200 of the micro-light-emitting device display panel can be effectively interconnected through the first electrode lines 310, the second electrode lines 320, the third electrode lines 330 and the fourth electrode lines 340, thereby reducing the resistance of the micro-light-emitting device display panel and improving the problem of abnormal operation of the micro-light-emitting device display panel due to the high heat generation of the micro-light-emitting device display panel.

[0037] In this embodiment, the first electrode line 310 is located between two adjacent third electrode lines 330 , and the second electrode line 320 is located between two adjacent fourth electrode lines 340 .

[0038] In this embodiment, in a top view of the micro light emitting device display panel, the second common electrode layer 300 is in a grid shape.

[0039] In this embodiment, the micro-light emitting device display panel further includes a lens 1100 . The lens 1100 is disposed on a side of the third epitaxial layer 260 away from the driving substrate 100 .

[0040] In this embodiment, the number of columns of sub-pixels 200 between adjacent first electrode lines 310 and third electrode lines 330 is the same, and the number of rows of sub-pixels 200 between adjacent second electrode lines 320 and fourth electrode lines 340 is the same.

[0041] In the present embodiment, the number of sub-pixels 200 between the adjacent first electrode lines 310 and the third electrode lines 330 is 2 columns, and the number of sub-pixels 200 between the adjacent second electrode lines 320 and the fourth electrode lines 340 is 2 rows. By setting the number of sub-pixels 200 between the adjacent first electrode lines 310 and the third electrode lines 330 to 2 columns, and the number of sub-pixels 200 between the adjacent second electrode lines 320 and the fourth electrode lines 340 to 2 rows, on the one hand, it is possible to avoid the increase in impedance of the micro-light-emitting device display panel due to the low density of the electrode lines, resulting in a decrease in the uniformity of the current flowing through the first epitaxial layer 220, the second epitaxial layer 240 and the third epitaxial layer 260, and on the other hand, it is possible to avoid the decrease in the aperture ratio of the pixels of the micro-light-emitting device display panel due to the excessive density of the electrode lines.

[0042] In this embodiment, the number of sub-pixels 200 between the adjacent first electrode line 310 and the third electrode line 330 is one column, and the number of sub-pixels 200 between the adjacent second electrode line 320 and the fourth electrode line 340 is one row.

[0043] In this embodiment, the number of sub-pixels 200 between the adjacent first electrode lines 310 and the third electrode lines 330 is at least 3 columns, and the number of sub-pixels 200 between the adjacent second electrode lines 320 and the fourth electrode lines 340 is at least 3 rows.

[0044] In this embodiment, the second epitaxial layer 240 of the two rows of pixels 200 located on both sides of the second electrode line 320 is electrically connected through the first connecting portion 241, and the second electrode line 320 is electrically connected to the first connecting portion 241 through the second via 800, and the third epitaxial layer 260 of the two columns of pixels 200 located on both sides of the third electrode line 330 is electrically connected through the second connecting portion 261, and the third electrode line 330 is electrically connected to the second connecting portion 261 through the third via 900, wherein the first connecting portion 241 is located between the second epitaxial layer 240 of the sub-pixels 200 of the two rows of pixels 200, and the first connecting portion 241 is in the same layer as the second epitaxial layer 240, and the second connecting portion 261 is located between the third epitaxial layer 260 of the sub-pixels 200 of the two columns of pixels 200, and the second connecting portion 261 is in the same layer as the third epitaxial layer 260. The second epitaxial layer 240 of the two rows of pixels 200 located on both sides of the second electrode line 320 is electrically connected through the first connecting portion 241, the second electrode line 320 is electrically connected to the first connecting portion 241 through the second via hole 800, the third epitaxial layer 260 of the two columns of pixels 200 located on both sides of the third electrode line 330 is electrically connected through the second connecting portion 261, and the third electrode line 330 is electrically connected to the second connecting portion 261 through the third via hole 900, wherein the first connecting portion 241 is located between the second epitaxial layer 240 of the sub-pixels 200 of the two rows of pixels 200, and the first connecting portion 241 is in the same layer as the second epitaxial layer 240, the second connecting portion 261 is located between the third epitaxial layer 260 of the sub-pixels 200 of the two columns of pixels 200, and the second connecting portion 261 is in the same layer as the second epitaxial layer 240, The third epitaxial layer 260 is in the same layer, so that the second epitaxial layer 240 of the two rows of pixels 200 located on both sides of the second electrode line 320 is not broken, and the third epitaxial layer 260 of the two columns of pixels 200 located on both sides of the third electrode line 330 is not broken, which can reduce the depth of the second via hole 800 and the third via hole 900, and avoid the second via hole 800 and the third via hole 900 being too deep, resulting in an increase in the area of ​​the second via hole 800 and the third via hole 900, thereby improving the aperture ratio of the pixel 200 of the micro-light-emitting device display panel; at the same time, compared with the traditional solution, there is no need to form a multi-layer step for leading out the PN electrode on the sub-pixel 200 of the micro-light-emitting device display panel, and there is no need to increase the length of the step of the sub-pixel 200 in the horizontal direction, thereby avoiding the situation where the effective light-emitting area of ​​the sub-pixel 200 is occupied by the step of the sub-pixel 200, thereby improving the aperture ratio of the micro-light-emitting device display panel.

[0045] In this embodiment, the fourth electrode line 340 is electrically connected to the first common electrode layer 210 through a seventh via hole 1000 penetrating through the film layer between the first common electrode layer 210 and the second common electrode layer 300 of the adjacent sub-pixels 200 .

[0046] In this embodiment, the first conductive layer 230 is electrically connected to the drive substrate 100 through the fourth via hole 400, the second conductive layer 250 is electrically connected to the drive substrate 100 through the fifth via hole 500, and the third conductive layer 270 is electrically connected to the drive substrate 100 through the sixth via hole 600. By setting the first conductive layer 230 to be electrically connected to the drive substrate 100 through the fourth via hole 400, the second conductive layer 250 to be electrically connected to the drive substrate 100 through the fifth via hole 500, and the third conductive layer 270 to be electrically connected to the drive substrate 100 through the sixth via hole 600, the first conductive layer 230, the second conductive layer 250, the third conductive layer 270, the first common electrode layer 210, and the second common electrode layer 300 can be effectively interconnected, thereby reducing the resistance of the micro-light-emitting device display panel, thereby further reducing the heat generation of the micro-light-emitting device display panel, and improving the stability of the micro-light-emitting device display panel.

[0047] In this embodiment, the opening area of ​​the third via hole 900 is smaller than the opening area of ​​the second via hole 800, the opening area of ​​the second via hole 800 is smaller than the opening area of ​​the first via hole 700, the opening area of ​​the fourth via hole 400 is smaller than the opening area of ​​the fifth via hole 500, and the opening area of ​​the fifth via hole 500 is smaller than the opening area of ​​the sixth via hole 600. By setting the opening area of ​​the third via hole 900 to be smaller than the opening area of ​​the second via hole 800, the opening area of ​​the second via hole 800 to be smaller than the opening area of ​​the first via hole 700, the opening area of ​​the fourth via hole 400 to be smaller than the opening area of ​​the fifth via hole 500, and the opening area of ​​the fifth via hole 500 to be smaller than the opening area of ​​the sixth via hole 600, relative to the opening area of ​​the third via hole 900, the opening area of ​​the second via hole 800, and the opening area of ​​the first via hole 700, the areas occupied by the second via hole 800 and the third via hole 900 can be reduced, thereby improving the aperture ratio of the pixel 200 of the micro-light-emitting device display panel.

[0048] In this embodiment, reference Figure 2The arrangement positions of the sub-pixels 200 of the two columns of pixels 200 located on both sides of the first electrode line 310 are symmetrically arranged with the first electrode line 310 as the center axis, the arrangement positions of the sub-pixels 200 of the two columns of pixels 200 located on both sides of the third electrode line 330 are symmetrically arranged with the third electrode line 330 as the center axis, the arrangement positions of the sub-pixels 200 of the two rows of pixels 200 located on both sides of the second electrode line 320 are symmetrically arranged with the second electrode line 320 as the center axis, and the arrangement positions of the sub-pixels 200 of the two rows of pixels 200 located on both sides of the fourth electrode line 340 are symmetrically arranged with the fourth electrode line 340 as the center axis.

[0049] In this embodiment, the first conductive layers 230 of two adjacent sub-pixels 200 are spaced apart, the second conductive layers 250 of two adjacent sub-pixels 200 are spaced apart, and the third conductive layers 270 of two adjacent sub-pixels 200 are spaced apart.

[0050] In this embodiment, the first via hole 700, the second via hole 800, the fifth via hole 500 and the sixth via hole 600 are in a stepped shape. By setting the first via hole 700, the second via hole 800, the fifth via hole 500 and the sixth via hole 600 in a stepped shape, when preparing the first via hole 700, the second via hole 800, the fifth via hole 500 and the sixth via hole 600, the opening of the first via hole 700, the second via hole 800, the fifth via hole 500 and the sixth via hole 600 can be reduced, thereby avoiding the problem that the etching depth of the first via hole 700, the second via hole 800, the fifth via hole 500 and the sixth via hole 600 is too large, resulting in an increase in the taper angle of the via hole, making the opening of the sixth via hole 600 larger, thereby reducing the space of the sub-pixel 200 occupied by the sixth via hole 600, thereby further improving the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel.

[0051] In this embodiment, since the first common electrode layer 210, the first epitaxial layer 220, the first conductive layer 230, the second epitaxial layer 240, the second conductive layer 250, the third epitaxial layer 260 and the third conductive layer 270 of the sub-pixel 200 are stacked in the vertical direction, the sub-pixel 200 has an overall excessively high thickness. If conventional vias are used to electrically connect the third conductive layer 270 to the drive substrate 100, the vias will have a greater depth. When the depth of the vias is greater, the taper angle of the vias will also be greater. Furthermore, the opening of the vias will also be larger, resulting in an increase in the space of the sub-pixel 200 occupied by the vias, resulting in a decrease in the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel. Therefore, the sixth through hole 600 is provided to include a first sub-hole 610, a second sub-hole 620 and a third sub-hole 630, the opening area of ​​the first sub-hole 610 away from the driving substrate 100 is larger than the opening area of ​​the first sub-hole 610 close to the driving substrate 100, the opening area of ​​the second sub-hole 620 away from the driving substrate 100 is larger than the opening area of ​​the second sub-hole 620 close to the driving substrate 100, the opening area of ​​the third sub-hole 630 away from the driving substrate 100 is larger than the opening area of ​​the third sub-hole 630 close to the driving substrate 100, the opening area of ​​the first sub-hole 610 away from the driving substrate 100, the opening area of ​​the second sub-hole 620 away from the driving substrate 100 The area of ​​the opening on one side and the area of ​​the opening on the side of the third sub-hole 630 away from the driving substrate 100 are equal. In the thickness direction Z of the micro-light-emitting device display panel, the first sub-hole 610, the second sub-hole 620 and the third sub-hole 630 are connected in sequence, and the distance from the first sub-hole 610 to the driving substrate 100 is smaller than the distance from the third sub-hole 630 to the driving substrate 100. The form of layered vias is adopted to avoid the problem that the etching depth of the sixth via hole 600 is too large, resulting in an increase in the taper angle of the sixth via hole 600, so that the opening of the sixth via hole 600 becomes larger, and the space of the sub-pixel 200 occupied by the sixth via hole 600 is reduced, thereby further improving the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel.

[0052] In this embodiment, since the first common electrode layer 210, the first epitaxial layer 220, the first conductive layer 230, the second epitaxial layer 240, the second conductive layer 250, the third epitaxial layer 260 and the third conductive layer 270 of the sub-pixel 200 are stacked in the vertical direction, the sub-pixel 200 has an overall excessively high thickness. If conventional vias are used to electrically connect the third conductive layer 270 to the drive substrate 100, the vias will have a greater depth. When the depth of the vias is greater, the taper angle of the vias will also be greater. Furthermore, the opening of the vias will also be larger, resulting in an increase in the space of the sub-pixel 200 occupied by the vias, resulting in a decrease in the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel. Therefore, the first via hole 700 is provided to include a fourth sub-hole 710, a fifth sub-hole 720 and a sixth sub-hole 730, the opening area of ​​the fourth sub-hole 710 away from the driving substrate 100 is larger than the opening area of ​​the fourth sub-hole 710 close to the driving substrate 100, the opening area of ​​the fifth sub-hole 720 away from the driving substrate 100 is larger than the opening area of ​​the fifth sub-hole 720 close to the driving substrate 100, the opening area of ​​the sixth sub-hole 730 away from the driving substrate 100 is larger than the opening area of ​​the sixth sub-hole 730 close to the driving substrate 100, the opening area of ​​the fourth sub-hole 710 away from the driving substrate 100, and the opening area of ​​the fourth sub-hole 710 away from the driving substrate 100. The area of ​​the opening on one side is equal to the area of ​​the opening on the side of the fourth sub-hole 710 away from the driving substrate 100. In the thickness direction Z of the micro-light-emitting device display panel, the fourth sub-hole 710, the fifth sub-hole 720 and the sixth sub-hole 730 are connected in sequence, and the distance from the fourth sub-hole 710 to the driving substrate 100 is smaller than the distance from the sixth sub-hole 730 to the driving substrate 100. The layered via hole form is adopted to avoid the problem that the etching depth of the first via hole 700 is too large, resulting in an increase in the taper angle of the first via hole 700, so that the opening of the first via hole 700 becomes larger, and the space of the sub-pixel 200 occupied by the first via hole 700 is reduced, thereby further improving the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel.

[0053] In the present embodiment, the fifth via hole 500 includes a seventh sub-hole and an eighth sub-hole, the area of ​​the opening of the seventh sub-hole away from the driving substrate 100 is greater than the area of ​​the opening of the seventh sub-hole close to the driving substrate 100, the area of ​​the opening of the eighth sub-hole away from the driving substrate 100 is greater than the area of ​​the opening of the eighth sub-hole close to the driving substrate 100, the area of ​​the opening of the eighth sub-hole away from the driving substrate 100 is equal to the area of ​​the opening of the seventh sub-hole away from the driving substrate 100, in the thickness direction Z of the micro-light-emitting device display panel, the seventh sub-hole and the eighth sub-hole are connected in sequence, and the distance from the seventh sub-hole to the driving substrate 100 is less than the distance from the eighth sub-hole to the driving substrate 100; the form of layered via holes is adopted, so as to avoid the problem that the etching depth of the fifth via hole 500 is too large, resulting in an increase in the taper angle of the fifth via hole 500, so that the opening of the fifth via hole 500 becomes larger, and the space of the sub-pixel 200 occupied by the fifth via hole 500 is reduced, thereby further improving the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel.

[0054] In the present embodiment, the second via hole 800 includes a ninth sub-hole and a tenth sub-hole, the area of ​​the opening of the ninth sub-hole away from the driving substrate 100 is greater than the area of ​​the opening of the tenth sub-hole close to the driving substrate 100, the area of ​​the opening of the tenth sub-hole away from the driving substrate 100 is greater than the area of ​​the opening of the tenth sub-hole close to the driving substrate 100, the area of ​​the opening of the tenth sub-hole away from the driving substrate 100 is equal to the area of ​​the opening of the ninth sub-hole away from the driving substrate 100, in the thickness direction Z of the micro-light-emitting device display panel, the ninth sub-hole and the tenth sub-hole are connected in sequence, and the distance from the ninth sub-hole to the driving substrate 100 is less than the distance from the tenth sub-hole to the driving substrate 100; the layered via hole form is adopted, which avoids the problem that the etching depth of the second via hole 800 is too large, resulting in an increase in the taper angle of the second via hole 800, so that the opening of the second via hole 800 becomes larger, and reduces the space of the sub-pixel 200 occupied by the second via hole 800, thereby further improving the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel.

[0055] In this embodiment, the seventh via hole 1000 includes an eleventh sub-hole, a twelfth sub-hole and a thirteenth sub-hole, the area of ​​the opening of the eleventh sub-hole away from the driving substrate 100 is greater than the area of ​​the opening of the eleventh sub-hole close to the driving substrate 100, the area of ​​the opening of the twelfth sub-hole away from the driving substrate 100 is greater than the area of ​​the opening of the twelfth sub-hole close to the driving substrate 100, the area of ​​the opening of the thirteenth sub-hole away from the driving substrate 100 is greater than the area of ​​the opening of the thirteenth sub-hole close to the driving substrate 100, the area of ​​the opening of the eleventh sub-hole away from the driving substrate 100 and the area of ​​the opening of the twelfth sub-hole away from the driving substrate 100 are greater than the area of ​​the opening of the thirteenth sub-hole close to the driving substrate 100. The area of ​​the seventh via hole 1000 is equal to the area of ​​the opening of the side of the thirteenth sub-hole away from the driving substrate 100. In the thickness direction Z of the micro-light-emitting device display panel, the eleventh sub-hole, the twelfth sub-hole and the thirteenth sub-hole are connected in sequence, and the distance from the eleventh sub-hole to the driving substrate 100 is smaller than the distance from the thirteenth sub-hole to the driving substrate 100. The form of layered vias is adopted to avoid the problem that the etching depth of the seventh via hole 1000 is too large, resulting in an increase in the taper angle of the seventh via hole 1000, so that the opening of the seventh via hole 1000 becomes larger, and the space of the sub-pixel 200 occupied by the seventh via hole 1000 is reduced, thereby further improving the aperture ratio of the sub-pixel 200 of the micro-light-emitting device display panel.

[0056] The above is a detailed description of the specific implementation of the present application. The above implementation disclosed in the present application is only the preferred implementation of the present application. For ordinary technicians in this field, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the scope of protection defined by the claims of the present application.

Claims

1. A micro-light emitting device display panel, characterized in that: include: Driver substrate; A plurality of pixels, wherein the plurality of pixels are arranged at intervals on the driving substrate, each of the pixels comprises three sub-pixels with different luminous colors, each of the sub-pixels comprises a first common electrode layer, a first epitaxial layer, a first conductive layer, a second epitaxial layer, a second conductive layer, a third epitaxial layer and a third conductive layer which are stacked, and the first conductive layer, the second conductive layer and the third conductive layer are electrically connected to the driving substrate; A second common electrode layer, the second common electrode layer is arranged on a side of the third conductive layer away from the driving substrate, the second common electrode layer includes a first electrode line, a second electrode line and a third electrode line, the first electrode line is electrically connected to the first common electrode layer through a first via hole, the second electrode line is electrically connected to the second epitaxial layer through a second via hole, the third electrode line is electrically connected to the third epitaxial layer through a third via hole, and at least two of the first electrode line, the second electrode line and the third electrode line are electrically connected.

2. The micro-light emitting device display panel according to claim 1, characterized in that: The second common electrode layer further includes a fourth electrode line, wherein the first electrode line and the third electrode line extend along the column direction of the micro-light-emitting device display panel, the second electrode line and the fourth electrode line extend along the row direction of the micro-light-emitting device display panel, the first electrode line and the third electrode line are respectively located between two columns of pixels at different positions, and the second electrode line and the fourth electrode line are respectively located between two rows of pixels at different positions; In a top view of the micro light emitting device display panel, the first electrode line intersects with the second electrode line and the fourth electrode line, and the third electrode line intersects with the second electrode line and the fourth electrode line.

3. The micro-light emitting device display panel according to claim 2, characterized in that: The first electrode line is located between two adjacent third electrode lines, and the second electrode line is located between two adjacent fourth electrode lines.

4. The micro-light emitting device display panel according to claim 3, characterized in that: The number of columns of the pixels between the adjacent first electrode lines and the third electrode lines is the same, and the number of rows of the pixels between the adjacent second electrode lines and the fourth electrode lines is the same.

5. The micro-light emitting device display panel according to claim 4, characterized in that: The number of the pixels between the adjacent first electrode line and the third electrode line is 2 columns, and the number of the pixels between the adjacent second electrode line and the fourth electrode line is 2 rows.

6. The micro-light emitting device display panel according to claim 2, characterized in that: The second epitaxial layers of the two rows of pixels located on both sides of the second electrode line are electrically connected through a first connecting portion, and the second electrode line is electrically connected to the first connecting portion through a second via hole, and the third epitaxial layers of the two columns of pixels located on both sides of the third electrode line are electrically connected through a second connecting portion, and the third electrode line is electrically connected to the second connecting portion through a third via hole, wherein the first connecting portion is located between the second epitaxial layers of the sub-pixels of the two rows of pixels, and the first connecting portion is in the same layer as the second epitaxial layer, and the second connecting portion is located between the third epitaxial layers of the sub-pixels of the two columns of pixels, and the second connecting portion is in the same layer as the third epitaxial layer.

7. The micro-light emitting device display panel according to claim 1, characterized in that: The first conductive layer is electrically connected to the driving substrate through a fourth via hole, the second conductive layer is electrically connected to the driving substrate through a fifth via hole, and the third conductive layer is electrically connected to the driving substrate through a sixth via hole.

8. The micro-light emitting device display panel according to claim 7, characterized in that: The opening area of ​​the third via hole is smaller than the opening area of ​​the second via hole, the opening area of ​​the second via hole is smaller than the opening area of ​​the first via hole, the opening area of ​​the fourth via hole is smaller than the opening area of ​​the fifth via hole, and the opening area of ​​the fifth via hole is smaller than the opening area of ​​the sixth via hole.

9. The micro-light emitting device display panel according to claim 7, characterized in that: The first via hole, the second via hole, the fifth via hole and the sixth via hole are in a step shape.

10. The micro-light emitting device display panel according to claim 2, characterized in that: The arrangement positions of the sub-pixels of the two columns of pixels located on both sides of the first electrode line are symmetrically arranged with the first electrode line as the center axis, the arrangement positions of the sub-pixels of the two columns of pixels located on both sides of the third electrode line are symmetrically arranged with the third electrode line as the center axis, the arrangement positions of the sub-pixels of the two rows of pixels located on both sides of the second electrode line are symmetrically arranged with the second electrode line as the center axis, and the arrangement positions of the sub-pixels of the two rows of pixels located on both sides of the fourth electrode line are symmetrically arranged with the fourth electrode line as the center axis.

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