Central processing unit partition diagnostics

By diagnosing and removing cross-partition preemption events in a multi-core processor environment, the problem of increasing latency caused by application process preemption is solved, achieving bounded latency and improving application performance.

CN119816823APending Publication Date: 2025-04-11MICROSOFT TECHNOLOGY LICENSING LLC
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Patent Information

Application Number
CN202380063181.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-09-29
Filing Date
2023-08-24
Publication Date
2025-04-11

AI Technical Summary

Technical Problem

In a multi-core processor environment, preemption of an application process may result in an increase in latency, especially when a particular application process is preempted by another application process's thread, the time to complete that particular application process may increase.

Method used

By implementing diagnostics of preemption events on CPUs with multiple cores, cross-partition preemption events in CPU partitions are identified and removed to ensure that the cores in the CPU partition are dedicated to threads that execute specific application processes.

Benefits of technology

Bounded delays associated with running a specific application process are implemented to ensure that the application process can be completed within a predetermined time, thereby improving application performance.

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Abstract

Systems and methods for providing cross-partition preemption analysis and prevention. The computing device generally includes a main central processing unit (CPU) having multiple cores to execute instructions independently, collaboratively, or in other suitable ways. In some examples, one or more cores are partitioned and dedicated to a particular application, where exclusive access of the cores in the partition is intended for running processes of the application. In some examples, some "noise" may be introduced into a partition, where preemption associated with other processes may interrupt execution of a particular application. A preemption diagnostic system and method identifies and prevents a source of cross-partition preemption events from running in a dedicated CPU partition. Thus, a particular application uses a dedicated core in a partition. Accordingly, the delay of the application is reduced, and bounded delay corresponding to the service level agreement may be achieved.
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Description

Background Art

[0001] One challenge in improving the performance of application processes is to minimize the preemption of application processes at runtime. For example, when a thread runs to the end of its quantum and has no output, the thread is preempted or another thread is scheduled to run. Therefore, when a particular application process is preempted by a thread of another application process, the time to complete the particular application process may increase, which may introduce or increase latency.

[0002] In some examples, an application process may be hard-affinityed to one or more cores of a central processing unit (CPU) so that threads of the process execute only on a specified set of cores. For example, it may be desirable to run an application process that requires a large amount of processing power on a partitioned set of dedicated cores, where the set of cores is focused on processing the task of the application process. Therefore, being able to partition one or more cores of a host computing device and dedicate them to executing a specific application process is desirable for increasing application performance.

[0003] In some examples, a core set dedicated to a particular application process is preempted to run threads in another application process. For example, the preemption may be caused by affinity configuration performed prior to partitioning the core set. For example, another application process that is affinity, bound, or otherwise mapped to a dedicated core may preempt a particular application process and cause / increase latency.

[0004] It is with respect to these and other considerations that the examples are made.In addition, although relatively specific problems have been discussed, it should be understood that the examples should not be limited to solving the specific problems identified in the background. Summary of the invention

[0005] Examples described in this disclosure relate to systems and methods for providing cross-CPU partition preemption identification and removal. Examples of this disclosure address various aspects of the above challenges by implementing diagnosis of preemption events on a CPU with multiple cores. Preemption diagnosis systems and methods identify and remove cross-partition preemption events in CPU partitions so that the cores included in the CPU partitions are dedicated to executing threads of a specific application process. Therefore, bounded delays associated with running application processes can be achieved.

[0006] This summary is provided to introduce a series of concepts in a simplified form, which will be further described in the detailed description below. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure is illustrated by way of example in the accompanying drawings, in which like reference numerals designate similar elements. The elements in the drawings are illustrated for simplicity and clarity and are not necessarily drawn to scale.

[0008] Figure 1 is a block diagram depicting an example computing device including a preemption diagnostic system for providing cross-partition preemption identification and removal according to an example;

[0009] Figure 2 is a block diagram depicting identification of cross-partition preemption events in partitions according to an example;

[0010] Figure 3 is a description of the example from Figure 2 A block diagram of removing cross-partition preemption events from partitions in ;

[0011] Figure 4 is a flow chart describing the operation of an example method for performing cross-partition preemption identification and prevention;

[0012] Figure 5 is a block diagram illustrating example physical components of a computing device in which aspects of the present disclosure may be practiced; and

[0013] Fig. 6A and Figure 6B is a block diagram of a mobile computing device in which aspects of the present disclosure may be practiced. DETAILED DESCRIPTION

[0014] Examples described in the present disclosure relate to systems and methods for identifying and removing delay-causing preemptions from central processing unit (CPU) partitions. Computing devices typically include a main CPU with multiple cores to execute instructions independently, collaboratively, or in other suitable ways. In some examples, a set of one or more cores is partitioned and dedicated to a specific application, where exclusive access to the set of cores in the partition is intended for the process running the application. In some examples, some "noise" can be introduced into the CPU partitions, where preemptions associated with cross-CPU partition processes can interrupt the execution of a specific application. Preemption diagnostic systems and methods identify, reduce, remove, and / or otherwise limit the additional delays caused by cross-partition events so that a specific application uses a dedicated core in a partition. Therefore, a bounded delay associated with running a specific application process can be achieved.

[0015] Figure 1 is a block diagram of a computing device 100 that provides removal of preemptions that cause delays according to one example. Referring now to Figure 1, a schematic diagram of an example computing device 100 suitable for implementing an example of the present disclosure is shown. In various examples, the computing device 100 is a general-purpose computer, such as a desktop computer, a tablet computer, a notebook computer, a server, etc. However, in other examples, the computing device 100 is a smart phone, a game console, a wearable device, or any other electronic device equipped with a multi-core CPU (referred to herein as a multi-core processor 102). The multi-core processor 102 is a microprocessor on a single integrated circuit, which has two or more separate processing units referred to as cores 110a to 110n (collectively referred to as cores 110), each core reading and executing program instructions. For example, the multi-core processor 102 includes a circuit including discrete electronic components, a packaged or integrated electronic chip containing logic gates, a circuit using a microprocessor, a single chip containing electronic components or a microprocessor, or other suitable logic devices. In some examples, based on various aspects of the present disclosure, an execution thread is mapped to a processor core 110, or is moved between cores 110. The core 110 is capable of executing a thread that executes a task of an application process. In various examples, multi-core processor 102 includes two, four, eight, sixteen, or other suitable number of cores 210. Cores 210 may individually include one or more arithmetic logic units, floating point units, L1 and L2 caches, and / or other suitable components.

[0016] As shown, the computing device 100 also includes a memory 104, a user interface 108, and a network interface 106 that are operably coupled to each other. The memory 104 includes volatile and / or non-volatile media and / or other types of computer-readable storage media, which are configured to store data received from the preemptive diagnosis system 111 and instructions for the preemptive diagnosis system (e.g., for executing the following reference Figure 4 instructions for the method in question).

[0017] In some examples, the user interface 108 includes a data output device (e.g., a visual display, an audio speaker), and one or more data input devices. The data input device may include a keypad, a keyboard, a mouse device, a touch screen, a microphone, a speech recognition package, a gesture recognition package, and any other suitable device or other electronic / software selection method. One or more combinations.

[0018] In some examples, the network interface 106 includes a wired and / or wireless communication interface component that enables the computing device 100 to send and receive data via a network. In various embodiments, the wireless interface component operates to communicate via cellular, WI-FI, Bluetooth, satellite transmission, etc. The wired interface component may include a direct I / O interface, such as an Ethernet interface, a serial interface, a universal serial bus (USB) interface, etc. For example, the computing device 100 includes a network capability for exchanging data with other electronic devices (e.g., a laptop, a server, etc.) via one or more networks (such as the Internet).

[0019] According to an example, the multi-core processor 102 and memory 104 of the computing device 100 store an operating system 112, a preemption diagnostic system 111, and applications 118a-n (collectively referred to as applications 118). The operating system 112 includes components that enable the computing device 100 to receive data via various inputs (e.g., user controls, network interfaces, and / or memory devices) and process the data using the multi-core processor 102 to generate output. The operating system 112 may also include one or more components that provide output to the user interface 108, the network interface 106, another portion of the memory 104, etc. (e.g., displaying an image on an electronic display, storing data in a memory, transmitting data to another electronic device).

[0020] In some examples, the operating system 112 includes other components that perform various other functions that are usually associated with the operating system, such as processing data of the application 118. For example, various components work together to manage threads that process data of the application 118. For example, a thread performs a task of the application 118. As used herein, a thread refers to a single sequential control flow within a program or application. In some examples, various components include a distributor, a scheduler, and a queue. According to some examples, the distributor allocates the cores 110 of the multi-core processor 102 to execute threads, which perform different tasks (e.g., on a polling, fair use, random order, or some other basis). In some examples, the scheduler is responsible for managing the execution of threads by allocating computer resources to different threads. For example, there may be hundreds of processes running at the same time, and the multi-core processor 102 cannot process these processes at the same time. Therefore, the scheduler manages these processes and allocates CPU time to them based on various factors. In some examples, the scheduler determines which process thread will run on which CPU core 110. According to the example, CPU affinity is a configurable setting that can force a process or thread to run on a specific one or more cores 110. A process or thread that is bound to a particular core 110 will only run on the specified core. For example, when a calling thread is assigned to execute on the first core 110a, the affinity table may indicate that the calling thread has affinity for the first core 110a. In some examples, a queue stores information indicating the affinity of a particular thread to a particular core 110.

[0021] In some examples, the applications 118 are executed in a desktop environment provided by the operating system 112. The applications 118 may include processes that perform real-time tasks and / or non-real-time tasks. In various examples, the applications 118 include production applications, gaming applications, entertainment applications, and / or communication applications. In at least one example, the applications 118 include an interface application that enables a system administrator to assign specific cores 110 of the multi-core processor 102 to execute threads that perform specific application process tasks.

[0022] In some examples, CPU partitioning is enabled, where a CPU core set 110 is isolated for exclusive use by a specific application 118. According to the example, when a core set 110 is dedicated to an application process, a bounded latency is provided for the associated workload, where the application process tasks are bound to soft time limits. It will be appreciated that the performance of the application 118 can be improved by ensuring that the core set 110 is dedicated to executing the tasks of a specific application without being preempted (e.g., interrupted) by processes of other applications. For example, preemptive multitasking enables a task currently running on a core set 110 to be interrupted and swapped in order to start or continue running another task. Thus, CPU time is allocated to multiple application process tasks. The profile setting attributes can be configured to allocate an application process to use a given core set 110, where a violation (e.g., a protocol violation) occurs if another application process uses the given core set 110. It will be appreciated that the completion time of the application process may be negatively affected by the preemption associated with such a violation.

[0023] While partitioning one or more cores 110 and dedicating them to running specific application processes is intended to provide exclusive access to one or more cores 110 for executing tasks corresponding to a specific application 118 and its preemption, in some examples, some "noise" may be introduced into the CPU partition, where "noise" refers to preemptions associated with other application processes that interrupt the execution of the specific application 118. For example, in some cases, before the core set 110 is dedicated to the specific application 118, various hardware or CPU interrupts may be distributed across the various cores 110 of the multi-core processor 102. Therefore, a preemption event associated with another process that was previously mapped or bound to a core 110 of the CPU partition may interrupt the process of the specific application 118 when executing on the core 110 (e.g., even though the core 110 may be dedicated to the specific application 118). Such an interruption may have a negative impact on the completion time of the specific application 118. As an illustrative example, a CPU partition including a core set 110 is dedicated to running one or more processes of an application 118. In some examples, latency bounds for CPU partitions are agreed upon (e.g., in a service level agreement (SLA)) to ensure acceptable application performance. Therefore, it is desirable to identify, reduce, remove, and / or otherwise limit the additional latency caused by cross-CPU partition events so that applications 118 use a dedicated set of cores 110. Thus, bounded latency SLAs can be met.

[0024] Therefore, a preemption diagnostic system 111 is provided to automatically identify and isolate preemption violations from the core set 110 in the dedicated CPU partition. In some examples, the multi-core processor 102 communicates with the memory 104 to execute appropriate instructions to provide the preemption diagnostic system 111. Figure 1As shown, the preemption diagnostic system 111 is included in the computing device 100, and in some examples, operates in the kernel space of the operating system 112 of the computing device. As described herein, the preemption diagnostic system 111 operates to execute multiple computer-readable instructions, data structures, or program modules to provide partition diagnosis. The preemption diagnostic system 111 analyzes the preemption of the application process to identify the root cause of the preemption (referred to as the source herein). The preemption diagnostic system 111 evaluates the thread context information recorded in association with the preemption, and identifies whether the source of the preemption is an application 118 dedicated to the CPU partition or another application process. For example, when the source is another application process, the preemption is determined to be a violation of the preemption. According to the example, access to the thread context information enables the preemption diagnostic system 111 to determine the source of the preemption that occurred in the dedicated CPU partition, while the preempted application 118 cannot access the thread context information, and therefore cannot determine the source of the preemption that occurred in the dedicated CPU partition.

[0025] The preemption diagnostic system 111 is configured to evaluate information recorded in association with a preemption event (i.e., an event in which a task preempts another task). In some examples, a preemption event log is created when a preempting task (e.g., a task that preempts another task, referred to herein as a preemption) is assigned to a queue. According to an example, the recorded information includes thread context information that identifies the application process that owns the thread corresponding to the preemption. Examples of preemption events include scheduler events, in which an application process is interrupted to run a higher priority task; delayed procedure calls (DCPs), in which a process is interrupted to run a required, lower priority task; interrupt service routines (ISRs), in which a process is interrupted by an ISR running at a higher interrupt request level; or other suitable preemption events. In some examples, the preemption diagnostic system 111 is configured to evaluate information recorded in association with a preemption event when the quantum of the application process being interrupted by the preemption meets or exceeds a time threshold (e.g., 100 microseconds).

[0026] When the preemption is determined to be a preemption violation, and therefore the source of the preemption is not associated with an application 118 dedicated to a CPU partition, the preemption diagnostic system 111 further moves the source of the preemption violation from the dedicated CPU partition. In some examples, the preemption diagnostic system 111 modifies one or more system configuration settings to move and bind the source of the preemption violation to another core 110 (e.g., outside the dedicated CPU partition). In some examples, the preemption diagnostic system 111 reconstructs the code corresponding to the source of the preemption violation so that it no longer generates threads that are affinity to the dedicated partition and preempt the dedicated application 118. Therefore, the CPU partition SLA can be complied with. Therefore, delays caused by cross-CPU partition preemption violations are reduced, removed, and / or otherwise limited. Although Figure 1The example computing device 100 is viewed as having a certain number of components arranged in a certain manner, but in other examples, the computing device 100 may include additional or fewer components arranged in a different manner.

[0027] Figure 2 and Figure 3 A block diagram illustrating identifying and removing preemption from a partition according to an example is depicted. Figure 2 , shows a dedicated CPU partition 202a configured on a computing device 100. For example, a first core 110a and a second core 110b of the computing device 100 are assigned to the dedicated CPU partition 202a. The dedicated CPU partition 202a is dedicated to the task of running a first application process 206a and its corresponding preemption. In the example shown, at least a third core 110c and a fourth core 110d of the computing device 100 are assigned to one or more other application processes 206b-n running on one or more other CPU partitions 202b-n. According to the example, during the execution of the first application process 206a on the dedicated CPU partition 202a, a plurality of preemptions 204a-e (collectively referred to as 204) interrupt the execution of the first application process 206a. For example, the first core 110a and / or the second core 110b are interrupted from executing the task corresponding to the first application process 206a to execute the task corresponding to the plurality of preemptions 204. Wherein some of the preemptions 204 are associated with the first application process 206a, and other preemptions 204 are preemption violations (e.g., associated with one or more other processes 206b-n). According to an example, when the preemption 204 is assigned to a queue (e.g., corresponding to the first core 110a or the second core 110b), a log of preemption events is generated. The event log includes information about the preemption event and the source corresponding to the preemption 204 (e.g., the application process 206). For example, the preemption event log corresponding to the plurality of preemptions 204 is provided to the preemption diagnostic system 111, which determines whether the preemption event 204 is a preemption violation.

[0028] As an example, Figure 2, the preemption diagnostic system 111 evaluates the preemption event log corresponding to the plurality of preemption events 204, and determines that the source of the first preemption 204a, the second preemption 204b, and the third preemption 204c is associated with one or more other application processes 206b-206n assigned to one or more other CPU partitions 202b-202n. For example, the first preemption 204a may correspond to a scheduler event, the second preemption 204b may correspond to a DCP event, and the third preemption 204c may correspond to an interrupt event associated with one or more other application processes 206b-206n. Therefore, the first, second, and third preemptions 204a-204c represent preemption violations that may cause delays in the first application process 206a. Furthermore, the preemption diagnostic system 111 determines that the source of the fourth preemption 204d and the fifth preemption 204e is the first application process 206a, whose tasks (including their corresponding preemptions) are dedicated to being run by the set of cores 110 assigned to the dedicated CPU partition 202a.

[0029] Therefore, now refer to Figure 3 , the preemption diagnostic system 111 takes corrective action that causes other application processes 206b-206n and associated preemptions to execute on different core sets 110 (e.g., the third core 110c and / or the fourth core 110d) outside the dedicated CPU partition 202a. For example, the preemption diagnostic system 111 modifies one or more system configuration settings (e.g., interrupt request settings, affinity settings), restructures code, or otherwise causes the source of the first, second, and third preemptions 204a, 204b, 204c to no longer run on the first or second core 110a, 110b. Therefore, the first application process 206a is provided with full use of the resources included in the dedicated CPU partition 202a without being interrupted by cross-partition events. Therefore, latency is reduced, which enables the first application process 206a to run within the agreed latency bounds associated with the dedicated CPU partition 202a.

[0030] Reference now Figure 4 , a flowchart depicting a method 400 for providing cross-CPU partition preemption identification and removal according to an example is provided. Figure 1As depicted, the operations of method 400 may be performed by one or more computing devices, such as by a preemption diagnostic system 111 operating on computing device 100. At operation 402, preemption 204 interrupts a first application process 206a running within a dedicated CPU partition 202a. For example, the dedicated CPU partition 202a includes one or more cores 110 dedicated to executing threads of the first application process 206a. In some examples, prior to partitioning the one or more cores 110 into the first CPU partition 202a, tasks associated with one or more other application processes 206b-206n that may run within another CPU partition 202b-n are bound, linked, or otherwise configured to run on a core 110 included in the dedicated CPU partition 202a. For example, the one or more other application processes 206b-206n have a configuration setting that has at least one core 110 in the dedicated CPU partition 202a selected or otherwise indicated as allowing execution of the process(es) thereon.

[0031] At operation 404, an event log is generated that includes information associated with the preemption event 204. For example, the information recorded in the event log includes context information identifying the application process 206 that owns the thread corresponding to the preemption 204. Operations 402 and 404 may loop during execution of the first application process 206a.

[0032] At operation 406, the event log is analyzed. For example, the preemption diagnostic system 111 evaluates the recorded information for determining the source of the preemption(s) 204. In some examples, when the first application process 306a is interrupted for a time exceeding a threshold range, the preemption diagnostic system 111 receives an indication of the preemption 204 and analyzes the associated event log data. In other examples, the indication of the preemption 204 is received in association with receiving the preemption event log.

[0033] At decision operation 408, it is determined whether the determined source is the first application process 206a or another application process 206b-n. When it is determined that the source of the recorded preemption 204 is an application process 206b-n other than the first application process 206a, at operation 410, future preemptions associated with the other application process 206b-n are reallocated to another CPU partition 202b-n. Thus, a system for preventing cross-CPU partition preemption is described herein, the system comprising: a processor; and a memory storing instructions that, when executed by the processor, cause the system to: receive an indication of a preemption of a first application process running within a CPU partition, the CPU partition being dedicated to running the first application process; based on a log event associated with the preemption, determine that the source of the preemption is a second application process different from the first application process; determine that the preemption is a preemption violation; and take corrective action to prevent the source of the preemption violation from running in the dedicated CPU partition. For example, the preemption diagnostic system 111 modifies system configuration settings, refactors code, or performs other configurations to prevent other application processes 206b-206n from having affinity to the core 110 included in the dedicated CPU partition 202a. Therefore, the first application process 206a is provided with full use of the resources included in the dedicated CPU partition 202a without being interrupted by cross-partition events.

[0034] Figure 5 , Fig. 6A ,and Figure 6B and the associated descriptions provide a discussion of various operating environments in which examples of the present disclosure may be practiced. Figure 5 , Fig. 6A ,and Figure 6B The devices and systems shown and discussed are for purposes of example and explanation and are a broad range of computing device configurations that may be used to practice the teachings of the present disclosure as described herein.

[0035] Figure 5 5 is a block diagram showing the physical components (eg, hardware) of a computing device 500 that can practice examples of the present disclosure. The computing device components described below may be applicable to the examples described above. Figure 1 . In a basic configuration, computing device 500 includes at least one processing unit 502 and system memory 504. Depending on the configuration and type of computing device 500, system memory 504 may include volatile storage (e.g., random access memory), non-volatile storage (e.g., read-only memory), flash memory, or any combination of these memories. System memory 504 may include an operating system 505 and one or more program modules 506 suitable for running software applications 550, such as preemption diagnostic system 222 in one example.

[0036] The operating system 505 may be adapted to control the operation of the computing device 500. In addition, aspects of the present disclosure may be practiced in conjunction with a graphics library, other operating systems, or any other application, and is not limited to any particular application or system. Figure 5 508. The computing device 500 may have additional features or functionality. For example, the computing device 500 may also include additional data storage devices (removable and / or non-removable), such as magnetic disks, optical disks, or tapes. Such additional storage devices may be used to store data. Figure 5 , which is illustrated by a removable storage device 509 and a non-removable storage device 510.

[0037] As described above, a number of program modules and data files may be stored in system memory 504. When executed on processing unit 502, program modules 506 may perform functions including Figure 4 Other program modules may be used according to examples of the present disclosure and may include applications such as email and contact applications, word processing applications, spreadsheet applications, database applications, slide presentation applications, drawing or computer-aided applications.

[0038] In addition, examples of the present disclosure may be practiced on circuits including discrete electronic components, packaged or integrated electronic chips containing logic gates, circuits utilizing a microprocessor, or a single chip containing electronic components or a microprocessor. For example, examples of the present disclosure may be practiced via a system on a chip (SOC), wherein Figure 5 Each or many of the components shown in the can be integrated into a single integrated circuit. Such a SOC device may include one or more processing units, a graphics unit, a communication unit, a system virtualization unit, and various application functions, all of which are integrated (or "burned") as a single integrated circuit on a chip substrate. When operated via the SOC, the functions described herein regarding providing cross-CPU partition preemption identification and removal can be operated via dedicated logic integrated with other components of the computing device 500 on a single integrated circuit (chip). Other technologies capable of performing logical operations (such as AND, OR, and NOT) may also be used to practice examples of the present disclosure, including mechanical, optical, fluid, and quantum technologies.

[0039] The computing device 500 may also have one or more input devices 512, such as a keyboard, a mouse, a pen, a voice input device, a touch input device, a camera, etc. Output device(s) 514 may also be included, such as a display, a speaker, a printer, etc. The above devices are examples, and other devices may also be used. The computing device 500 may include one or more communication connections 516 that allow communication with other computing devices 518. Examples of suitable communication connections 516 include RF transmitter, receiver, and / or transceiver circuitry; Universal Serial Bus (USB), parallel, and / or serial ports.

[0040] The term computer-readable media as used herein includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, or program modules). System memory 504, removable storage device 509, and non-removable storage device 510 are all examples of computer-readable media (e.g., memory storage devices). Computer-readable media include random access memory (RAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical storage device, magnetic cassette, magnetic tape, magnetic disk storage device or other magnetic storage device, or any other article that can be used to store information and can be accessed by computing device 500. Any such computer-readable media can be part of computing device 500. Computer-readable media do not include carrier waves or other propagating data signals.

[0041] Communication media may be embodied by computer readable instructions, data structures, program modules, or other data in a modulated data signal (such as a carrier wave or other transport mechanism), and includes any information delivery media. The term "modulated data signal" may describe a signal having one or more characteristics that are set or changed in a manner that encodes information in the signal. As an example, communication media may include wired media (such as a wired network or direct-wired connection) and wireless media (such as acoustic, RF, infrared, and other wireless media).

[0042] Fig. 6A and Figure 6B A mobile computing device 600 (eg, a mobile phone, a smart phone, a tablet personal computer, a notebook computer, etc.) is shown, with which aspects of the present disclosure may be practiced. Fig. 6A, an example of a mobile computing device 600 for implementing at least some aspects of the present technology is shown. In a basic configuration, the mobile computing device 600 is a handheld computer with input elements and output elements. The mobile computing device 600 typically includes a display 605 and one or more input buttons 610, which allow a user to enter information into the mobile computing device 600. The display 605 of the mobile computing device 600 can also be used as an input device (e.g., a touch screen display). If included, the optional side input element 615 allows further user input. The side input element 615 can be a rotary switch, a button, or any other type of manual input element. In alternative examples, the mobile computing device 600 can include more or fewer input elements. For example, in some examples, the display 605 may not be a touch screen. In an alternative example, the mobile computing device 600 is a portable telephone system, such as a cellular phone. The mobile computing device 600 can also include an optional keypad 635. The optional keypad 635 can be a physical keypad or a "soft" keyboard generated on the touch screen display. In various aspects, output elements include a display 605 for displaying a graphical user interface (GUI), a visual indicator 620 (e.g., a light emitting diode), and / or an audio transducer 625 (e.g., a speaker). In some examples, the mobile computing device 600 includes a vibration transducer for providing tactile feedback to the user. In another example, the mobile computing device 600 includes input and / or output ports for sending or receiving signals to or from external devices, such as an audio input (e.g., a microphone jack), an audio output (e.g., a headphone jack), and a video output (e.g., an HDMI port).

[0043] Figure 6B 6 is a block diagram illustrating the architecture of one example of a mobile computing device. That is, mobile computing device 600 may include system (e.g., architecture) 602 to implement some examples. In one example, system 602 is implemented as a "smartphone" capable of running one or more applications (e.g., video conferencing or virtual meeting applications, browsers, email, calendars, contact managers, messaging clients, games, and media clients / players). In some examples, system 602 is integrated into a computing device, such as an integrated personal digital assistant (PDA) and wireless phone.

[0044] One or more applications 650 (e.g., one or more of the components of the preemptive diagnostic system 111) are loaded into the memory 662 and run on or in association with the operating system 664. Other examples of applications 650 include video conferencing or virtual conferencing programs, telephone dialing programs, email programs, personal information management (PIM) programs, word processing programs, spreadsheet programs, Internet browser programs, messaging programs, and the like. The system 602 also includes a non-volatile storage area 668 within the memory 662. The non-volatile storage area 668 can be used to store persistent information that should not be lost when the system 602 is powered off. The application 650 can use information and store it in the non-volatile storage area 668, such as email or other messages used by the email application. A synchronization application (not shown) also resides on the system 602 and is programmed to interact with a corresponding synchronization application residing on the host computer to keep the information stored in the non-volatile storage area 668 synchronized with the corresponding information stored at the remote device or server. It should be appreciated that other applications may be loaded into the memory 662 and executed on the mobile computing device 600 .

[0045] System 602 has a power source 670, which can be implemented as one or more batteries. Power source 670 can also include an external power source, such as an AC adapter or a powered docking cradle to replenish or recharge the batteries.

[0046] The system 602 may also include a radio 672 that performs the function of sending and receiving radio frequency (RF) communications. The radio 672 facilitates wireless connectivity between the system 602 and the "outside world" via a communications carrier or service provider. Transmissions to and from the radio 672 are performed under the control of the operating system 664. In other words, communications received by the radio 672 may be propagated to the application 650 via the operating system 664, and vice versa.

[0047] Visual indicator 620 (e.g., light emitting diode (LED)) can be used to provide visual notification and / or audio interface 674 can be used to generate audible notification via audio transducer 625. In the example shown, visual indicator 620 is a light emitting diode (LED) and audio transducer 625 is a speaker. These devices can be directly coupled to power supply 670 so that when these devices are activated, they will remain on for the duration specified by the notification mechanism even if processor 660 and other components may be turned off to save battery power. The LED can be programmed to remain on indefinitely until the user takes action to indicate the power-on state of the device. Audio interface 674 is used to provide audible signals to the user and receive audible signals from the user. For example, in addition to being coupled to audio transducer 625, audio interface 674 can also be coupled to a microphone to receive audible input, such as facilitating a telephone conversation. System 602 can also include a video interface 676, which enables peripheral device port 630 (e.g., vehicle-mounted camera) to operate to record still images, video streams, etc.

[0048] The mobile computing device 600 implementing the system 602 may have additional features or functionality. For example, the mobile computing device 600 may also include additional data storage devices (removable and / or non-removable), such as magnetic disks, optical disks, or tapes. Such additional storage devices may be used to store data in a manner that is convenient for the user. Figure 6B , shown by non-volatile storage area 668.

[0049] As described above, data / information generated or captured by mobile computing device 600 and stored via system 602 may be stored locally on mobile computing device 600, or the data may be stored on any number of storage media that may be accessed by the device via radio 672 or via a wired connection between mobile computing device 600 and a separate computing device associated with mobile computing device 600 (e.g., a server computer in a distributed computing network such as the Internet). It should be understood that such data / information may be accessed via mobile computing device 600, via radio 672, or via a distributed computing network. Similarly, such data / information may be readily transferred between computing devices for storage and use in accordance with well-known data / information transfer and storage means, including email and collaborative data / information sharing systems.

[0050] Examples include a computer-implemented method for preventing preemption across central processing unit (CPU) partitions, comprising: receiving an indication of preemption of a first application process running within a CPU partition, the CPU partition being dedicated to running the first application process; determining, based on log events associated with the preemption, that the source of the preemption is a second application process different from the first application process; determining that the preemption is a preemption violation; and taking corrective action to prevent the source of the preemption violation from running in the dedicated CPU partition.

[0051] An example includes a system for preventing preemption across central processing unit (CPU) partitions, the system comprising: a processor; and a memory storing instructions that, when executed by the processor, cause the system to: receive an indication of a preemption of a first application process running within a CPU partition, the CPU being dedicated to running the first application process; determine, based on log events associated with the preemption, that the source of the preemption is a second application process that is different from the first application process; determine that the preemption is a preemption violation; and take corrective action to prevent the source of the preemption violation from running in the dedicated CPU partition.

[0052] An example includes a computer-readable medium storing instructions that, when executed by a computer, cause the computer to: receive an indication of preemption of a first application process running within a first central processing unit (CPU) partition, the first CPU being dedicated to running the first application process, the first CPU partition including one or more cores; generate a log event associated with the preemption; based on the log event, determine that the source of the preemption is a second application process that is different from the first application process; and take corrective action to affinity the second application process to a core outside the first CPU partition.

[0053] It should be understood that the methods, modules, and components described herein are merely examples. Alternatively or additionally, the functions described herein may be performed at least in part by one or more hardware logic components. For example, illustrative types of hardware logic components that may be used include field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), etc. In an abstract but still clear sense, any arrangement of components that implement the same function is effectively "associated" to achieve the desired function. Therefore, any two components that are combined to achieve a specific function herein may be considered to be "associated" to each other to achieve the desired function, regardless of the architecture or intermediate components. Similarly, any two components so associated may also be considered to be "operably connected" or "coupled" to each other to achieve the desired function. Just because a component that may be any other implementation of a device, structure, system, or function is described herein as being coupled to another component does not mean that these components must be separate components. As an example, component A described as being coupled to another component B may be a subcomponent of component B, component B may be a subcomponent of component A, or components A and B may be combined subcomponents of another component C.

[0054] Functions associated with some of the examples described in this disclosure may also include instructions stored in non-transient media. The term "non-transient media" used herein refers to any medium that stores data and / or instructions that cause a machine to operate in a particular manner. Illustrative non-transient media include non-volatile media and / or volatile media. Non-volatile media include, for example, hard disks, solid-state drives, disks or tapes, optical disks or tapes, flash memory, EPROM, NVRAM, PRAM, or other such media, or networked versions of such media. Volatile media include, for example, dynamic memory (such as DRAM, SRAM, cache, or other such media). Non-transient media are different from transmission media, but can be used in combination with transmission media. Transmission media are used to transmit data and / or instructions to or from a machine. Examples of transmission media include coaxial cables, fiber optic cables, copper wires, and wireless media (such as radio waves).

[0055] In addition, those skilled in the art will recognize that the boundaries between the functions of the operations described above are merely illustrative. The functions of multiple operations can be combined into a single operation, and / or the functions of a single operation can be distributed in additional operations. In addition, alternative embodiments can include multiple instances of specific operations, and the order of operations can be changed in various other embodiments.

[0056] Although the present disclosure provides specific examples, various modifications and changes may be made without departing from the scope of the present disclosure as set forth in the following claims. Therefore, the description and drawings should be regarded as illustrative rather than restrictive, and all such modifications are intended to be included within the scope of the present disclosure. Any benefits, advantages, or solutions to problems described herein with respect to specific examples are not intended to be construed as key, essential, or essential features or elements of any or all claims.

[0057] In addition, the terms "a" or "an" as used herein are defined as one or more. Likewise, the use of introductory phrases such as "at least one" and "one or more" in the claims should not be interpreted as implying that the introduction of another claim element by the indefinite article "a" or "an" limits any particular claim containing such introduced claim element to containing only one such element, even if the same claim includes the introductory phrases "one or more" or "at least one" and an indefinite article such as "a" or "an". The same applies to the use of definite articles.

[0058] Unless otherwise stated, the terms "first" and "second" are used to arbitrarily distinguish between the elements such terms describe. Therefore, these terms are not necessarily intended to indicate temporal or other prioritization of such elements.

Claims

1. A system for preventing preemption across central processing unit (CPU) partitions, the system comprising: processor; as well as A memory storing instructions that, when executed by the processor, cause the system to: receiving an indication of preemption of a first application process running in a CPU partition, the CPU partition being dedicated to running the first application process; Based on a log event associated with the preemption, determining that a source of the preemption is a second application process different from the first application process; determining that the preemption is a preemption violation; as well as Corrective action is taken to prevent the source of the preemption violation from running in the dedicated CPU partition.

2. The system of claim 1, wherein the dedicated CPU partition comprises a first core of the processor, wherein the processor comprises a plurality of cores.

3. The system of claim 2, wherein the corrective action comprises: Additional preemption of the second application is affinity-bound to a second core of the plurality of cores that is different from the first core.

4. The system of claims 1-3, wherein the corrective action comprises: Modify system configuration settings.

5. The system of claims 1-3, wherein the corrective action comprises: Refactoring code corresponding to the source of the preemption violation. 6 . The system of claim 1 , wherein the log event includes information identifying the second application process as the source of the preemption violation.

7. The system of claim 1, wherein prior to determining the source of the preemption, the instructions cause the system to determine that the first application process was preempted for longer than a threshold amount of time.

8. The system of claim 1, wherein the preemption violation is one of: Scheduler events; Delayed procedure call; or Interrupt service routine.

9. The system of claim 1, wherein the log event is generated in response to assigning the preemption violation to a queue associated with the dedicated CPU partition.

10. A computer-implemented method for preventing preemption across central processing unit (CPU) partitions, comprising: receiving an indication of preemption of a first application process running in a CPU partition, the CPU partition being dedicated to running the first application process; Based on a log event associated with the preemption, determining that a source of the preemption is a second application process different from the first application process; determining that the preemption is a preemption violation; as well as Corrective action is taken to prevent the source of the preemption violation from running in the dedicated CPU partition.

11. The method of claim 10, wherein generating the log event comprises: Information identifying the second application process as the source of the preemption violation is recorded. 12 . The method of claim 10 , wherein determining the source of the preemption is performed in response to determining that the first application process was preempted longer than a quantum threshold.

13. The method of claim 10, wherein the preemption violation is one of: Scheduler events; Delayed procedure call; or Interrupt service routine.

14. The method of claim 10, wherein taking the corrective action comprises: One or more system configuration settings are modified to direct additional preemption affinity of the second application to cores outside of the dedicated CPU partition.

15. A computer-readable medium storing instructions which, when executed by a computer, cause the computer to: receiving an indication of preemption of a first application process running in a first central processing unit (CPU) partition, the first CPU partition being dedicated to running the first application process, the first CPU partition comprising one or more cores; generating a log event associated with the preemption; Based on the log event, determining that the source of the preemption is a second application process different from the first application process; as well as Corrective action is taken to affinity the second application process to a core external to the first CPU partition.