Electronic paper display panel, preparation method thereof and display device

Abstract

The invention discloses an electronic paper display panel and a preparation method thereof and a display device, and mainly relates to the technical field of display, the electronic paper display panel comprises a first substrate, a transistor driving module layer, a pixel electrode layer, a capsule reflecting layer and a common electrode layer, the transistor driving module layer and the pixel electrode layer are sequentially arranged on the first substrate, and the capsule reflecting layer is arranged on the first substrate; the capsule reflecting layer is arranged on the side, away from the first substrate, of the pixel electrode layer, the common electrode layer is arranged on the side, away from the pixel electrode layer, of the capsule reflecting layer, and the capsule reflecting layer comprises a plurality of microcapsules; the electronic paper display panel further comprises a spacing structure, the spacing structure is arranged on the transistor driving module layer, the side wall of the spacing structure abuts against the microcapsules to restrain movement of the microcapsules, the material of the spacing structure is the same as that of the pixel electrode layer, and the height of the spacing structure is larger than that of the pixel electrode layer. Through the design, the problem that the brightness of the electronic paper display panel is reduced is avoided, the manufacturing procedures are reduced, and the production efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an electronic paper display panel and a preparation method thereof and a display device. Background Art

[0002] The electronic paper display panel displays images by generating an electric field between the pixel electrode and the common electrode, driving the movement of particles. Currently, the main technical breakthrough direction of electrophoretic electronic paper is focused on achieving flexible display. However, many problems are faced when using electronic paper display panels for flexible display.

[0003] For example, when the electronic paper display panel is bent, the brightness in the middle of the bent area will decrease, resulting in uneven brightness display between the edge and middle of the bent area. Summary of the invention

[0004] The purpose of the present application is to provide an electronic paper display panel and a preparation method and a display device thereof, so as to avoid the problem of brightness reduction of the electronic paper display panel, reduce the process steps, and improve the production efficiency.

[0005] The present application discloses an electronic paper display panel, which includes a first substrate, a transistor driving module layer, a pixel electrode layer, a capsule reflection layer and a common electrode layer. The transistor driving module layer and the pixel electrode layer are sequentially arranged on the first substrate, the capsule reflection layer is arranged on a side of the pixel electrode layer away from the first substrate, the common electrode layer is arranged on a side of the capsule reflection layer away from the pixel electrode layer, and the capsule reflection layer includes a plurality of microcapsules; the electronic paper display panel also includes a spacing structure, which is arranged on the transistor driving module layer, the sidewalls of the spacing structure abut against the microcapsules to inhibit the movement of the microcapsules, the material of the spacing structure is the same as that of the pixel electrode layer, and the height of the spacing structure is greater than the height of the pixel electrode layer.

[0006] Optionally, the electronic paper display panel includes a plurality of pixel unit regions, the pixel electrode layer includes a plurality of pixel electrodes, and the plurality of pixel electrodes are respectively located in the pixel unit regions; A gap is arranged between two adjacent pixel electrodes, the spacing structure is located in the gap, and the spacing structure is arranged between every two adjacent pixel electrodes.

[0007] Optionally, the two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, and the spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first pixel electrode, and the second sub-spacer structure is connected to the second pixel electrode.

[0008] Optionally, the transistor driving module layer includes a common electrode layer, the common electrode layer includes a plurality of common electrodes, the plurality of common electrodes are respectively located in the pixel unit region, and two adjacent common electrodes are defined as a first common electrode and a second common electrode; two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit region, and the second pixel electrode and the second common electrode are located in the same pixel unit region; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first common electrode, and the second sub-spacer structure is connected to the second common electrode.

[0009] Optionally, the transistor driving module layer includes a common electrode layer, the common electrode layer includes a plurality of common electrodes, the plurality of common electrodes are respectively located in the pixel unit region, and two adjacent common electrodes are defined as a first common electrode and a second common electrode; two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit region, and the second pixel electrode and the second common electrode are located in the same pixel unit region; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first common electrode, and the second sub-spacer structure is connected to the second pixel electrode.

[0010] Optionally, the transistor driving module layer includes a common electrode layer, the common electrode layer includes a plurality of common electrodes, the plurality of common electrodes are respectively located in the pixel unit region, and two adjacent common electrodes are defined as a first common electrode and a second common electrode; two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit region, and the second pixel electrode and the second common electrode are located in the same pixel unit region; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first pixel electrode, and the second sub-spacer structure is connected to the first common electrode.

[0011] The present application also discloses a method for preparing an electronic paper display panel. The method for preparing an electronic paper display panel is used to prepare an electronic paper display panel, and the steps include: forming a transistor driving module layer on the first substrate; forming a pixel electrode layer and a spacing structure on the transistor driving module layer; forming a capsule reflection layer on the pixel electrode layer; forming the common electrode layer on the capsule reflective layer to form the electronic paper display panel; The sidewall of the spacing structure abuts against the microcapsule to inhibit the movement of the microcapsule. The material of the spacing structure is the same as that of the pixel electrode layer, and the height of the spacing structure is greater than the height of the pixel electrode layer.

[0012] Optionally, the step of forming a pixel electrode layer and a spacing structure on the transistor driving module layer includes: forming a metal layer on the transistor driving module layer; After coating the photoresist on the metal layer, a composite mask is arranged, wherein the position of the composite mask corresponding to the pixel electrode is a first mask structure, and the position of the composite mask corresponding to the spacing structure is a second mask structure; The remaining photoresist is removed and the metal layer is etched, and the remaining photoresist is removed again to form a pixel electrode layer and a spacing structure.

[0013] Optionally, the step of forming a transistor driving module layer on the first substrate includes: forming a first metal layer on a first substrate; forming a first insulating layer on the first metal layer; forming a second metal layer on the first insulating layer, and patterning the second metal layer to form a plurality of common electrodes to form a common electrode layer; forming a second insulating layer on the second metal layer; forming a passivation layer on the second insulating layer; Opening connecting vias on the passivation layer and the second insulating layer; Wherein, the electronic paper display panel includes a plurality of pixel unit regions, two adjacent common electrodes are defined as a first common electrode and a second common electrode, two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit region, and the second pixel electrode and the second common electrode are located in the same pixel unit region; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first pixel electrode, and the connecting via is used to connect the second sub-spacer structure to the first common electrode.

[0014] The present application also discloses a display device, which includes a driving circuit and an electronic paper display panel, wherein the driving circuit drives the electronic paper display panel to display a picture.

[0015] Compared with the existing electronic paper display panel, the electronic paper display panel of the present application adds a spacing structure, and the spacing structure abuts against the microcapsule to inhibit the movement of the microcapsule, so that when the electronic paper display panel is displayed in a bent state, there will be no problem of brightness reduction in the bent area; and the spacing structure of the present application is made of the same material as the pixel electrode layer, so the spacing structure and the pixel electrode layer can be prepared using the same process, thereby reducing the process steps and improving production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings: Figure 1 is a schematic diagram of a display device according to an embodiment of the present application; Figure 2 is a schematic diagram of an electronic paper display panel according to the first embodiment of the present application; Figure 3 is a schematic diagram of a transistor driving module layer of the first embodiment of the present application; Figure 4 is a schematic diagram of a spacing structure of the first embodiment of the present application; Figure 5 is a schematic diagram of a pixel electrode of the first embodiment of the present application when a positive voltage is applied; Figure 6 is a schematic diagram of a pixel electrode of the first embodiment of the present application when the voltage is negative; Figure 7 is a schematic diagram of a pixel electrode of the second embodiment of the present application when a positive voltage is applied; Figure 8 is a schematic diagram of a pixel electrode of the second embodiment of the present application when the voltage is negative; Fig. 9 is a schematic diagram of a spacing structure of the third embodiment of the present application; Fig.10 is a schematic diagram of a spacing structure of a fourth embodiment of the present application; Fig.11 It is a schematic flow chart of a method for preparing an electronic paper display panel according to an embodiment of the present application; Fig.12 is a schematic diagram of a process of manufacturing an electronic paper display panel according to an embodiment of the present application; Fig.13It is a schematic flow chart of a method for preparing a pixel electrode layer and a spacing structure according to an embodiment of the present application; Fig.14 It is a process schematic diagram of a method for preparing a pixel electrode layer and a spacing structure according to an embodiment of the present application; Fig.15 It is a schematic flow chart of a method for preparing a transistor driving module layer according to an embodiment of the present application; Fig.16 It is a process diagram of a method for preparing a transistor driving module layer according to an embodiment of the present application.

[0017] Among them, 10, display device; 20, driving circuit; 30, electronic paper display panel; 31, pixel unit area; 32, gap; 100, first substrate; 200, transistor driving module layer; 210, first metal layer; 220, first insulating layer; 230, second metal layer; 240, second insulating layer; 250, passivation layer; 260, active switch; 300, pixel electrode layer; 310, pixel electrode; 311, first pixel electrode; 312, second pixel electrode; 400, capsule reflection layer ; 410, microcapsule; 411, black particles; 412, white particles; 500, common electrode layer; 600, second substrate; 700, common electrode layer; 710, common electrode; 711, first common electrode; 712, second common electrode; 800, spacing structure; 810, first sub-spacing structure; 820, second sub-spacing structure; 910, connecting via; 920, pixel via; 930, third metal layer; 940 composite mask; 941, first mask structure; 942, second mask structure. DETAILED DESCRIPTION

[0018] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative, but the present application can be implemented in many alternative forms and should not be construed as being limited to only the embodiments described herein.

[0019] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating relative importance or implicitly indicating the number of technical features indicated. Therefore, unless otherwise specified, features defined as "first" and "second" may explicitly or implicitly include one or more of the features; "plurality" means two or more. The term "including" and any variation thereof means non-exclusive inclusion, and one or more other features, integers, steps, operations, units, components and / or combinations thereof may exist or be added.

[0020] In addition, terms indicating orientation or positional relationships, such as “center,” “lateral,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inside,” and “outside,” are described based on the orientation or relative positional relationships shown in the accompanying drawings and are merely simplified descriptions for the convenience of describing the present application. They do not indicate that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limitations on the present application.

[0021] In addition, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be internally connected between two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0022] The present application is described in detail below with reference to the accompanying drawings and optional embodiments.

[0023] Figure 1 is a schematic diagram of a display device according to an embodiment of the present application. Figure 1 As shown, the present application discloses a display device 10 , which includes a driving circuit 20 and an electronic paper display panel 30 , wherein the driving circuit 20 drives the electronic paper display panel 30 to display a picture.

[0024] The present application also discloses an electronic paper display panel 30, which can be used in the display device 10 described above. For the electronic paper display panel 30, the present application provides the following design, which is specifically introduced through several embodiments: Embodiment 1: Figure 2 is a schematic diagram of an electronic paper display panel according to the first embodiment of the present application. Figure 2 As shown, the present application discloses an electronic paper display panel 30, which includes a first substrate 100, a transistor driving module layer 200, a pixel electrode layer 300, a capsule reflection layer 400 and a common electrode layer 500. The transistor driving module layer 200 and the pixel electrode layer 300 are sequentially arranged on the first substrate 100, the capsule reflection layer 400 is arranged on a side of the pixel electrode layer 300 away from the first substrate 100, the common electrode layer 700 is arranged on a side of the capsule reflection layer 400 away from the pixel electrode layer 300, and the capsule reflection layer 400 includes a plurality of microcapsules 410.

[0025] Among them, the microcapsule 410 is filled with a variety of charged particles. For example, when the electronic paper display panel 30 is only used to display black and white colors, the microcapsule 410 is filled with black particles 411 and white particles 412; when the electronic paper display panel 30 is used to display color images, the microcapsule 410 can also be filled with colored particles, such as red particles, blue particles and green particles.

[0026] The electronic paper display panel 30 also includes a spacing structure 800, which is disposed on the transistor driving module layer 200, and the sidewall of the spacing structure 800 abuts against the microcapsule 410 to inhibit the movement of the microcapsule 410. The material of the spacing structure 800 is the same as that of the pixel electrode layer 300, and the height of the spacing structure 800 is greater than the height of the pixel electrode layer 300.

[0027] The material of the spacing structure 800 and the material of the pixel electrode layer 300 both include metal materials.

[0028] Figure 3 is a schematic diagram of a transistor driving module layer of the first embodiment of the present application, such as Figure 3 As shown, the transistor driving module layer 200 includes a first metal layer 210, a first insulating layer 220, a second metal layer 230, a second insulating layer 240 and a passivation layer 250, and the first metal layer 210, the first insulating layer 220, the second metal layer 230, the second insulating layer 240 and the passivation layer 250 are sequentially arranged on the first substrate 100.

[0029] The transistor driving module layer 200 also includes a plurality of active switches 260. When the active switch 260 is a top-gate active switch 260, the gate of the active switch 260 is located in the second metal layer 230, the source and drain of the active switch 260 are located in the first metal layer 210, and the semiconductor layer of the active switch 260 is located between the first substrate 100 and the first metal layer 210. When the active switch 260 is a bottom-gate active switch 260, the gate of the active switch 260 is located in the first metal layer 210, the source and drain of the active switch 260 are located in the second metal layer 230, and the semiconductor layer of the active switch 260 is located between the first insulating layer 220 and the second metal layer 230. The illustration of the present application takes the active switch 260 as an example of a bottom-gate structure.

[0030] The electronic paper display panel 30 also includes a second substrate 600, which is arranged on a side of the common electrode layer 500 away from the first substrate 100. The first substrate 100 and the second substrate 600 are both flexible substrates. The material of the first substrate 100 and the material of the second substrate 600 include polyimide films, thereby meeting the bending requirements of the electronic paper display panel 30.

[0031] When the existing electronic paper display panel is used on a curved surface or is bent, the microcapsules 410 in the bent area of ​​the electronic paper display panel will move toward the edge position, which results in the existing electronic paper display panel 30 having a small density of microcapsules 410 at the bent area and a large density of microcapsules 410 at the edge position. Then, when displaying, the corresponding brightness and resolution will decrease as the density of the microcapsules 410 in the bent area decreases, and the corresponding brightness will increase as the density of the microcapsules 410 at the edge position increases, resulting in uneven brightness when the electronic paper display panel displays the image.

[0032] Compared with the existing electronic paper display panel, the electronic paper display panel 30 of the present application adds a spacing structure 800, which abuts against the microcapsule 410 to inhibit the movement of the microcapsule 410. In this way, when the electronic paper display panel 30 is bent and displayed, there will be no problem of brightness reduction in the bent area.

[0033] Moreover, the spacing structure 800 of the present application is made of the same material as the pixel electrode layer 300 , so the spacing structure 800 and the pixel electrode layer 300 can be manufactured using the same process, thereby reducing the number of manufacturing steps and improving production efficiency.

[0034] Moreover, the material of the spacing structure 800 and the material of the pixel electrode layer 300 both include metal materials, which can enhance the ductility of the pixel electrode layer 300 so that when the electronic paper display panel 30 is used in a bendable display device 10, the pixel electrode layer 300 will not be damaged.

[0035] The height of the spacing structure 800 protruding from the passivation layer 250, that is, the transistor driving module layer 200, is less than or equal to 1 / 2 of the height of the microcapsule 410, so as to avoid the spacing structure 800 making the gap 32 between adjacent microcapsules 410 larger, resulting in a decrease in the density of the microcapsules 410 on the entire electronic paper display panel 30 and a problem of lower brightness; the height of the spacing structure 800 protruding from the passivation layer 250 is greater than or equal to 1 / 4 of the height of the microcapsule 410, so as to avoid the insufficient height of the spacing structure 800 making it difficult to block the movement of the microcapsule 410.

[0036] For example, the spacing structure 800 of the present application can be directly set on the transistor driving module layer 200, and one end of the spacing structure 800 is directly in contact with the passivation layer 250. The spacing structure 800 is located at the gap 32 between two pixel unit areas 31. A plurality of pixel unit areas 31 may be included between two adjacent spacing structures 800. At this time, it is not limited to setting a spacing structure 800 between every two pixel unit areas 31.

[0037] Exemplarily, the spacing structure 800 may also be directly disposed on the pixel electrode 310 , that is, one end of the spacing structure 800 is in direct contact with the pixel electrode 310 .

[0038] This application takes the example that a spacing structure 800 is provided between every two adjacent pixel electrodes 310 for illustration, as follows: Figure 4 is a schematic diagram of a spacing structure of the first embodiment of the present application, such as Figure 4 As shown, the electronic paper display panel 30 includes a plurality of pixel unit regions 31 , and the pixel electrode layer 300 includes a plurality of pixel electrodes 310 , and the plurality of pixel electrodes 310 are respectively located in the pixel unit regions 31 .

[0039] A gap 32 is disposed between two adjacent pixel electrodes 310 , the spacing structure 800 is located in the gap 32 , and the spacing structure 800 is disposed between every two adjacent pixel electrodes 310 .

[0040] The present application provides the spacing structure 800 between every two adjacent pixel electrodes 310 to ensure that when the electronic paper display panel 30 is bent, the density of the microcapsules 410 in each pixel unit area 31 remains unchanged no matter how it is bent, thereby preventing the electronic paper display panel 30 from having an uneven display problem in which the brightness in the middle of the bending area is low and the brightness at the edge of the bending area is high when the bending area is bent.

[0041] For example, the microcapsules 410 of the electronic paper display panel 30 are filled with black particles 411 and white particles 412 . The black particles are negatively charged, and the white particles 412 are positively charged. A single microcapsule 410 is filled with white particles 412 and black particles 411 .

[0042] For example, when the microcapsule 410 is needed to reflect light, a positive 15V charge is connected to the pixel electrode 310, and the negatively charged black particles 411 in the microcapsule 410 move toward one side of the pixel electrode 310, while the positively charged white particles 412 in the microcapsule 410 move toward one side of the common electrode layer 500, so that the white particles 412 gather and reflect light on it, and white is displayed.

[0043] For example, when the microcapsule 410 is needed to absorb light, a negative 15V charge is connected to the pixel electrode 310, and the positively charged white particles 412 in the microcapsule 410 move toward one side of the pixel electrode 310, while the negatively charged black particles 411 in the microcapsule 410 move toward one side of the common electrode layer 500, so that the black particles 411 gather on it to absorb light, and the display is black.

[0044] However, no matter whether the above two methods display black or white, there will be a problem that the white particles 412 or the black particles 411 gathered in the upper part of the microcapsule 410 are all charged with the same polarity. Since there is a repulsive force between the white particles 412 of the same polarity and there is a repulsive force between the black particles 411 of the same polarity, the packing density of the white particles 412 and the black particles 411 is insufficient, which causes the overall brightness of the electronic paper display panel 30 to decrease. In addition, when the full screen needs to be brushed black or white when updating the picture, it will cause the next picture to have a residual image phenomenon.

[0045] For the purpose of the present application, the spacing structure 800 is further improved so that in each pixel region, there is not only a horizontal electric field from the pixel electrode 310 toward the common electrode layer 500, but also an oblique electric field.

[0046] Figure 5 is a schematic diagram of a pixel electrode of the first embodiment of the present application when the voltage is positive. Figure 6 is a schematic diagram of a pixel electrode of the first embodiment of the present application when the voltage is negative. Figure 5-Figure 6 As shown, Figure 5 The direction indicated by the dashed arrow in the middle represents the direction of the partial thrust. Figure 6The direction indicated by the dashed arrow indicates the direction of the partial thrust, and the two adjacent pixel electrodes 310 are defined as the first pixel electrode 311 and the second pixel electrode 312. The spacing structure 800 includes a first sub-spacing structure 810 and a second sub-spacing structure 820. The first sub-spacing structure 810 and the second sub-spacing structure 820 are both arranged on the transistor driving module layer 200 and located between the first pixel electrode 311 and the second pixel electrode 312. The first sub-spacing structure 810 is located on the side of the second sub-spacing structure 820 away from the second pixel electrode 312, and the second sub-spacing structure 820 is located on the side of the first sub-spacing structure 810 away from the first pixel electrode 311; the first sub-spacing structure 810 is connected to the first pixel electrode 311, and the second sub-spacing structure 820 is connected to the second pixel electrode 312. In short, the sub-spacing structures located on both sides of the pixel electrode 310 in a pixel unit area 31 are connected to the pixel electrode 310.

[0047] Exemplary, combined Figure 5 As shown, when the microcapsule 410 reflects light, when a positive 15V voltage is applied to the pixel electrode 310, the negatively charged black particles 411 in the microcapsule 410 will move toward one side of the pixel electrode 310, and the positively charged white particles 412 in the microcapsule 410 will move toward one side of the common electrode layer 500. At this time, the pixel electrode 310 has the same voltage as the sub-spacer structure, thereby giving an oblique thrust to the upper white particles 412, and the direction of the oblique thrust is the center position of the oblique pixel unit area 31, so that the white particles 412 can focus more reflected light on it.

[0048] Exemplary, combined Figure 6 As shown, when the microcapsule 410 absorbs light, when a negative 15V voltage is applied to the pixel electrode 310, the positively charged white particles 412 in the microcapsule 410 will move toward one side of the pixel electrode 310, and the negatively charged black particles 411 in the microcapsule 410 will move toward one side of the common electrode layer 500. At this time, the pixel electrode 310 has the same voltage as the sub-spacer structure, thereby giving an oblique thrust to the upper black particles 411, and the direction of the oblique thrust is oblique to the center of the pixel unit area 31, so that the black particles 411 are more concentrated on it to absorb light.

[0049] Thus, by connecting the first sub-spacer structure 810 to the first pixel electrode 311 and the second sub-spacer structure 820 to the second pixel electrode 312, an oblique electric field is generated in each pixel unit area 31, which exerts an oblique pushing force on the white particles 412 and the black particles 411 above the inside of the microcapsule 410 toward the middle of the pixel unit area 31, thereby avoiding insufficient packing density of the white particles 412 and the black particles 411, which would lead to a decrease in the overall brightness of the electronic paper display panel 30, and also avoiding the problem of afterimage in the next picture when updating the picture.

[0050] Furthermore, compared with the solution of the second embodiment, the solution of this embodiment does not need to set vias to connect the sub-spacer structure with the common electrode 710, and the structure is simpler. The first sub-spacer structure 810 and the first pixel electrode 311 are not easily disconnected, and the second sub-spacer structure 820 and the second pixel electrode 312 are not easily disconnected. The first pixel electrode 311 will not be connected to the first common electrode 711 through the first sub-spacer structure 810, and the second pixel electrode 312 will not be connected to the second common electrode 712 through the second sub-spacer structure 820. This will not cause pixel bad pixels, thereby improving the generation yield.

[0051] Embodiment 2: Figure 7 is a schematic diagram of a pixel electrode of the second embodiment of the present application when the voltage is positive. Figure 8 is a schematic diagram of a pixel electrode of the second embodiment of the present application when the voltage is negative. Figure 7-Figure 8 As shown, Figure 7 The direction indicated by the dashed arrow in the middle represents the direction of the partial thrust. Figure 8 The direction indicated by the dashed arrow indicates the direction of part of the pulling force. What is different from the first embodiment is that the first sub-spacer structure 810 and the second sub-spacer structure 820 of this embodiment are connected to the first common electrode 711 and the second common electrode 712 respectively.

[0052] The transistor driving module layer 200 includes a common electrode layer 700, and the common electrode layer 700 includes multiple common electrodes 710. The multiple common electrodes 710 are respectively located in the pixel unit area 31, and two adjacent common electrodes 710 are defined as a first common electrode 711 and a second common electrode 712; two adjacent pixel electrodes 310 are defined as a first pixel electrode 311 and a second pixel electrode 312, and the first pixel electrode 311 and the first common electrode 711 are located in the same pixel unit area 31, and the second pixel electrode 312 and the second common electrode 712 are located in the same pixel unit area 31.

[0053] The spacing structure 800 includes a first sub-spacing structure 810 and a second sub-spacing structure 820. The first sub-spacing structure 810 and the second sub-spacing structure 820 are both arranged on the transistor driving module layer 200 and located between the first pixel electrode 311 and the second pixel electrode 312. The first sub-spacing structure 810 is located on the side of the second sub-spacing structure 820 away from the second pixel electrode 312, and the second sub-spacing structure 820 is located on the side of the first sub-spacing structure 810 away from the first pixel electrode 311. The first sub-spacing structure 810 is connected to the first common electrode 711, and the second sub-spacing structure 820 is connected to the second common electrode 712. In short, the sub-spacing structures located on both sides of the common electrode 710 in the same pixel unit area 31 are connected to the common electrode 710.

[0054] Exemplary, combined Figure 7 As shown, when the microcapsule 410 reflects light, when a positive 15V voltage is applied to the pixel electrode 310, the negatively charged black particles 411 in the microcapsule 410 will move toward one side of the pixel electrode 310, and the positively charged white particles 412 in the microcapsule 410 will move toward one side of the common electrode layer 500. At this time, the pixel electrode 310 has the same voltage as the sub-spacer structure, thereby giving an oblique thrust to the upper white particles 412, and the direction of the oblique thrust is the center position of the oblique pixel unit area 31, so that the white particles 412 can focus more reflected light on it.

[0055] Exemplary, combined Figure 8 As shown, when the microcapsule 410 absorbs light, when a negative 15V voltage is applied to the pixel electrode 310, the positively charged white particles 412 in the microcapsule 410 will move toward one side of the pixel electrode 310, and the negatively charged black particles 411 in the microcapsule 410 will move toward one side of the common electrode layer 500. At this time, the pixel electrode 310 has the same voltage as the sub-spacer structure, thereby applying an oblique pulling force to the upper black particles 411, and the direction of the oblique pulling force is the position of the oblique sub-spacer structure. Therefore, in this embodiment, the number of black particles filled in the microcapsule 410 is greater than the number of white particles 412, thereby alleviating the problem of decreased contrast caused by the non-aggregation of the black particles 411.

[0056] Embodiment 3: Fig. 9 is a schematic diagram of a spacing structure of the third embodiment of the present application, such as Fig. 9 As shown, different from the first embodiment, in this embodiment, one of the sub-spacer structures on both sides of the pixel electrode 310 is connected to the pixel electrode 310 and the other is connected to the common electrode 710 .

[0057] The transistor driving module layer 200 includes a common electrode layer 700, and the common electrode layer 700 includes multiple common electrodes 710. The multiple common electrodes 710 are respectively located in the pixel unit area 31, and two adjacent common electrodes 710 are defined as a first common electrode 711 and a second common electrode 712; two adjacent pixel electrodes 310 are defined as a first pixel electrode 311 and a second pixel electrode 312, and the first pixel electrode 311 and the first common electrode 711 are located in the same pixel unit area 31, and the second pixel electrode 312 and the second common electrode 712 are located in the same pixel unit area 31.

[0058] The spacing structure 800 includes a first sub-spacing structure 810 and a second sub-spacing structure 820, wherein the first sub-spacing structure 810 and the second sub-spacing structure 820 are both arranged on the transistor driving module layer 200 and are located between the first pixel electrode 311 and the second pixel electrode 312, and the first sub-spacing structure 810 is located on the side of the second sub-spacing structure 820 away from the second pixel electrode 312, and the second sub-spacing structure 820 is located on the side of the first sub-spacing structure 810 away from the first pixel electrode 311; the first sub-spacing structure 810 is connected to the first common electrode 711, and the second sub-spacing structure 820 is connected to the second pixel electrode 312.

[0059] In this embodiment, the first sub-spacer structure 810 is connected to the first common electrode 711, and the second sub-spacer structure 820 is connected to the second pixel electrode 312, and there is an overlapping area between the first sub-spacer structure 810 and the second sub-spacer structure 820, thereby increasing the overlapping area between the pixel electrode 310 and the common electrode 710, thereby increasing the storage capacitance, so that the display time of the electronic paper display panel 30 can be maintained and the picture update speed can be improved.

[0060] Embodiment 4: Fig.10 is a schematic diagram of a spacing structure of the fourth embodiment of the present application, such as Fig.10 As shown, different from the third embodiment, in this embodiment, the first sub-spacer structure 810 connected to the first pixel electrode 311 and the second sub-spacer structure 820 connected to the first common electrode 711 are closer.

[0061] The transistor driving module layer 200 includes a common electrode layer 700, and the common electrode layer 700 includes a plurality of common electrodes 710, and the plurality of common electrodes 710 are respectively located in the pixel unit area 31, and two adjacent common electrodes 710 are defined as a first common electrode 711 and a second common electrode 712; two adjacent pixel electrodes 310 are defined as a first pixel electrode 311 and a second pixel electrode 312, and the first pixel electrode 311 and the first common electrode 711 are located in the same pixel unit area 31, and the second pixel electrode 312 and the second common electrode 712 are located in the same pixel unit area 31; The spacing structure 800 includes a first sub-spacing structure 810 and a second sub-spacing structure 820, wherein the first sub-spacing structure 810 and the second sub-spacing structure 820 are both arranged on the transistor driving module layer 200 and are located between the first pixel electrode 311 and the second pixel electrode 312, and the first sub-spacing structure 810 is located on the side of the second sub-spacing structure 820 away from the second pixel electrode 312, and the second sub-spacing structure 820 is located on the side of the first sub-spacing structure 810 away from the first pixel electrode 311; the first sub-spacing structure 810 is connected to the first pixel electrode 311, and the second sub-spacing structure 820 is connected to the first common electrode 711.

[0062] Compared with the solution of the third embodiment, the distance between the first sub-spacer structure 810 connected to the first pixel electrode 311 and the second sub-spacer structure 820 connected to the first common electrode 711 in the solution of this embodiment is closer, so the generated storage capacitance is larger.

[0063] Moreover, the first sub-spacer structure 810 and the second sub-spacer structure 820 are not on both sides of the same pixel electrode 310 . The electric field generated between the first sub-spacer structure 810 and the second sub-spacer structure 820 will not affect the microcapsules 410 above the pixel electrode 310 .

[0064] Fig.11 is a schematic flow chart of a method for preparing an electronic paper display panel according to an embodiment of the present application, Fig.12 is a schematic diagram of a process for preparing an electronic paper display panel according to an embodiment of the present application, Figure 11-Figure 12 As shown, the present application also discloses a method for preparing an electronic paper display panel 30, wherein the method for preparing an electronic paper display panel 30 is used to prepare the electronic paper display panel 30, and the steps include: S1: forming a transistor driving module layer on a first substrate; S2: forming a pixel electrode layer and a spacing structure on the transistor driving module layer; S3: forming a capsule reflective layer on the pixel electrode layer; S4: forming the common electrode layer on the capsule reflective layer to form the electronic paper display panel.

[0065] The step S4 of forming the common electrode layer on the capsule reflective layer to form the electronic paper display panel includes: S41: forming a common electrode layer on the second substrate; S42: Laminating the second substrate provided with the common electrode layer on the capsule reflective layer to form the electronic paper display panel; The sidewall of the spacing structure 800 abuts against the microcapsule 410 to inhibit the movement of the microcapsule 410 . The material of the spacing structure 800 is the same as that of the pixel electrode layer 300 , and the height of the spacing structure 800 is greater than the height of the pixel electrode layer 300 .

[0066] The spacing structure 800 and the pixel electrode layer 300 may both be made of metal materials such as Al, Cu, Ag, etc.

[0067] Compared with the existing electronic paper display panel, the electronic paper display panel 30 of the present application adds a spacing structure 800, which abuts against the microcapsule 410 to inhibit the movement of the microcapsule 410. In this way, when the electronic paper display panel 30 is bent and displayed, there will be no problem of brightness reduction in the bent area.

[0068] Moreover, the spacing structure 800 of the present application is made of the same material as the pixel electrode layer 300 , so the spacing structure 800 and the pixel electrode layer 300 can be manufactured using the same process, thereby reducing the number of manufacturing steps and improving production efficiency.

[0069] Fig.13 is a schematic flow chart of a method for preparing a pixel electrode layer and a spacing structure according to an embodiment of the present application. Fig.14 is a process diagram of a method for preparing a pixel electrode layer and a spacing structure according to an embodiment of the present application, combined with Figure 13-14 As shown, S2: the step of forming a pixel electrode layer and a spacing structure on the transistor driving module layer includes: S211: forming a metal layer on the transistor driving module layer; S212: After coating photoresist on the metal layer, a composite mask is arranged, wherein the position of the composite mask corresponding to the pixel electrode is a first mask structure, and the position of the composite mask corresponding to the spacing structure is a second mask structure; S213: removing the remaining photoresist and etching the metal layer, and removing the remaining photoresist again to form a pixel electrode layer and a spacing structure.

[0070] The exemplary photoresist is a positive photoresist, and the light opacity of the first mask structure 941 of the composite mask 940 is 100%; the light opacity of the second mask structure 942 of the composite mask 940 is 50%-70%.

[0071] Since the spacing structure 800 and the pixel electrode layer 300 are made of the same material, a third metal layer 930 is formed on the transistor driving module layer 200 and the third metal layer 930 is photolithographically prepared by the same process, thereby reducing the process steps and improving production efficiency.

[0072] Exemplarily, S2: the step of forming a pixel electrode layer and a spacing structure on the transistor driving module layer includes: S221: forming a metal layer on the transistor driving module layer; S222: After coating photoresist on the metal layer, a mask is arranged, and the mask covers the upper part of the spacer structure; S223: washing away the photoresist and etching the metal layer, etching the metal layer to the same height as the pixel electrode layer; S224: After coating photoresist on the etched metal layer, a mask is arranged, wherein the mask covers the upper part of the pixel electrode; S225: Wash away the photoresist and etch to form pixel electrodes and spacing structures.

[0073] As an example, after the pixel electrode 310 is prepared, the spacing structure is prepared, and the pixel electrode 310 may be retained under the spacing structure, or the pixel electrode 310 may not be retained.

[0074] Fig.15 is a schematic flow chart of a method for preparing a transistor driving module layer according to an embodiment of the present application. Fig.16 is a process diagram of a method for preparing a transistor driving module layer according to an embodiment of the present application, combined with Figure 15-16 As shown, S1: the step of forming a transistor driving module layer on a first substrate comprises: S12: forming a first metal layer on the first substrate; S13: forming a first insulating layer on the first metal layer; S14: forming a second metal layer on the first insulating layer, and patterning the second metal layer to form a plurality of common electrodes to form a common electrode layer; S15: forming a second insulating layer on the second metal layer; S16: forming a passivation layer on the second insulating layer; S17: Opening connecting vias on the passivation layer and the second insulating layer; In which, the electronic paper display panel 30 includes multiple pixel unit areas 31, defining two adjacent common electrodes 710 as a first common electrode 711 and a second common electrode 712, defining two adjacent pixel electrodes 310 as a first pixel electrode 311 and a second pixel electrode 312, the first pixel electrode 311 and the first common electrode 711 are located in the same pixel unit area 31, and the second pixel electrode 312 and the second common electrode 712 are located in the same pixel unit area 31.

[0075] The spacing structure 800 includes a first sub-spacing structure 810 and a second sub-spacing structure 820, wherein the first sub-spacing structure 810 and the second sub-spacing structure 820 are both arranged on the transistor driving module layer 200 and are located between the first pixel electrode 311 and the second pixel electrode 312, and the first sub-spacing structure 810 is located on the side of the second sub-spacing structure 820 away from the second pixel electrode 312, and the second sub-spacing structure 820 is located on the side of the first sub-spacing structure 810 away from the first pixel electrode 311; the first sub-spacing structure 810 is connected to the first pixel electrode 311, and the connecting via 910 is used to connect the second sub-spacing structure 820 to the first common electrode 711.

[0076] The pixel electrode 310 needs to be connected to the drain of the active switch 260 through the pixel via 920 , so the connection via 910 can be opened at the same time as the pixel via 920 is opened.

[0077] It should be noted that the limitations on the various steps involved in this solution, without affecting the implementation of the specific solution, are not deemed to limit the order of the steps. The steps written in front can be executed first, or later, or even simultaneously. As long as this solution can be implemented, it should be deemed to fall within the scope of protection of this application.

[0078] It should be noted that the inventive concept of the present application can form a large number of embodiments, but the length of the application document is limited and it is impossible to list them one by one. Therefore, under the premise of no conflict, the embodiments or technical features described above can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effects will be enhanced.

[0079] The above content is a further detailed description of the present application in combination with specific optional implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be deemed to fall within the scope of protection of the present application.

Claims

1. An electronic paper display panel, characterized in that: The electronic paper display panel includes a first substrate, a transistor driving module layer, a pixel electrode layer, a capsule reflection layer and a common electrode layer. The transistor driving module layer and the pixel electrode layer are sequentially arranged on the first substrate, the capsule reflection layer is arranged on the side of the pixel electrode layer away from the first substrate, the common electrode layer is arranged on the side of the capsule reflection layer away from the pixel electrode layer, and the capsule reflection layer includes a plurality of microcapsules; the electronic paper display panel also includes a spacing structure, the spacing structure is arranged on the transistor driving module layer, the side wall of the spacing structure abuts against the microcapsules to inhibit the movement of the microcapsules, the material of the spacing structure is the same as that of the pixel electrode layer, and the height of the spacing structure is greater than the height of the pixel electrode layer.

2. The electronic paper display panel according to claim 1, characterized in that: The electronic paper display panel includes a plurality of pixel unit regions, the pixel electrode layer includes a plurality of pixel electrodes, and the plurality of pixel electrodes are respectively located in the pixel unit regions; A gap is arranged between two adjacent pixel electrodes, the spacing structure is located in the gap, and the spacing structure is arranged between every two adjacent pixel electrodes.

3. The electronic paper display panel according to claim 2, characterized in that: The two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the spacing structure includes a first sub-spacing structure and a second sub-spacing structure, the first sub-spacing structure and the second sub-spacing structure are both arranged on the transistor driving module layer and are located between the first pixel electrode and the second pixel electrode, and the first sub-spacing structure is located on the side of the second sub-spacing structure away from the second pixel electrode, and the second sub-spacing structure is located on the side of the first sub-spacing structure away from the first pixel electrode; the first sub-spacing structure is connected to the first pixel electrode, and the second sub-spacing structure is connected to the second pixel electrode.

4. The electronic paper display panel according to claim 2, characterized in that: The transistor driving module layer includes a common electrode layer, the common electrode layer includes a plurality of common electrodes, the plurality of common electrodes are respectively located in the pixel unit area, and two adjacent common electrodes are defined as a first common electrode and a second common electrode; two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit area, and the second pixel electrode and the second common electrode are located in the same pixel unit area; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first common electrode, and the second sub-spacer structure is connected to the second common electrode.

5. The electronic paper display panel according to claim 2, characterized in that: The transistor driving module layer includes a common electrode layer, the common electrode layer includes a plurality of common electrodes, the plurality of common electrodes are respectively located in the pixel unit area, and two adjacent common electrodes are defined as a first common electrode and a second common electrode; two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit area, and the second pixel electrode and the second common electrode are located in the same pixel unit area; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first common electrode, and the second sub-spacer structure is connected to the second pixel electrode.

6. The electronic paper display panel according to claim 2, characterized in that: The transistor driving module layer includes a common electrode layer, the common electrode layer includes a plurality of common electrodes, the plurality of common electrodes are respectively located in the pixel unit area, and two adjacent common electrodes are defined as a first common electrode and a second common electrode; two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit area, and the second pixel electrode and the second common electrode are located in the same pixel unit area; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first pixel electrode, and the second sub-spacer structure is connected to the first common electrode.

7. A method for preparing an electronic paper display panel, characterized in that: The method for preparing the electronic paper display panel is used to prepare the electronic paper display panel according to any one of claims 1 to 6, and the steps include: forming a transistor driving module layer on the first substrate; forming a pixel electrode layer and a spacing structure on the transistor driving module layer; forming a capsule reflective layer on the pixel electrode layer; forming the common electrode layer on the capsule reflective layer to form the electronic paper display panel; The sidewall of the spacing structure abuts against the microcapsule to inhibit the movement of the microcapsule. The material of the spacing structure is the same as that of the pixel electrode layer, and the height of the spacing structure is greater than the height of the pixel electrode layer.

8. The method for preparing an electronic paper display panel according to claim 7, characterized in that: The step of forming a pixel electrode layer and a spacing structure on the transistor driving module layer comprises: forming a metal layer on the transistor driving module layer; After coating the photoresist on the metal layer, a composite mask is arranged, wherein the position of the composite mask corresponding to the pixel electrode is a first mask structure, and the position of the composite mask corresponding to the spacing structure is a second mask structure; The remaining photoresist is removed and the metal layer is etched, and the remaining photoresist is removed again to form a pixel electrode layer and a spacing structure.

9. The method for preparing an electronic paper display panel according to claim 8, characterized in that: The step of forming a transistor driving module layer on the first substrate includes: forming a first metal layer on a first substrate; forming a first insulating layer on the first metal layer; forming a second metal layer on the first insulating layer, and patterning the second metal layer to form a plurality of common electrodes to form a common electrode layer; forming a second insulating layer on the second metal layer; forming a passivation layer on the second insulating layer; Opening connecting vias on the passivation layer and the second insulating layer; Wherein, the electronic paper display panel includes a plurality of pixel unit regions, two adjacent common electrodes are defined as a first common electrode and a second common electrode, two adjacent pixel electrodes are defined as a first pixel electrode and a second pixel electrode, the first pixel electrode and the first common electrode are located in the same pixel unit region, and the second pixel electrode and the second common electrode are located in the same pixel unit region; The spacing structure includes a first sub-spacer structure and a second sub-spacer structure, the first sub-spacer structure and the second sub-spacer structure are both arranged on the transistor driving module layer and located between the first pixel electrode and the second pixel electrode, and the first sub-spacer structure is located on the side of the second sub-spacer structure away from the second pixel electrode, and the second sub-spacer structure is located on the side of the first sub-spacer structure away from the first pixel electrode; the first sub-spacer structure is connected to the first pixel electrode, and the connecting via is used to connect the second sub-spacer structure to the first common electrode.

10. A display device, characterized in that: The display device comprises a driving circuit and the electronic paper display panel according to any one of claims 1 to 6, wherein the driving circuit drives the electronic paper display panel to display a picture.

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