Dual-redundancy rotating speed data processing method, system, equipment and medium

Abstract

The invention belongs to the field of computer data processing, and discloses a dual-redundancy rotating speed data processing method, system and device and a medium, and the method comprises the steps: collecting rotating speed signals and open circuit state signals of two paths of rotating speeds which are mutually redundant in a current sampling period; performing fault judgment on the rotating speed signal and the open circuit state signal of each path of rotating speed according to a fault judgment condition set to obtain a fault result of each path of rotating speed; voting fault results of the two paths of rotating speeds, and outputting the rotating speed of the current sampling period; and calculating the final rotating speed of the current sampling period according to the rotating speed of the current sampling period, the filtering window length of the previous sampling period and the filtering data set. According to the method, instantaneous abnormal data can be eliminated through the filtering window with the adjustable length, the final filtering result can be updated in time after data recovery, and the accuracy of the final rotating speed of the current sampling period is ensured.

Description

Technical Field

[0001] The present invention belongs to the field of computer data processing, relates to a speed data processing technology, and specifically relates to a dual-redundancy speed data processing method, system, equipment and medium. Background Art

[0002] The rotation speed is one of the core parameters that reflects the system's operating status and working conditions. It plays a vital role in the entire system. Its changing trend can objectively reflect the system's performance degradation. Recording and predictive analysis of the rotation speed at different flight stages can help determine the system's future performance, provide sufficient time and decision-making basis for preventing and troubleshooting, and is of great significance for the effective implementation of the system's condition-based maintenance. As an important indicator of system performance, the rotation speed is a complex, nonlinear, non-stationary time series with random fluctuations. It is the core input parameter of fuel control, anti-surge regulation, fault detection, and data storage, and controls the start-up and operation of the system.

[0003] At present, a dual-redundancy design is usually used to collect speed. Due to the differences in the installation positions of the two speed sensors and the physical characteristics of the sensors themselves, there will be deviations in the values ​​of the two speeds collected at the same time. The traditional processing method is to vote on the two speed data according to the fault detection results of the single speed, and then perform mean filtering on the voting results for a fixed number of times, and finally obtain the speed data processing results and participate in the control calculation. This method is simple and has a low failure rate. However, when a single-channel fault detection requires a delay to be established, the data voting within the delay will still introduce abnormal data into the voting calculation and participate in the digital filtering. In addition, when there are transient abnormal values ​​in the acquisition (including abnormal values ​​of the same speed sensor in different periods or abnormal values ​​of different speed sensors in the same period), the abnormal values ​​cannot be eliminated, resulting in low accuracy of the speed data processing results. Summary of the invention

[0004] In order to solve the technical problem that the influence of the fault detection time on the voting result and the influence of the transient abnormal value on the filtering result in the traditional speed data processing method leads to low accuracy and low reliability of the speed data processing result, the present invention discloses a dual-redundancy speed data processing method, which comprises the following steps:

[0005] S1. Collecting two-way speed signals and open-circuit state signals that are mutually redundant within the current sampling period;

[0006] S2. Performing fault judgment on the speed signal and the open circuit state signal of each speed path according to the fault judgment condition set to obtain a fault result of each speed path;

[0007] S3, vote on the fault results of the two speeds and output the current sampling period speed;

[0008] S4. Calculate the final speed of the current sampling period according to the speed of the current sampling period, the filter window length of the previous sampling period and the filter data set.

[0009] Furthermore, in the above step S2, obtaining the fault result of each speed according to the speed signal and the open circuit state signal of each speed includes:

[0010] S21, setting a fault condition, wherein the fault condition includes a speed fault condition and an open circuit fault condition;

[0011] S22, judging the speed signal of each speed according to the speed fault condition, and obtaining a speed fault result, including a speed fault or a speed no fault; judging the open circuit state signal of each speed according to the open circuit fault condition, and obtaining an open circuit fault result, including an open circuit fault or an open circuit no fault;

[0012] S23. Obtain a fault result of each speed according to the speed fault result and the open circuit fault result, including whether there is a fault or not.

[0013] Furthermore, in the above step S21, the speed fault condition includes detecting instantaneous speed exceeding the limit, continuous speed exceeding the limit, two-way speed difference exceeding the limit and speed value abnormality, the speed abnormality value is the difference between the current speed and the previous speed exceeding the limit, and the open circuit fault condition includes detecting instantaneous open circuit and continuous open circuit.

[0014] The speed fault includes an output transient fault corresponding to the instantaneous exceeding of the speed limit, an output fault corresponding to the continuous exceeding of the speed limit, an excessive deviation fault corresponding to the exceeding of the difference between the two speeds, and an abnormal value fault corresponding to the abnormal speed value.

[0015] The open circuit fault includes an open circuit transient fault corresponding to the instantaneous open circuit and an open circuit fault corresponding to the continuous open circuit.

[0016] Furthermore, in the above step S23, the fault result of each speed is obtained according to the speed fault result and the open circuit fault result, including:

[0017] S231, for each of the two speed paths, when it is detected that any one of the speed paths has a speed fault and / or an open circuit fault, it is determined that there is a fault;

[0018] S232: For the two speeds, when it is detected that both the open circuit has no fault and the speed has no fault, it is determined that there is no fault.

[0019] Furthermore, in the above step S3, the fault results of the two speeds are voted on and the current sampling period speed is output, including:

[0020] S31, when the fault results of the two speeds are both no fault, the average of the speed signals of the two speeds is calculated as the speed of the current sampling period;

[0021] S32, when only one of the two speed fault results is fault-free, the speed signal of the speed without fault is selected as the speed of the current sampling period;

[0022] S33: When the fault results of the two speeds are both faulty, the current sampling period speed is set to invalid.

[0023] Furthermore, in the above step S4, the final speed of the current sampling period is calculated according to the current sampling period speed, the filter window length of the previous sampling period and the filter data set, including:

[0024] S41, calculating the current sampling period filter window length according to the set filter window range, the current sampling period speed and the filter window length of the previous sampling period;

[0025] S42, obtaining a current sampling period filtered data set according to the current sampling period rotation speed and a previous sampling period filtered data set;

[0026] S43, performing a division algorithm on the total filtered data and the current sampling period filter window length to obtain a final rotation speed of the current sampling period.

[0027] Furthermore, in the above step S41, the current sampling period filter window length is calculated according to the set filter window range, the current sampling period speed and the filter window length of the previous sampling period, including:

[0028] S411, when the speed of the current sampling period is the average of the speed signals of the two speeds, or the speed signal of one of the speeds, the filter window length of the previous sampling period is +0 or +1 operated according to the filter window range to obtain the filter window length of the current sampling period;

[0029] S412: When the current sampling period rotation speed is invalid, the filter window length of the previous sampling period is -0 or -1 operated according to the filter window range to obtain the filter window length of the current sampling period.

[0030] Furthermore, in the above step S42, obtaining the current sampling period filtered data set according to the current sampling period rotation speed and the filtered data set of the previous sampling period includes:

[0031] The first filtered data in the filtered data set of the previous sampling period is removed, and the current sampling period speed is added to obtain the filtered data set of the current sampling period.

[0032] The embodiment of the present invention further provides a dual-redundancy speed data processing system, which includes a sampling module, a fault judgment module, a voting module and a dual-redundancy speed calculation module.

[0033] Wherein, the sampling module is used to collect the rotation speed signals and open circuit state signals of two rotation speeds which are complementary to each other in the current sampling period;

[0034] The fault judgment module is used to perform fault judgment on the speed signal and the open circuit state signal of each speed according to the fault judgment condition set, and obtain the fault result of each speed;

[0035] The voting module is used to vote on the fault results of the two speeds and output the current sampling period speed;

[0036] The dual-redundancy speed calculation module is used to calculate the final speed of the current sampling period according to the speed of the current sampling period, the filter window length of the previous sampling period and the filter data set.

[0037] An embodiment of the present invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements any of the above-mentioned dual-redundancy speed data processing methods when executing the computer program, so as to solve the technical problems in traditional speed data processing methods, such as the influence of fault detection time on voting results and the influence of transient abnormal values ​​on filtering results, resulting in low accuracy and low reliability of speed data processing results.

[0038] An embodiment of the present invention also provides a computer-readable storage medium, which stores a computer program for executing any of the above-mentioned dual-redundancy speed data processing methods, so as to solve the technical problems in traditional speed data processing methods, such as the influence of fault detection time on voting results and the influence of transient abnormal values ​​on filtering results, resulting in low accuracy and low reliability of speed data processing results.

[0039] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above-mentioned technical solutions adopted in the embodiments of this specification include at least: the dual-redundancy speed data processing method proposed in the present invention judges the speed signal and the open-circuit state signal at the same time, introduces transient faults and data deviation faults into the voting process through a set of fault judgment conditions, and uses a length-adjustable filter window in the final speed calculation to eliminate instantaneous abnormal data and timely update the final filtering result after data recovery, thereby ensuring the accuracy of the final speed of the current sampling period. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0041] Figure 1 It is a flow chart of the dual-redundancy speed data processing method disclosed in an embodiment of the present invention;

[0042] Figure 2 A logic diagram of a dual-redundancy speed data processing method disclosed in an embodiment of the present invention;

[0043] Figure 3 It is an architecture diagram of a dual-redundancy speed data processing system disclosed in an embodiment of the present invention;

[0044] Figure 4 A schematic diagram of a computer device disclosed in an embodiment of the present invention;

[0045] Among them, 301 is a sampling module; 302 is a fault judgment module; 303 is a voting module; 304 is a dual-redundancy speed calculation module; 401 is a memory; and 402 is a processor. DETAILED DESCRIPTION

[0046] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0047] The following describes the implementation methods of the present application through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and the features of the embodiments can be combined with each other in the absence of conflict. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present application.

[0048] The embodiment of the present invention discloses a dual-redundancy speed data processing method, see Figure 1 and Figure 2 As shown, the method comprises the following steps:

[0049] S1. Collecting two-way speed signals and open-circuit state signals that are mutually redundant within the current sampling period;

[0050] S2. Performing fault judgment on the speed signal and the open circuit state signal of each speed path according to the fault judgment condition set to obtain a fault result of each speed path;

[0051] S3, vote on the fault results of the two speeds and output the current sampling period speed;

[0052] S4. Calculate the final speed of the current sampling period according to the speed of the current sampling period, the filter window length of the previous sampling period and the filter data set.

[0053] Furthermore, in the above step S2, obtaining the fault result of each speed according to the speed signal and the open circuit state signal of each speed includes:

[0054] S21, setting a fault condition, wherein the fault condition includes a speed fault condition and an open circuit fault condition;

[0055] S22, judging the speed signal of each speed according to the speed fault condition, and obtaining a speed fault result, including a speed fault or a speed no fault; judging the open circuit state signal of each speed according to the open circuit fault condition, and obtaining an open circuit fault result, including an open circuit fault or an open circuit no fault;

[0056] S23. Obtain a fault result of each speed according to the speed fault result and the open circuit fault result, including whether there is a fault or not.

[0057] Furthermore, in the above step S21, the speed fault condition includes:

[0058] 1. Detection of instantaneous speed over-limit: When the collected speed exceeds the speed range of [0%, 110%], it is judged as instantaneous speed over-limit;

[0059] 2. Detection of continuous speed over-limit: When the speed exceeds the limit instantaneously, the state lasts for a certain period of time, such as 1 second;

[0060] 3. Detect the difference between the two speeds exceeding the limit: the difference between the two speeds exceeds the set value, such as 5%;

[0061] 4. Detect abnormal speed value, the abnormal speed value is the difference between the current speed and the previous speed exceeds the limit: compare the speed signal collected in the current frame with the speed signal of the previous frame, when the difference between the two exceeds the set value such as 2%.

[0062] Among them, the open circuit fault conditions include detecting a momentary open circuit and detecting a continuous open circuit. The momentary open circuit means that the speed sensor is suddenly open and disconnected and does not work. The continuous open circuit means that the speed sensor is open for a long time and does not work, or it remains in an open circuit state for a period of time such as 1s after the momentary open circuit.

[0063] In the speed fault result, the speed fault includes the output transient fault corresponding to the instantaneous speed exceeding the limit, the output fault corresponding to the continuous speed exceeding the limit, the excessive deviation fault corresponding to the excessive difference between the two speeds, and the abnormal value fault corresponding to the abnormal speed value. The open circuit fault includes the open circuit transient fault corresponding to the instantaneous open circuit and the open circuit fault corresponding to the continuous open circuit. It should be noted that when judging the excessive deviation fault of the speed of channel 1, the difference between the speed of channel 1 and the speed of channel 2 is calculated. When the difference exceeds the set value, the speed of channel 1 is judged to be an excessive deviation fault. Conversely, when judging the excessive deviation fault of the speed of channel 2, the difference between the speed of channel 2 and the speed of channel 1 is calculated. When the difference exceeds the set value, the speed of channel 2 is judged to be an excessive deviation fault.

[0064] Furthermore, in the above step S23, the fault result of each speed is obtained according to the speed fault result and the open circuit fault result, including:

[0065] S231, for each of the two speed paths, when it is detected that any one of the speed paths has a speed fault and / or an open circuit fault, it is determined that there is a fault;

[0066] S232: For the two speeds, when it is detected that both the open circuit has no fault and the speed has no fault, it is determined that there is no fault.

[0067] Furthermore, in the above step S3, the fault results of the two speeds are voted on and the current sampling period speed is output, including:

[0068] S31, when the fault results of the two speeds are both no fault, the average of the speed signals of the two speeds is calculated as the speed of the current sampling period;

[0069] S32, when only one of the two speed fault results is fault-free, the speed signal of the speed without fault is selected as the speed of the current sampling period;

[0070] S33: When the fault results of the two speeds are both faulty, the current sampling period speed is set to invalid.

[0071] Furthermore, in the above step S4, the final speed of the current sampling period is calculated according to the current sampling period speed, the filter window length of the previous sampling period and the filter data set, including:

[0072] S41, calculating the current sampling period filter window length according to the set filter window range, the current sampling period speed and the filter window length of the previous sampling period;

[0073] S42, obtaining a current sampling period filtered data set according to the current sampling period rotation speed and a previous sampling period filtered data set;

[0074] S43, performing a division algorithm on the total filtered data and the current sampling period filter window length to obtain a final rotation speed of the current sampling period.

[0075] Furthermore, in the above step S41, the current sampling period filter window length is calculated according to the set filter window range, the current sampling period speed and the filter window length of the previous sampling period, including:

[0076] S411, when the speed of the current sampling period is the average of the speed signals of the two speeds, or the speed signal of one of the speeds, the filter window length of the previous sampling period is +0 or +1 operated according to the filter window range to obtain the filter window length of the current sampling period;

[0077] S412: When the current sampling period rotation speed is invalid, the filter window length of the previous sampling period is -0 or -1 operated according to the filter window range to obtain the filter window length of the current sampling period.

[0078] In specific implementation, the filter window range can be set to 0 to 3. When calculating the final speed of each sampling cycle, the maximum value of the filter window length of the current sampling cycle of each sampling cycle is 3 and the minimum value is 0. For example, when the filter window length of the previous sampling cycle is 2, it means that there are 2 cycles of valid speed in the previous sampling cycle, and the corresponding filter data set is composed of the speed speed of the 2 cycles and participates in the double redundancy speed calculation of the cycle. When calculating the current sampling cycle, if the data of the current sampling cycle is valid, then the filter window length of the previous cycle is changed to 3 after the +1 operation. If the data of the current sampling cycle is invalid, then the filter window length of the previous cycle is changed to 1 after the -1 operation. When the filter window length of the previous sampling cycle is 3, it means that there are 3 cycles of valid speed in the previous sampling cycle, and the corresponding filter data set is composed of the speed speed of the 3 cycles and participates in the double redundancy speed calculation of the cycle. When calculating the current sampling cycle, if the data of the current sampling cycle is valid, then the filter window length of the previous cycle is changed to 3 after the +0 operation, and if the data of the current sampling cycle is invalid, then the filter window length of the previous cycle is changed to 2 after the -1 operation. On the contrary, when the filter window length of the previous sampling cycle is 0, it means that there are 0 cycles of valid speed in the previous sampling cycle, and the corresponding filter data set is composed of the speed of the 0 cycles and participates in the double redundancy speed calculation of the cycle. When calculating the current sampling cycle, if the data of the current sampling cycle is valid, then the filter window length of the previous cycle is changed to 1 after the +1 operation, and if the data of the current sampling cycle is invalid, then the filter window length of the previous cycle is changed to 0 after the -0 operation.

[0079] When the filter window length of the previous sampling period is 3, it means that there are 3 valid speed periods in the previous sampling period. The corresponding filter data set is composed of the speed of the 3 periods and participates in the double-redundancy speed calculation of the period. When calculating the current sampling period, if the data of the current sampling period is valid, then the filter window length of the previous period is +1. If the data of the current sampling period is invalid, then the filter window length of the previous period is -1 to obtain the filter window length of the current sampling period. It should be noted that the maximum value of the filter window length of the current sampling period cannot exceed the initial length. If the filter window length of the previous period is the initial length

[0080] Furthermore, in the above step S42, obtaining the current sampling period filtered data set according to the current sampling period rotation speed and the filtered data set of the previous sampling period includes:

[0081] The first filtered data in the filtered data set of the previous sampling period is removed, and the current sampling period speed is added to obtain the filtered data set of the current sampling period.

[0082] Furthermore, in the above step S43, the final speed of the current sampling period is calculated by the current sampling period filter window length and the current sampling period filter data set, specifically, the sum of the data in the current sampling period filter data set is calculated, and the final speed is obtained by dividing it by the current sampling period filter window length.

[0083] Based on the same inventive concept, a dual-redundancy speed data processing system is also provided in the embodiments of the present invention, as described in the following embodiments. Since the principle of solving the problem by the dual-redundancy speed data processing system is similar to that of the dual-redundancy speed data processing method, the implementation of the dual-redundancy speed data processing system can refer to the implementation of the dual-redundancy speed data processing method, and the repeated parts will not be repeated. As used below, the term "unit" or "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceived.

[0084] Figure 3 is a structural block diagram of a dual-redundancy speed data processing system disclosed in an embodiment of the present invention, such as Figure 3 As shown, the dual-redundancy speed data processing includes a sampling module 301, a fault judgment module 302, a voting module 303 and a dual-redundancy speed calculation module 304. The structure is described below.

[0085] The sampling module 301 is used to collect two rotational speed signals and open circuit state signals which are mutually redundant within the current sampling period;

[0086] The fault judgment module 302 is used to perform fault judgment on the speed signal and the open circuit state signal of each speed according to the fault judgment condition set, and obtain the fault result of each speed;

[0087] The voting module 303 is used to vote on the fault results of the two speeds and output the current sampling period speed;

[0088] The dual-redundancy speed calculation module 304 is used to calculate the final speed of the current sampling period according to the speed of the current sampling period, the filter window length of the previous sampling period and the filter data set.

[0089] The dual-redundancy speed data processing method proposed in the present invention judges the speed signal and the open-circuit state signal simultaneously, introduces transient faults and data deviation faults into the voting process through a fault judgment condition set, and uses a length-adjustable filter window in the final speed calculation to eliminate transient abnormal data and update the final filtering result in time after data recovery, thereby ensuring the accuracy of the final speed of the current sampling period.

[0090] In this embodiment, a computer device is provided, such as Figure 4 As shown, it includes a memory 401, a processor 402, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, any of the above-mentioned data storage methods is implemented.

[0091] Specifically, the computer device may be a computer terminal, a server or a similar computing device.

[0092] In this embodiment, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program for executing any of the above-mentioned data storage methods.

[0093] Specifically, computer-readable storage media include permanent and non-permanent, removable and non-removable media that can store information by any method or technology. Information can be computer-readable instructions, data structures, program modules or other data. Examples of computer-readable storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable storage media does not include transitory media such as modulated data signals and carrier waves.

[0094] Obviously, those skilled in the art should understand that the modules or steps of the above-mentioned embodiments of the present invention can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, and optionally, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that here, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. In this way, the embodiments of the present invention are not limited to any specific combination of hardware and software.

[0095] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A dual-redundancy speed data processing method, characterized in that: include: In the current sampling period, two rotation speed signals and open circuit state signals which are complementary to each other are collected; Performing fault judgment on the speed signal and the open circuit state signal of each speed path according to the fault judgment condition set to obtain a fault result of each speed path; Vote on the fault results of the two speeds and output the current sampling period speed; The final speed of the current sampling period is calculated according to the speed of the current sampling period, the filter window length of the previous sampling period and the filter data set.

2. The dual-redundancy speed data processing method according to claim 1, characterized in that: Obtaining a fault result of each speed according to the speed signal and the open circuit state signal of each speed, including: Setting a fault condition, wherein the fault condition includes a speed fault condition and an open circuit fault condition; According to the speed fault condition, the speed signal of each speed is judged to obtain a speed fault result, including a speed fault or a speed no fault; according to the open circuit fault condition, the open circuit state signal of each speed is judged to obtain an open circuit fault result, including an open circuit fault or an open circuit no fault; According to the speed fault result and the open circuit fault result, a fault result of each speed is obtained, including whether there is a fault or not.

3. The dual-redundancy speed data processing method according to claim 2, characterized in that: The speed fault condition includes detecting instantaneous speed exceeding the limit, continuous speed exceeding the limit, two-way speed difference exceeding the limit and speed value abnormality, the speed abnormality value is the difference between the current speed and the previous speed exceeding the limit, and the open circuit fault condition includes detecting instantaneous open circuit and continuous open circuit; The speed fault includes an output transient fault corresponding to the instantaneous speed exceeding the limit, an output fault corresponding to the continuous speed exceeding the limit, an excessive deviation fault corresponding to the speed difference exceeding the limit, and an abnormal value fault corresponding to the abnormal speed value; The open circuit fault includes an open circuit transient fault corresponding to the instantaneous open circuit and an open circuit fault corresponding to the continuous open circuit.

4. The dual-redundancy speed data processing method according to claim 2 or 3, characterized in that: According to the speed fault result and the open circuit fault result, a fault result of each speed is obtained, including: For each of the two speed paths, when it is detected that any one of the speed paths has a speed fault and / or an open circuit fault, it is determined that there is a fault; For the two speeds, when it is detected that both the open circuit has no fault and the speed has no fault, it is determined that there is no fault.

5. The dual-redundancy speed data processing method according to claim 1, characterized in that: Vote on the fault results of the two speeds and output the current sampling period speed, including: When the fault results of the two speeds are both no fault, the average of the speed signals of the two speeds is calculated as the speed of the current sampling period; When only one of the two speed fault results is fault-free, the speed signal of the speed without fault is selected as the speed of the current sampling period; When the fault results of the two speeds are both faulty, the current sampling period speed is set to invalid.

6. The dual-redundancy speed data processing method according to claim 1 or 5, characterized in that: Calculating the final speed of the current sampling period according to the current sampling period speed, the filter window length of the previous sampling period and the filter data set, including: Calculate the current sampling period filter window length according to the set filter window range, the current sampling period speed and the filter window length of the previous sampling period; Acquire a current sampling period filtered data set according to the current sampling period rotation speed and a filtered data set of a previous sampling period; The final speed of the current sampling period is calculated by the current sampling period filtering window length and the current sampling period filtering data set.

7. The dual-redundancy speed data processing method according to claim 6, characterized in that: The current sampling period filter window length is calculated according to the set filter window range, the current sampling period speed and the filter window length of the previous sampling period, including: When the speed of the current sampling period is the average of the speed signals of the two speeds, or the speed signal of one of the speeds, the filter window length of the previous sampling period is +0 or +1 operated according to the filter window range to obtain the filter window length of the current sampling period; When the current sampling period speed is invalid, the filter window length of the previous sampling period is -1 operated according to the filter window range to obtain the filter window length of the current sampling period; Obtaining a current sampling period filtered data set according to the current sampling period rotation speed and a previous sampling period filtered data set includes: The first filtered data in the filtered data set of the previous sampling period is removed, and the current sampling period speed is added to obtain the filtered data set of the current sampling period.

8. A dual-redundancy speed data processing system, characterized in that: include: A sampling module, the sampling module is used to collect two rotation speed signals and an open circuit state signal of mutually redundant rotation speeds in a current sampling period; A fault judgment module, the fault judgment module is used to perform fault judgment on the speed signal and the open circuit state signal of each speed according to the fault judgment condition set, and obtain a fault result of each speed; A voting module, which is used to vote on the fault results of the two speeds and output the current sampling period speed; The dual-redundancy speed calculation module is used to calculate the final speed of the current sampling period according to the current sampling period speed, the filter window length of the previous sampling period and the filter data set.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the dual-redundancy speed data processing method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program for executing the dual-redundancy speed data processing method according to any one of claims 1 to 7.

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