Data processing method, circuit, device, and storage medium

Abstract

The application provides a data processing method, circuit, device and storage medium. The method comprises the following steps: receiving first differential data, and performing oversampling processing on the first differential data to obtain a plurality of sampling data; identifying a jump edge in the plurality of sampling data, and determining valid data from the plurality of sampling data according to the jump edge; and outputting the valid data. According to the technical scheme of the application, unstable data at the jump edge can be avoided to the greatest extent, so that the robustness of the differential data is improved to obtain stable valid data for output.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a data processing method, circuit, device and storage medium. Background Technology

[0002] With the development of high-speed interface circuits, the data transmission rate on differential lines is getting faster and faster, making data recovery at the receiving end increasingly important. Because the reference clocks of the transmitting and receiving ends are not from the same source, and because of manufacturing process variations, there is a certain frequency offset between the reference clocks of the transmitting and receiving ends. These factors can cause the receiving end to be unable to reliably recover the correct data. Summary of the Invention

[0003] This invention provides a data processing method, circuit, device, and storage medium to solve the problem that the receiving end cannot reliably recover the correct data.

[0004] In a first aspect, the present invention provides a data processing method, comprising:

[0005] Receive the first differential data and perform oversampling processing on the first differential data to obtain multiple sampled data;

[0006] Identify transition edges in multiple sampled data and determine valid data from multiple sampled data based on transition edges;

[0007] Output valid data.

[0008] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges includes:

[0009] Identify the first sampled data that does not have a transition edge among multiple sampled data;

[0010] From the first sampled data, determine the valid data of the first difference data.

[0011] In some embodiments, determining valid data from the first sampled data includes:

[0012] Identify the second sampled data that has a transition edge among multiple sampled data;

[0013] From the first sampled data, determine the third sampled data that has the opposite phase to the second sampled data;

[0014] The third sampled data is determined as valid data from the first differential data.

[0015] In some embodiments, the method further includes:

[0016] If there is no third sampled data in the first sampled data that has the opposite phase to the second sampled data, then the valid data of the first differential data is determined according to the phase of the valid data of the second differential data; wherein, the second differential data is the data received before the first differential data is received.

[0017] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes:

[0018] If a transition edge exists in multiple sampled data, the effective data of the first differential data is determined based on the phase of the effective data of the second differential data; wherein, the second differential data is the data received before the first differential data.

[0019] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes:

[0020] If there is no transition edge among the multiple sampled data, the valid data of the first differential data is determined based on the phase of the valid data of the second differential data; wherein, the second differential data is the data received before the first differential data.

[0021] In some embodiments, outputting valid data includes:

[0022] When the valid data reaches the preset data volume threshold, the read pointer for reading data is determined based on the difference between the preceding and following transition edges.

[0023] Read valid data according to the read pointer and output the read valid data.

[0024] In a second aspect, the present invention also provides a data processing circuit, comprising: a front-end sampling module, a phase detection module, and a cache module;

[0025] One end of the front-end sampling module receives the first differential data, and the other end is connected to one end of the phase detection module; the other end of the phase detection module is connected to one end of the buffer module.

[0026] The front-end sampling module is used to oversample the first differential data to obtain multiple sampled data; the phase detection module is used to identify the transition edges in the multiple sampled data and determine the valid data from the multiple sampled data based on the transition edges; the cache module is used to temporarily store the valid data.

[0027] Thirdly, the present invention also provides a data processing device, comprising: a processor, a memory, and a communication bus;

[0028] The communication bus is used to enable communication between the processor and memory;

[0029] The processor is used to execute a processing program for processing data stored in memory, so as to implement the data processing method as described in the first aspect.

[0030] Fourthly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the data processing method as described in the first aspect.

[0031] The data processing method, circuit, device, and storage medium provided by this invention, by oversampling the received first differential data to obtain multiple sampled data, increases the sample size, and by identifying the transition edges in the multiple sampled data, determines the valid data from the multiple sampled data based on the transition edges, which can minimize the sampling of unstable data at the transition edges, thereby improving the robustness of the differential data to obtain stable valid data for output. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0033] Figure 1 This is a flowchart illustrating the data processing method provided by the present invention.

[0034] Figure 2 This is an example diagram of multi-phase oversampling provided by the present invention.

[0035] Figure 3 This is an example diagram of identifying transition edges provided by the present invention.

[0036] Figure 4 This is an example diagram of the data processing circuit provided by the present invention.

[0037] Figure 5 This is a schematic diagram of the structure of the data processing device provided by the present invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0039] In this invention, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0040] In this invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0041] In this invention, the terms "first," "second," etc., are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first" and "second" are generally of the same class, without limiting the number of objects; for example, the first object can be one or more.

[0042] The following is combined Figures 1-5 Embodiments of the present invention are described.

[0043] Figure 1 This is a flowchart illustrating the data processing method provided by the present invention, as shown below. Figure 1 As shown, the method includes the following steps 101, 102 and 103.

[0044] Step 101: Receive the first differential data and perform oversampling processing on the first differential data to obtain multiple sampled data.

[0045] Specifically, the data processing method provided by this invention can be used to stabilize data at the receiving end, that is, to improve the robustness of differential data at the receiving end.

[0046] The first differential data can be any differential data arriving at the receiving end. The receiving end can obtain the valid data corresponding to the first differential data through the data processing method provided by the present invention, thereby realizing the correct recovery of the first differential data at the receiving end. It should be noted that the differential data can be image data or video data. The data processing method provided by the present invention can be applied to image data processing, for example, to stably and efficiently recover the data transmitted by the sending end.

[0047] In some embodiments, oversampling can be performed at different phases. For example, a phase-locked loop (PLL) can generate multiple clock signals of different phases that are consistent with the differential line rate, which are then applied to multiple samplers to sample the same differential data. The number of clock signals of different phases is the same as the number of samplers.

[0048] In some embodiments, M first differential data points can be oversampled by N samplers to obtain M sets of sampled data. Each set of sampled data is obtained by oversampling the same differential data point by N samplers, and the multiple sampled data points in step 101 can be these M sets of sampled data. The second differential data points described later also contain M data points. Both the first and second differential data points belong to the same differential signal. This invention processes multiple data points from the same differential signal in parallel, processing a preset number (here, M) of differential data points each time. N is an integer greater than or equal to 2, and M is an integer greater than or equal to 1. M data points can also be referred to as M-bit data.

[0049] In some embodiments, the phases of the multiple clock signals with different phases can be 0°, 1×360° / A, 2×360° / A, ..., (A-1)×360° / A, where A represents the number of clock signals with different phases. For example, four clock signals with different phases can be generated, with phases of 0°, 90°, 180°, and 270°, respectively.

[0050] Figure 2 This is an example diagram of multi-phase oversampling provided by the present invention, such as... Figure 2 As shown, a PLL can generate four clock signals of different phases that match the differential line rate, which are then applied to four groups of samplers to oversample the same differential data. As illustrated, the original 1-bit differential data can be processed into 4-bit sampled data through 4-phase oversampling.

[0051] For example, suppose we oversample 4-bit differential data, which is 0101. After 4-phase oversampling, we can get 16-bit sampled data: 0000111100001111. That is, each data will have 4 identical data, but the phase will change. For example, the first 4 data "0000" in the 16-bit sampled data are different phase data obtained by 4-phase oversampling of the first data "0" in the 4-bit differential data. The first "0" in "0000" corresponds to 0° phase, the second "0" corresponds to 90° phase, the third "0" corresponds to 180° phase, and the fourth "0" corresponds to 270° phase.

[0052] Step 102: Identify the transition edges in multiple sampled data, and determine the valid data from the multiple sampled data based on the transition edges.

[0053] Specifically, a transition edge refers to a change in the bit value of data. For example, a change in level from 0 to 1 or from 1 to 0 indicates a transition edge. A transition edge can be obtained by performing an XOR operation on two adjacent sampled data. When a transition edge is detected, the XOR result is 1.

[0054] Taking the 16-bit sampled data 0000111100001111 mentioned above as an example, assuming that each data in this 16-bit sampled data is represented by K[i], i=0, 1, ..., 15, the first data is represented by k[0], and the last data is represented by K

[15] . If the identified 16-bit sampled data is 0000111100001111, by performing XOR processing on two adjacent sampled data, transition edges will be identified at K[4], K[8] and K

[12] . Whether there is a transition edge at K[0] needs to be determined based on the XOR result of the last bit of the previous round of 16-bit sampled data and K[0].

[0055] Figure 3 This is an example diagram of identifying transition edges provided by the present invention. Figure 3 Taking 16-bit sampled data as an example, K[15:0] represents the current round of 16-bit sampled data, and K-1

[15] represents the last bit of the previous round of 16-bit sampled data. By XORing each pair of adjacent sampled data, 16 XOR results can be obtained, denoted by d[i], where i = 0, 1, ..., 15. These 16 XOR results are 16-bit d[15:0], which can be used to determine the valid data later.

[0056] It can be understood that M first difference data correspond to M valid data. For any first difference data, its corresponding valid data is one of the multiple sampled data obtained by oversampling the first difference data.

[0057] There are various ways to determine valid data, and no specific limitation is made here. The following will provide illustrative examples through several embodiments.

[0058] Step 103: Output the valid data.

[0059] In some embodiments, a caching module (e.g., a caching module with elastic caching characteristics) can be set up to temporarily store valid data. Valid data is only output when the cached data reaches a preset data volume threshold. This ensures that a certain amount of data exists in the cache module before reading, avoiding read-empty situations. Considering that the depth of a typical cache is 32, half the depth, i.e., 16, can be selected as the preset data volume threshold.

[0060] The data processing method provided by this invention obtains multiple sampled data by oversampling the received first differential data. By increasing the sample size of the differential data and identifying the transition edges in the multiple sampled data, the valid data is determined from the multiple sampled data based on the transition edges. This method can minimize the sampling of unstable data at the transition edges, thereby obtaining stable output data and enabling more stable recovery of correct data.

[0061] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges includes:

[0062] Identify the first sampled data that does not have a transition edge among multiple sampled data;

[0063] From the first sampled data, determine the valid data of the first difference data.

[0064] Taking the 16-bit sampled data 0000111100001111 mentioned above as an example, there are transition edges at K[4], K[8] and K

[12] in this 16-bit sampled data. It is assumed that there is no transition edge at K[0] based on the XOR result of the last bit of the previous 16-bit sampled data and K[0]. Therefore, the first sampled data in the 16-bit sampled data that does not have a transition edge includes: K[0], K[1], K[2], K[3], K[5], K[6], K[7], K[9], K

[10] , K

[11] , K

[13] , K

[14] , K

[15] . Valid data can be determined from these sampled data. For example, a valid data can be determined from K[0], K[1], K[2], K[3], a valid data can be determined from K[5], K[6], K[7], a valid data can be determined from K[9], K

[10] , K

[11] , and a valid data can be determined from K

[13] , K

[14] , K

[15] . Finally, four valid data are obtained.

[0065] It should be noted that the determined valid data can be multiple data corresponding to the same phase or multiple data corresponding to different phases. For example, the above four valid data can be K[2], K[6], K

[10] , K

[14] , K[0], K[6], K

[10] , K

[14] , or K[0], K[5], K

[10] , K

[15] . This invention does not limit the specific data.

[0066] Since the sampling data at the location of the transition edge is unstable, identifying the first sampling data without the transition edge among multiple sampling data, and determining the valid data of the first difference data from the first sampling data, is beneficial to recover the correct data more stably.

[0067] In some embodiments, determining valid data from the first sampled data includes:

[0068] Identify the second sampled data that has a transition edge among multiple sampled data;

[0069] From the first sampled data, determine the third sampled data that has the opposite phase to the second sampled data;

[0070] The third sampled data is determined as valid data from the first differential data.

[0071] As mentioned earlier, the identified multiple valid data points can be multiple data points corresponding to the same phase or multiple data points corresponding to different phases. Therefore, the third sampled data can be multiple data points corresponding to the same phase or multiple data points corresponding to different phases.

[0072] In some embodiments, the third sampled data consists of multiple data points corresponding to the same phase, which is different from the phases corresponding to all data points in the second sampled data and is opposite to the phase corresponding to any one of the data points in the second sampled data.

[0073] For example, with Figure 3 Taking the 16 XOR results shown as 16-bit d[15:0] as an example, K[15:0] in the figure is the 16-bit sampled data obtained by performing 4-phase oversampling on 4-bit differential data. Assume that edge_dt0 represents the transition result of 4-bit data under 0° phase sampling, edge_dt1 represents the transition result of 4-bit data under 90° phase sampling, edge_dt2 represents the transition result of 4-bit data under 180° phase sampling, and edge_dt3 represents the transition result of 4-bit data under 270° phase sampling, that is:

[0074] edge_dt0 = d[0] | d[4]| d[8] | d

[12] ;

[0075] edge_dt1 = d[1] | d[5]| d[9] | d

[13] ;

[0076] edge_dt2 = d[2] | d[6]| d

[10] | d

[14] ;

[0077] edge_dt3 = d[3] | d[7]| d

[11] | d

[15] .

[0078] Taking edge_dt1 as an example, if d[1], d[5], d[9], and d

[13] are all 0, that is, there is no transition between K[0] and K[1], K[4] and K[5], K[8] and K[9], and K

[12] and K

[13] , then edge_dt1 is 0; if at least one of d[1], d[5], d[9], and d

[13] is 1, that is, there is at least one transition between K[0] and K[1], K[4] and K[5], K[8] and K[9], and K

[12] and K

[13] , then edge_dt1 is 1.

[0079] Let acc_st[3:0] = {edge_dt3, edge_dt2, edge_dt1, edge_dt0}, that is, acc_st[3:0] is the phase information of the data that jumps in the sampled data obtained by oversampling the 4-bit differential data. The position of 4 valid data can be obtained from the 16 sampled data through the value of acc_st[3:0]. For example, acc_st[3:0] = 4'b0000 means that edge_dt3, edge_dt2, edge_dt1, and edge_dt0 are all 0; acc_st[3:0] = 4'b0001 means that edge_dt3, edge_dt2, and edge_dt1 are 0, and edge_dt0 is 1; acc_st[3:0] = 4'b0010 means that edge_dt3, edge_dt2, and edge_dt0 are 0, and edge_dt1 is 1; acc_st[3:0] = 4'b0100 means that edge_dt3, edge_dt1, and edge_dt0 are 0, and edge_dt2 is 1; 4'b0010 means that edge_dt3, edge_dt2, and edge_dt0 are 0, and edge_dt1 is 1; acc_st[3:0] = 4'b1000 means that edge_dt2, edge_dt1, and edge_dt0 are 0, and edge_dt3 is 1; the meaning of other values ​​of acc_st[3:0] can be deduced in the same way, and will not be elaborated one by one.

[0080] Taking acc_st[3:0] = 4'b0001 as an example, it means that at least one of the 4-bit data under 0° phase sampling has a transition edge. The third sampled data (i.e., the valid data) can be 4-bit data under phase sampling with the opposite phase to 0°, i.e., 4-bit data K[2], K[6], K

[10] , K

[14] under 180° phase sampling.

[0081] For example, acc_st[3:0] = 4'b0011 means that at least one of the 4-bit data under 0° phase sampling has a transition edge, at least one of the 4-bit data under 90° phase sampling has a transition edge, and the third sampled data (i.e. the valid data) can be the 4-bit data under the phase sampling opposite to 0° phase, that is, the 4-bit data K[2], K[6], K

[10] , K

[14] under 180° phase sampling, or it can be the 4-bit data under the phase sampling opposite to 90° phase, that is, the 4-bit data K[3], K[7], K

[11] , K

[15] under 270° phase sampling.

[0082] In some embodiments, the third sampled data may be multiple data corresponding to different phases. Each data (i.e., valid data) can be determined based on the multiple sampled data of different phases corresponding to its respective first differential data. Specifically, the data with the opposite phase to the sampled data with a transition edge can be selected from the multiple sampled data of different phases.

[0083] For example, taking the 4-bit first differential data "0110" as an example, after 4-phase oversampling to obtain 16-bit sampled data 000011111110000, there are transition edges at K[4] and K

[12] in this 16-bit sampled data, and assuming there is a transition edge at K[0], then, for the first valid data, since there is a transition edge at K[0], K[2] which is opposite in phase to K[0] can be selected as valid data; for the second valid data, since there is a transition edge at K[4], K[6] which is opposite in phase to K[4] can be selected as valid data; for the third valid data, since there are no transition edges at K[8]~K

[11] , any one of K[8]~K

[11] can be selected as valid data; for the fourth valid data, since there is a transition edge at K

[12] , K

[14] which is opposite in phase to K

[12] can be selected as valid data.

[0084] Since the data sampled at a 180° angle from the transition edge is the most stable, the above method can better ensure the stability of the effective data.

[0085] In some embodiments, the method further includes:

[0086] If there is no third sampled data in the first sampled data that has the opposite phase to the second sampled data, then the valid data of the first differential data is determined according to the phase of the valid data of the second differential data; wherein, the second differential data is the data received before the first differential data is received.

[0087] It is understandable that if there is no third sampled data in the first sampled data that is out of phase with the second sampled data, it means that it is difficult to obtain the most stable sampled data. In this case, the phase of the effective data of the previous round of differential data can be referenced to obtain relatively stable sampled data.

[0088] For example, acc_st[3:0] = 4'b0101 or 4'b1010. Since the two phases with a bit value of 1 are exactly 180° apart, and the other two phases with a bit value of 0 do not meet the above condition of opposite phases, in this case, the effective data of the first differential data can be determined according to the phase of the effective data of the second differential data. For example, if the phase of the effective data of the second differential data is 90°, then the data corresponding to the 90° phase in the multiple sample data of the first differential data, namely K[1], K[5], K[9], K

[13] , are selected as the effective data; or, if the effective data of the second differential data corresponds to multiple different phases, then the effective data of the first differential data can be determined according to the phase corresponding to the effective data of the second differential data. For example, if the four effective data of the second differential data correspond to the 0°, 0°, 90°, and 180° phases respectively, then the four effective data of the first differential data can be K[0], K[4], K[9], K

[14] .

[0089] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes:

[0090] If a transition edge exists in multiple sampled data, the effective data of the first differential data is determined based on the phase of the effective data of the second differential data; wherein, the second differential data is the data received before the first differential data.

[0091] For example, acc_st[3:0] = 4'b1111. Since all four bit values ​​are 1, in this case, the effective data of the first differential data can be determined according to the phase of the effective data of the second differential data. For example, if the phase of the effective data of the second differential data is 0°, then the data corresponding to the 0° phase among the multiple sample data of the first differential data, namely K[0], K[4], K[8], K

[12] , are selected as the effective data. Alternatively, if the effective data of the second differential data corresponds to multiple different phases, then the effective data of the first differential data can be determined according to the phase corresponding to the effective data of the second differential data. For example, if the four effective data of the second differential data correspond to the 0°, 0°, 90°, and 180° phases respectively, then the four effective data of the first differential data can be K[0], K[4], K[9], K

[14] .

[0092] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes:

[0093] If there is no transition edge among the multiple sampled data, the valid data of the first differential data is determined based on the phase of the valid data of the second differential data; wherein, the second differential data is the data received before the first differential data.

[0094] For example, acc_st[3:0] = 4'b0000. Since there are no transition edges in all sampled data, in this case, the valid data can be selected arbitrarily, or the valid data of the first differential data can be determined according to the phase of the valid data of the second differential data. For example, if the phase of the valid data of the second differential data is 180°, then the data corresponding to the 180° phase in the multiple sampled data of the first differential data, namely K[2], K[6], K

[10] , K

[14] , can be selected as valid data; or, if the valid data of the second differential data corresponds to multiple different phases, then the valid data of the first differential data can be determined according to the phase corresponding to the valid data of the second differential data. For example, if the four valid data of the second differential data correspond to the 0°, 0°, 90°, and 180° phases respectively, then the four valid data of the first differential data can be K[0], K[4], K[9], K

[14] .

[0095] In some embodiments, outputting valid data includes:

[0096] When the valid data reaches the preset data volume threshold, the read pointer for reading data is determined based on the difference between the preceding and following transition edges.

[0097] Read valid data according to the read pointer and output the read valid data.

[0098] This read pointer can be understood as a flag or an identifier for the corresponding position of valid data. Valid data is only output when the amount of valid data reaches a preset threshold, ensuring that a certain amount of data already exists in the cache module before reading, thus avoiding the possibility of reading empty data.

[0099] The difference between the preceding and following transition edges refers to the number of bits between two adjacent transition edges in multiple sampled data. Taking the 16-bit sampled data 0000111100001111 mentioned above as an example, there are transition edges at K[4], K[8] and K

[12] in this 16-bit sampled data. The difference between the preceding and following transition edges corresponding to K[4] and K[8] is 4, and the difference between the preceding and following transition edges corresponding to K[8] and K

[12] is also 4.

[0100] In some implementations, for 4-phase oversampling (other multi-phase oversampling can be deduced similarly and will not be elaborated further), since the phases of the valid data are not necessarily the same, in the process of determining the valid data based on the transition edges, if the difference between the preceding and following transition edges is found to be 3, the read pointer of the elastic buffer can be incremented by 3; if the difference between the preceding and following transition edges is found to be 4, the read pointer of the elastic buffer can be incremented by 4; if the difference between the preceding and following transition edges is found to be 5, the read pointer of the elastic buffer can be incremented by 5; otherwise, the read pointer is kept at +4, and the data position output to the elastic buffer remains unchanged.

[0101] In some embodiments, the read pointer of the elastic cache defaults to +4, and it only starts working after the write pointer value is greater than 16 (the elastic cache depth is 32) to avoid read-empty situations. After a data transfer is completed, both the read and write pointers and the elastic cache are cleared to zero.

[0102] The data processing circuit provided by the present invention is described below. The data processing circuit described below and the data processing method described above can be referred to in correspondence.

[0103] Figure 4 This is an example diagram of the data processing circuit provided by the present invention, such as... Figure 4 As shown, the data processing circuit includes: a front-end sampling module 410, a phase detection module 420, and a buffer module 430; one end of the front-end sampling module 410 receives first differential data, and the other end is connected to one end of the phase detection module 420; the other end of the phase detection module 420 is connected to one end of the buffer module 430; wherein, the front-end sampling module 410 is used to oversample the first differential data to obtain multiple sampled data; the phase detection module 420 is used to identify the transition edges in the multiple sampled data and determine the valid data from the multiple sampled data based on the transition edges; the buffer module 430 is used to temporarily store the valid data.

[0104] In some embodiments, the front-end sampling module 410 generates 0°, 90°, 180°, and 270° clocks consistent with the differential line rate using a PLL. These clocks are applied to four groups of samplers to oversample the same first differential data. That is, the original 1-bit differential input data is oversampled to obtain 4-bit sampled data. To reduce the clock frequency of parallel data transmission, the front-end sampling module can output 16-bit sampled data (i.e., the 4-bit differential input data is oversampled to obtain 16-bit sampled data) and provide it to the phase detection module 420. The phase detection module 420 obtains the 16-bit sampled data from the front-end sampling module 410, identifies the transition edges in the 16-bit sampled data, determines valid data from the 16-bit sampled data based on the transition edges, and outputs it to the buffer module 430. The buffer module 430 temporarily stores the valid data. When the data buffered in the buffer module 430 reaches a preset data volume threshold, the valid data is then output.

[0105] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges includes:

[0106] Identify the first sampled data that does not have a transition edge among multiple sampled data;

[0107] From the first sampled data, determine the valid data of the first difference data.

[0108] In some embodiments, determining valid data from the first sampled data includes:

[0109] Identify the second sampled data that has a transition edge among multiple sampled data;

[0110] From the first sampled data, determine the third sampled data that has the opposite phase to the second sampled data;

[0111] The third sampled data is determined as valid data from the first differential data.

[0112] In some embodiments, the phase detection module 420 determines valid data and further includes:

[0113] If there is no third sampled data in the first sampled data that has the opposite phase to the second sampled data, then the valid data of the first differential data is determined according to the phase of the valid data of the second differential data; wherein, the second differential data is the data received before the first differential data is received.

[0114] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes:

[0115] If a transition edge exists in multiple sampled data, the effective data of the first differential data is determined based on the phase of the effective data of the second differential data; wherein, the second differential data is the data received before the first differential data.

[0116] In some embodiments, identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes:

[0117] If there is no transition edge among the multiple sampled data, the valid data of the first differential data is determined based on the phase of the valid data of the second differential data; wherein, the second differential data is the data received before the first differential data.

[0118] In some embodiments, the caching module 430 is further configured to output valid data, including:

[0119] When the valid data reaches the preset data volume threshold, the read pointer for reading data is determined based on the difference between the preceding and following transition edges.

[0120] Read valid data according to the read pointer and output the read valid data.

[0121] It should be noted that the data processing circuit provided by the present invention can implement all the method steps implemented in the above method embodiments and achieve the same technical effect. Compared with the existing clock and data recovery (CDR) circuit, the data processing circuit has the characteristics of smaller area, lower complexity and higher stability. The parts and beneficial effects that are the same as those in the method embodiments in this embodiment will not be described in detail here.

[0122] Figure 5 This is a schematic diagram of the structure of the data processing device provided by the present invention, as shown below. Figure 5 As shown, the electronic device may include a processor 510, a communications interface 520, a memory 530, and a communication bus 540, wherein the processor 510, the communications interface 520, and the memory 530 communicate with each other through the communication bus 540. The processor 510 can call logical instructions in the memory 530 to execute the aforementioned data processing method.

[0123] Furthermore, the logical instructions in the aforementioned memory 530 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0124] It should be noted that the data processing device provided by the present invention can implement all the method steps implemented in the above method embodiments and can achieve the same technical effect. Therefore, the parts and beneficial effects that are the same as those in the method embodiments will not be described in detail here.

[0125] On the other hand, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to perform the above-described data processing method.

[0126] It should be noted that the computer-readable storage medium provided by the present invention can implement all the method steps implemented in the above method embodiments and can achieve the same technical effect. Therefore, the parts and beneficial effects that are the same as those in the method embodiments will not be described in detail here.

[0127] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0128] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0129] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data processing method, characterized in that, include: Receive the first differential data and perform oversampling processing on the first differential data to obtain multiple sampled data; Identify transition edges in multiple sampled data, and determine valid data from the multiple sampled data based on the transition edges; Output the valid data; The step of identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges includes: Identify the first sampled data among the multiple sampled data that does not have a transition edge; From the first sampled data, determine the valid data of the first differential data; The step of determining the valid data of the first difference data from the first sampled data includes: Identify a second sampled data point among the multiple sampled data points that contains a transition edge; From the first sampled data, determine the third sampled data that has the opposite phase to the second sampled data; The third sampled data is determined as valid data of the first differential data.

2. The data processing method according to claim 1, characterized in that, Also includes: If there is no third sampled data in the first sampled data that has the opposite phase to the second sampled data, then the valid data of the first differential data is determined according to the phase of the valid data of the second differential data; wherein, the second differential data is the data received before the first differential data is received.

3. The data processing method according to claim 1, characterized in that, The step of identifying transition edges in the plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes: If a transition edge exists in all of the multiple sampled data, the effective data of the first differential data is determined based on the phase of the effective data of the second differential data; wherein, the second differential data is the data received before the first differential data.

4. The data processing method according to claim 1, characterized in that, The step of identifying transition edges in the plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges further includes: If there is no transition edge among the plurality of sampled data, the effective data of the first differential data is determined according to the phase of the effective data of the second differential data; wherein, the second differential data is the data received before the first differential data.

5. The data processing method according to claim 1, characterized in that, The output of the valid data includes: When the valid data reaches the preset data volume threshold, the read pointer for reading data is determined based on the difference between the preceding and following transition edges. The valid data is read according to the read pointer, and the read valid data is output.

6. A data processing circuit, characterized in that, include: Front-end sampling module, phase detection module, and caching module; One end of the front-end sampling module receives the first differential data, and the other end is connected to one end of the phase detection module; The other end of the phase detection module is connected to one end of the cache module; The front-end sampling module is used to oversample the first differential data to obtain multiple sampled data; the phase detection module is used to identify the transition edges in the multiple sampled data and determine the valid data from the multiple sampled data based on the transition edges. The caching module is used to temporarily store the valid data; The step of identifying transition edges in a plurality of sampled data and determining valid data from the plurality of sampled data based on the transition edges includes: Identify the first sampled data among the multiple sampled data that does not have a transition edge; From the first sampled data, determine the valid data of the first differential data; The step of determining the valid data of the first difference data from the first sampled data includes: Identify a second sampled data point among the multiple sampled data points that contains a transition edge; From the first sampled data, determine the third sampled data that has the opposite phase to the second sampled data; The third sampled data is determined as valid data of the first differential data.

7. A data processing device, characterized in that, include: Processor, memory, and communication bus; The communication bus is used to realize the connection and communication between the processor and the memory; The processor is used to execute a data processing program stored in the memory to implement the data processing method as described in any one of claims 1-5.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the data processing method as described in any one of claims 1 to 5.

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