Pixel driving circuit, display panel and electronic equipment
By introducing amplitude and pulse width modulation modules into the pixel driving circuit to compensate the threshold voltage of the driving transistor, the problem of poor lighting effect of the pixel driving light emitting element in the prior art is solved, and a better display effect and a simpler circuit structure are achieved.
Patent Information
- Application Number
- CN202510107244.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-23
- Publication Date
- 2025-04-15
AI Technical Summary
The existing pixel driving circuit has poor lighting effects when driving the light-emitting element, which affects the display effect of the display panel.
A pixel driving circuit including an amplitude driving transistor, an amplitude modulation module, a pulse width driving transistor, a pulse width modulation module and a light emitting control module is designed. The driving transistor is compensated by the amplitude modulation module and a pulse width modulation module to accurately control the magnitude and duration of the driving current.
It improves the lighting effect of the pixel driving circuit driving light emitting elements, improves the display effect of the display panel, simplifies the circuit structure, reduces the wiring space, and is suitable for the design needs of high-resolution display panels.
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Figure CN119832842A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and more specifically, to a pixel driving circuit, a display panel and an electronic device. Background Art
[0002] With the development of display technology, the application of display panels is becoming more and more common, and users have more and more requirements for the display quality of display panels. In order to meet the requirements of higher definition, the resolution of display panels is getting higher and higher. And in order to meet the driving requirements of high-resolution display panels, existing display panels generally use a pixel driving circuit that combines pulse amplitude modulation (Pulse Amplitude Modulation, PAM) and pulse width modulation (Pulse Width Modulation, PWM) to control the driving current intensity and the duration of the driving current, thereby controlling the light-emitting state of the light-emitting element. However, the existing pixel driving circuit has a poor effect in driving the light-emitting element to light up, which affects the display effect of the display panel. Summary of the invention
[0003] In view of this, the present application provides a pixel driving circuit, a display panel and an electronic device, which effectively solve the technical problems existing in the prior art, improve the lighting effect of the pixel driving circuit driving the light-emitting element, and improve the display effect of the display panel.
[0004] To achieve the above objectives, the technical solutions provided by this application are as follows:
[0005] A pixel driving circuit, comprising:
[0006] an amplitude driving transistor, wherein the amplitude driving transistor provides a driving current to the light emitting element;
[0007] An amplitude modulation module, the amplitude modulation module is electrically connected to the amplitude driving transistor; the amplitude modulation module is used to compensate for the threshold voltage of the amplitude driving transistor and control the magnitude of the driving current;
[0008] a pulse width driving transistor, the pulse width driving transistor being connected in series with the amplitude driving transistor; the pulse width driving transistor controlling the duration of the driving current provided to the light emitting element based on the duration of its conduction;
[0009] A pulse width modulation module, the pulse width modulation module is electrically connected to the pulse width driving transistor; the pulse width modulation module is used to compensate for the threshold voltage of the pulse width driving transistor and control the conduction time of the pulse width driving transistor;
[0010] A light emitting control module is electrically connected to the amplitude driving transistor and the pulse width driving transistor; the light emitting control module is used to transmit the driving current to the light emitting element, and the light emitting element lights up in response to the driving current.
[0011] Optionally, the amplitude modulation module includes: a first transistor, a second transistor and a first storage capacitor;
[0012] The first end of the first transistor is electrically connected to the second end of the amplitude driving transistor, the second end of the first transistor is electrically connected to the gate of the amplitude driving transistor, and the gate of the first transistor is connected to a first control signal; the first end of the second transistor is connected to a first data voltage, the second end of the second transistor is electrically connected to the first end of the amplitude driving transistor, and the gate of the second transistor is connected to a second control signal;
[0013] The first plate of the first storage capacitor is connected to a reference voltage, and the second plate of the first storage capacitor is electrically connected to the gate of the amplitude driving transistor.
[0014] Optionally, the first transistor is a dual-gate transistor.
[0015] Optionally, the pulse width modulation module includes: a third transistor, a fourth transistor and a second storage capacitor;
[0016] The first end of the third transistor is electrically connected to the second end of the pulse width driving transistor, the second end of the third transistor is electrically connected to the gate of the pulse width driving transistor, and the gate of the third transistor is connected to the third control signal; the first end of the fourth transistor is connected to the second data voltage, the second end of the fourth transistor is electrically connected to the first end of the pulse width driving transistor, and the gate of the fourth transistor is connected to the fourth control signal;
[0017] The first plate of the second storage capacitor is connected to a pulse width modulation voltage, and the second plate of the second storage capacitor is electrically connected to the gate of the pulse width driving transistor.
[0018] Optionally, the third transistor is a dual-gate transistor.
[0019] Optionally, the light emitting control module includes: a fifth transistor and a sixth transistor;
[0020] The first end of the fifth transistor is connected to the anode voltage, the second end of the fifth transistor is electrically connected to the first end of the pulse width driving transistor, the second end of the pulse width driving transistor is electrically connected to the first end of the amplitude driving transistor, the second end of the amplitude driving transistor is electrically connected to the first end of the sixth transistor, the second end of the sixth transistor is electrically connected to the anode of the light-emitting element, and the gate of the fifth transistor and the gate of the sixth transistor are both connected to the light-emitting control signal.
[0021] Optionally, the pixel driving circuit further includes: a first reset module, the first reset module is electrically connected to the gates of the amplitude driving transistor and the pulse width driving transistor, wherein the first reset module is used to reset the gate potentials of the amplitude driving transistor and the pulse width driving transistor.
[0022] Optionally, the first reset module includes: a seventh transistor and an eighth transistor;
[0023] The first end of the seventh transistor is connected to the reset voltage, the second end of the seventh transistor is electrically connected to the first end of the eighth transistor as a first output end, the second end of the eighth transistor is a second output end, the gate of the seventh transistor is connected to a first reset control signal, and the gate of the eighth transistor is connected to a second reset control signal, wherein the first output end is electrically connected to the gate of the pulse width driving transistor, and the second output end is electrically connected to the gate of the amplitude transistor; or, the first output end is electrically connected to the gate of the amplitude transistor, and the second output end is electrically connected to the gate of the pulse width transistor;
[0024] Alternatively, the first end of the seventh transistor is connected to a first reset voltage, the first end of the eighth transistor is connected to a second reset voltage, the second end of the seventh transistor is electrically connected to the gate of the pulse width driving transistor, the second end of the eighth transistor is electrically connected to the gate of the amplitude driving transistor, the gate of the seventh transistor is connected to the first reset control signal, and the gate of the eighth transistor is connected to the second reset control signal.
[0025] Optionally, at least one of the seventh transistor and the eighth transistor is a dual-gate transistor.
[0026] Optionally, the pixel driving circuit further includes: a second reset module, the second reset module is electrically connected to the anode of the light emitting element, wherein the second reset module is used to reset the anode of the light emitting element.
[0027] Optionally, the second reset module includes: a ninth transistor, a first end of the ninth transistor is connected to a third reset voltage, a second end of the ninth transistor is electrically connected to an anode of the light-emitting element, and a gate of the ninth transistor is connected to a third reset control signal.
[0028] Based on the same inventive concept, the present application also provides a display panel, which includes the above-mentioned pixel driving circuit.
[0029] Based on the same inventive concept, the present application also provides an electronic device, which includes the above-mentioned display panel.
[0030] Compared with the prior art, the technical solution provided by this application has at least the following advantages:
[0031] The present application provides a pixel driving circuit, a display panel and an electronic device, wherein the pixel driving circuit comprises: an amplitude driving transistor, the amplitude driving transistor providing a driving current to a light-emitting element; an amplitude modulation module, the amplitude modulation module being electrically connected to the amplitude driving transistor; the amplitude modulation module being used to compensate for a threshold voltage of the amplitude driving transistor and to control the magnitude of the driving current; a pulse width driving transistor, the pulse width driving transistor being connected in series with the amplitude driving transistor; the pulse width driving transistor controlling the duration of the driving current provided to the light-emitting element based on its conduction duration; a pulse width modulation module, the pulse width modulation module being electrically connected to the pulse width driving transistor; the pulse width modulation module being used to compensate for the threshold voltage of the pulse width driving transistor and to control the conduction duration of the pulse width driving transistor; and a light-emitting control module, the light-emitting control module being electrically connected to the amplitude driving transistor and the pulse width driving transistor; the light-emitting control module being used to transmit the driving current to the light-emitting element, and the light-emitting element being lit in response to the driving current.
[0032] It can be seen from the above content that the technical solution provided by the present application, the amplitude modulation module compensates the threshold voltage of the amplitude driving transistor, and the pulse width modulation module compensates the threshold voltage of the pulse width driving transistor, which ensures the high accuracy of the magnitude of the driving current and the duration of the driving current provided to the light-emitting element, and improves the stability of the driving current, thereby improving the lighting effect of the light-emitting element driven by the pixel driving circuit, and improving the display effect of the display panel. In addition, the structure of the pixel driving circuit provided by the present application is simple, and there is no need to add a more complex compensation circuit for the driving transistor, so there is no need to occupy too much wiring space, which is conducive to the design requirements of high-resolution display panels. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0034] Figure 1 A schematic diagram of a circuit structure of a pixel driving circuit provided in an embodiment of the present application;
[0035] Figure 2 A schematic diagram of the circuit structure of another pixel driving circuit provided in an embodiment of the present application;
[0036] Figure 3 A schematic diagram of a circuit structure of another pixel driving circuit provided in an embodiment of the present application;
[0037] Figure 4 A schematic diagram of a circuit structure of another pixel driving circuit provided in an embodiment of the present application;
[0038] Figure 5 A schematic diagram of a circuit structure of another pixel driving circuit provided in an embodiment of the present application;
[0039] Figure 6 A schematic diagram of a circuit structure of another pixel driving circuit provided in an embodiment of the present application;
[0040] Figure 7 A schematic diagram of a circuit structure of another pixel driving circuit provided in an embodiment of the present application;
[0041] Figure 8 A schematic diagram of a circuit structure of another pixel driving circuit provided in an embodiment of the present application;
[0042] Fig. 9 A timing diagram provided for an embodiment of the present application;
[0043] Fig.10 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;
[0044] Fig.11 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0045] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0046] As described in the background technology, with the development of display technology, the application of display panels is becoming more and more common, and users have more and more requirements for the display quality of display panels. In order to meet the requirements of higher definition, the resolution of display panels is getting higher and higher. And in order to meet the driving requirements of high-resolution display panels, existing display panels generally use a pixel driving circuit that combines pulse amplitude modulation and pulse width modulation to control the driving current intensity and the duration of the driving current, thereby controlling the light-emitting state of the light-emitting element. However, the existing pixel driving circuit does not have a threshold voltage compensation function for the driving transistor, so that the accuracy and stability of the driving current output by the pixel driving circuit are poor, thereby affecting the lighting effect of the light-emitting element, and ultimately resulting in a poor display effect of the display panel.
[0047] Based on this, the embodiments of the present application provide a pixel driving circuit, a display panel and an electronic device, which effectively solve the technical problems existing in the prior art, improve the lighting effect of the pixel driving circuit driving the light-emitting element, and improve the display effect of the display panel. To achieve the above purpose, the technical solution provided by the embodiments of the present application is as follows, specifically combined with Figures 1 to 11 The technical solution provided in the embodiments of the present application is described in detail.
[0048] refer to Figure 1As shown, it is a circuit structure diagram of a pixel driving circuit provided by an embodiment of the present application, wherein the pixel driving circuit 10 provided by the embodiment of the present application includes: an amplitude driving transistor Md, wherein the amplitude driving transistor Md provides a driving current to the light-emitting element 20. An amplitude modulation module 110, wherein the amplitude modulation module 110 is electrically connected to the amplitude driving transistor Md, wherein the amplitude modulation module 110 is electrically connected to the first end, the gate, and the second end of the amplitude driving transistor Md, wherein the amplitude modulation module 110 is used to compensate the threshold voltage of the amplitude driving transistor Md, control the threshold voltage of the amplitude driving transistor Md to be compensated to the gate of the amplitude driving transistor Md, and control the magnitude of the driving current based on the voltage of the gate and the first end of the amplitude driving transistor Md. A pulse width driving transistor Mk, wherein the pulse width driving transistor Mk is connected in series with the amplitude driving transistor Md, wherein the second end of the pulse width driving transistor Mk is electrically connected to the first end of the amplitude driving transistor Md, and the pulse width driving transistor Mk controls the duration of the driving current provided to the light-emitting element 20 based on its conduction duration. A pulse width modulation module 120, the pulse width modulation module 120 is electrically connected to the pulse width driving transistor Mk, wherein the pulse width modulation module 120 is electrically connected to the first end, the gate, and the second end of the pulse width driving transistor Mk, the pulse width modulation module 120 is used to compensate the threshold voltage of the pulse width driving transistor Mk, control the threshold voltage of the pulse width driving transistor Mk to compensate to the gate of the pulse width driving transistor Mk, and control the conduction time of the pulse width driving transistor Mk based on the voltage of the gate of the pulse width driving transistor Mk. A light emitting control module 130, the light emitting control module 130 is electrically connected to the amplitude driving transistor Md and the pulse width driving transistor Mk; the light emitting control module 130 is used to transmit the driving current to the light emitting element 20, and the light emitting element 20 lights up in response to the driving current.
[0049] As can be seen from the above content, in the technical solution provided by the embodiment of the present application, the amplitude modulation module 110 compensates the threshold voltage of the amplitude driving transistor Md, and the pulse width modulation module 120 compensates the threshold voltage of the pulse width driving transistor Mk, which ensures that the magnitude of the driving current and the duration of the driving current provided to the light-emitting element 20 are highly accurate, and the stability of the driving current is improved, thereby improving the lighting effect of the light-emitting element 20 driven by the pixel driving circuit 10, and improving the display effect of the display panel. In addition, the pixel driving circuit 10 provided by the embodiment of the present application has a simple structure, and there is no need to add a more complex compensation circuit for the driving transistor, so there is no need to occupy too much wiring space, which is conducive to the design requirements of high-resolution display panels.
[0050] In some embodiments, the pixel driving circuit 10 provided in the embodiment of the present application may further include a reset circuit, such as the reset circuit can reset the gate potential of the amplitude driving transistor Md and the pulse width driving transistor Mk in the reset phase, thereby ensuring that the data voltage of the amplitude driving transistor Md and the pulse width driving transistor Mk is accurately written, thereby improving the performance of the pixel driving circuit 10. Figure 2 As shown, it is a circuit structure schematic diagram of another pixel driving circuit provided in an embodiment of the present application, wherein the pixel driving circuit 10 provided in an embodiment of the present application further includes: a first reset module 141, the first reset module 141 is electrically connected to the gates of the amplitude driving transistor Md and the pulse width driving transistor Mk, wherein the first reset module 141 is used to reset the gate potentials of the amplitude driving transistor Md and the pulse width driving transistor Mk, thereby ensuring that the data voltages of the amplitude driving transistor Md and the pulse width driving transistor Mk are accurately written.
[0051] Furthermore, the reset circuit provided in the embodiment of the present application can also reset the anode of the light emitting element 20 in the reset phase, thereby avoiding the problem of residual charge lighting up the light emitting element 20 outside the light emitting phase. Figure 3 As shown, it is a circuit structure diagram of another pixel driving circuit provided in an embodiment of the present application, wherein the pixel driving circuit 10 provided in an embodiment of the present application further includes: a second reset module 142, the second reset module 142 is electrically connected to the anode of the light-emitting element 20, wherein the second reset module 142 is used to reset the anode of the light-emitting element 20, thereby avoiding the problem of residual charge lighting up the light-emitting element 20 outside the light-emitting stage.
[0052] Continue as Figure 3As shown, the working process of the pixel driving circuit 10 provided in the embodiment of the present application includes a reset stage T1, a first writing and compensation stage T2, a second writing and compensation stage T3 and a light-emitting stage T4 which are performed in sequence. In the reset stage T1, the first reset module 141 and the second reset module 142 work to reset the gate of the amplitude driving transistor Md, the gate of the pulse width driving transistor Mk and the anode of the light-emitting element 20. In the first writing and compensation stage T2, the pulse width modulation module 120 works to control the second data voltage Vdata2 to be written into the pulse width driving transistor Mk, and at the same time compensates the threshold voltage of the pulse width driving transistor Mk to the gate of the pulse width driving transistor Mk. In the second writing and compensation stage T3, the amplitude modulation module 110 works to control the first data voltage Vdata1 to be written into the amplitude driving transistor Md, and at the same time compensates the threshold voltage of the amplitude driving transistor Md to the gate of the amplitude driving transistor Md. In the light-emitting stage T4, the amplitude modulation module 110 controls the magnitude of the driving current based on the voltage between the gate and the first end of the amplitude driving transistor Md, and the pulse width modulation module 120 controls the on-time of the pulse width driving transistor Mk based on the voltage of the gate of the pulse width driving transistor Mk, thereby controlling the duration of the driving current provided to the light-emitting element 20 based on the on-time of the pulse width driving transistor Mk; at the same time, the light-emitting control module 130 transmits the driving current to the anode of the light-emitting element 20, and the light-emitting element 20 lights up in response to the driving current.
[0053] The following is combined with Figures 4 to 8 The specific composition and connection relationship of several pixel driving circuits provided in the embodiments of the present application are described in detail. The amplitude modulation module 110 provided in the embodiments of the present application includes: a first transistor M1, a second transistor M2 and a first storage capacitor C1. The first end of the first transistor M1 is electrically connected to the second end of the amplitude driving transistor Md, the second end of the first transistor M1 is electrically connected to the gate of the amplitude driving transistor Md, and the gate of the first transistor M1 is connected to the first control signal S1; the first end of the second transistor M2 is connected to the first data voltage Vdata1, the second end of the second transistor M2 is electrically connected to the first end of the amplitude driving transistor Md, and the gate of the second transistor M2 is connected to the second control signal S2. The first plate of the first storage capacitor C1 is connected to the reference voltage Vref, and the second plate of the first storage capacitor C1 is electrically connected to the gate of the amplitude driving transistor Md.
[0054] In some embodiments, the first transistor M1 and the second transistor M2 provided in the embodiment of the present application may have the same conduction type, and the first transistor M1 and the second transistor M2 may both be N-type thin film transistors or P-type thin film transistors, thereby facilitating the preparation of the display panel; Figure 4In the pixel driving circuit 10 shown, the first transistor M1 and the second transistor M2 are both P-type thin film transistors. In this case, the first control signal S1 and the second control signal S2 are the same control signal, and the first control signal S1 and the second control signal S2 can be provided by the same control terminal, thereby reducing the number of corresponding control terminals and related circuits. Alternatively, the conduction types of the first transistor M1 and the second transistor M2 provided in the embodiment of the present application can be different, such as Figure 5 In the pixel driving circuit 10 shown, the first transistor M1 can be an N-type thin film transistor, and the second transistor M2 can be a P-type thin film transistor. While the P-type thin film transistor is used to reduce the power consumption of the pixel driving circuit 10, the first transistor M1 is prepared as an N-type thin film transistor to reduce the gate leakage of the amplitude driving transistor Md. At this time, the first control signal S1 and the second control signal S2 are different control signals, and the first control signal S1 and the second control signal S2 are provided by different control terminals.
[0055] like Figure 4 As shown, the pulse width modulation module 120 provided in the embodiment of the present application includes: a third transistor M3, a fourth transistor M4 and a second storage capacitor C2. The first end of the third transistor M3 is electrically connected to the second end of the pulse width driving transistor Mk, the second end of the third transistor M3 is electrically connected to the gate of the pulse width driving transistor Mk, and the gate of the third transistor M3 is connected to the third control signal S3; the first end of the fourth transistor M4 is connected to the second data voltage Vdata2, the second end of the fourth transistor M4 is electrically connected to the first end of the pulse width driving transistor Mk, and the gate of the fourth transistor M4 is connected to the fourth control signal M4. The first plate of the second storage capacitor C2 is connected to the pulse width modulation voltage Sweep, and the second plate of the second storage capacitor C2 is electrically connected to the gate of the pulse width driving transistor Mk, wherein the pulse width modulation voltage Sweep is a linearly changing ramp voltage during the light emitting stage T3.
[0056] In some embodiments, the third transistor M3 and the fourth transistor M4 provided in the embodiment of the present application may have the same conduction type, and the third transistor M3 and the fourth transistor M4 may both be N-type thin film transistors or P-type thin film transistors, thereby facilitating the preparation of the display panel; Figure 4 In the pixel driving circuit 10 shown, the third transistor M3 and the fourth transistor M4 are both P-type thin film transistors. At this time, the third control signal S3 and the fourth control signal S4 are the same control signal, and the third control signal S3 and the fourth control signal S4 can be provided by the same control terminal, thereby reducing the number of corresponding control terminals and related circuits. Alternatively, the conduction types of the third transistor M3 and the fourth transistor M4 provided in the embodiment of the present application can be different, such as Figure 5In the pixel driving circuit 10 shown, the third transistor M3 can be an N-type thin film transistor, and the fourth transistor M4 can be a P-type thin film transistor. While the P-type thin film transistor is used to reduce the power consumption of the pixel driving circuit 10, the third transistor M3 is prepared as an N-type thin film transistor to reduce the gate leakage of the pulse width driving transistor Mk. At this time, the third control signal S3 and the fourth control signal S4 are different control signals, and the third control signal S3 and the fourth control signal S4 are provided by different control terminals.
[0057] like Figure 4 As shown, the light control module 130 provided in the embodiment of the present application includes: a fifth transistor M5 and a sixth transistor M6. The first end of the fifth transistor M5 is connected to the anode voltage PVDD, the second end of the fifth transistor M5 is electrically connected to the first end of the pulse width driving transistor Mk, the second end of the pulse width driving transistor Mk is electrically connected to the first end of the amplitude driving transistor Md, the second end of the amplitude driving transistor Md is electrically connected to the first end of the sixth transistor M6, the second end of the sixth transistor M6 is electrically connected to the anode of the light emitting element 20, the cathode of the light emitting element 20 is connected to the cathode voltage PVEE, and the gate of the fifth transistor M5 and the gate of the sixth transistor M6 are both connected to the light emitting control signal EMIT. The fifth transistor M5 and the sixth transistor M6 provided in the embodiment of the present application have the same conduction type, so as to facilitate the preparation of the display panel, and can reduce the number of corresponding control terminals and related circuits, and ensure that the effective wiring area of the display panel is large.
[0058] like Figure 4 As shown, the first reset module 141 provided in the embodiment of the present application includes: a seventh transistor M7 and an eighth transistor M8. When the conduction types of the pulse width driving transistor Mk and the amplitude driving transistor Md are the same, the first end of the seventh transistor M7 provided in the embodiment of the present application is connected to the reset voltage Vres, the second end of the seventh transistor M7 is electrically connected to the first end of the eighth transistor M8 as a first output end, the second end of the eighth transistor M8 is a second output end, the gate of the seventh transistor M7 is connected to the first reset control signal Sres1, and the gate of the eighth transistor M8 is connected to the second reset control signal Sres2, wherein the first output end is electrically connected to the gate of the pulse width driving transistor Mk, and the second output end is electrically connected to the gate of the amplitude transistor Md.
[0059] It should be noted that the first output terminal provided in the embodiment of the present application may also be electrically connected to the gate of the amplitude transistor Md, and the second output terminal is electrically connected to the gate of the pulse width transistor Mk; specifically, Figure 6As shown, the pulse width driving transistor Mk and the amplitude driving transistor Md provided in the embodiment of the present application have the same conduction type, the first end of the seventh transistor M7 is connected to the reset voltage Vres, the second end of the seventh transistor M7 is electrically connected to the first end of the eighth transistor M8 as a first output end, the second end of the eighth transistor M8 is a second output end, the gate of the seventh transistor M7 is connected to the first reset control signal Sres1, the first output end can also be electrically connected to the gate of the amplitude transistor Md, and the second output end is electrically connected to the gate of the pulse width transistor Mk.
[0060] This application Figure 4 and Figure 6 In the related embodiment of the pixel driving circuit 10 shown, the seventh transistor M7 can be a transistor externally connected to the reset voltage Vres, and the eighth transistor M8 is a transistor for transmitting the reset voltage Vres output by the seventh transistor M7. In some other embodiments, the eighth transistor M8 provided in the embodiment of the present application can also be independently connected to the external voltage; Figure 5 and Figure 7 As shown, the first end of the seventh transistor M7 provided in the embodiment of the present application is connected to the first reset voltage Vres1, the first end of the eighth transistor M8 is connected to the second reset voltage Vres2, the second end of the seventh transistor M7 is electrically connected to the gate of the pulse width driving transistor Mk, the second end of the eighth transistor M8 is electrically connected to the gate of the amplitude driving transistor Md, the gate of the seventh transistor M7 is connected to the first reset control signal Sres1, and the gate of the eighth transistor M8 is connected to the second reset control signal Sres2. Figure 5 As shown, the pulse width driving transistor Mk provided in the embodiment of the present application can be an N-type thin film transistor, and the amplitude driving transistor Md can be a P-type thin film transistor. While the P-type thin film transistor is used to reduce the power consumption of the pixel driving circuit 10, the pulse width driving transistor M7 is prepared as an N-type thin film transistor to improve its turn-off speed, further improve the accuracy and stability of the driving current, and improve the display effect of the display panel. Or as Figure 7 As shown, the conduction types of the pulse width driving transistor Mk and the amplitude driving transistor Md provided in the embodiment of the present application can be the same. For example, the pulse width driving transistor Mk and the amplitude driving transistor Md are both P-type thin film transistors. At this time, the first reset voltage Vres1 and the second reset voltage Vres2 are the same voltage, and the first reset voltage Vres1 and the second reset voltage Vres2 can be provided by the same reset voltage terminal, thereby reducing the number of voltage ports.
[0061] In some embodiments, the seventh transistor M7 and the eighth transistor M8 provided in the embodiment of the present application have the same conduction type, and the seventh transistor M7 and the eighth transistor M8 can both be N-type thin film transistors or P-type thin film transistors, thereby facilitating the preparation of the display panel; Figure 4 and Figure 7 In the pixel driving circuit 10 shown, the seventh transistor M7 and the eighth transistor M8 are both P-type thin film transistors. At this time, the first reset control signal Sres1 and the second reset control signal Sres2 are the same reset control signal. The first reset control signal Sres1 and the second reset control signal Sres2 can be provided by the same reset control terminal, thereby reducing the number of corresponding control terminals and related circuits. Figure 5 and Figure 6 In the pixel driving circuit 10 shown, the seventh transistor M7 and the eighth transistor M8 can both be N-type thin film transistors. In this case, the first reset control signal Sres1 and the second reset control signal Sres2 are the same reset control signal, and the first reset control signal Sres1 and the second reset control signal Sres2 can be provided by the same reset control terminal, thereby reducing the number of corresponding control terminals and related circuits. In some other embodiments, the seventh transistor M7 and the eighth transistor M8 can also be transistors of different conduction types. In this case, the first reset control signal Sres1 and the second reset control signal Sres2 are different reset control signals, and the first reset control signal Sres1 and the second reset control signal Sres2 are provided by different reset control terminals.
[0062] The second reset module 142 provided in the embodiment of the present application includes: a ninth transistor M9, a first end of the ninth transistor M9 is connected to the third reset voltage Vres3, a second end of the ninth transistor M9 is electrically connected to the anode of the light-emitting element 20, and a gate of the ninth transistor M9 is connected to the third reset control signal Sres3. In some embodiments, the third reset voltage Vres3 provided in the embodiment of the present application and the reference voltage Vref connected to the first plate of the first storage capacitor C1 are the same voltage, and can be provided through one voltage terminal, thereby reducing the number of corresponding voltage terminals and related circuits. And, when the conduction types of the ninth transistor M9, the seventh transistor M7 and the eighth transistor M8 provided in the embodiment of the present application are the same, the first reset control signal Sres1, the second reset control signal Sres2 and the third reset control signal Sres3 can be the same reset control signal, and the first reset control signal Sres1, the second reset control signal Sres2 and the third reset control signal Sres3 can be provided by the same reset control signal terminal, further reducing the number of corresponding signal terminals and related circuits.
[0063] In some embodiments, the pixel driving circuit 10 provided in the embodiment of the present application may also optimize the design of some transistors. Figure 8 As shown, at least one of the first transistor M1, the third transistor M3, the seventh transistor M7 and the eighth transistor M8 is a dual-gate transistor. The dual-gate transistor has the advantages of control flexibility, good linear performance, high gain and bandwidth, automatic gain control, strong anti-interference ability and small size. By optimizing the transistor to be a dual-gate transistor, the performance of the pixel driving circuit 10 can be further improved.
[0064] Combination Figures 4 to 8 In the pixel driving circuit 10 shown, the embodiment of the present application does not specifically limit the conduction type of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the pulse width driving transistor Mk and the amplitude driving transistor Md in the pixel driving circuit 10. Any transistor in the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the pulse width driving transistor Mk and the amplitude driving transistor Md can be an N-type transistor or a P-type transistor. Optionally, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the pulse width driving transistor Mk and the amplitude driving transistor Md provided in the embodiment of the present application can all be P-type transistors to reduce the power consumption of the pixel driving circuit 10. Alternatively, the second transistor M2, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the ninth transistor M9 and the amplitude driving transistor Md provided in the embodiment of the present application can all be P-type transistors, and at least one of the first transistor M1, the third transistor M3, the seventh transistor M7, the eighth transistor M8 and the pulse width driving transistor Mk can be an N-type transistor. The first transistor M1, the third transistor M3, the seventh transistor M7 and the eighth transistor M8 are N-type transistors, which can reduce the gate leakage of the pulse width driving transistor Mk and the amplitude driving transistor Md accordingly, and the pulse width driving transistor Mk is an N-type transistor, which can increase its turn-off speed, ensuring the accuracy and stability of the driving current. It should be noted that the pixel driving circuit 10 provided in the embodiment of the present application is not limited to Figures 4 to 8 The circuit composition and connection structure shown in the figure are as follows: Figures 4 to 8 The pixel driving circuits 10 shown are only a few of all the circuits applicable to the present application. In some other embodiments, the pixel driving circuits 10 provided in the embodiments of the present application can also be composed of and connected with other circuits, and the present application does not make any specific restrictions on this.
[0065] Combination Figures 4 to 8 The pixel driving circuit 10 shown in the embodiment of the present application includes a reset stage T1, a first writing and compensation stage T2, a second writing and compensation stage T3 and a light emitting stage T4, which are performed in sequence. In the reset stage T1, the first reset module 141 and the second reset module 142 work to reset the gate of the amplitude driving transistor Md, the gate of the pulse width driving transistor Mk and the anode of the light emitting element 20; that is, the seventh transistor M7, the eighth transistor M8 and the ninth transistor M9 are turned on to reset the gate of the pulse width driving transistor Mk, the gate of the amplitude driving transistor Md and the anode of the light emitting element 20. In the first writing and compensation stage T2, the pulse width modulation module 120 works to control the second data voltage Vdata2 to be written into the pulse width driving transistor Mk, and at the same time, the threshold voltage of the pulse width driving transistor Mk is compensated to the gate of the pulse width driving transistor Mk; that is, the third transistor M3 and the fourth transistor M4 are turned on, the fourth transistor M4 writes the second data voltage Vdata2 into the pulse width driving transistor Mk, and at the same time, the third transistor M3 compensates the threshold voltage of the pulse width driving transistor Mk to the gate of the pulse width driving transistor Mk. In the second writing and compensation stage T3, the amplitude modulation module 110 works to control the first data voltage Vdata1 to be written into the amplitude driving transistor Md, and at the same time, the threshold voltage of the amplitude driving transistor Md is compensated to the gate of the amplitude driving transistor Md; that is, the first transistor M1 and the second transistor M2 are turned on, the second transistor M2 writes the first data voltage Vdata1 into the amplitude driving transistor Md, and at the same time, the first transistor M1 compensates the threshold voltage of the amplitude driving transistor Md to the gate of the amplitude driving transistor Md. In the light-emitting stage T4, the amplitude modulation module 110 controls the magnitude of the driving current based on the voltage between the gate and the first end of the amplitude driving transistor Md, and the pulse width modulation module 120 controls the on-time of the pulse width driving transistor Mk based on the voltage of the gate of the pulse width driving transistor Mk, thereby controlling the duration of the driving current provided to the light-emitting element 20 based on the on-time of the pulse width driving transistor Mk; at the same time, the light-emitting control module 130 transmits the driving current to the anode of the light-emitting element 20, and the light-emitting element 20 lights up in response to the driving current; that is, the magnitude of the driving current is controlled by the potential at the gate of the amplitude driving transistor Md stored in the first storage capacitor C1; and the pulse width modulation voltage Sweep is a linearly changing ramp voltage in the light-emitting stage T3, and controls the on-time of the pulse width driving transistor Mk through the second storage capacitor C2; at this time, the fifth transistor M5 and the sixth transistor M6 are turned on to realize the current path from the anode voltage PVDD to the cathode voltage PVEE, thereby transmitting the driving current to the light-emitting element 20 for lighting.
[0066] Specific combination Figure 4 The pixel driving circuit 10 and Fig. 9 The timing diagram shown in FIG. 1 is used to describe the working process of the pixel driving circuit 10 in more detail. In the reset stage T1, the first reset control signal Sres1, the second reset control signal Sres2 and the third reset control signal Sres3 are low-level control signals, thereby respectively controlling the seventh transistor M7, the eighth transistor M8 and the ninth transistor M9 to be turned on, the reset voltage Vres is transmitted to the gate of the pulse width driving transistor Mk and the amplitude driving transistor Md for reset, and the third reset voltage Vres3 is transmitted to the anode of the light emitting element 20 for reset.
[0067] In the first writing and compensation stage T2, the third control signal S3 and the fourth control signal S4 are low-level control signals, thereby controlling the third transistor M3 and the fourth transistor M4 to be turned on respectively, and the fourth transistor M4 transmits the second data voltage Vdata2 to the first end of the pulse width driving transistor Mk, and after passing through the pulse width driving transistor Mk and the third transistor M3, it is stored by the second storage capacitor C2 to the gate of the pulse width driving transistor Mk. At the same time, the third transistor M3 compensates the threshold voltage of the pulse width driving transistor Mk to the gate of the pulse width driving transistor Mk, so that the voltage at the gate of the pulse width driving transistor Mk is Vdata2+Vthk, and Vthk is the threshold voltage of the pulse width driving transistor Mk.
[0068] In the second writing and compensation stage T3, the first control signal S1 and the second control signal S2 are low-level control signals, thereby controlling the first transistor M1 and the second transistor M2 to be turned on respectively, and the second transistor M2 transmits the first data voltage Vdata1 to the first end of the amplitude driving transistor Md, and after passing through the amplitude driving transistor Md and the first transistor M1, it is stored by the first storage capacitor C1 to the gate of the amplitude driving transistor Md. At the same time, the first transistor M1 compensates the threshold voltage of the amplitude driving transistor Md to the gate of the amplitude driving transistor Md, so that the voltage at the gate of the amplitude driving transistor Md is Vdata1+Vthd, and Vthd is the threshold voltage of the amplitude driving transistor Md.
[0069] In the light-emitting stage T4, the light-emitting control signal EMIT is a low-level control signal, which controls the fifth transistor M5 and the sixth transistor M6 to be turned on, and realizes the current path from the anode voltage PVDD to the cathode voltage PVEE, so as to transmit the driving current to the light-emitting element 20 for lighting. Among them, the potential at the gate of the amplitude driving transistor Md stored in the first storage capacitor C1 controls the conduction of the amplitude driving transistor Md, and controls the magnitude of the driving current; and the pulse width modulation voltage Sweep is a linearly increasing ramp voltage, and the pulse width modulation voltage Sweep controls the conduction time of the pulse width driving transistor Mk through the second storage capacitor C2, until the voltage at the gate of the pulse width driving transistor Mk minus the voltage at the first end of the pulse width driving transistor Mk is greater than the threshold voltage of the driving transistor Mk, the pulse width driving transistor Mk is turned off, and the light-emitting element 20 stops emitting light.
[0070] Based on the same inventive concept, the embodiment of the present application further provides a display panel 100, wherein the display panel 100 includes the pixel driving circuit 10 provided in any one of the above embodiments. Fig.10 As shown, it is a schematic diagram of the structure of a display panel provided in an embodiment of the present application, wherein the display panel 100 provided in an embodiment of the present application includes a plurality of pixel units, the pixel unit is a pixel driving circuit 10 provided in any of the above embodiments, and the pixel driving circuit 10 is electrically connected to at least one light-emitting element 20. In some embodiments, the type of the light-emitting element 20 provided in the embodiment of the present application may be a light-emitting diode (LED), wherein the LED display panel may provide better contrast, response time and energy efficiency. Specifically, the light-emitting element 20 provided in the embodiment of the present application may be Mini-LED. Micro-LED, etc., and this application does not make specific restrictions on this.
[0071] Based on the same inventive concept, the embodiment of the present application also provides an electronic device 1000. Fig.11 , which is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application, wherein the electronic device 1000 provided in an embodiment of the present application includes a display panel provided in any of the above embodiments. In some embodiments, the electronic device 1000 provided in an embodiment of the present application can be a mobile terminal, a notebook, a tablet computer, a computer, a wearable device, a vehicle-mounted display device, etc., and this application does not make any specific restrictions on this.
[0072] In summary, the embodiments of the present application provide a pixel driving circuit, a display panel and an electronic device, wherein the pixel driving circuit includes: an amplitude driving transistor, the amplitude driving transistor providing a driving current to a light-emitting element; an amplitude modulation module, the amplitude modulation module being electrically connected to the amplitude driving transistor; the amplitude modulation module being used to compensate for a threshold voltage of the amplitude driving transistor and to control the magnitude of the driving current; a pulse width driving transistor, the pulse width driving transistor being connected in series with the amplitude driving transistor; the pulse width driving transistor controlling the duration of the driving current provided to the light-emitting element based on its conduction duration; a pulse width modulation module, the pulse width modulation module being electrically connected to the pulse width driving transistor; the pulse width modulation module being used to compensate for the threshold voltage of the pulse width driving transistor and to control the conduction duration of the pulse width driving transistor; a light-emitting control module, the light-emitting control module being electrically connected to the amplitude driving transistor and the pulse width driving transistor; the light-emitting control module being used to transmit the driving current to the light-emitting element, and the light-emitting element lights up in response to the driving current.
[0073] It can be seen from the above content that in the technical solution provided by the embodiment of the present application, the amplitude modulation module compensates the threshold voltage of the amplitude driving transistor, and the pulse width modulation module compensates the threshold voltage of the pulse width driving transistor, which ensures the high accuracy of the magnitude of the driving current and the duration of the driving current provided to the light-emitting element, and improves the stability of the driving current, thereby improving the lighting effect of the light-emitting element driven by the pixel driving circuit and improving the display effect of the display panel. In addition, the pixel driving circuit provided by the embodiment of the present application has a simple structure and does not need to add a more complex compensation circuit for the driving transistor, so it does not need to occupy too much wiring space, which is conducive to the design requirements of high-resolution display panels.
[0074] In the description of the embodiments of the present application, it needs to be understood that the orientation or position relationship indicated by terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.
[0075] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the embodiments of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0076] In the embodiments of the present application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection, an electrical connection, or communication with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0077] In the embodiments of the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.
[0078] In the embodiments of the present application, if the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" appear, it means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradicting each other.
[0079] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.
Claims
1. A pixel driving circuit, characterized in that: include: an amplitude driving transistor, wherein the amplitude driving transistor provides a driving current to the light emitting element; an amplitude modulation module, the amplitude modulation module being electrically connected to the amplitude driving transistor; The amplitude modulation module is used to compensate the threshold voltage of the amplitude driving transistor and control the magnitude of the driving current; A pulse width driving transistor, the pulse width driving transistor being connected in series with the amplitude driving transistor; The pulse width driving transistor controls the duration of the driving current provided to the light emitting element based on the duration of its conduction; A pulse width modulation module, the pulse width modulation module is electrically connected to the pulse width driving transistor; The pulse width modulation module is used to compensate the threshold voltage of the pulse width driving transistor and control the conduction time of the pulse width driving transistor; a light emitting control module, the light emitting control module being electrically connected to the amplitude driving transistor and the pulse width driving transistor; The light emitting control module is used to transmit the driving current to the light emitting element, and the light emitting element lights up in response to the driving current.
2. The pixel driving circuit according to claim 1, characterized in that: The amplitude modulation module includes: a first transistor, a second transistor and a first storage capacitor; The first end of the first transistor is electrically connected to the second end of the amplitude driving transistor, the second end of the first transistor is electrically connected to the gate of the amplitude driving transistor, and the gate of the first transistor is connected to a first control signal; the first end of the second transistor is connected to a first data voltage, the second end of the second transistor is electrically connected to the first end of the amplitude driving transistor, and the gate of the second transistor is connected to a second control signal; The first plate of the first storage capacitor is connected to a reference voltage, and the second plate of the first storage capacitor is electrically connected to the gate of the amplitude driving transistor.
3. The pixel driving circuit according to claim 2, characterized in that: The first transistor is a dual-gate transistor.
4. The pixel driving circuit according to claim 1, characterized in that: The pulse width modulation module includes: a third transistor, a fourth transistor and a second storage capacitor; The first end of the third transistor is electrically connected to the second end of the pulse width driving transistor, the second end of the third transistor is electrically connected to the gate of the pulse width driving transistor, and the gate of the third transistor is connected to the third control signal; the first end of the fourth transistor is connected to the second data voltage, the second end of the fourth transistor is electrically connected to the first end of the pulse width driving transistor, and the gate of the fourth transistor is connected to the fourth control signal; The first plate of the second storage capacitor is connected to a pulse width modulation voltage, and the second plate of the second storage capacitor is electrically connected to the gate of the pulse width driving transistor.
5. The pixel driving circuit according to claim 4, characterized in that: The third transistor is a dual-gate transistor.
6. The pixel driving circuit according to claim 1, characterized in that: The light emitting control module comprises: a fifth transistor and a sixth transistor; The first end of the fifth transistor is connected to the anode voltage, the second end of the fifth transistor is electrically connected to the first end of the pulse width driving transistor, the second end of the pulse width driving transistor is electrically connected to the first end of the amplitude driving transistor, the second end of the amplitude driving transistor is electrically connected to the first end of the sixth transistor, the second end of the sixth transistor is electrically connected to the anode of the light-emitting element, and the gate of the fifth transistor and the gate of the sixth transistor are both connected to the light-emitting control signal.
7. The pixel driving circuit according to claim 1, characterized in that: The pixel driving circuit further includes: a first reset module, which is electrically connected to the gates of the amplitude driving transistor and the pulse width driving transistor, wherein the first reset module is used to reset the gate potentials of the amplitude driving transistor and the pulse width driving transistor.
8. The pixel driving circuit according to claim 7, characterized in that: The first reset module includes: a seventh transistor and an eighth transistor; The first end of the seventh transistor is connected to the reset voltage, the second end of the seventh transistor is electrically connected to the first end of the eighth transistor as a first output end, the second end of the eighth transistor is a second output end, the gate of the seventh transistor is connected to a first reset control signal, and the gate of the eighth transistor is connected to a second reset control signal, wherein the first output end is electrically connected to the gate of the pulse width driving transistor, and the second output end is electrically connected to the gate of the amplitude transistor; or, the first output end is electrically connected to the gate of the amplitude transistor, and the second output end is electrically connected to the gate of the pulse width transistor; Alternatively, the first end of the seventh transistor is connected to a first reset voltage, the first end of the eighth transistor is connected to a second reset voltage, the second end of the seventh transistor is electrically connected to the gate of the pulse width driving transistor, the second end of the eighth transistor is electrically connected to the gate of the amplitude driving transistor, the gate of the seventh transistor is connected to the first reset control signal, and the gate of the eighth transistor is connected to the second reset control signal.
9. The pixel driving circuit according to claim 8, characterized in that: At least one of the seventh transistor and the eighth transistor is a dual-gate transistor.
10. The pixel driving circuit according to claim 1, characterized in that: The pixel driving circuit further includes: a second reset module, the second reset module is electrically connected to the anode of the light emitting element, wherein the second reset module is used to reset the anode of the light emitting element.
11. The pixel driving circuit according to claim 10, characterized in that: The second reset module includes: a ninth transistor, a first end of the ninth transistor is connected to a third reset voltage, a second end of the ninth transistor is electrically connected to an anode of the light emitting element, and a gate of the ninth transistor is connected to a third reset control signal.
12. A display panel, characterized in that: The display panel comprises the pixel driving circuit according to any one of claims 1-11.
13. An electronic device, characterized in that: The electronic device comprises the display panel according to claim 12.
Citation Information
Patent Citations
Display panel and driving method of the display panel
CN113168808A
Pixel circuit, driving method of pixel circuit and display panel
CN116682358A
Pixel circuit with pulse width compensation and operation method thereof
US20240144868A1
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