System and method for single channel fault coding for inverter for electric vehicle

Abstract

A system includes an inverter configured to convert DC power from a battery to AC power to drive a motor, where the inverter includes: a point of use controller configured to: detect a fault; determining a fault type from a detected fault of the n fault types; determining a fault response group to which the determined fault type from the m fault response groups belongs; encoding the determined fault response group; and transmitting the encoded fault response group via the communication interface; and a phase controller configured to: receive an encoded set of fault responses from the point of use controller via the communication interface; determining the fault response group; decoding the determined fault response group; and outputting the decoded fault response group.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. non-provisional patent application No. 18 / 063,381 filed on December 8, 2022, which claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 377,486 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,501 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,512 filed on September 28, 2022, and U.S. Non-Provisional Patent Application No. 63 / 378,601 filed on October 6, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of the present disclosure relate generally to systems and methods for fault encoding and compression using a single channel, and more particularly to techniques for encoding a fault using a fault response group to which the fault type of the fault belongs. Background Art

[0004] Inverters, such as those used to drive motors in electric vehicles, are responsible, for example, for converting high voltage direct current (HVDC) to alternating current (AC) to drive the motor. In inverters, fault reporting is an important aspect of the control of the inverter and the motor. Fault reporting may have a delay between detecting a fault and receiving a command for a desired reaction. Fault reporting may consume a large amount of bandwidth for messaging communications in the inverter.

[0005] The present disclosure is directed to overcoming one or more of these aforementioned challenges. Summary of the invention

[0006] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: a point-of-use controller configured to: detect a fault; determine a fault type of a detected fault from n fault types; determine a fault response group to which the determined fault type belongs from m fault response groups; encode the determined fault response group; and transmit the encoded fault response group via a communication interface; and a phase controller configured to: receive an encoded fault response group from the point-of-use controller via a communication interface; determine a fault response group; decode the determined fault response group; and output the decoded fault response group.

[0007] In some aspects, the techniques described herein relate to a system where m < n, each of the m fault response groups is unique, and the number of the m fault response groups is exactly equal to the number of unique fault responses.

[0008] In some aspects, the techniques described herein relate to a system where the communication interface is a single-channel bi-directional interface.

[0009] In some aspects, the techniques described herein relate to a system where the point-of-use controller is a remotely mounted gate driver integrated circuit in the high-voltage region of the inverter separated from the low-voltage region of the inverter by an electrical isolator, and the phase controller is a control integrated circuit in the high-voltage region of the inverter.

[0010] In some aspects, the techniques described herein relate to a system where the point-of-use controller is further configured to store the fault type, the phase controller is further configured to transmit a request for the stored fault type to the point-of-use controller, and the point-of-use controller is further configured to receive the request for the stored fault type from the phase controller and transmit the stored fault type to the phase controller based on the request.

[0011] In some aspects, the techniques described herein relate to a system where the point-of-use controller is further configured to store first mapping information that maps each of the n fault types to a corresponding fault response group from the m fault response groups; and where the phase controller is further configured to store second mapping information that maps each of the m fault response groups to a decoded fault response group.

[0012] In some aspects, the techniques described herein relate to a system that further includes: a battery configured to supply DC power to the inverter; and a motor configured to receive AC power from the inverter to drive the motor.

[0013] In some aspects, the techniques described herein relate to a method that includes: detecting a fault by a point-of-use controller for an inverter for an electric vehicle; determining, by the point-of-use controller, the fault type of the detected fault from the n fault types; determining, by the point-of-use controller, the fault response group to which the determined fault type belongs from the m fault response groups; encoding, by the point-of-use controller, the determined fault response group; and transmitting, by the point-of-use controller via the communication interface, the encoded fault response group to a phase controller for an inverter for an electric vehicle.

[0014] In some aspects, the techniques described herein relate to a method where m < n.

[0015] In some aspects, the technology described herein relates to a method in which the communication interface is a single channel bidirectional interface.

[0016] In some aspects, the technology described herein relates to a method in which the point-of-use controller is a remotely mounted gate driver integrated circuit and the phase controller is a control integrated circuit.

[0017] In some aspects, the technology described herein relates to a method further comprising storing, by a point-of-use controller, a fault type.

[0018] In some aspects, the technology described herein relates to a method further comprising: receiving, by a point of use controller, a request from a phase controller for a stored fault type; and transmitting, by the point of use controller, the stored fault type to the phase controller based on the request.

[0019] In some aspects, the technology described herein relates to a method, which further includes: storing mapping information by a point-of-use controller, the mapping information mapping each of n fault types to a corresponding fault response group from m fault response groups, wherein determining the fault response group by the point-of-use controller includes determining the fault response group based on the stored mapping information.

[0020] In some aspects, the technology described herein relates to a method for communicating between a point-of-use controller for an inverter for an electric vehicle and a phase controller for the inverter for the electric vehicle, the method comprising: receiving, by the phase controller, an encoded fault response group from the point-of-use controller via a communication interface; determining, by the phase controller, a fault response group from m fault response groups; decoding, by the phase controller, the determined fault response group; and outputting, by the phase controller, the decoded fault response group.

[0021] In some aspects, the technology described herein relates to a method further comprising: transmitting, by a phase controller to a point of use controller, a request for a stored fault type from among n fault types; and receiving, by the phase controller, the stored fault type from the point of use controller.

[0022] In some aspects, the technology described herein relates to a method, wherein m <n。

[0023] In some aspects, the technology described herein relates to a method, further comprising: storing, by a phase controller, mapping information that maps each of m fault response groups to a decoded fault response group; wherein decoding, by the phase controller, the determined fault response group comprises determining the fault response group based on the stored mapping information.

[0024] In some aspects, the technology described herein relates to a method in which a decoded fault response group corresponds to a state of a fault pin for a multi-line communication bus.

[0025] In some aspects, the technology described herein relates to a method further comprising: receiving, by a phase controller, a fault response based on outputting a decoded fault response group; and sending, by the phase controller, the fault response to a point-of-use controller.

[0026] Other objects and advantages of the disclosed embodiments will be described in part in the following description, and in part will be obvious from the description, or can be understood by practicing the disclosed embodiments. The objects and advantages of the disclosed embodiments will be realized and achieved by means of the elements and combinations particularly pointed out in the appended claims.

[0027] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various exemplary embodiments and, together with the description, serve to explain the principles of the disclosed embodiments.

[0029] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter is depicted according to one or more embodiments.

[0030] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 An exemplary system infrastructure of a combined inverter and converter.

[0031] Figure 3 Describes a method for Figure 2 An exemplary system infrastructure for a controller of FIG.

[0032] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure for a point-of-use switching controller.

[0033] Figure 5 Describes a method for Figure 4 An exemplary system infrastructure of an upper power module.

[0034] Figure 6 Depicted is an exemplary system infrastructure for fault encoding and compression using a single channel in accordance with one or more embodiments.

[0035] Figure 7 Depicted are exemplary methods for encoding fault response groups in accordance with one or more embodiments.

[0036] Figure 8 Depicted are exemplary methods for decoding fault response groups in accordance with one or more embodiments.

[0037] Fig. 9 Depicted is an exemplary system infrastructure for fault encoding and compression using a single channel in accordance with one or more embodiments. DETAILED DESCRIPTION

[0038] Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not constrain the claimed features. As used herein, the terms "comprises," "comprising," "has," "having," "includes," "including," or other variations thereof are intended to encompass non-exclusive inclusions such that a process, method, article, or device that includes a series of elements includes not only those elements, but may also include other elements that are not explicitly listed or inherent to such process, method, article, or device. In the present disclosure, unless otherwise stated, relative terms (such as, for example, "about," "substantially," and "approximately") are used to indicate possible ±10% variations in the stated values. In the present disclosure, unless otherwise stated, any numerical value may include possible ±10% variations in the stated values.

[0039] The terms used below may be interpreted in their broadest reasonable manner, although they are being used in conjunction with a detailed description of certain specific examples of the present disclosure. Indeed, certain terms may even be emphasized below; however, any term intended to be interpreted in any constrained manner will be explicitly and specifically defined as such in this detailed description. For example, in the context of the present disclosure, a switching device may be described as a switching element or device, but may refer to any device for controlling power flow in a circuit. For example, a switching element may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT) or a relay, or any combination thereof, but is not limited thereto.

[0040] Various embodiments of the present disclosure relate generally to systems and methods for fault encoding and compression using a single channel, and more particularly to techniques for encoding a fault using a fault response group to which the fault type of the fault belongs.

[0041] Inverters (such as those used to drive motors in electric vehicles) are responsible for converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. A three-phase inverter may include a bridge having six power device switches (e.g., power transistors such as IGBTs or MOSFETs) that are controlled by pulse width modulation (PWM) signals generated by a controller. The inverter may include three half-H-bridge switches to control phase voltages, upper and lower gate drivers to control the switches, a PWM controller, and glue logic between the PWM controller and the gate driver. The PWM controller may generate signals to define the expected state of the system. The gate driver may send signals from the PWM controller to the half-H-bridge switches. The half-H-bridge switches may drive the phase voltages. The inverter may include an isolation barrier between a low voltage plane and a high voltage plane. The signal may be passed from the PWM controller to the half-H-bridge switch by passing through the isolation barrier, which may employ optical, converter-based, or capacitor-based isolation. The PWM signal may be distorted when passing through the glue logic, which may include resistive, capacitive, or other types of filtering. Due to the electrical isolation barrier and other delays within the gate driver, the PWM signal may be distorted when passing through the gate driver. The PWM signal may be distorted when the signal is processed by the half-H switching element via the gate driver output.

[0042] Gate drivers withstand common-mode transients that occur during field effect transistor (FET) switching and when one side of a floating high voltage terminal is shorted to ground or subjected to electrostatic discharge. These voltage transients can cause fast edges that can form common-mode current bursts through electrical isolation. Gate drivers may need to demonstrate common-mode transient immunity (CMTI) in order to be effective and safe.

[0043] The gate driver may have a high voltage domain in common with the voltage plane of the associated FET. Further, the high voltage plane may be supplied by a flyback converter, which may be isolated from the low voltage plane by a transformer. The high voltage domain power supply may be used to provide power to such a circuit that sources and sinks gate current to drive the FET and can detect FET faults, thereby acting on the faults and / or transmitting the faults to the low voltage domain. The gate driver may include an electrical channel dedicated to FET commands, and one or more bidirectional or unidirectional electrical channels dedicated to FET communications.

[0044] High current switching transients can form strong electromagnetic (EM) fields that can couple into nearby metal traces. The magnitude and frequency of the coupled current can depend on the layout of the FET packaging solution and the direction and length of the metal traces between the FET and the control integrated circuit (IC). For example, a typical value for the coupled current can be up to 1A at an AC frequency of up to 100MHz. Typically, within the circuit, the gate driver IC can be placed far enough away from the FET so that the high EM field is not directly coupled into the internal metal traces within the gate driver IC. The gate driver is placed at a distance from the EM field so that the induced current within the circuit is below the level that will cause the gate driver to malfunction, or a metal shield is placed between the gate driver and the source of the EM field to protect the gate driver circuit. The output terminals of the gate driver connected to the FET are exposed to the EM field at a point where the output terminals are no longer covered by the shield. The gate driver switches large currents (e.g., such as 5A to 15A) through these exposed terminals. The large currents switched are usually larger in magnitude than the EM induced current. The gate driver can overdrive the induced current to maintain control of the FET. The gate driver and the high side of the FET may share a common ground and gate control signal trace, both of which may be susceptible to coupled currents.

[0045] The gate driver can turn on low resistance switches to source and sink gate current. Sometimes a series resistor can be added to limit the gate current. The switched gate current can be greater than the coupling current in order to maintain control of their respective FETs.

[0046] The gate driver may be able to sense the FET operating voltage or current in order to provide feedback and react to faults. An overcurrent fault may typically be detected by sensing the FET drain-to-source voltage and comparing the sensed voltage to a reference value. The sensed voltage may be heavily filtered to reject coupled currents. Filtering may slow the response to a fault condition, causing a delay in response. For example, the rate of current increase due to a low resistance short may reach damaging levels before being detected by a heavily filtered drain-to-source voltage detection strategy. The resulting short may damage the FET or the vehicle before being detected and turned off.

[0047] According to one or more embodiments, a FET driver circuit may provide fast overcurrent detection by shunt current sensing, or by diverting a portion of the load current through a parallel FET that may have a current sensing circuit. Utilizing either strategy may require a "point of use IC" in which the sensing circuit is very close to the FET. Even if the point of use IC and the remote controller are resistant to EM fields, the communication between the point of use IC and the remote controller is still susceptible to induced currents. Point of use ICs have been implemented in low EM field applications, such as smart FETs for automotive applications. However, point of use ICs have not yet been used in high EM field applications. High EM fields can be fields that (i) induce a current within the IC that exceeds the operating current of the IC and causes a malfunction, or (ii) induce a differential voltage within the IC that exceeds the operating differential voltage and causes a malfunction. High EM fields can be, for example, fields greater than about 10A or about 100V.

[0048] In an electric vehicle, a point-of-use controller (e.g., a remotely mounted driver integrated circuit) may detect a fault and report the fault to a phase controller (e.g., a control integrated circuit) using a single channel (e.g., a communications interface). The point-of-use controller should report the fault quickly in order to limit the delay between detecting the fault and receiving a command for a desired reaction. In order to minimize the delay, the amount of data that can be transmitted via a single channel for fault messaging may be severely limited. Further, the transmission of fault messaging should not consume a large amount of the bandwidth of a single channel in order to reduce the impact on other messaging transmitted via the single channel. A single channel may be a single wire with only one channel. A single channel may be a single wire with exactly one channel. A single channel may be a single wire with no more than one channel.

[0049] As described above, the transmission of fault messaging between the point of use controller and the phase controller via a single channel may be limited. The point of use controller may be configured to detect faults of several unique fault types. The time and bandwidth consumption required to report faults of a large number of unique fault types may be unacceptable. However, many unique types of faults that can be detected by the point of use controller may require a common fault response.

[0050] In view of the foregoing, one or more embodiments herein may provide a technique for encoding a fault using a fault response group to which the fault type of the fault belongs. For example, the fault may include overcurrent, supply undervoltage, FET gate stuck fully on, FET gate stuck on in saturation, FET gate stuck low, FET gate connection disconnected, FET source sense connection disconnected, overtemperature, overcurrent retry counter expired, invalid message received or reset occurred, and the point of use IC needs to be configured. Each of the fault types belonging to a particular fault group requires the same fault response. For example, the fault types may include (1) the FET is commanded to automatically turn off, and a persistent fault prevents the FET from being turned on until the fault is resolved, (2) the FET is commanded to automatically turn off, and a cycle of command states is required to retry turning the FET back on, and (3) the FET is stuck on in saturation, and turning on the opposite FET may cause uncontrollable overheating and damage to the FET. The fault response may include (1) turning on all three upper phase FETs and turning off all three lower phase FETs, (2) turning on all three lower phase FETs and turning off all three upper phase FETs, and (3) turning off all six FETs. Thus, by reporting an encoded fault response group rather than an encoded fault type, the point of use controller can significantly reduce the amount of data to be transmitted via a single channel. Encoding reduces latency compared to sending limited information to the inverter controller 300 (which requires the inverter controller 300 to read the serial peripheral interface (SPI) of the phase controller to distinguish detailed fault information in order to provide a correct response). Since fault encoding is done in parallel, with all fault pins entering a final state, encoding can be faster than serial data communication. In this way, some embodiments herein can improve fault messaging between integrated circuits of an electric vehicle, reduce latency associated with fault messaging via a single channel, and save bandwidth of a single channel. For example, a fault can be reported within 20 μs, which is much faster than serial data communication. The point of use controller can maintain a history of the exact fault type and fault that caused the encoded fault response group to be sent. After the phase controller has sent the appropriate fault response to the point-of-use controller, the phase controller can request the stored exact fault type from the point-of-use controller. Once the point-of-use controller has received the appropriate fault response to initiate a response, the phase controller can request the stored exact fault type without affecting the quick response of the point-of-use controller. In the context of electric vehicles, this quick reaction time can help the electric vehicle be placed in a safe state in a relatively short time.

[0051] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter according to one or more embodiments is depicted. In the context of the present disclosure, the combined inverter and converter may be referred to as an inverter. Figure 1As shown, the electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include a component for receiving electric power from an external source and outputting electric power to charge the battery 195 of the electric vehicle 100. For example, the inverter 110 may convert DC power from the battery 195 in the electric vehicle 100 into AC power to drive the motor 190 of the electric vehicle 100, but the embodiment is not limited thereto. For example, the inverter 110 may be bidirectional and may convert DC power into AC power, or convert AC power into DC power, such as during regenerative braking. The inverter 110 may be a three-phase inverter, a single-phase inverter, or a multi-phase inverter.

[0052] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 The electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include an inverter controller 300 ( Figure 3 14). The inverter 110 may include a low voltage upper phase controller 120 separated from a high voltage upper phase controller 130 by an electrical isolator 150, and an upper phase power module 140. The upper phase power module 140 may include a point-of-use upper phase controller 142 and an upper phase switch 144. The inverter 110 may include a low voltage lower phase controller 125 separated from a high voltage lower phase controller 135 by an electrical isolator 150, and a lower phase power module 145. The lower phase power module 145 may include a point-of-use lower phase controller 146 and a lower phase switch 148. The upper phase switch 144 and the lower phase switch 148 may be connected to a motor 190 and a battery 195. The electrical isolator 150 may be one or more of optical, converter-based, or capacitor-based isolation. For example, the electrical isolator 150 may be one or more capacitors having a value from about 20 fF to about 100 fF, having a breakdown voltage from about 6 kV to about 12 kV. The electrical isolator 150 may include a pair of capacitors, wherein one capacitor in the pair carries an inverted data signal from the other capacitor in the pair to form a differential signal that is rejected for common mode noise. The electrical isolator 150 may include more than one capacitor in series. The electrical isolator 150 may include one capacitor located on a first IC, or may include a first capacitor located on a first IC and a second capacitor located on a second IC that communicates with the first IC.

[0053] The inverter 110 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 150. The inverter controller 300 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the low voltage upper phase controller 120. The low voltage upper phase controller 120 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the high voltage upper phase controller 130. The low voltage upper phase controller 120 may send a signal to and receive a signal from the low voltage lower phase controller 125. The high voltage upper phase controller 130 may be in the high voltage region of the inverter 110. Therefore, the signal between the low voltage upper phase controller 120 and the high voltage upper phase controller 130 passes through the electrical isolator 150. The high voltage upper phase controller 130 may send signals to and receive signals from a point-of-use upper phase controller 142 in the upper phase power module 140. The point-of-use upper phase controller 142 may send signals to and receive signals from an upper phase switch 144. The upper phase switch 144 may be connected to a motor 190 and a battery 195. For example, the upper phase switch 144 and the lower phase switch 148 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 110 may be similar to the upper phase system described above.

[0054] Figure 3 Describes a method for Figure 2 FIG. 3 is an exemplary system infrastructure of an inverter controller 300 . The inverter controller 300 may include one or more controllers.

[0055] The inverter controller 300 may include a set of instructions that can be executed to cause the inverter controller 300 to perform any one or more of the methods or computer-based functions disclosed herein. The inverter controller 300 may operate as a standalone device, or may be connected to other computer systems or peripheral devices, for example using a network.

[0056] In a networked deployment, the inverter controller 300 can operate in the capacity of a server, or as a client in a server-client user network environment, or as a peer computer system in a peer (or distributed) network environment. The inverter controller 300 can also be implemented as or incorporated into various devices, such as a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile device, a palmtop computer, a laptop computer, a desktop computer, a communication device, a wireless phone, a landline phone, a control system, a camera, a scanner, a fax machine, a printer, a pager, a personal trusted device, a network device, a network router, a switch or bridge, or any other machine capable of executing a set of instructions (sequentially or otherwise) (the set of instructions specifies the actions to be taken by the machine). In a specific implementation, the inverter controller 300 can be implemented using an electronic device that provides voice, video or data communication. Further, although the inverter controller 300 is illustrated as a single system, the term “system” should also be understood to include any collection of systems or subsystems that individually or jointly execute one or more sets of instructions to perform one or more computer functions.

[0057] like Figure 3 As shown, the inverter controller 300 may include a processor 302, such as a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor 302 may be a component in a variety of systems. For example, the processor 302 may be part of a standard inverter. The processor 302 may be one or more general-purpose processors, digital signal processors, application-specific integrated circuits, field programmable gate arrays, servers, networks, digital circuits, analog circuits, combinations thereof, or other devices now known or later developed for analyzing and processing data. The processor 302 may implement a software program, such as a manually generated (i.e., programmed) code.

[0058] The inverter controller 300 may include a memory 304 that can communicate via a bus 308. The memory 304 may be a main memory, a static memory, or a dynamic memory. The memory 304 may include, but is not limited to, computer-readable storage media, such as various types of volatile and non-volatile storage media, including but not limited to random access memory, read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable read-only memory, flash memory, tape or disk, optical media, etc. In one specific implementation, the memory 304 includes a cache or random access memory for the processor 302. In an alternative specific implementation, the memory 304 is separated from the processor 302, such as a cache memory, system memory, or other memory of the processor. The memory 304 may be an external storage device or database for storing data. Examples include a hard drive, a compact disk ("CD"), a digital video disk ("DVD"), a memory card, a memory stick, a floppy disk, a universal serial bus ("USB") storage device, or any other device operable to store data. The memory 304 is operable to store instructions that can be executed by the processor 302. The functions, actions, or tasks illustrated in the figures or described herein may be performed by the processor 302 executing instructions stored in the memory 304. The functions, actions, or tasks are not related to a particular type of instruction set, storage medium, processor, or processing strategy, and may be performed by software, hardware, integrated circuits, firmware, microcode, etc. operating alone or in combination. Likewise, processing strategies may include multi-processing, multi-tasking, parallel processing, etc.

[0059] As shown, the inverter controller 300 may further include a display 310, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a flat panel display, a solid state display, a cathode ray tube (CRT), a projector, a printer, or other display devices known now or later developed for outputting the determined information. The display 310 may serve as an interface for a user to view the operation of the processor 302, or specifically serve as an interface with the software stored in the memory 304 or in the drive unit 306.

[0060] Additionally or alternatively, the inverter controller 300 may include an input device 312 configured to allow a user to interact with any of the components of the inverter controller 300. The input device 312 may be a numeric keypad, a keyboard or a cursor control device (such as a mouse or a joystick), a touch screen display, a remote control, or any other device operable to interact with the inverter controller 300.

[0061] The inverter controller 300 may also or alternatively include a drive unit 306 implemented as a disk or optical drive. The drive unit 306 may include a computer-readable medium 322 in which one or more sets of instructions 324 (e.g., software) may be embedded. Further, the instructions 324 may embody one or more of the methods or logics described herein. The instructions 324 may reside completely or partially within the memory 304 and / or within the processor 302 during execution by the inverter controller 300. The memory 304 and the processor 302 may also include computer-readable media as described above.

[0062] In some systems, the computer-readable medium 322 includes instructions 324 or receives and executes instructions 324 in response to a propagated signal, so that a device connected to the network 370 can transmit voice, video, audio, images, or any other data through the network 370. Further, the instructions 324 can be transmitted or received through the network 370 and / or using the bus 308 via the communication port or interface 320. The communication port or interface 320 can be part of the processor 302 or can be an independent component. The communication port or interface 320 can be formed in software or can be a physical connector in hardware. The communication port or interface 320 can be configured to connect to the network 370, external media, display 310, or any other component in the inverter controller 300, or a combination thereof. The connection to the network 370 can be a physical connection (such as a wired Ethernet connection) or can be established wirelessly, as described below. Similarly, additional connections to other components of the inverter controller 300 can be physical connections or can be established wirelessly. The network 370 can alternatively be directly connected to the bus 308.

[0063] Although the computer-readable medium 322 is shown as a single medium, the term "computer-readable medium" may include a single medium or multiple media (such as a centralized or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" may also include any medium capable of storing, encoding, or carrying a set of instructions for execution by a processor or causing a computer system to perform any one or more of the methods or operations disclosed herein. The computer-readable medium 322 may be non-transitory and may be tangible.

[0064] Computer readable medium 322 may include solid-state memory, such as a memory card or other package that accommodates one or more non-volatile read-only memories. Computer readable medium 322 may be random access memory or other volatile rewritable memory. Additionally or alternatively, computer readable medium 322 may include magneto-optical or optical media, such as a disk or tape or other storage device for capturing carrier signals (such as signals transmitted through a transmission medium). Digital file attachments to emails or other self-contained information archives or archive sets may be considered distribution media as tangible storage media. Therefore, the present disclosure is considered to include any one or more of computer-readable media or distribution media and other equivalents and successor media in which data or instructions may be stored.

[0065] In alternative implementations, dedicated hardware implementations (such as application specific integrated circuits, programmable logic arrays, and other hardware devices) may be constructed to implement one or more of the methods described herein. Applications that may include the apparatus and systems of various implementations may broadly include a variety of electronic and computer systems. One or more implementations described herein may use two or more specific interconnected hardware modules or devices with associated control and data signals that may be transmitted between modules or through modules or as part of an application specific integrated circuit to implement functionality. Thus, the present system encompasses software, firmware, and hardware implementations.

[0066] The inverter controller 300 may be connected to a network 370. The network 370 may define one or more networks, including wired or wireless networks. The wireless network may be a cellular telephone network, an 802.11, 802.16, 802.20, or WiMAX network. Further, such networks may include public networks (such as the Internet), private networks (such as intranets), or combinations thereof and may utilize a variety of networking protocols that are now available or later developed, including but not limited to TCP / IP-based networking protocols. The network 370 may include a wide area network (WAN) (such as the Internet), a local area network (LAN), a campus area network, a metropolitan area network, a direct connection (such as through a universal serial bus (USB) port), or any other network that allows data communication. The network 370 may be configured to couple one computing device to another computing device to enable data communication between devices. The network 370 may generally be enabled to use any form of machine-readable media to transmit information from one device to another. The network 370 may include a communication method by which information can travel between computing devices. The network 370 may be divided into subnetworks. A subnetwork may allow access to all other components connected to it, or a subnetwork may restrict access between components. Network 370 may be considered a public or private network connection and may include, for example, a virtual private network or encryption or other security mechanisms employed over the public Internet.

[0067] According to various implementations of the present disclosure, the methods described herein may be implemented by a software program that can be executed by a computer system. Further, in an exemplary non-limiting implementation, the implementation may include distributed processing, component or object distributed processing, and parallel processing. Alternatively, a virtual computer system process may be constructed to implement one or more of the methods or functionalities described herein.

[0068] Although this specification describes components and functions that can be implemented in a specific implementation with reference to specific standards and protocols, the present disclosure is not limited to such standards and protocols. For example, standards for Internet and other packet-switched network transmissions (e.g., TCP / IP, UDP / IP, HTML, HTTP) represent examples of the prior art. Such standards are periodically replaced by faster or more efficient equivalents having substantially the same functionality. Therefore, alternative standards and protocols having the same or similar functionality as those disclosed herein are considered equivalents thereof.

[0069] It will be appreciated that, in one embodiment, the operations of the methods discussed are performed by an appropriate processor (or processors) of a processing (i.e., computer) system executing instructions (computer readable code) stored in a storage device. It will also be appreciated that the present disclosure is not limited to any particular implementation or programming technique, and that the present disclosure may be implemented using any suitable technique for implementing the functionality described herein. The present disclosure is not limited to any particular programming language or operating system.

[0070] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure of a point-of-use switching controller. For a three-phase inverter, each of the upper phase and the lower phase may include three phases related to phases A, B, and C. For example, the upper phase power module 140 may include an upper phase power module 140A for upper phase A, an upper phase power module 140B for upper phase B, and an upper phase power module 140C for upper phase C. The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switching element 144A. The upper phase power module 140B may include a point-of-use upper phase B controller 142B and an upper phase B switching element 144B. The upper phase power module 140C may include a point-of-use upper phase C controller 142C and an upper phase C switching element 144C. Each of the upper phase A switching member 144A, the upper phase B switching member 144B, and the upper phase C switching member 144C may be connected to the motor 190 and the battery 195 . Figure 4 Details of the upper phase power module 140 are depicted. Although not shown, the lower phase power module 145 may include a similar structure as the upper phase power module 140 for the lower phases A, B, and C.

[0071] Figure 5 Describes a method for Figure 4 Example system infrastructure for the upper power module. For example, Figure 5 Additional details of upper phase power module 140A are provided. Although not shown, upper phase power module 140B, upper phase power module 140C, and corresponding lower phase power modules of lower phase power module 145 may include components similar to Figure 5 The upper phase power module 140A shown in FIG. 1 is similar in structure to the upper phase power module 140A shown in FIG. 1. In addition, the terms "upper", "lower", "northern", and "southern" as used in this disclosure are used for reference only, do not limit the elements to a particular orientation, and are generally interchangeable throughout the text. For example, the upper phase power module 140 may be referred to as a lower phase power module, a northern phase power module, a southern phase power module, a first phase power module, or a second phase power module.

[0072] The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switch 144A. The upper phase A switch 144A may include one or more sets of switches. Figure 5 As shown, the upper phase A switch 144A may include an upper phase A north switch 144A-N and an upper phase A south switch 144A-S. The point-of-use upper phase A controller 142A may include one or more memories, controllers, or sensors. For example, the point-of-use upper phase A controller 142A may include a communication manager 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. The point-of-use upper phase A controller 142A may include a controller 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. Figure 5 More or fewer components than those shown. For example, the point-of-use upper phase A controller 142A may include more or less than two switch controls and diagnostic controllers, and may include more than two thermal sensors.

[0073] The communication manager 405 may control inter-controller communications to and from the point-of-use upper phase A controller 142A and / or may control intra-controller communications between components of the point-of-use upper phase A controller 142A. The functional safety controller 410 may control safety functions of the point-of-use upper phase A controller 142A. For example, the test interface and controller 415 may control test functions of the point-of-use upper phase A controller 142A, such as end-of-line testing in manufacturing. The north thermal sensor 420A may sense the temperature at a first location in the point-of-use upper phase A controller 142A, and the south thermal sensor 420B may sense the temperature at a second location in the point-of-use upper phase A controller 142A. For example, the self-test controller 425 may control self-test functions of the point-of-use upper phase A controller 142A, such as during initialization of the point-of-use upper phase A controller 142A after an inverter 110 power-on event. The command manager 430 may control commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The waveform adjuster 435 may control the waveform timing and shape of the commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The memory 440 may include one or more volatile and non-volatile storage media for the operation of the point-of-use upper phase A controller 142A. The north switch control and diagnostic controller 450N may send one or more signals to the north switch 144A-N to control the operation of the north switch 144A-N, and may receive one or more signals from the north switch 144A-N that provide information about the north switch 144A-N. The south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-S to control the operation of the south switches 144A-S, and may receive one or more signals from the south switches 144A-S providing information about the south switches 144A-S. As described above, the terms "north" and "south" are used for reference only, and the north switch control and diagnostic controller 450N may send one or more signals to the south switches 144A-S, and the south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-N.

[0074] Figure 6 An exemplary system infrastructure for fault encoding and compression using a single channel is depicted in accordance with one or more embodiments. Figure 1 and Figure 2 As shown, the vehicle 100 may include an inverter 110. Figure 6As shown, the inverter 110 may include an inverter controller 300, a point-of-use controller 610, a phase controller 620, and a communication interface 630. In some implementations, the point-of-use controller 610 may be a remotely mounted gate driver integrated circuit, and the phase controller 620 may be a control integrated circuit. In some implementations, the communication interface 630 may be a single channel or single wire interface. A single channel may be a single wire with only one channel. A single channel may be a single wire with exactly one channel. A single channel may be a single wire with no more than one channel. In some implementations, the communication interface 630 may be bidirectional. For example, the point-of-use controller 610 may be a specific implementation of the point-of-use upper phase A controller 142A of the inverter 110. For example, the phase controller 620 may be a specific implementation of the high voltage upper phase controller 130 and the low voltage upper phase controller 120 of the inverter 110. For example, the communication interface 630 may be a specific implementation of the communication interface between the point-of-use upper phase A controller 142A and the high voltage upper phase controller 130.

[0075] Figure 7 A method 700 for encoding a fault response group according to one or more embodiments is depicted. Figure 7 As shown, the method 700 may include: detecting a fault by a point of use controller 610 for the inverter 110 of the electric vehicle 100 (operation 710). For example, the point of use controller 610 may use any suitable fault detection technology to detect the fault. The method 700 may include: determining, by the point of use controller 610, a fault type of a detected fault from among n unique fault types (operation 720). The fault type may identify a specific fault type. The point of use controller 610 may store fault type information identifying n unique fault types that can be detected by the point of use controller 610, and determine the fault type based on the fault type information. As an example and with reference to Fig. 9 For faults 910, the point-of-use controller 610 may be configured to detect n unique fault types (eg, fault X, fault X+1, ..., fault X+14). Fig. 9 Fifteen fault types are shown in FIG. 1 , but it should be understood that other implementations may include any number of unique fault types.

[0076] like Figure 7As shown, the method 700 may include: determining, by the point-of-use controller 610, a fault response group to which a fault type from among the m unique fault response groups belongs (operation 730). A fault response group may identify a specific group of fault types that share some commonality. For example, each fault type within a specific fault response group may cause a common fault response from the phase controller 620. Therefore, the number of m unique fault response groups may be exactly equal to the number of m unique fault responses. The m unique fault response groups may be less than the n unique fault types. The point-of-use controller 610 may store fault response group information identifying the m unique fault response groups, and determine the fault response group to which the fault type belongs based on the fault response group information and mapping information, the mapping information mapping each of the n unique fault types to a corresponding fault response group from among the m unique fault response groups.

[0077] As an example and reference Fig. 9 , the point-of-use controller 610 may store the following fault response group information: the first group of fault types (fault X, fault X+4, fault X+6, and fault X+8) belongs to the first fault response group ("fault group A") 915, the second group of fault types (fault X+2 and fault X+12) belongs to the second fault response group ("fault group B") 920, the third group of fault types (fault X+5, fault X+7, fault X+9, fault X+11, and fault X+13) belongs to the third fault response group ("fault group C") 925, the fourth group of fault types (X+1, X+3, and X+9) belongs to the fourth fault response group ("fault group D") 930, and the fifth group of fault types (X+14) belongs to the fifth fault response group ("fault group E") 935. Again, it should be understood that a specific implementation may include any number of fault response groups, each of which includes any number of fault types. As an example of determining the fault response group to which a fault type belongs, when the point of use controller 610 determines the fault type “Fault X”, the point of use controller 610 determines that the fault belongs to the first fault response group (“Fault Group A”) 915 .

[0078] like Figure 7As shown, the method 700 may include: encoding, by the point of use controller 610, the determined fault response group (operation 740). For example, the point of use controller 610 may encode the fault response group using encoding information that maps the fault response group to a code. The method 700 may include: transmitting, by the point of use controller 610, the encoded fault response group to the phase controller 620 via the communication interface 630 (operation 750). In this way, the point of use controller 610 may transmit the encoded fault response group instead of the encoded fault, which may allow the point of use controller 610 to reduce the amount of data transmitted via the communication interface 630. At this stage, the phase controller 620 has only received the encoded fault response group of the m unique fault response groups, and has not yet received the fault type of the n unique fault types. The method 700 may include: storing the fault type by the point of use controller 610 (operation 760).

[0079] The method 700 may include: receiving, by the point of use controller 610, a request for the stored fault type from the phase controller 620 (operation 770), and transmitting, by the point of use controller 610, the stored fault type to the phase controller 620 based on the request (operation 780). The method 700 may include: storing, by the point of use controller 610, mapping information that maps each of the n fault types to a corresponding fault response group from the m fault response groups (operation 790). Here, operation 730 may further include: determining the fault response group based on the stored mapping information.

[0080] Figure 8 A method 800 for decoding a fault response group is depicted in accordance with one or more embodiments. Figure 8 As shown, method 800 may include: receiving, by the phase controller 620 of the electric vehicle 100, an encoded fault response group from the point-of-use controller 610 via the communication interface 630 (operation 810). At this stage, the phase controller 620 has only received the encoded fault response groups from the m unique fault response groups, and has not yet received the fault type from the n unique fault types. Method 800 may include: determining, by the phase controller 620, a fault response group from the m fault response groups (operation 820), decoding, by the phase controller 620, the determined fault response group (operation 830), and outputting, by the phase controller 620, the decoded fault response group (operation 840). As an example and with reference to Fig. 9, the phase controller 620 can decode the first fault response group ("Group A") 940 into a first code ("010"), the second fault response group ("Group B") 945 into a second code ("011"), the third fault response group ("Group C") 950 into a third code ("100"), the fourth fault response group ("Group D") 955 into a fourth code ("101"), and the fifth fault response group ("Group E") 960 into a fifth code ("110").

[0081] like Figure 8 As shown, the method 800 may include: transmitting a request for a stored fault type from among n fault types to the point-of-use controller 610 by the phase controller 620 (operation 850), and receiving the stored fault type from the point-of-use controller 610 by the phase controller 620 (operation 860). The method 800 may include: storing mapping information by the phase controller 620, which maps each of the m fault response groups to the decoded fault response group (operation 870). Operation 830 may further include: determining the fault response group based on the stored mapping information. The method 800 may include: receiving a fault response by the phase controller 620 based on outputting the decoded fault response group (operation 880), and sending a fault response by the phase controller 620 to the point-of-use controller 610 (operation 890). For example, the phase controller 620 may output the decoded fault response group to the inverter controller 300, receive the fault response from the inverter controller 300, and send the fault response to the point-of-use controller 610. Alternatively or additionally, the phase controller 620 may determine a fault response based on the decoded fault response group and send the fault response to the point of use controller 610. Because the number of m unique fault response groups is exactly equal to the number of m unique fault responses, each unique decoded fault response group is associated with a unique fault response.

[0082] Fig. 9 Depicted is an exemplary system infrastructure for fault encoding and compression using a single channel according to one or more embodiments. Fig. 9, the phase controller 620 may output a fault response group on a multi-line communication bus 965 including three fault pins (“Fault 1”, “Fault 2”, and “Fault 3”) based on a particular fault response group as decoded by the phase controller 620. For example, the phase controller 620 may output a decoded (“Group A”) 940 corresponding to a first code (“010”) to the inverter controller 300 of the electric vehicle 100 by setting the fault pin FAU1 of the multi-line communication bus 965 to a low state (“0”), setting the fault pin FAU2 of the multi-line communication bus 965 to a high state (“1”), and setting the fault pin FAU3 of the multi-line communication bus 965 to a low state (“0”). One or more embodiments may include receiving a fault response from the inverter controller 300 of the electric vehicle 100 based on the fault response group as output by the phase controller 620 on the multi-line communication bus 965, and sending a fault response from the inverter controller 300 to the point-of-use controller 610.

[0083] The point-of-use controller 610 may be able to send messages of various lengths and complexities. The point-of-use controller 610 may send very long and detailed fault messages or very fast and simple fault messages depending on the urgency. For example, an urgent fault may be sent in a fast format (such as a format that requires less than about 20 μS to complete) and may be grouped into responses transmitted to the inverter controller 300 via fault pins (such as fault pins "Fault 1", "Fault 2", and "Fault 3"). The fault pins may be programmed to represent fault information in different ways. Each fault pin may represent a fault on a specific phase. When three fault pins are used, the fault pins as a group may represent an encoded data word, such as from 001 to 111. The number of fault pins may be less than three or more than three. The fault pins may be encoded to transmit the highest priority fault or the latest fault, regardless of the relative priority. For example, the coded group may be "001" = all FETs are off due to a global fault, "010" = one or more FETs are off due to overcurrent, "011" = one or more FETs are off due to a fault at the point of use controller 610, and "100" = one or more FETs are stuck in the on state. The system's response to each coded group of conditions may be different.

[0084] In some implementations, the point-of-use controller 610 may store a fault type of a fault. In this case, the phase controller 620 may provide a request for the stored fault type of the fault to the point-of-use controller 610. The point-of-use controller 610 may receive the request for the stored fault type of the fault from the phase controller 620 and transmit the stored fault type of the fault to the phase controller 620 based on the request. For example, the inverter controller 300 may use a serial peripheral interface (SPI) to read detailed fault information from the phase controller 620.

[0085] One or more embodiments herein may provide a technique for encoding a fault using a fault response group to which the fault type of the fault belongs. Each of the fault types belonging to a particular fault group requires the same fault response. Therefore, by reporting the encoded fault response group instead of the encoded fault type, the point-of-use controller can significantly reduce the amount of data to be transmitted via a single channel. In this way, some embodiments herein can improve fault messaging between integrated circuits of electric vehicles, reduce delays associated with fault messaging via a single channel, and save bandwidth of a single channel. The point-of-use controller can maintain a history of the exact fault type that caused the encoded fault response group to be sent. After the phase controller has sent an appropriate fault response to the point-of-use controller, the phase controller can request the stored exact fault type from the point-of-use controller. Once the point-of-use controller has received the appropriate fault response to initiate a response, the phase controller can request the stored exact fault type without affecting the rapid response of the point-of-use controller. In the context of electric vehicles, this rapid reaction time can help the electric vehicle be placed in a safe state in a relatively short time.

[0086] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein.It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

Claims

1. A system comprising: An inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: A point-of-use controller, the point-of-use controller being configured to: Detection of faults; determining a fault type of the detected fault from among n fault types; determining a fault response group to which the determined fault type belongs from among the m fault response groups; encoding the determined fault response group; and transmitting the coded fault response group via the communication interface; and A phase controller, the phase controller being configured to: receiving a coded fault response group from the point-of-use controller via the communication interface; determining the fault response group; decoding the determined fault response group; and Outputs the decoded fault response group.

2. The system according to claim 1, wherein m<n, Each of the m fault response groups is unique, and The number of the m fault response groups is exactly equal to the number of unique fault responses.

3. The system of claim 1, wherein the communication interface is a single channel bidirectional interface.

4. The system of claim 1 , wherein the point-of-use controller is a remotely mounted gate driver integrated circuit in a high voltage region of the inverter separated from a low voltage region of the inverter by a galvanic isolator, and the phase controller is a control integrated circuit in the high voltage region of the inverter.

5. The system according to claim 1, wherein The point-of-use controller is further configured to store the fault type, The phase controller is further configured to transmit a request for the stored fault type to the point of use controller, and The point of use controller is further configured to receive the request for the stored fault type from the phase controller and transmit the stored fault type to the phase controller based on the request.

6. The system according to claim 1, wherein the point-of-use controller is further configured to store first mapping information, the first mapping information mapping each of the n fault types to a corresponding fault response group from the m fault response groups; and The phase controller is further configured to store second mapping information, wherein the second mapping information maps each of the m fault response groups to a decoded fault response group.

7. The system of claim 1, further comprising: the battery, the battery being configured to supply the DC power to the inverter; as well as The motor is configured to receive the AC power from the inverter to drive the motor.

8. A method comprising: Detecting a fault by a point of use controller for an inverter for an electric vehicle; determining, by the point-of-use controller, a fault type of the detected fault from among n fault types; determining, by the point-of-use controller, a fault response group from among the m fault response groups to which the determined fault type belongs; encoding, by the point-of-use controller, the determined fault response group; as well as An encoded fault response set is transmitted by the point of use controller via a communication interface to a phase controller for the inverter for the electric vehicle.

9. The method according to claim 8, wherein m <n。 10. The method of claim 8, wherein the communication interface is a single channel bi-directional interface.

11. The method of claim 8, wherein the point-of-use controller is a remotely mounted gate driver integrated circuit and the phase controller is a control integrated circuit.

12. The method according to claim 8, further comprising: The fault type is stored by the point of use controller.

13. The method according to claim 12, further comprising: receiving, by the point-of-use controller, a request for the stored fault type from the phase controller; as well as The stored fault type is transmitted by the point-of-use controller to the phase controller based on the request.

14. The method according to claim 8, further comprising: storing, by the point-of-use controller, mapping information that maps each of the n fault types to a corresponding fault response group from among the m fault response groups; Wherein determining, by the point of use controller, the fault response group comprises determining the fault response group based on stored mapping information.

15. A method for communicating between a point of use controller for an inverter for an electric vehicle and a phase controller for the inverter for the electric vehicle, the method comprising: receiving, by the phase controller via a communication interface, a coded fault response group from the point-of-use controller; determining, by the phase controller, the fault response group from among m fault response groups; decoding, by the phase controller, the determined fault response group; as well as A decoded fault response set is output by the phase controller.

16. The method according to claim 15, further comprising: transmitting, by the phase controller to the point-of-use controller, a request for a stored fault type from among n fault types; as well as The stored fault type is received by the phase controller from the point of use controller.

17. The method according to claim 16, wherein m <n。 18. The method of claim 15, further comprising: storing, by the phase controller, mapping information that maps each of the m fault response groups to a decoded fault response group; Wherein decoding, by the phase controller, the determined fault response group includes determining the fault response group based on stored mapping information.

19. The method of claim 18, wherein the decoded fault response group corresponds to a state of a fault pin for a multi-line communication bus.

20. The method of claim 15, further comprising: receiving, by the phase controller, a fault response based on outputting the decoded fault response group; as well as The fault response is sent by the phase controller to the point-of-use controller.

Images