Impedance reconstruction control method and device for static reactive power compensation device, electronic equipment and storage medium

Abstract

The invention provides an impedance reconstruction control method and device for a static reactive power compensation device, electronic equipment and a storage medium. The impedance reconstruction control method comprises the following steps: respectively obtaining three-phase sampling voltage and three-phase sampling current of a three-phase grid-connected point where the static reactive power compensation device is located; first preprocessing is carried out on the three-phase sampling voltage and the three-phase sampling current to obtain a first control quantity, and the first preprocessing comprises current inner loop processing on the three-phase sampling voltage and the three-phase sampling current; second preprocessing is carried out on the three-phase sampling voltage to obtain a second control quantity, and the second preprocessing comprises filtering processing on the three-phase sampling voltage; and combining the first control quantity and the second control quantity, and performing signal modulation processing to obtain a modulation signal for impedance reconstruction of the static reactive power compensation device. According to the exemplary embodiment, the suppression effect of the subsynchronous oscillation of the wind power plant under the complex working condition is improved, and meanwhile the problem of high-frequency oscillation is solved.

Description

Technical Field

[0001] The present disclosure relates to the field of energy storage technology, and in particular to an impedance reconstruction control method, device, electronic device and storage medium for a static VAR compensation device. Background Art

[0002] With the large-scale development of new energy sources, many power quality problems have been caused. Static VAR generators (SVG) have been widely used in reactive power compensation of wind farms due to their fast response speed and strong dynamic compensation capabilities to improve the transmission efficiency of the system. Their working performance plays a vital role in maintaining the voltage at the grid connection point and improving the power quality of wind farms.

[0003] However, with the access to reactive power compensation devices such as SVG, wind farms interact with SVG, causing wind farms to face problems such as high-frequency resonance and subsynchronous oscillation, which seriously affect the power quality of wind farms and the stability of the system.

[0004] It should be noted that the statements herein merely provide background information related to the present disclosure and do not necessarily constitute prior art. Summary of the invention

[0005] In view of the above problems, an impedance reconstruction control method, device, computer storage medium and program product for a static VAR compensation device are proposed to overcome the above problems or at least partially solve the above problems.

[0006] The embodiments of the present disclosure adopt the following technical solutions:

[0007] In a first aspect, an impedance reconstruction control method for a static reactive power compensation device is provided, the impedance reconstruction control method comprising: respectively obtaining a three-phase sampled voltage and a three-phase sampled current at a three-phase grid-connected point where the static reactive power compensation device is located; performing a first preprocessing on the three-phase sampled voltage and the three-phase sampled current to obtain a first control quantity, wherein the first preprocessing comprises performing a current inner-loop processing on the three-phase sampled voltage and the three-phase sampled current; performing a second preprocessing on the three-phase sampled voltage to obtain a second control quantity, wherein the second preprocessing comprises filtering the three-phase sampled voltage; and performing signal modulation processing after merging the first control quantity and the second control quantity to obtain a modulation signal for impedance reconstruction of the static reactive power compensation device.

[0008] Preferably, the three-phase sampled voltage and the three-phase sampled current are respectively subjected to a first preprocessing to obtain a first control quantity, including: performing band-stop filtering on the three-phase sampled voltage to obtain a three-phase filtered voltage; performing signal operation on the three-phase sampled voltage and the three-phase filtered voltage to obtain three difference voltages.

[0009] Preferably, the three-phase sampled voltage and the three-phase sampled current are respectively subjected to a first preprocessing to obtain a first control quantity, and further includes: using a phase-locked loop to perform phase tracking on the three-phase difference voltage to obtain an output phase; based on the output phase, the three-phase difference voltage and the three-phase sampled current are respectively subjected to a rotation coordinate transformation to obtain a d-axis component and a q-axis component of the three-phase difference voltage and a d-axis component and a q-axis component of the three-phase sampled current.

[0010] Preferably, the first preprocessing includes current inner loop processing of the three-phase sampled voltage and the three-phase sampled current, including: performing signal operation on the reactive power of the grid connection point and the set reactive power, and obtaining the q-axis component of the reactive current given value through PI loop control processing.

[0011] Preferably, the first preprocessing of the three-phase sampled voltage and the three-phase sampled current respectively to obtain the first control quantity also includes: using the q-axis component of the reactive current given value, the d-axis current given value of the current inner loop, the d-axis component and q-axis component of the three-phase difference voltage, and the d-axis component and q-axis component of the three-phase sampled current as inputs of the current inner loop to perform current inner loop processing to obtain the output of the current inner loop; performing a rotating coordinate transformation on the output of the current inner loop to obtain the first control quantity.

[0012] Preferably, the current inner loop processing includes: extracting the sub-synchronous components in the d-axis component and the q-axis component of the three-phase sampling current through a band-stop filter, and superimposing the adjustment coefficient on the output loop of the current inner loop to block the formation of the sub-synchronous components in the current inner loop.

[0013] Preferably, performing a second preprocessing on the three-phase sampled voltage to obtain the second control amount includes: performing a first-order high-pass filtering on the three-phase sampled voltage, and using the obtained high-frequency component of the three-phase sampled voltage as the second control amount.

[0014] In a second aspect, an impedance reconstruction control device for a static reactive compensation device is provided, comprising: a first unit, respectively obtaining a three-phase sampled voltage and a three-phase sampled current of a three-phase grid-connected point where the static reactive compensation device is located; a second unit, respectively performing a first preprocessing on the three-phase sampled voltage and the three-phase sampled current to obtain a first control quantity, wherein the first preprocessing includes performing a current inner-loop processing on the three-phase sampled voltage and the three-phase sampled current; a third unit, performing a second preprocessing on the three-phase sampled voltage to obtain a second control quantity, wherein the second preprocessing includes filtering the three-phase sampled voltage; and a fourth unit, performing signal modulation processing after combining the first control quantity and the second control quantity to obtain a modulation signal for impedance reconstruction of the static reactive compensation device.

[0015] According to a third aspect, an electronic device is provided, comprising: a processor; and a memory arranged to store computer executable instructions, wherein when the executable instructions are executed, the processor executes any method as described in the first aspect.

[0016] In a fourth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores one or more programs, and when the one or more programs are executed by an electronic device including multiple application programs, the electronic device executes any method as described in the first aspect.

[0017] At least one of the above technical solutions adopted by the exemplary embodiment can achieve the following beneficial effects:

[0018] In an exemplary embodiment of the present disclosure, by performing current inner loop processing and filtering processing on three-phase sampled voltage and three-phase sampled current, the obtained modulation signal can change the virtual impedance of the SVG control system and reduce the oscillation of the wind farm.

[0019] It should be understood that the invention summary is not intended to identify the key or essential features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other objects, features and advantages of the present disclosure will become more apparent through a more detailed description of some embodiments of the present disclosure in the accompanying drawings, in which:

[0021] Figure 1 This is a flow chart of the impedance reconstruction control method in the embodiment of the present disclosure;

[0022] Figure 2 This is a block diagram of the working principle of the static VAR generator in the embodiment of the present disclosure;

[0023] Figure 3 This is a control schematic diagram of the impedance reconstruction control method in an embodiment of the present disclosure;

[0024] Figure 4 This is a schematic diagram of the current inner loop processing control in the embodiment of the present disclosure;

[0025] Figure 5 This is a flow chart of the impedance reconstruction control device in the embodiment of the present disclosure;

[0026] Figure 6 is a waveform of a first impedance characteristic diagram of the system in an embodiment of the present disclosure;

[0027] Figure 7 is a waveform of a second impedance characteristic diagram of the system in an embodiment of the present disclosure;

[0028] Figure 8Schematic diagram of an electronic device in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0029] The principle of the present disclosure will now be described with reference to some embodiments. It should be understood that the description of these embodiments is only for illustrative purposes, and helps those skilled in the art to understand and implement the present disclosure, without any limitation to the scope of the present disclosure. The disclosure described herein can be implemented in a manner different from that described below.

[0030] In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.

[0031] References in this disclosure to "one embodiment," "an embodiment," "an exemplary embodiment," etc. indicate that the described embodiment may include a particular feature, structure, or characteristic, but not every embodiment necessarily includes the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. In addition, when a particular feature, structure, or characteristic is described in conjunction with an exemplary embodiment, whether or not explicitly described, those skilled in the art will recognize that such feature, structure, or characteristic affects incorporation into other embodiments.

[0032] It should be understood that although the terms "first" and "second" etc. may be used to describe various elements herein, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the exemplary embodiments, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. The term "and / or" as used herein includes any and all combinations of one or more of the listed terms.

[0033] The terms used herein are only for describing specific embodiments, rather than for limiting exemplary embodiments. The singular forms "one", "an", and "the" used herein also include plural forms, unless the context clearly indicates otherwise. "A group of elements" or "element set" used herein is intended to include one or more elements. It should also be understood that the terms "include", "comprise", "have", "have", "include" and / or "include", when used herein, specify the presence of the features, elements and / or parts, etc., but do not exclude the presence or addition of one or more other features, elements, parts and / or combinations thereof.

[0034] As used in this disclosure, the term "circuitry" may refer to one or more or all of the following:

[0035] (a) Only implemented in hardware circuits (e.g., implemented only in analog and / or digital circuits)

[0036] (b) a combination of hardware circuitry and software, such as (where applicable):

[0037] (i) a combination of analog and / or digital hardware circuits and software / firmware; and

[0038] (ii) any portion of a hardware processor (including a digital signal processor) with software, software and memory that work together to enable a device such as a mobile phone or server to perform various functions, and

[0039] (c) A hardware circuit and / or processor, such as a microprocessor or portion of a microprocessor, that requires software (e.g., firmware) to operate, but where software is not required for operation, the software may not be present.

[0040] This definition of circuitry applies to all uses of this term in this disclosure, including in any claims. As another example, as used in this disclosure, the term circuitry also includes merely a hardware circuit or processor (or multiple processors) or a portion of a hardware circuit or processor and its (or their) accompanying software and / or firmware implementation. The term circuitry also includes, for example, if applicable to the particular claim element, a baseband integrated circuit or processor integrated circuit for a mobile device, or a similar integrated circuit in a server, cellular network device, or other computing network device.

[0041] In the exemplary embodiment, in view of the current situation in which impedance reconstruction in related technologies has poor effect under complex working conditions, a highly universal impedance reconstruction control method is designed. This method realizes the reshaping of impedance in medium and high frequency bands through current inner loop and filtering processing, thereby improving the stability of large-scale wind farm systems connected to the power grid.

[0042] The technical solutions provided by various embodiments of the present disclosure are described in detail below in conjunction with the accompanying drawings.

[0043] The disclosed embodiments provide an impedance reconstruction control method, device, electronic device and storage medium for a static VAR compensation device. Figure 1 As shown, a flow chart of a method 100 for controlling the same impedance reconstruction in an embodiment of the present disclosure is provided. The method 100 for controlling the same impedance reconstruction at least includes the following steps S110 to S140.

[0044] Step S110, respectively obtaining the three-phase sampled voltage and the three-phase sampled current of the three-phase grid-connected point where the static VAR compensation device is located.

[0045] like Figure 2The working principle block diagram of the static VAR generator (SVG) shown in the figure. The static VAR generator is set on the wind farm transmission line to dynamically compensate for the reactive power of the grid, dynamically suppress specific sub-current harmonics, and provide active power to compensate for the voltage drop and flicker of the grid. The static VAR compensation device can obtain the three-phase sampled voltage and three-phase sampled current of the three-phase grid connection point.

[0046] In the present disclosure, the impedance reconstruction control method is applied in the SVG control link in the wind farm. According to the three-phase sampled voltage and three-phase sampled current of the three-phase grid-connected point, the impedance reconstruction algorithm is introduced to improve the impedance characteristics of negative damping capacitance in the low and medium frequency bands and suppress the resonance problem in the high frequency band, thereby improving the impedance external characteristics of the entire wind farm, enhancing the system damping, and suppressing the sub / super synchronous oscillation of the wind farm. It should be pointed out that the static VAR compensation device in the present disclosure includes a static VAR generator SVG, which can also be expressed as a functional module applied to the static VAR generator SVG.

[0047] Step S120, performing first preprocessing on the three-phase sampled voltage and the three-phase sampled current respectively to obtain a first control variable, wherein the first preprocessing includes performing current inner loop processing on the three-phase sampled voltage and the three-phase sampled current.

[0048] In some embodiments, the three-phase sampled voltage and the three-phase sampled current are respectively subjected to first preprocessing to obtain the first control quantity, including: performing band-stop filtering on the three-phase sampled voltage to obtain the three-phase filtered voltage; performing signal operation on the three-phase sampled voltage and the three-phase filtered voltage to obtain three difference voltages. It also includes using a phase-locked loop to perform phase tracking on the three-phase difference voltage to obtain the output phase; based on the output phase, performing rotation coordinate transformation on the three-phase difference voltage and the three-phase sampled current to obtain the d-axis component and q-axis component of the three-phase difference voltage and the d-axis component and q-axis component of the three-phase sampled current. The q-axis component of the reactive current given value, the d-axis current given value of the current inner loop, the d-axis component and q-axis component of the three-phase difference voltage, and the d-axis component and q-axis component of the three-phase sampled current are used as the input of the current inner loop for current inner loop processing to obtain the output of the current inner loop; the output of the current inner loop is subjected to rotation coordinate transformation to obtain the first control quantity. Among them, the first preprocessing includes performing current inner loop processing on the three-phase sampled voltage and the three-phase sampled current, including: performing signal operation on the reactive power of the grid connection point and the set reactive power, and obtaining the q-axis component of the reactive current given value through PI loop control processing.

[0049] like Figure 3 As shown, the control schematic diagram of the impedance reconstruction control method includes three parts: impedance reconstruction module 1, impedance reconstruction module 2 and switch (modulation) signal output.

[0050] In one example, the sampling module in the static VAR generator samples the actual values ​​of the three-phase grid-connected point voltage and records them as Uga, Ugb, and Ugc, and the actual values ​​of the three-phase grid-connected point current and records them as Iga, Igb, and Igc.

[0051] Since the actual power grid mainly contains 5th and 7th harmonics, in order to improve the influence of power grid harmonics, the above-mentioned sampled three-phase power grid voltage actual values ​​Uga, Ugb, Ugc are filtered out of the power grid fundamental wave through a band-stop filter to obtain the band-stop filtered voltages Uda, Udb, Udc. The purpose of using a band-stop filter is to extract harmonics as much as possible.

[0052] In order to ensure the performance of the band-stop filter, the bilinear transformation method is used for discretization. The expression of the band-stop filter in the discrete domain Hbsf(z) is:

[0053]

[0054] where ω 0 =100π, Ts is the sampling period, ξ is the filter damping coefficient.

[0055] Subtract the above-obtained band-stop filtered voltage Ula, Ulb, Ulc (three-phase filtered voltage) from the sampled three-phase grid voltage Uga, Ugb, Ugc (three-phase sampled voltage) to obtain the difference voltage Uma, Umb, Umc (three-term difference voltage). It can be understood that since the band-stop filtered voltage mainly contains the 5th and 7th harmonics, only the fundamental content remains after subtracting it from the sampled three voltages, blocking the transmission of harmonics.

[0056] Continue to refer Figure 3 The sampled three-phase grid current actual values ​​Iga, Igb, and Igc are converted into the grid current d-axis component Igd and the phase grid current q-axis component Igq in the rotating coordinate system through synchronous rotating coordinate transformation (abc / dq), that is, the d-axis component and q-axis component of the three-phase sampled current; the three difference voltages Uma, Umb, and Umc obtained by the above-mentioned band-stop filtering are converted into the grid voltage d-axis component Umd and the grid voltage q-axis component Umq in the rotating coordinate system, that is, the d-axis component and q-axis component of the three-phase difference voltage. The calculation formulas are:

[0057]

[0058]

[0059] In one example, if Figure 3As shown, a dual second-order generalized integral phase-locked loop (PLL) is used to track the phases of the three difference voltages Uma, Umb, and Umc obtained by band-stop filtering to obtain the output phase θ. In order to extract the output phase θ, it is necessary to first obtain the two-phase orthogonal signal of the phase-locked loop input signal V(z). The orthogonal signal generator in the corresponding phase-locked loop is discretized using the bilinear transformation method, and its expressions in the discrete domain are:

[0060]

[0061]

[0062] where ω 0 =100π, Ts is the sampling period, k is the gain coefficient, V′(z), qV′(z) are the outputs of the orthogonal signal generator, and V(z) is the input of the phase-locked loop.

[0063] In one example, continue to refer to Figure 3 , the grid-connected point reactive power Q and the set reactive power Qref are subtracted and the output controlled by the PI loop is used as the reactive current set value Iqref, that is, the q-axis component of the reactive current set value. The PI loop uses the bilinear transformation post-term difference method for discretization, and its expression Hq(z) in the discrete domain is:

[0064]

[0065] I qref =-(Q ref -Q)H q (z) (7)

[0066] Among them, kp and ki are the proportional and integral coefficients of PI loop control respectively.

[0067] In one example, let Idref be the d-axis current given value of the current inner loop, and superimpose Idref, Iqref, and the d-axis component and q-axis component of the grid-connected point voltage and current obtained in the above example to obtain the input of the current inner loop. That is, the input of the current inner loop includes the q-axis component of the reactive current given value, the d-axis current given value of the current inner loop, the d-axis component and q-axis component of the three-phase difference voltage, and the d-axis component and q-axis component of the three-phase sampled current.

[0068] The output after the current inner loop processing is inversely transformed through the synchronous rotating coordinate dq / abc to obtain the first control quantities Ua1, Ub1, and Uc1. The first control quantities are the outputs of the impedance reconstruction module 1.

[0069] Step S130, performing a second preprocessing on the three-phase sampled voltage to obtain a second control variable, wherein the second preprocessing includes filtering the three-phase sampled voltage.

[0070] In one example, if Figure 3 As described above, the actual value of the three-phase grid voltage is sampled and recorded as U ga , U gb , U gc ; In the impedance reconstruction module 2, the feedforward voltage control is introduced, and the three-phase grid voltage U sampled above is converted into ga , U gb , U gc The high-frequency resonant component is extracted as the second control quantity, which is expressed as Ua2, Ub2, and Uc2, and is used to improve the high-frequency impedance characteristics of the static VAR generator SVG. In order to ensure the performance of the high-pass filter, it is discretized by the bilinear transformation method, and the expression Hapf(z) of the high-pass filter used in the discrete domain is:

[0071]

[0072] Where ωn=2000π, Ts is the sampling period, ξ 2 is the damping coefficient of the high-pass filter.

[0073] Step S140: Combining the first control amount and the second control amount, and performing signal modulation processing to obtain a modulation signal for impedance reconstruction of a static VAR compensation device.

[0074] The control quantities Ua1, Ub1, Uc1 output by the impedance reconstruction module 1 and the control quantities Ua2, Ub2, Uc2 output by the impedance reconstruction module 2 are added together for signal modulation processing to obtain a control switch signal (modulation signal) of the static VAR generator SVG control system.

[0075] It can be understood that impedance reconstruction module 1 can improve the negative damping area in the 40-100Hz frequency band, while impedance reconstruction module 2 handles the problem of high-frequency resonance and needs to increase the phase margin in the high-frequency band. The control switch signal of SVG is the superposition of the two. In fact, the output control amount of module 2 is connected to the switch module generated by the modulation PWM of SVG through feedforward, which is equivalent to adjusting the output damping of the SVG system, and the effects between modules will not interfere with each other and produce side effects.

[0076] In some embodiments, the current inner loop processing includes: extracting the sub-synchronous components in the d-axis component and the q-axis component of the three-phase sampled current through a band-stop filter, and superimposing the adjustment coefficient on the output loop of the current inner loop to block the formation of the sub-synchronous components in the current inner loop.

[0077] like Figure 4As shown, SVG presents a negative damping capacitive impedance characteristic in the medium and low frequency bands, and is prone to subsynchronous oscillation when connected to the power grid, resulting in system instability. In order to improve the impedance characteristics of SVG, a band-stop filter 2 is added to the current inner loop for impedance reconstruction to increase the system damping in the medium and low frequency bands. At the same time, the subsynchronous current component in the current inner loop control loop is also suppressed. The subsynchronous components in Igd and Igq are extracted by band-stop filtering, and then superimposed on the current inner loop output loop through the adjustment coefficient ks to block the formation of subsynchronous components in the current loop. The expression H'bsf(z) of the band-stop filter used in the discrete domain after the bilinear transformation method is:

[0078]

[0079] where ω 0 =100π, Ts is the sampling period, ξ 1 is the filter damping coefficient, and ks is the adjustment coefficient.

[0080] It can be understood that the band-stop filter in the current inner loop processing increases the system damping in the medium and low frequency bands. At the same time, it also suppresses the sub-synchronous current component in the current inner loop control loop. By superimposing the adjustment coefficient ks on the current inner loop output loop, the formation of the sub-synchronous component in the current loop is blocked.

[0081] The embodiment of the present disclosure also provides an impedance reconstruction control device 500 of a static VAR compensation device, such as Figure 5 As shown, the synchronization signal detection device 500 at least includes: a first unit 510, a second unit 520, a third unit 530, and a fourth unit 540, wherein:

[0082] The first unit 910 is specifically used to respectively obtain the three-phase sampled voltage and the three-phase sampled current of the three-phase grid-connected point where the static reactive power compensation device is located.

[0083] like Figure 2 The block diagram of the working principle of the static VAR generator (SVG) shown in the figure. The static VAR generator is set on the wind farm transmission line to dynamically compensate for the reactive power of the grid, dynamically suppress specific sub-current harmonics, and provide active power to compensate for the voltage drop and flicker of the grid. The static VAR compensation device can obtain the three-phase sampled voltage and three-phase sampled current of the three-phase grid-connected point. The impedance reconstruction control method is applied to the SVG control link in the wind farm. The SVG can collect the three-phase sampled voltage and three-phase sampled current of the three-phase grid-connected point.

[0084] The second unit 920 is specifically used to: perform first preprocessing on the three-phase sampled voltage and the three-phase sampled current respectively to obtain a first control quantity, wherein the first preprocessing includes performing current inner loop processing on the three-phase sampled voltage and the three-phase sampled current.

[0085] like Figure 2 As shown, the second unit is the impedance reconstruction module 1. The impedance reconstruction module 1 uses a band-stop filter to eliminate background harmonics in the grid voltage, making the output result of the phase-locked loop more accurate. When a subsynchronous current component appears in the current inner loop, a band-stop filter is used to suppress the subsynchronous current component, while improving the negative impedance capacitance characteristics of SVG in the medium and low frequency bands.

[0086] The third unit 930 is specifically used to: perform a second preprocessing on the three-phase sampled voltage to obtain a second control amount, wherein the second preprocessing includes filtering the three-phase sampled voltage.

[0087] like Figure 2 As shown, the third unit is the impedance reconstruction module 2. In the impedance reconstruction module 2, a high-pass filter is added in the voltage feedforward, and the low-frequency characteristics of the equivalent impedance on the SVG side are not affected by it, thereby improving the phase margin of the system.

[0088] The fourth unit 940 is specifically used to: combine the first control amount and the second control amount and perform signal modulation processing to obtain a modulation signal for impedance reconstruction of the static VAR compensation device.

[0089] The control quantities Ua1, Ub1, Uc1 output by the impedance reconstruction module 1 and the control quantities Ua2, Ub2, Uc2 output by the impedance reconstruction module 2 are added together for signal modulation processing to obtain a control switch signal (modulation signal) of the static VAR generator SVG control system.

[0090] It can be understood that impedance reconstruction module 1 improves the negative damping area in the 40-100Hz frequency band, while impedance reconstruction module 2 handles the problem of high-frequency resonance and increases the phase margin in the high-frequency band. The control switch signal of SVG is the superposition of the two. In fact, the output control amount of module 2 is connected to the switch module generated by the modulation PWM of SVG through feedforward, which is equivalent to adjusting the output damping of the SVG system, and the effects between the modules will not interfere with each other and produce side effects.

[0091] The impedance reconstruction control device of the above-mentioned static reactive power compensation device can implement the various steps of the impedance reconstruction control method of the static reactive power compensation device provided in the aforementioned embodiments. The relevant explanations on the impedance reconstruction control method of the static reactive power compensation device are applicable to the impedance reconstruction control device of the static reactive power compensation device and will not be repeated here.

[0092] Although specific functions are discussed above with reference to specific units, it should be noted that the functions of the various units discussed herein can be divided into multiple units, and / or at least some functions of multiple units can be combined into a single unit. The specific unit discussed herein performs an action including the specific unit itself performing the action, or alternatively the specific unit calls or otherwise accesses another component or unit that performs the action (or performs the action in conjunction with the specific unit). Therefore, the specific unit that performs an action can include the specific unit itself that performs the action and / or another unit that the specific unit calls or otherwise accesses and performs the action.

[0093] It should also be understood that various techniques may be described herein in the general context of software hardware elements or program units. Figure 5 The various units described may be implemented in hardware or in hardware in combination with software and / or firmware. For example, these units may be implemented as computer program code / instructions configured to be executed in one or more processors and stored in a computer-readable storage medium. Alternatively, these units may be implemented as hardware logic / circuits.

[0094] Figure 6 It is the waveform of the first impedance characteristic diagram, that is, the waveform of the impedance characteristic diagram of the power grid and the SVG system in the conventional mode. It can be seen that the equivalent impedance of the SVG side is negatively damped in the 53Hz-60Hz frequency band. In this frequency band, the wind farm area system is in an unstable state, and the wind farm area system will have subsynchronous oscillation near this frequency. In the negative damping area of ​​850Hz-3000Hz, the system is very likely to have high-frequency resonance.

[0095] Figure 7 The waveform of the second impedance characteristic diagram is the waveform of the impedance characteristic diagram of the power grid and the SVG system when the impedance reconstruction control method of the static VAR compensation device disclosed in the present invention and / or the impedance reconstruction control device of the static VAR compensation device are used. It can be seen that the negative damping frequency band of the equivalent impedance on the SVG side is reduced from the original 850Hz-3000Hz to 2150Hz-2570Hz, which greatly reduces the possibility of high-frequency resonance in the system. In addition, the negative damping area disappears near the 50Hz frequency band, realizing the reshaping of the SVG impedance.

[0096] Figure 8 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present application. Figure 8At the hardware level, the electronic device includes a processor, and optionally also includes an internal bus, a network interface, and a memory. The memory may include a memory, such as a high-speed random access memory (RAM), and may also include a non-volatile memory (non-volatile memory), such as at least one disk storage. Of course, the electronic device may also include hardware required for other services.

[0097] The processor, network interface and memory can be interconnected through an internal bus, which can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0098] The memory is used to store the program. Specifically, the program may include a program code, and the program code includes a computer operation instruction. The memory may include a memory and a non-volatile memory, and provides instructions and data to the processor.

[0099] The processor reads the corresponding computer program from the non-volatile memory into the memory and then runs it, forming an impedance reconstruction control device for a static reactive power compensation device at a logical level. The processor executes the program stored in the memory and is specifically used to perform the following operations:

[0100] Respectively obtain the three-phase sampled voltage and the three-phase sampled current of the three-phase grid-connected point where the static reactive power compensation device is located; perform first preprocessing on the three-phase sampled voltage and the three-phase sampled current to obtain a first control quantity, wherein the first preprocessing includes performing current inner-loop processing on the three-phase sampled voltage and the three-phase sampled current; perform second preprocessing on the three-phase sampled voltage to obtain a second control quantity, wherein the second preprocessing includes filtering the three-phase sampled voltage; combine the first control quantity and the second control quantity and perform signal modulation processing to obtain a modulation signal for impedance reconstruction of the static reactive power compensation device.

[0101] The above application Figure 1The method performed by the impedance reconstruction control device of the static reactive power compensation device disclosed in the illustrated embodiment can be applied to a processor or implemented by a processor. The processor may be an integrated circuit chip with signal processing capability. In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in the processor or an instruction in software form. The above processor may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in the embodiments of the present application can be directly embodied as being executed by a hardware decoding processor, or executed by a combination of hardware and software modules in a decoding processor. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0102] The electronic device may also perform Figure 1 The method is implemented by the impedance reconstruction control device of the static reactive power compensation device, and the impedance reconstruction control device of the static reactive power compensation device is implemented in Figure 1 The functions of the illustrated embodiment will not be described in detail in the embodiments of the present application.

[0103] The present application also provides a computer-readable storage medium, which stores one or more programs, wherein the one or more programs include instructions, which, when executed by an electronic device including multiple application programs, enable the electronic device to execute Figure 1 The method performed by the impedance reconstruction control device of the static VAR compensation device in the embodiment shown is specifically used to perform:

[0104] Respectively obtain the three-phase sampled voltage and the three-phase sampled current of the three-phase grid-connected point where the static reactive power compensation device is located; perform first preprocessing on the three-phase sampled voltage and the three-phase sampled current to obtain a first control quantity, wherein the first preprocessing includes performing current inner-loop processing on the three-phase sampled voltage and the three-phase sampled current; perform second preprocessing on the three-phase sampled voltage to obtain a second control quantity, wherein the second preprocessing includes filtering the three-phase sampled voltage; combine the first control quantity and the second control quantity and perform signal modulation processing to obtain a modulation signal for impedance reconstruction of the static reactive power compensation device.

[0105] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0106] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0107] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0108] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0109] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0110] The memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0111] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0112] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0113] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0114] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. An impedance reconstruction control method for a static VAR compensation device, characterized in that: The impedance reconstruction control method comprises: Respectively obtain the three-phase sampled voltage and the three-phase sampled current of the three-phase grid connection point where the static reactive power compensation device is located; Performing first preprocessing on the three-phase sampled voltage and the three-phase sampled current respectively to obtain a first control variable, wherein the first preprocessing includes performing current inner loop processing on the three-phase sampled voltage and the three-phase sampled current; Performing a second preprocessing on the three-phase sampled voltage to obtain a second control amount, wherein the second preprocessing includes performing filtering on the three-phase sampled voltage; The first control amount and the second control amount are combined and then signal modulation processing is performed to obtain a modulation signal for impedance reconstruction of a static VAR compensation device.

2. The impedance reconstruction control method according to claim 1, characterized in that: The performing first preprocessing on the three-phase sampled voltages and the three-phase sampled currents respectively to obtain a first control variable includes: Performing band-stop filtering on the three-phase sampled voltage to obtain a three-phase filtered voltage; The three-phase sampled voltages and the three-phase filtered voltages are subjected to signal operation to obtain three difference voltages.

3. The impedance reconstruction control method according to claim 2, characterized in that: The performing first preprocessing on the three-phase sampled voltages and the three-phase sampled currents respectively to obtain a first control variable further includes: A phase-locked loop is used to track the phase of the three-phase difference voltage to obtain an output phase; Based on the output phase, the three-phase difference voltage and the three-phase sampled current are respectively subjected to rotation coordinate transformation to obtain the d-axis component and q-axis component of the three-phase difference voltage and the d-axis component and q-axis component of the three-phase sampled current.

4. The impedance reconstruction control method according to claim 3, characterized in that: The first preprocessing includes performing current inner loop processing on the three-phase sampled voltage and the three-phase sampled current, including: The reactive power of the grid-connected point and the set reactive power are subjected to signal operation, and the q-axis component of the reactive current given value is obtained through PI loop control processing.

5. The impedance reconstruction control method according to claim 4, characterized in that: The performing first preprocessing on the three-phase sampled voltages and the three-phase sampled currents respectively to obtain a first control variable further includes: The q-axis component of the reactive current given value, the d-axis current given value of the current inner loop, the d-axis component and the q-axis component of the three-phase difference voltage, and the d-axis component and the q-axis component of the three-phase sampled current are used as inputs of the current inner loop for current inner loop processing to obtain the output of the current inner loop; Perform a rotation coordinate transformation on the output of the inner current loop to obtain the first control variable.

6. The impedance reconstruction control method according to claim 5, characterized in that: The current inner loop processing includes: The subsynchronous components in the d-axis component and the q-axis component of the three-phase sampled current are extracted by a band-stop filter, and the adjustment coefficient is superimposed on the output loop of the current inner loop to block the formation of the subsynchronous components in the current inner loop.

7. The impedance reconstruction control method according to any one of claims 1 to 6, characterized in that: The performing a second preprocessing on the three-phase sampled voltage to obtain a second control variable includes: A first-order high-pass filter is performed on the three-phase sampled voltage, and the obtained high-frequency component of the three-phase sampled voltage is used as the second control variable.

8. An impedance reconstruction control device for a static VAR compensation device, characterized in that: include: The first unit obtains the three-phase sampled voltage and the three-phase sampled current of the three-phase grid-connected point where the static reactive power compensation device is located; A second unit performs first preprocessing on the three-phase sampled voltage and the three-phase sampled current respectively to obtain a first control quantity, wherein the first preprocessing includes performing current inner loop processing on the three-phase sampled voltage and the three-phase sampled current; A third unit performs a second preprocessing on the three-phase sampled voltage to obtain a second control amount, wherein the second preprocessing includes filtering the three-phase sampled voltage; The fourth unit combines the first control amount and the second control amount and performs signal modulation processing to obtain a modulation signal for impedance reconstruction of a static VAR compensation device.

9. An electronic device, comprising: processor; and a memory arranged to store computer executable instructions, which when executed cause the processor to perform the method as claimed in any one of claims 1 to 7.

10. A computer-readable storage medium storing one or more programs, which, when executed by an electronic device including a plurality of application programs, causes the electronic device to execute the method according to any one of claims 1 to 7.

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