Forward error correction system and method
By using the controller to calculate and issue encoding and decoding parameters in SD-WAN, a forward error correction tunnel between intelligent gateways is established, which solves the problems of low transmission performance and lack of universality in the existing SDWAN forward error correction system, and achieves more efficient data transmission and lower delay fluctuations.
Patent Information
- Application Number
- CN202411783352.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-05
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2044-12-05
AI Technical Summary
The existing SDWAN forward error correction system has lower transmission performance than user requirements, long processing delays and lack of universality in hardware improvements, resulting in high development costs and limited performance improvements.
Through the forward error correction method performed by the controller in the software-defined wide area network (SD-WAN), user configuration data is obtained to calculate encoding and decoding parameters, forward error correction tunnels between intelligent gateways are established, and encoding and decoding parameters are issued on the intelligent gateway to reduce computing resource consumption and delay fluctuations.
Improves forward error correction performance, reduces delay fluctuations, improves data transmission quality, while reducing dependence on processor performance, reducing development costs, and enhancing hardware versatility.
Smart Images

Figure CN119853862A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of computer network transmission, and in particular to a forward error correction system and method. Background Art
[0002] With the development of SDWAN, more and more enterprises choose to use SDWAN to build their own enterprise intranet. SDWAN can easily realize the cloud access of enterprise applications and the interconnection of branches. Enterprises can use SDWAN for video conferencing and file transfer. With the continuous increase of enterprise applications, the amount of data that needs to be transmitted in the process of realizing various businesses is increasing. This has caused two major problems. The first is the demand for bandwidth expansion. Both high-definition video and file transfer require large bandwidth. The second is the link quality requirement. The electromagnetic propagation delay of cross-border video conferencing can reach hundreds of milliseconds. Adding the device delay, the specific propagation delay is actually about two to three hundred milliseconds. Excessive delay will reduce the user experience and affect the transmission speed. In addition to delay, packet loss often occurs in the underlying link.
[0003] The current mainstream networking mode of SDWAN is the mode of terminal equipment plus core equipment. The main problem encountered when running the forward error correction method in the existing SDWAN architecture is low transmission performance, which cannot meet the bandwidth requirements of users, and the forward error correction processing increases the processing delay of other data packets. There are several existing methods to improve the performance of forward error correction: the first is to upgrade the performance of the SDWAN processor. The performance of high-end device processors is better than that of low-end devices, which can improve the processing capability of the forward error correction function. The second method is to optimize the coding algorithm of forward error correction, disassemble the existing encoding and decoding matrix, and obtain a multi-step operation matrix with lower computational complexity. The third method is to use dedicated hardware for forward error correction coding operations, solidify different operations in dedicated hardware modules, and improve forward error correction performance. Remote interconnection accounts for a large proportion of the usage scenarios of SDWAN.
[0004] However, there are limitations to the above methods for optimizing forward error correction of SDWAN traffic. The disadvantage of the method of upgrading the performance of SDWAN processor is that it is expensive, which is contrary to the style of SDWAN that it is cheap and of good quality. The method of optimizing the forward error correction coding algorithm faces the dilemma of complex algorithm implementation and high development cost. The method of using specialized hardware to improve the forward error correction performance requires the use of specialized hardware to implement the forward error correction decoding function, which is not universal. Summary of the invention
[0005] In view of this, the present invention provides a forward error correction system and method to solve the problems of high price, high algorithm development cost and non-universality of hardware improvement currently faced by forward error correction function optimization.
[0006] In a first aspect, the present invention provides a forward error correction method, which is executed by a controller in a software-defined wide area network, and includes:
[0007] Acquire user configuration data; the user configuration data includes an identifier of the first intelligent gateway, an identifier of the second intelligent gateway, and network parameters;
[0008] Based on the user configuration data, calculate the encoding parameters and the corresponding decoding parameters;
[0009] Based on the encoding parameters, establishing a forward error correction tunnel between the first intelligent gateway and the second intelligent gateway;
[0010] Sending the target traffic and encoding parameters to the first intelligent gateway for forward error correction encoding to generate a target message;
[0011] The target message is controlled to be sent to the second intelligent gateway through the forward error correction tunnel, so that the second intelligent gateway performs forward error correction decoding through the decoding parameters.
[0012] The forward error correction method provided by the embodiment of the present invention uses a controller to generate encoding parameters and corresponding decoding parameters, and sends the encoding parameters and the corresponding inverse matrix to the intelligent gateway after creating a forward error correction tunnel, so as to save the computing resources of the intelligent gateway and reduce the delay fluctuation of forward error correction decoding. At the same time, the transmission quality of the application can be improved without affecting the message processing performance that does not participate in forward error correction.
[0013] In an optional implementation, the network parameters include at least one of redundancy, bandwidth, and delay.
[0014] The forward error correction method provided in the embodiment of the present invention takes into account the redundancy, bandwidth and delay set by the user when generating coding parameters, so that the algorithm can be well adapted to the user's actual usage scenarios and improve the coding performance. In addition, since the delay parameters can be obtained from historical data, this also makes full use of the monitoring characteristics of the software-defined wide area network.
[0015] In an optional embodiment, the method further includes:
[0016] Obtain a user matching strategy; the user strategy includes at least one of the source IP, destination IP, source port, destination port, and protocol type;
[0017] Based on the user matching strategy, the target flow is determined from each flow corresponding to the first intelligent gateway.
[0018] The forward error correction method provided in the embodiment of the present invention configures the forward error correction flow selection rules by obtaining the user matching strategy, and the configuration is sent to the forward error correction flow selection module through the controller. When the traffic matches the user strategy, it is determined as the target traffic and transferred to the forward error correction encoding module to accurately match the user traffic and select the flow for each forward error correction tunnel.
[0019] In an optional implementation, sending the target traffic and the encoding parameters to a forward error correction encoding module for forward error correction encoding to generate a target message includes:
[0020] Control the forward error correction coding module to switch to the first optional processor, and perform a forward error correction coding operation on the target traffic based on the coding parameters to generate a target message;
[0021] The target message is sent to the original processor in the forward error correction coding module.
[0022] The forward error correction method provided by the embodiment of the present invention processes data packets by switching to a separate processor, while the original forwarding process is still placed on the original processor. In this way, the two processors have different processing queues. This switching function is highly efficient and requires relatively little code change.
[0023] In a second aspect, the present invention provides a forward error correction system, which is applied to a software-defined wide area network, and the system includes:
[0024] A controller, configured to obtain user configuration data; the user configuration data includes an identifier of the first intelligent gateway, an identifier of the second intelligent gateway, and network parameters; based on the user configuration data, calculate encoding parameters and corresponding decoding parameters; based on the encoding parameters, establish a forward error correction tunnel between the first intelligent gateway and the second intelligent gateway;
[0025] A forward error correction coding module, used to perform forward error correction coding on the target traffic based on the coding parameters to generate a target message;
[0026] The forward error correction decoding module is used to perform forward error correction decoding according to the decoding parameters when the second intelligent gateway receives the target message sent by the first intelligent gateway.
[0027] The forward error correction system provided by the embodiment of the present invention includes a controller, a forward error correction encoding module and a forward error correction decoding module. Specifically, the controller is responsible for calculating encoding parameters and decoding parameters, and sending these parameters to the intelligent gateway when establishing a forward error correction tunnel. Then, the message encoding and decoding are performed based on the forward error correction encoding module and the forward error correction decoding module respectively. This design reduces the computing burden of the intelligent gateway, allowing the intelligent gateway to focus more on forwarding and processing data, thereby improving the efficiency of the overall system and optimizing the transmission of video traffic and other traffic therein.
[0028] In an optional embodiment, the system further includes:
[0029] The forward error correction flow selection module is used to determine the target flow among the various flows corresponding to the first intelligent gateway based on the user matching strategy, and send the target flow to the forward error correction encoding module.
[0030] The forward error correction system provided by the embodiment of the present invention selects the traffic matching the strategy from the user's traffic as the target traffic, and finally sends it to the forward error correction coding module, so that the flow selection action is more accurate and more suitable for point-to-point forward error correction tunnels, so as to better meet user needs.
[0031] In an optional implementation, the forward error correction coding module further includes:
[0032] The first optional processor is used to specifically execute the operation of sending the target traffic to the forward error correction coding module when there is target traffic matching the user matching policy.
[0033] The forward error correction system provided by the embodiment of the present invention runs all forward coding functions on a dedicated processor, which can not only give full play to the computing performance and improve the cache hit probability, but also put the original processing logic on the original processing core to ensure that the original forwarding logic and delay remain unchanged and the development cost is low.
[0034] In an optional implementation, the forward error correction decoding module further includes:
[0035] The second optional processor is used to perform a forward error correction decoding operation specifically through decoding parameters when the second intelligent gateway receives the target message sent by the first intelligent gateway, and after obtaining the original message data, send the original message data to the original processor in the forward error correction decoding module.
[0036] In the forward error correction system provided by the embodiment of the present invention, the forward error correction decoding module also runs separately on another processing core, ensuring that there is a processor dedicated to processing the forward error correction decoding function, and the other processor processes other logics, ensuring that the original forwarding logic and delay remain unchanged, which can greatly speed up data processing without affecting the processing speed of other messages at all.
[0037] In a third aspect, the present invention provides a controller comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the forward error correction method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.
[0038] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the forward error correction method of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0040] Figure 1 is a schematic flow chart of a forward error correction method according to an embodiment of the present invention;
[0041] Figure 2 is a schematic diagram of the architecture of a forward error correction system according to an embodiment of the present invention;
[0042] Figure 3 is a flow chart of a controller of a forward error correction system according to an embodiment of the present invention;
[0043] Figure 4 is a schematic diagram of a flow chart of a forward error correction stream selection module of a forward error correction system according to an embodiment of the present invention;
[0044] Figure 5 Schematic diagram of the hardware structure of the controller according to the embodiment of the present invention. DETAILED DESCRIPTION
[0045] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0046] With the continuous increase of enterprise applications, the amount of data that needs to be transmitted in the process of implementing various businesses is increasing. This has caused two major problems. The first is the demand for bandwidth expansion. High-definition video requires very high transmission bandwidth, and file transmission requires even more bandwidth. The second is the link quality requirement. Video conferencing is particularly sensitive to packet loss. Retransmission of data packets in scenarios with large delays will lead to a decrease in transmission performance. Even if the overall bandwidth is increased, the forwarding rate cannot be increased.
[0047] According to an embodiment of the present invention, a forward error correction method embodiment is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0048] In this embodiment, a forward error correction method is provided. Figure 1 is a flow chart of a forward error correction method according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps:
[0049] Step S101, obtaining user configuration data; the user configuration data includes an identifier of a first intelligent gateway, an identifier of a second intelligent gateway, and network parameters.
[0050] Specifically, the user inputs configuration data through the intelligent gateway configuration platform, and the data includes an identifier of the intelligent gateway to specifically specify between which two sites the forward error correction tunnel needs to be established.
[0051] Furthermore, the identification of the intelligent gateway includes: an IP address, a MAC address or a device name.
[0052] In some optional implementations, the above network parameters include at least one of redundancy, bandwidth and delay.
[0053] During user configuration, you can specify the redundancy parameter, which determines the number of redundant packets generated during the forward error correction coding process. Redundancy is usually expressed as the ratio between the number of original packets and the number of redundant packets, such as 20:5, which means that 5 redundant packets will be generated for every 20 original packets, which can resist 20% packet loss.
[0054] Optionally, the user needs to configure the maximum acceptable delay of the forward error correction tunnel. The delay parameter is closely related to the selection of the encoding strategy. Higher redundancy can provide better packet loss recovery capabilities, but may increase the delay of encoding and decoding. For example, in the above embodiment, when the traffic is low, it may take a long time to wait for less than 20 packets, then the user's delay will be non-negligible. Therefore, the user needs to limit the upper limit of the delay according to the needs of the application scenario.
[0055] Optionally, the user needs to configure the bandwidth used by the forward error correction tunnel. This parameter affects the size and range of the coding matrix, which in turn affects the efficiency of encoding and decoding.
[0056] In summary, the forward error correction method in this embodiment takes into account the user's personalized redundancy, bandwidth and delay, so that the algorithm can be well adapted to the user's actual usage scenarios and improve the encoding performance. In addition, the delay parameters can be obtained from historical data, which also makes full use of the monitoring characteristics of SDWAN.
[0057] Step S102: Calculate encoding parameters and corresponding decoding parameters based on user configuration data.
[0058] Specifically, the number of rows and columns of the Vandermonde matrix is determined according to the redundancy configured by the user, and the size range of the matrix is calculated according to the bandwidth and delay. Then, the construction principle of the Vandermonde matrix is used to generate a forward matrix as a coding parameter according to the determined dimension.
[0059] Furthermore, based on the generated Vandermonde forward matrix, its inverse matrix is calculated as a decoding parameter.
[0060] Step S103: establishing a forward error correction tunnel between the first intelligent gateway and the second intelligent gateway based on the encoding parameters.
[0061] Specifically, the identification information of the first intelligent gateway and the second intelligent gateway is extracted from the user configuration data to create a forward error correction tunnel. When creating the forward error correction tunnel, in addition to creating the tunnel itself, it is also necessary to apply for a large buffer area to cache data packets. Finally, the generated tunnel configuration information is sent to the first intelligent gateway and the second intelligent gateway through the controller command configuration interface.
[0062] Furthermore, since a point-to-point tunnel is created, when the user needs to protect data at multiple sites, multiple tunnels need to be created.
[0063] Furthermore, if there are multiple tunnels, a tunnel number is generated, and the tunnel number corresponds to each tunnel one by one, and is used to distinguish different forward error correction tunnels to ensure that the data packet can be correctly sent to the target intelligent gateway.
[0064] Step S104: Send the target traffic and encoding parameters to the first intelligent gateway for forward error correction encoding to generate a target message.
[0065] Specifically, the forward error correction coding module receives target traffic, ie, data packets that need to be forward error correction coded, and coding parameters from a controller or other related modules.
[0066] Furthermore, for each received data packet, the first intelligent gateway encodes it according to the encoding parameters and the current encoding state, and combines the encoded data packets into a target message, which also includes a forward error correction header, which contains a tunnel number and other necessary metadata so that the receiving end can correctly identify and process it.
[0067] Optionally, after generating the target message, the first intelligent gateway may choose to cache it and wait for an appropriate time to send it, or immediately send it to the forward error correction tunnel.
[0068] Step S105: Control the target message to be sent to the second intelligent gateway through the forward error correction tunnel, so that the second intelligent gateway performs forward error correction decoding through decoding parameters.
[0069] Specifically, the target message arrives at the receiving end of the second intelligent gateway after being transmitted through the network. The receiving end identifies the tunnel to which the message belongs and the encoding and decoding parameters, that is, the decoding inverse matrix, according to the information in the tunnel header.
[0070] Furthermore, the decoding module of the second intelligent gateway performs forward error correction decoding using the pre-cached decoding inverse matrix and the received target message to restore the original data packet.
[0071] In summary, the forward error correction method provided by the embodiment of the present invention first receives and parses user configuration data, where the user configuration data includes identifiers of two intelligent gateways specified by the user (as a data sender and a receiver, respectively), and sets a series of network parameters, such as redundancy, bandwidth, and latency, to optimize the reliability and efficiency of data transmission.
[0072] Next, the system controller calculates the coding parameters and their corresponding decoding inverse matrix based on the configuration data provided by the user and the construction principle of the Vandermonde matrix. The coding parameters are used to guide the data sender on how to generate redundant data packets, while the decoding inverse matrix is used to restore the received target message to the original data.
[0073] Subsequently, based on the calculated encoding parameters, a forward error correction tunnel is established between the first intelligent gateway and the second intelligent gateway. When users need to protect data from multiple sites, multiple tunnels need to be created. If there are multiple tunnels, a tunnel number is generated. The tunnel number corresponds to each tunnel one by one to distinguish different forward error correction tunnels and ensure that the data packet can be correctly sent to the target intelligent gateway.
[0074] Next, the controller or other modules send the target traffic and encoding parameters to the forward error correction coding module, perform forward error correction encoding on the target traffic according to the encoding parameters, generate a target message containing original data and redundant information, and transmit it to the receiving end through the forward error correction tunnel.
[0075] Finally, after the target message reaches the second intelligent gateway, it enters the forward error correction decoding module. This module uses the previously sent decoding inverse matrix to decode the message, restore the original data and pass it to the end user.
[0076] In some optional embodiments, the method further comprises:
[0077] Obtain a user matching strategy; the user strategy includes at least one of the source IP, destination IP, source port, destination port, and protocol type;
[0078] Based on the user matching strategy, the target flow is determined from each flow corresponding to the first intelligent gateway.
[0079] By obtaining the session table and user matching strategy inside the intelligent gateway device, such as source IP, destination IP, source port, destination port, protocol type, etc., it also includes application information, and application is a more flexible dimension. The traffic that successfully matches will enter the subsequent flow selection logic, and the specific forward error correction tunnel information will be synchronized to the flow selection module. The data packets that fail to match directly enter the forwarding logic.
[0080] In some optional implementations, sending the target traffic and the encoding parameters to a forward error correction encoding module for forward error correction encoding to generate a target message includes:
[0081] Control the forward error correction coding module to switch to the first optional processor, and perform a forward error correction coding operation on the target traffic based on the coding parameters to generate a target message;
[0082] The target message is sent to the original processor in the forward error correction coding module.
[0083] Existing devices all have two processor cores, and one processor is fully capable of handling ordinary forwarding traffic. However, if the processor needs to handle both ordinary traffic forwarding and forward error correction encoding and decoding functions, two problems that cannot be ignored are likely to arise: the first is the low processing performance of forward error correction; the other is that it will affect the original process forwarding and produce unpredictable delays. Therefore, in an embodiment of the present invention, by switching the processor, the encoding operation is placed on a dedicated processing core, while the original forwarding process is still placed on the original processor. When there is target traffic that matches the user matching strategy, the data packet is transferred to another processor, and the two processors have different processing queues. The process of switching the processor is to first obtain the queue of another processor and put the index of the data packet over.
[0084] In this embodiment, a forward error correction system is provided, which is applied to a software defined wide area network. The system architecture is as follows: Figure 2 As shown, including:
[0085] A controller, configured to obtain user configuration data; the user configuration data includes an identifier of the first intelligent gateway, an identifier of the second intelligent gateway, and network parameters; based on the user configuration data, calculate encoding parameters and corresponding decoding parameters; based on the encoding parameters, establish a forward error correction tunnel between the first intelligent gateway and the second intelligent gateway;
[0086] A forward error correction coding module, used to perform forward error correction coding on the target traffic based on the coding parameters to generate a target message;
[0087] The forward error correction decoding module is used to perform forward error correction decoding according to the decoding parameters when the second intelligent gateway receives the target message sent by the first intelligent gateway.
[0088] The system can be used for the intelligent gateway configuration management platform to configure different types of forward error correction flow selection strategies and forward error correction encoding and decoding strategies. The configuration is translated and sent to the user-side intelligent gateway node through the controller. The controller command configuration interface shares variables with the module processes in the gateway node. The user's cloud access and Internet traffic data packets will be connected to the user-side gateway node. The gateway node first uses the data transceiver module under the data plane development kit (dpdk) framework to store the user data packet into the Linux user space memory through zero-copy technology. The forward error correction encoding module generates corresponding redundant data packets based on the user-set strategy and the currently accumulated data packets. After the opposite intelligent gateway device receives the data packet sent by this end, it will enter the forward error correction decoding module, and the decoded data will be passed to the end user.
[0089] Specifically, the controller's workflow diagram is as follows: Figure 3 As shown, the controller is mainly responsible for translating the forward error correction algorithm. The encoding is performed using the Vandermonde matrix. During decoding, the data can be restored by solving the inverse matrix of the corresponding data packet and performing operations on the received data packet.
[0090] The first step is to receive user configuration. The user needs to choose between which two sites to establish a forward error correction tunnel. Therefore, the user configuration includes the identifiers of the first smart gateway and the second smart gateway. In addition to tunnel information, redundancy, bandwidth, and latency parameters need to be sent down. The redundancy information needs to match the link packet loss rate. Users can monitor and query the historical packet loss rate for better adaptation.
[0091] The second step is to calculate the encoding and decoding parameters. The specific encoding and decoding parameters are calculated through the redundancy, bandwidth and delay configured by the user. The calculation of encoding parameters and decoding parameters mainly involves calculating the forward matrix and inverse matrix of the Vandermonde matrix. The size ratio of the matrix can be obtained through redundancy. The size range of the matrix can be calculated through bandwidth and delay.
[0092] The third step is to create a forward error correction tunnel. To create a forward error correction tunnel, you need to send configurations to the smart gateways at both ends and turn on the corresponding forward error correction function. When creating a forward error correction tunnel, in addition to creating the tunnel itself, you also need to apply for a large buffer area to cache data packets. When users need to protect data from multiple sites, they need to create multiple tunnels. When there are multiple tunnels, tunnel codes are generated. The tunnel codes correspond to the tunnels one by one. At the same time, a forward error correction header needs to be added to the original traffic to distinguish them by the tunnel number. The encoding and decoding ends align the encoding and decoding parameters by the tunnel number. In addition to tunnel information, redundancy, bandwidth, and latency parameters also need to be sent. The redundancy information needs to match the link packet loss rate. Users can query the historical packet loss rate through monitoring to better adapt.
[0093] The fourth step is to send down the coding parameters. One of the core issues facing forward error correction is the latency problem. After the user sends down the redundancy, the appropriate redundant packet ratio is determined. This coding rule also takes into account the forward error correction bandwidth set by the user and the maximum tolerable latency. Finally, the coding rule is comprehensively derived and sent to the intelligent gateway responsible for encoding. The intelligent gateway will generate the final coding matrix and cache it.
[0094] The fifth step is to send down the decoding parameters. Based on its powerful computing power, the controller can generate the corresponding inverse matrix when determining the encoding parameters, and transmit the data to the decoding intelligent gateway. When creating the forward error correction tunnel, the decoding parameters can be cached, which can reduce the computing load of the intelligent gateway without affecting the normal traffic forwarding at that time.
[0095] Forward error correction coding module, the processing logic of the forward error correction coding module mainly consists of two parts, one is to decide when to encode the cached data packets, and the other is to select the correct coding matrix to encode the data. When creating a forward error correction tunnel, a series of coding parameters and delay parameters will be sent. The delay parameter is the maximum delay that the user can tolerate, so the processing of data cannot exceed this delay. Due to the propagation delay between points, the actual waiting time will be shorter than the user's configuration time. When the data volume is low, redundant packets are generated and sent out with the packets received when the timeout occurs. When the data volume is large, redundant packets are generated as much as possible with the maximum parameters, which can improve processing performance. Therefore, when the data volume is large, redundant messages will not be sent until the timeout occurs. The sent message will carry tunnel information and packet information. The packet information contains the total number of data packets, actual data packets and redundant packets encoded in this forward error correction.
[0096] The forward error correction decoding module runs at the other end of the tunnel and is used to perform forward error correction decoding through decoding parameters when the second intelligent gateway receives the target message sent by the first intelligent gateway.
[0097] In an optional embodiment, the system further includes:
[0098] The forward error correction flow selection module is used to determine the target flow among the various flows corresponding to the first intelligent gateway based on the user matching strategy, and send the target flow to the forward error correction encoding module.
[0099] The flow chart of the forward error correction flow selection module is as follows: Figure 4 As shown in the figure, this module mainly selects the traffic matching the policy from the user's traffic and finally sends it to the forward error correction coding module. Point-to-point tunnels require accurate flow selection, so the matching conditions of the five-tuple and the application are provided. The five-tuple and the application are in an AND relationship, which can locate the target traffic more accurately.
[0100] Specifically, the first step is to match the session. For rule-based matching algorithms, using session records is a good approach. For smart gateway devices, there is a large session table inside that counts traffic with consistent five-tuples. This session indicates the life cycle of this connection and also records the related processing actions of this connection, which can speed up the processing process. If the session has been matched, the flow selection action can be directly executed.
[0101] The second step is to match the user policy. If the session is not matched successfully, the user policy needs to be matched again. The user policy contains a five-tuple and application information. Application is a more flexible dimension, and users are advised to configure application conditions as much as possible. The traffic that successfully matches will enter the subsequent flow selection logic, and the specific forward error correction tunnel information will be synchronized to the flow selection module. The data packets that fail to match directly enter the forwarding logic.
[0102] The third step is to switch processors. The existing economic version devices all have two processor cores. One processor is fully capable of handling ordinary forwarding traffic. If this processor is used to handle both ordinary traffic forwarding and forward error correction encoding and decoding functions, two serious problems will arise. The first is the low performance of forward error correction processing. The second is that it will affect the original process forwarding and cause unpredictable delays. The specific solution is that the original forwarding process is still placed on the original processor, and when the forward error correction rules set by the user are matched, the data packet is transferred to another processor. The two processors have different processing queues. The process of switching processors is to first obtain the queue of another processor and put the index of the data packet over.
[0103] The fourth step is to transfer to the forward error correction coding module. In the process of switching processors, not only the processing queue is modified, but also the message processing function node is modified. When the processor processes the corresponding message, it will call the function of the corresponding node to perform forward error correction coding. This switching function is highly efficient and requires less code changes.
[0104] In an optional implementation, the forward error correction coding module further includes:
[0105] The first optional processor is used to specifically execute the operation of sending the target traffic to the forward error correction coding module when there is target traffic matching the user matching policy.
[0106] In order to improve processing performance, all forward coding functions are run on a dedicated processor, while the original forwarding function is still placed on the original processor. This can greatly speed up data processing without affecting the processing speed of other messages.
[0107] In an optional implementation, the forward error correction decoding module further includes:
[0108] The second optional processor is used to perform a forward error correction decoding operation specifically through decoding parameters when the second intelligent gateway receives the target message sent by the first intelligent gateway, and after obtaining the original message data, send the original message data to the original processor in the forward error correction decoding module.
[0109] The forward error correction decoding module also runs separately on another processing core. When the intelligent gateway receives the forward error correction encapsulated message, it will be forwarded to another processor. The processed original message will be forwarded to the original processor again, ensuring that there is a processor dedicated to the forward error correction decoding function, and another processor handles other logic, ensuring that the original forwarding logic and delay remain unchanged. The decoding module will store the received encoded messages according to different tunnels and groups. When a certain group message is received, the decoding action can be performed.
[0110] Optionally, a timer can be set according to the timeout time set by the user, and the timer time is consistent with the encoding module. After the timer expires, the inverse matrix of the decoding can be determined according to the lost message, and the original data can be restored through the two. If the lost message exceeds the restoration capability, a warning is issued and reported to the user. The user can consider resetting the redundancy.
[0111] The present invention also provides a controller, see Figure 5 , Figure 5 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Figure 5As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 5 A processor 10 is taken as an example.
[0112] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.
[0113] The memory 20 stores instructions executable by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.
[0114] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0115] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.
[0116] The computer device also includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 5 The example of connecting through bus is taken in the following.
[0117] The input device 30 can receive input digital or character information, and generate key signal input related to the user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator bar, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display and a plasma display. In some optional embodiments, the display device can be a touch screen.
[0118] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.
[0119] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.
[0120] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.
Claims
1. A forward error correction method, characterized in that: The method is performed by a controller in a software-defined wide area network, and the method includes: Acquire user configuration data; the user configuration data includes an identifier of the first intelligent gateway, an identifier of the second intelligent gateway, and network parameters; Calculating encoding parameters and corresponding decoding parameters based on the user configuration data; Based on the encoding parameters, establishing a forward error correction tunnel between the first intelligent gateway and the second intelligent gateway; Sending the target traffic and the encoding parameters to the first intelligent gateway for forward error correction encoding to generate a target message; The target message is controlled to be sent to the second intelligent gateway through the forward error correction tunnel, so that the second intelligent gateway performs forward error correction decoding according to the decoding parameters.
2. The method according to claim 1, characterized in that The network parameters include at least one of redundancy, bandwidth, and latency.
3. The method according to claim 2, characterized in that The method further comprises: Obtain a user matching strategy; the user strategy includes at least one of a source IP, a destination IP, a source port, a destination port, and a protocol type; Based on the user matching strategy, the target flow is determined from each flow corresponding to the first intelligent gateway.
4. The method according to claim 3, characterized in that The determining the target flow from each flow corresponding to the first intelligent gateway based on the user matching strategy includes: Control the forward error correction coding module to switch to the first optional processor, and perform a forward error correction coding operation on the target traffic based on the coding parameters to generate the target message; The target message is sent to the original processor in the forward error correction coding module.
5. A forward error correction system, characterized in that: Applied to software-defined wide area network, the system comprises: A controller, configured to obtain user configuration data; the user configuration data includes an identifier of a first intelligent gateway, an identifier of a second intelligent gateway, and network parameters; based on the user configuration data, calculate encoding parameters and corresponding decoding parameters; based on the encoding parameters, establish a forward error correction tunnel between the first intelligent gateway and the second intelligent gateway; A forward error correction coding module, used to perform forward error correction coding on the target traffic based on the coding parameters to generate a target message; The forward error correction decoding module is used to perform forward error correction decoding according to the decoding parameters when the second intelligent gateway receives the target message sent by the first intelligent gateway.
6. The system according to claim 5, characterized in that The system further comprises: The forward error correction flow selection module is used to determine the target flow among the various flows corresponding to the first intelligent gateway based on the user matching strategy, and send the target flow to the forward error correction encoding module.
7. The system according to claim 6, characterized in that The forward error correction coding module also includes: The first optional processor is used to perform a forward error correction coding operation specifically on the target traffic based on the coding parameters when the target traffic is received.
8. The system according to claim 7, characterized in that The forward error correction decoding module also includes: The second optional processor is used to perform a forward error correction decoding operation specifically through the decoding parameters when the second intelligent gateway receives the target message sent by the first intelligent gateway, and after obtaining the original message data, send the original message data to the original processor in the forward error correction decoding module.
9. A controller, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the forward error correction method according to any one of claims 1 to 4 by executing the computer instructions.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the forward error correction method according to any one of claims 1 to 4.
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