Inp substrate-based srd and gummel diode integrated device and method of manufacturing the same

Abstract

The application relates to an SRD and a Gunn diode integrated device based on an InP substrate and a preparation method thereof, and the device comprises an InP substrate, a buffer layer, a cathode contact layer, an N interlayer, an anode contact layer, a device isolation groove, an electrode groove, an anode and a cathode, wherein the InP substrate, the buffer layer, the cathode contact layer, the N interlayer and the anode contact layer are sequentially arranged from bottom to top; the doping concentration of the N interlayer gradually increases from bottom to top; the device isolation groove is formed from the upper surface of the anode contact layer to the lower surface of the buffer layer; one side of the device isolation groove is an SRD area, and the other side is a Gunn diode area. The SRD and the Gunn diode are prepared on the same substrate, the doping concentration of the N interlayer gradually changes, the step time of the SRD is reduced, the oscillation frequency of the Gunn diode is increased, the problems of large volume, high loss and complex assembly caused by the device separation design are avoided, and the functions of compact and efficient pulse generation and high-frequency oscillation are realized.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor device integration, and in particular relates to an SRD and Gunn diode integrated device based on an InP substrate and a preparation method thereof. Background Art

[0002] The terahertz band refers to electromagnetic waves with frequencies between 0.1 and 10 THz and wavelengths between 3 mm and 30 μm. Terahertz application technology has extremely important applications in imaging, security inspection, public safety, biomedicine, non-destructive testing, communications and even the military. However, due to the lack of high-performance terahertz sources and detectors, the development and application of terahertz science and technology are greatly limited. There are many ways to generate terahertz, among which microelectronics methods are relatively easy to implement. Gunn diodes can convert direct current into microwaves without adding complex circuits. The operating frequency of Gunn diodes can reach the terahertz range, making them a relatively cheap and stable viable device. As a solid-state terahertz source, Gunn diodes can be used in millimeter-wave and submillimeter-wave frequency sources. They can be applied to airport security inspections, material imaging and detection, and environmental monitoring.

[0003] With the continuous advancement of science and technology, ultra-wideband radar (UWB) has been widely used in short-range communications and precise indoor positioning due to its high penetration and ultra-wide signal bandwidth. Ultra-wideband narrow pulses are an important component of UWB communications and UWB radar, and are also a key component of high-speed samplers. Therefore, a pulse source with a higher voltage amplitude and narrower pulse width is particularly important in the UWB field. Since the advent of the step recovery diode (SRD), it has been widely used in narrow pulse generation and comb signal generators due to its extremely fast reverse recovery time, high pulse repetition frequency, long life, and compatibility with many circuits with high edge time requirements.

[0004] In existing technology, SRDs and Gunn diodes are manufactured and used separately. In practical applications, they need to be combined, typically requiring separate packaging and interconnection. This approach not only increases system complexity and size, but also leads to signal loss during transmission, impacting overall performance. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides an SRD and Gunn diode integrated device based on an InP substrate and a method for preparing the same. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] The first aspect of the present invention provides an SRD and Gunn diode integrated device based on an InP substrate, comprising: an InP substrate, a buffer layer, a cathode contact layer, an N interlayer, an anode contact layer, a device isolation trench, an electrode groove, an anode and a cathode, wherein:

[0007] The InP substrate, the buffer layer, the cathode contact layer, the N interlayer and the anode contact layer are arranged in sequence from bottom to top;

[0008] The doping concentration of the N interlayer gradually increases from bottom to top;

[0009] The device isolation trench extends from the upper surface of the anode contact layer to the lower surface of the buffer layer; one side of the device isolation trench is the SRD region, and the other side is the Gunn diode region;

[0010] The electrode groove is located at the edge of the SRD region and the edge of the Gunn diode region, and extends from the upper surface of the anode contact layer to the upper surface of the cathode contact layer;

[0011] The anode is located on the upper surface of the anode contact layer;

[0012] The cathode is located on an upper surface of the cathode contact layer in the electrode groove.

[0013] In one achievable manner, the material of the anode contact layer in the SRD region is P-type doped InP;

[0014] The material of the anode contact layer in the Gunn diode region is N-type doped InP.

[0015] In one achievable embodiment, the doping concentration of the anode contact layer in the SRD region is 1×10 19 ~2×10 19 cm -3 ;

[0016] The doping concentration of the anode contact layer in the Gunn diode region is 1×10 19 ~2×10 19 cm -3 .

[0017] In one achievable manner, the materials of the buffer layer, the cathode contact layer and the N interlayer are all InP.

[0018] In one achievable manner, the cathode contact layer is doped with an N-type doping type.

[0019] In one achievable embodiment, the doping concentration of the cathode contact layer is 1×10 19 ~2×10 19 cm -3 ;

[0020] The doping concentration of the N interlayer is 2×10 15 ~2×10 16 cm -3 ;

[0021] The thickness of the N interlayer is 0.5-5 μm.

[0022] In an achievable manner, the product of the thickness of the N interlayer and the minimum doping concentration of the N interlayer is greater than or equal to 10 12 cm -2 .

[0023] In one achievable manner, the N interlayer includes: a first sub-N interlayer, a second sub-N interlayer, and a third sub-N interlayer, which are sequentially arranged from bottom to top and whose doping concentrations increase sequentially, wherein:

[0024] The doping concentration of the third N sub-layer (43) is less than or equal to 2×10 16 cm -3 ;

[0025] The doping concentration of the first N-sub-layer (41) is greater than or equal to 2×10 15 cm -3 , and the product of the thickness of the N interlayer and the doping concentration of the first sub-N interlayer is greater than or equal to 10 12 cm -2 .

[0026] A second aspect of the present invention provides a method for preparing an SRD and Gunn diode integrated device based on an InP substrate, comprising the following steps:

[0027] S1: preparing a buffer layer, a cathode contact layer, an N interlayer and an anode contact layer in order from bottom to top on the upper surface of the InP substrate; the doping concentration of the N interlayer gradually increases from bottom to top;

[0028] S2: Etching the upper surface of the anode contact layer to form a device isolation trench extending from the upper surface of the anode contact layer to the lower surface of the buffer layer; one side of the device isolation trench is the SRD region, and the other side is the Gunn diode region; etching the upper surface of the anode contact layer at the edge of the SRD region and the upper surface of the anode contact layer at the edge of the Gunn diode region to form an electrode groove extending from the upper surface of the anode contact layer to the upper surface of the cathode contact layer;

[0029] S3: preparing an anode on the upper surface of the anode contact layer; and preparing a cathode on the upper surface of the cathode contact layer in the electrode groove.

[0030] In one implementable manner, the following steps are further included between step S1 and step S2:

[0031] P-type doping ions are implanted at one end of the anode contact layer to form a P-type doping region; the implantation energy is 50-100 keV.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] The present invention's integrated SRD and Gunn diode device based on an InP substrate and its fabrication method utilizes device isolation trenches to divide the device into an SRD region and a Gunn diode region, enabling the fabrication of both the SRD and Gunn diode on the same substrate. Furthermore, by gradually varying the doping concentration of the N interlayer, a top-down built-in electric field is introduced into the N interlayer, thereby reducing the SRD's step time and increasing the Gunn diode's oscillation frequency. This avoids the bulk, high losses, and complex assembly issues inherent in separate device designs, achieving compact and efficient pulse generation and high-frequency oscillation. The SRD and Gunn diode integrated device provided by the present invention can be used in fields such as microwave pulse generators, millimeter-wave radar, and broadband communications. It can be used as a standalone high-frequency oscillator or provide precise signal control in applications requiring short pulse signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 Schematic diagram of the structure of an SRD and Gunn diode integrated device based on an InP substrate provided by an embodiment of the present invention;

[0035] Figure 2a to Figure 2d It is a structural diagram of the steps of a method for preparing an SRD and Gunn diode integrated device based on an InP substrate provided by an embodiment of the present invention.

[0036] Reference numerals:

[0037] 1: InP substrate; 2: buffer layer; 3: cathode contact layer; 4: N interlayer; 41: first sub-N interlayer; 42: second sub-N interlayer; 43: third sub-N interlayer; 5: anode contact layer; 6: anode; 7: cathode. DETAILED DESCRIPTION

[0038] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0039] Example 1

[0040] See Figure 1 , Figure 1 It is a schematic structural diagram of an InP substrate-based SRD and Gunn diode integrated device provided by an embodiment of the present invention.

[0041] The SRD and Gunn diode integrated device based on an InP substrate provided in this embodiment includes: an InP substrate 1, a buffer layer 2, a cathode contact layer 3, an N interlayer 4, an anode contact layer 5, a device isolation groove, an electrode groove, an anode 6, and a cathode 7. Among them, the InP substrate 1, the buffer layer 2, the cathode contact layer 3, the N interlayer 4, and the anode contact layer 5 are arranged in sequence from bottom to top. The doping concentration of the N interlayer 4 gradually increases from bottom to top. The device isolation groove runs through the upper surface of the anode contact layer 5 to the lower surface of the buffer layer 2. One side of the device isolation groove is the SRD region, and the other side of the device isolation groove is the Gunn diode region. The electrode groove is located at the edge of the SRD region and the edge of the Gunn diode region, and runs through the upper surface of the anode contact layer 5 to the upper surface of the cathode contact layer 3. The anode 6 is located on the upper surface of the anode contact layer 5; the cathode 7 is located on the upper surface of the cathode contact layer 3 in the electrode groove.

[0042] Specifically, if Figure 1 As shown, a device isolation trench extends from the top surface of the anode contact layer 5 to the top surface of the substrate 1, separating the device into an SRD region and a Gunn diode region. Anode 6 is located on the top surface of the anode contact layer 5 in the SRD region and on the top surface of the anode contact layer 5 in the Gunn diode region. For example, an electrode groove is located at the leftmost end of the SRD region and the rightmost end of the Gunn diode region. The electrode groove extends from the top surface of the anode contact layer 5 to the top surface of the cathode contact layer 3, exposing the top surface of the cathode contact layer 3 and forming electrode steps in the SRD region and the Gunn diode region. Cathode 7 is located on the electrode steps in the SRD region and the Gunn diode region. The buffer layer 2, cathode contact layer 3, N interlayer 4, anode contact layer 5, anode 6, and cathode 7 in the SRD region form an SRD device, while the buffer layer 2, cathode contact layer 3, N interlayer 4, anode contact layer 5, anode 6, and cathode 7 in the Gunn diode region form a Gunn diode device. Furthermore, because the doping concentration of the N interlayer 4 gradually increases from bottom to top, a top-down built-in electric field can be introduced within the N interlayer 4. For SRD devices, during the reverse pumping phase of the pulse discharge, minority carrier holes within the N interlayer 4 can be extracted more quickly and accelerated to saturation velocity earlier, thereby reducing the step time and making the voltage change rate of the voltage pulse front formed on the load in the pulse discharge circuit larger and shorter, thus endowing the SRD device with fast recovery characteristics. For Gunn diode devices, when a forward bias voltage is applied, electrons within the N interlayer 4 can be accelerated earlier, transferring from the low-energy valley to the high-energy valley, thereby forming the desired Gunn domains. This reduces the performance degradation caused by the excessively long "dead zone" in traditional Gunn diode devices and can improve the oscillation frequency and power of the Gunn diode. It should be understood that the N interlayer is an N-type doped interlayer.

[0043] In this embodiment, the device is divided into an SRD region and a Gunn diode region through a device isolation trench, so that the SRD and the Gunn diode can be prepared on the same substrate. The N interlayer 4 is used to reduce the step time of the SRD and increase the oscillation frequency of the Gunn diode, thereby avoiding the problems of large size, high loss, and complex assembly caused by the device separation design, and realizing compact and efficient pulse generation and high-frequency oscillation functions.

[0044] In one achievable approach, the device isolation trench length is 200-500μm, meaning the distance between the SRD region and the Gunn diode region is 200-500μm, ensuring proper function of both the SRD and Gunn diode devices. If the SRD and Gunn diode regions are too close, a direct connection between the SRD and Gunn diode devices may occur, leading to heat transfer and signal coupling, potentially damaging device performance. Excessive distance can increase signal transmission delays and reduce integration.

[0045] In this embodiment, the material of the anode contact layer 5 in the SRD region is P-type doped InP, and the doping concentration of the anode contact layer 5 in the SRD region is 1×10 19 ~2×10 19 cm -3 The material of the anode contact layer 5 in the Gunn diode region is N-type doped InP, and the doping concentration of the anode contact layer 5 in the Gunn diode region is 1×10 19 ~2×10 19 cm -3 The materials of the buffer layer 2, cathode contact layer 3 and N interlayer 4 are all InP. The doping type of the cathode contact layer 3 and N interlayer 4 is N type. The doping concentration of the cathode contact layer 3 is 1×10 19 ~2×10 19 cm -3 The doping concentration of N interlayer 4 is 2×10 15 ~2×10 16 cm -3 The thickness of the N interlayer 4 is 0.5 to 5 μm. The product of the thickness of the N interlayer 4 and the minimum doping concentration of the N interlayer 4 is greater than or equal to 10 12 cm -2 .

[0046] The device provided in this embodiment uses the second-generation semiconductor material InP as the material of the entire device, and the SRD region is P + NN + Type doping structure, Gunn diode region is N + NN +Type doping structure, the anode contact layer 5 in the SRD region is formed by injecting P-type doping ions into the N-type doped InP, that is, into the anode contact layer 5 in the Gunn diode region. InP has the advantages of high mobility, low electron effective mass, and better noise performance. The band gap of InP is larger than that of Si, and the mobility of electrons is also much higher than that of Si. Therefore, compared with traditional Si-based SRDs, InP-based SRDs have higher breakdown voltages and faster reverse recovery times. Compared with GaAs, the potential difference between the central energy valley and the satellite energy valley of the InP semiconductor is larger, which is 0.52eV. The threshold field strength of the highest value of the electron mobility of InP is also larger than that of GaAs. Therefore, compared with traditional GaAs-based Gunn diodes, InP-based Gunn diodes have higher oscillation frequencies and output power.

[0047] Furthermore, the doping concentration of the N interlayer 4 increases linearly from bottom to top, or the doping concentration of the N interlayer 4 increases stepwise from bottom to top. For SRD, the thinner the N interlayer 4, the less charge is stored and the more obvious the step effect is; while for Gunn diode, the condition for generating Gunn domain is that the product of the doping concentration N and the vertical distance L between the anode and cathode is greater than 10 12 cm -2 Therefore, while ensuring that the N interlayer 4 is as thin as possible, the product of the thickness of the N interlayer 4 and the minimum doping concentration of the N interlayer 4 is greater than or equal to 10 12 cm -2 , which enables SRD and Gunn diode to be realized based on the same material, so that SRD and Gunn diode can coexist on the same semiconductor substrate, and can simultaneously utilize the fast switching characteristics of SRD and the high-frequency oscillation characteristics of Gunn diode, effectively reducing the interconnection loss between devices, improving the integration and performance of the system, and greatly reducing packaging and assembly costs.

[0048] In this embodiment, the N interlayer 4 includes: a first N sub-interlayer 41, a second N sub-interlayer 42, and a third N sub-interlayer 43, which are arranged in sequence from bottom to top and have increasing doping concentrations. Furthermore, the total thickness of the first N sub-interlayer 41, the second N sub-interlayer 42, and the third N sub-interlayer 43 is 0.5 to 5 μm, and the doping concentration of the third N sub-interlayer 43 is less than or equal to 2×10 16 cm -3 The doping concentration of the first N-sub-layer 41 is greater than or equal to 2×10 15 cm -3 , and the product of the thickness of the N interlayer 4 and the doping concentration of the first sub-N interlayer 41 is greater than or equal to 10 12 cm -2 In one achievable method, the doping concentration of the third N-sub-layer 43 is 1×10 16 ~2×10 16 cm-3 For example, the thickness of the N interlayer 4 is 1 μm, and the doping concentration of the first sub-N interlayer 41 is 1×10 16 cm -3 The doping concentration of the second N-sub-layer 42 is 1.5×10 16 cm -3 The doping concentration of the third N-sub-layer 43 is 2×10 16 cm -3 Here, the thickness of the N interlayer 4 is the sum of the thicknesses of the first N sub-interlayer 41 , the second N sub-interlayer 42 and the third N sub-interlayer 43 .

[0049] This embodiment also provides a method for preparing an SRD and Gunn diode integrated device based on an InP substrate, which is used to prepare the SRD and Gunn diode integrated device based on an InP substrate provided in this embodiment. Figure 2a to Figure 2d , Figure 2a to Figure 2d It is a structural diagram of the steps of a method for preparing an SRD and Gunn diode integrated device based on an InP substrate provided by an embodiment of the present invention.

[0050] The method for preparing an SRD and Gunn diode integrated device based on an InP substrate provided in this embodiment includes the following steps:

[0051] S1: A buffer layer 2, a cathode contact layer 3, an N interlayer 4 and an anode contact layer 5 are prepared on the upper surface of an InP substrate 1 in order from bottom to top; the doping concentration of the N interlayer 4 increases gradually from bottom to top.

[0052] Specifically, if Figure 2a As shown in FIG. 1 , an InP epitaxial structure is grown on a clean semi-insulating InP substrate 1 by metal organic chemical vapor deposition (MOCVD). The InP epitaxial structure includes a buffer layer 2, a cathode contact layer 3, an N interlayer 4, and an anode contact layer 5. Furthermore, a 50 nm thick InP is grown on the upper surface of the InP substrate 1 as the buffer layer 2. A 100 nm thick N interlayer is grown on the upper surface of the buffer layer 2. + Type InP, doping concentration is 1×10 19 ~2×10 19 cm -3 , and obtain the cathode contact layer 3. On the upper surface of the cathode contact layer 3, grow a 0.5-5 μm thick N-type InP with a doping concentration of 2×10 15 ~2×10 16 cm -3 , and the N interlayer 4 is obtained, and the doping concentration of the N interlayer 4 increases gradually from bottom to top. A 100nm thick N interlayer is grown on the upper surface of the N interlayer 4. + Type InP, with a doping concentration of 1×10 19 ~2×10 19 cm-3 , obtaining the anode contact layer 5.

[0053] In this embodiment, the MOCVD process conditions include: the Group III raw material is trimethyl indium (TMIn), the Group V raw material is phosphine (PH3), the carrier gas is hydrogen (H2) or nitrogen (N2), the N-type dopant is silane (SiH4), the growth temperature is 550-650°C, and the reaction pressure is 50-100 Torr. The doping concentration of InP can be achieved by changing the gas dosage of SiH4. For example, the doping concentration is increased from 1×10 16 cm -3 becomes 2×10 16 cm -3 The SiH4 gas flow rate was varied from 0.01 sccm to 0.03 sccm. The carrier gas was used to carry the metal organic source into the reaction chamber while providing a reducing environment to help prevent oxidation.

[0054] In this embodiment, the following steps are further included between step S1 and step S2:

[0055] P-type doping ions are implanted at one end of the anode contact layer 5 to form a P-type doping region. The implantation energy is 50-100 keV.

[0056] Specifically, if Figure 2b As shown, zinc, beryllium or magnesium is selected as the P-type dopant ion, and the P-type dopant ion is implanted at one end of the anode contact layer 5. The implantation depth is equal to the thickness of the anode contact layer 5, and the implantation energy is 50keV to 100keV, forming a doping concentration of 1×10 19 ~2×10 19 cm -3 Furthermore, because InP is brittle and easily damaged by heat, it is annealed using a low-temperature rapid annealing process after ion implantation. The annealing temperature is 600-700°C and the annealing time is controlled within 30 seconds. The length of the P-type doped region is less than half the length of the anode contact layer 5. After annealing, the epitaxial wafer is placed in an organic solvent of N-methylpyrrolidone (NMP) heated to 80°C for 10 minutes, then rinsed with deionized water, blown dry with nitrogen, and single-sided polished.

[0057] S2: Etching is performed on the upper surface of the anode contact layer 5 to form a device isolation trench extending from the upper surface of the anode contact layer 5 to the lower surface of the buffer layer 2; one side of the device isolation trench is the SRD region, and the other side is the Gunn diode region. Etching is performed on the upper surface of the anode contact layer 5 at the edge of the SRD region and the upper surface of the anode contact layer 5 at the edge of the Gunn diode region to form an electrode groove extending from the upper surface of the anode contact layer 5 to the upper surface of the cathode contact layer 3.

[0058] Specifically, if Figure 2c As shown, a wet or dry etching process is used to etch the middle portion of the upper surface of the anode contact layer 5 to a depth equal to the thickness of the InP epitaxial structure, i.e., the sum of the thicknesses of the buffer layer 2, cathode contact layer 3, N interlayer 4, and anode contact layer 5. This forms a device isolation trench extending from the upper surface of the anode contact layer 5 to the lower surface of the buffer layer 2. The device isolation trench divides the epitaxial structure into an SRD region and a Gunn diode region, with the side where the P-type doped region is located being the SRD region. A wet or dry etching process is used to etch the leftmost end of the SRD region and the rightmost end of the Gunn diode region, forming an electrode groove extending from the upper surface of the anode contact layer 5 to the upper surface of the cathode contact layer 3, thereby exposing the upper surface of the cathode contact layer 3 and forming electrode steps for the SRD region and the Gunn diode region.

[0059] Furthermore, the wet etching process includes: performing wet etching using a mixed solution of H3PO4:H2O2:H2O=2:3:30, controlling the etching depth by reaction time, and measuring the etching depth by a step profiler.

[0060] The dry etching process includes setting the BCl3 gas flow rate to 6 sccm, the Ar gas flow rate to 10 sccm, the ICP power to 500 W, the DC bias voltage to 120 V, and performing dry etching on the InP epitaxial structure at an etching rate of 800 nm / min.

[0061] S3: preparing an anode 6 on the upper surface of the anode contact layer 5, and preparing a cathode 7 on the upper surface of the cathode contact layer 3 in the electrode groove.

[0062] Specifically, if Figure 2d As shown, the required metal electrode patterns are photoetched on the upper surface of the anode contact layer 5 and the upper surface of the cathode contact layer 3 in the electrode groove. Subsequently, a Ge / Au / Ni / Au (90 / 50 / 30 / 200nm) stacked metal is evaporated using an electron beam and then annealed at a temperature of 380°C to form ohmic contacts between the anode 6 and cathode 7. Furthermore, ohmic contacts can reduce the contact resistance between the electrodes and the semiconductor material.

[0063] This embodiment provides an integrated device of an SRD and a Gunn diode based on an InP substrate and a method for preparing the same device. By growing the same epitaxial material on an InP substrate 1 and employing processes such as vapor deposition, ion implantation, and isolation to form the SRD and Gunn diode in different regions of the unified InP substrate 1, the SRD and Gunn diode are integrated on the same substrate, ensuring mutual isolation between the two devices while optimizing electrical performance, enabling the integrated device to operate within a higher frequency range. Furthermore, this embodiment modifies the N-type doping concentration of the InP by varying the SiH4 gas dosage, producing an N interlayer 4 with a gradually increasing doping concentration from bottom to top. This imparts a fast recovery characteristic to the SRD device and improves the oscillation frequency and power of the Gunn diode. Because this embodiment utilizes a unified substrate design, the SRD and Gunn diode do not need to be separately packaged, reducing system footprint, simplifying system circuit wiring, and improving overall integration. Furthermore, because the SRD and Gunn diode are integrated on the same substrate, the devices can be directly interconnected via a microwave waveguide structure or transmission line, eliminating the need for external wiring and significantly reducing signal transmission loss and circuit complexity. This avoids the parasitic effects and connection losses that occur when traditional SRDs and Gunn diodes are connected through an external circuit, thereby improving the transmission efficiency of high-frequency signals. Furthermore, the manufacturing process can reduce assembly steps, improving production efficiency, reducing packaging and assembly costs, and helping to reduce the manufacturing cost of the entire system. The SRD and Gunn diode integrated device provided in this embodiment can be used in fields such as microwave pulse generators, millimeter-wave radar, and broadband communications. It can be used as a standalone high-frequency oscillator or provide precise signal control in applications requiring short pulse signals.

[0064] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. An integrated device of SRD and Gunn diode based on an InP substrate, characterized in that: include: InP substrate (1), buffer layer (2), cathode contact layer (3), N interlayer (4), anode contact layer (5), device isolation groove, electrode groove, anode (6) and cathode (7), wherein, The InP substrate (1), the buffer layer (2), the cathode contact layer (3), the N interlayer (4) and the anode contact layer (5) are arranged in sequence from bottom to top; The doping concentration of the N interlayer (4) gradually increases from bottom to top; The device isolation groove extends from the upper surface of the anode contact layer (5) to the lower surface of the buffer layer (2); one side of the device isolation groove is the SRD region, and the other side is the Gunn diode region; The electrode groove is located at the edge of the SRD region and the edge of the Gunn diode region, and extends from the upper surface of the anode contact layer (5) to the upper surface of the cathode contact layer (3); The anode (6) is located on the upper surface of the anode contact layer (5); The cathode (7) is located on the upper surface of the cathode contact layer (3) in the electrode groove.

2. The SRD and Gunn diode integrated device based on an InP substrate according to claim 1, characterized in that: The material of the anode contact layer (5) in the SRD region is P-type doped InP; The material of the anode contact layer (5) in the Gunn diode region is N-type doped InP.

3. The SRD and Gunn diode integrated device based on an InP substrate according to claim 2, characterized in that: The doping concentration of the anode contact layer (5) in the SRD region is 1×10 19 ~2×10 19 cm -3 ; The doping concentration of the anode contact layer (5) in the Gunn diode region is 1×10 19 ~2×10 19 cm -3 .

4. The SRD and Gunn diode integrated device based on an InP substrate according to claim 1, characterized in that: The materials of the buffer layer (2), the cathode contact layer (3) and the N interlayer (4) are all InP.

5. The SRD and Gunn diode integrated device based on an InP substrate according to claim 4, characterized in that: The doping type of the cathode contact layer (3) is N-type.

6. The SRD and Gunn diode integrated device based on an InP substrate according to claim 5, characterized in that: The doping concentration of the cathode contact layer (3) is 1×10 19 ~2×10 19 cm -3 ; The doping concentration of the N interlayer (4) is 2×10 15 ~2×10 16 cm -3 ; The thickness of the N interlayer (4) is 0.5-5 μm.

7. The SRD and Gunn diode integrated device based on an InP substrate according to claim 1, characterized in that: The product of the thickness of the N interlayer (4) and the minimum doping concentration of the N interlayer (4) is greater than or equal to 10 12 cm -2 .

8. The SRD and Gunn diode integrated device based on an InP substrate according to claim 1, characterized in that: The N interlayer (4) comprises: a first sub-N interlayer (41), a second sub-N interlayer (42), and a third sub-N interlayer (43) which are sequentially arranged from bottom to top and whose doping concentrations increase sequentially, wherein: The doping concentration of the third N sub-layer (43) is less than or equal to 2×10 16 cm -3 ; The doping concentration of the first N-sub-layer (41) is greater than or equal to 2×10 15 cm -3 , and the product of the thickness of the N interlayer (4) and the doping concentration of the first sub-N interlayer (41) is greater than or equal to 10 12 cm -2 .

9. A method for preparing an integrated device of SRD and Gunn diode based on an InP substrate, characterized in that: The following steps are involved: S1: preparing a buffer layer (2), a cathode contact layer (3), an N interlayer (4), and an anode contact layer (5) arranged in order from bottom to top on the upper surface of an InP substrate (1); the doping concentration of the N interlayer (4) gradually increases from bottom to top; S2: etching the upper surface of the anode contact layer (5) to form a device isolation groove extending from the upper surface of the anode contact layer (5) to the lower surface of the buffer layer (2); one side of the device isolation groove is the SRD region, and the other side is the Gunn diode region; etching the upper surface of the anode contact layer (5) at the edge of the SRD region and the upper surface of the anode contact layer (5) at the edge of the Gunn diode region to form an electrode groove extending from the upper surface of the anode contact layer (5) to the upper surface of the cathode contact layer (3); S3: preparing an anode (6) on the upper surface of the anode contact layer (5); and preparing a cathode (7) on the upper surface of the cathode contact layer (3) in the electrode groove.

10. The method for preparing an SRD and Gunn diode integrated device based on an InP substrate according to claim 9, characterized in that: The following steps are also included between step S1 and step S2: P-type doping ions are implanted at one end of the anode contact layer (5) to form a P-type doping region; the implantation energy is 50-100 keV.

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