Array substrate, display panel and display device

Abstract

The invention provides an array substrate, a display panel and a display device. The array substrate is provided with a display area and a non-display area located on the periphery of the display area, and comprises a substrate, a first electrode and a second electrode, the data lines are located in the display area on one side of the substrate, and the data lines extend in the first direction; the multiple grid lines are located in the display area on one side of the substrate, the multiple grid lines extend in the second direction, and the second direction is perpendicular to the first direction; the plurality of data lines and the plurality of grid lines are crossed to define a sub-pixel region; the at least one detection assembly is located in the non-display area on one side of the substrate; the detection assembly comprises a plurality of detection parts which are sequentially arranged along the first direction; the length of the detection part in the first direction is larger than the length of the detection part in the second direction.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an array substrate, a display panel and a display device. Background Art

[0002] See also Figure 1A and Figure 1B As shown, the pixel display area AA of the display panel is composed of M*N pixels, where M*N is the resolution of the display panel; each pixel is composed of three color sub-pixels, R, G, and B. There are gate lines and data lines for driving pixels between adjacent rows and columns of sub-pixels. Generally, the horizontal ones are gate metal lines, and the vertical ones are data metal lines. The electric field at these locations is abnormal, and considering the metal reflection, the positions of these metal lines on the color filter substrate need to be designed with a black matrix, such as Figure 1B As shown, the black matrix includes a first black matrix BM1 for shielding gate metal wiring, and a first black matrix BM2 for shielding data metal wiring; and a color filter portion is provided in the sub-pixel opening area, for example, a first color filter portion CR, a second color filter portion CG, and a third color filter portion CB. In the border area BB of the display panel, i.e., the non-display area, there are many circuit structures for driving the panel or auxiliary panel to work normally, and these positions should also be covered with a black matrix to prevent the display panel from reflecting light. Summary of the invention

[0003] The present disclosure provides an array substrate, a display panel and a display device. The array substrate has a display area and a non-display area located outside the display area, wherein:

[0004] substrate;

[0005] A plurality of data lines are located in the display area on one side of the substrate, and the plurality of data lines extend along a first direction;

[0006] A plurality of gate lines are located in the display area on one side of the substrate, the plurality of gate lines extend along a second direction, the second direction is perpendicular to the first direction; a plurality of data lines intersect with the plurality of gate lines to define a sub-pixel area;

[0007] At least one detection component is located in the non-display area on one side of the substrate; the detection component includes: a plurality of detection components arranged in sequence along the first direction; the length of the detection component along the first direction is greater than the length along the second direction.

[0008] In a possible implementation, the detection component includes: a gate, an active pattern, a first electrode, and a second electrode;

[0009] The length of the active pattern along the first direction is greater than the length along the second direction;

[0010] The second pole includes: a second pole first portion extending along a second direction, and two second pole second portions connected to the second pole first portion and extending along the first direction.

[0011] In a possible implementation, the array substrate further includes: at least one gate shift register located in the non-display area, the gate shift register including: a plurality of shift register units sequentially arranged and cascaded along the first direction; at least one of the detection components and the gate shift register are located on the same side of the display area;

[0012] The detection assembly includes: a first detection component group, a second detection component group, a third detection component group, and a fourth detection component group; the first detection component group includes at least one first detection component, the second detection component group includes at least one second detection component, the third detection component group includes at least one third detection component, and the fourth detection component group includes at least one fourth detection component;

[0013] The array substrate further includes: a first wiring extending along the first direction; the first wiring and the gate are located in different layers; and each gate of the same detection component is electrically connected to the first wiring.

[0014] In a possible implementation, the array substrate further includes: a plurality of second routing lines extending along the first direction, and a third routing line; the plurality of second routing lines include: a first sub-routing line, a second sub-routing line, a third sub-routing line, and a fourth sub-routing line;

[0015] In the same detection component, the first pole of each of the first detection components of the first detection component group is electrically connected to the first sub-routing, the first pole of each of the second detection components of the second detection component group is electrically connected to the second sub-routing, the first pole of each of the third detection components of the third detection component group is electrically connected to the third sub-routing, and the first pole of each of the fourth detection components of the fourth detection component group is electrically connected to the fourth sub-routing;

[0016] Each of the second electrodes of the same detection component is electrically connected to the third wiring.

[0017] In a possible implementation manner, the array substrate further includes: a plurality of terminals located in the non-display area, wherein the terminals and the detection component are located on different sides of the display area;

[0018] In the same detection assembly, the distance between the first detection component group and the terminal is greater than the distance between the second detection component group and the terminal; the distance between the second detection component group and the terminal is greater than the distance between the third detection component group and the terminal; the distance between the third detection component group and the terminal is greater than the distance between the fourth detection component group and the terminal;

[0019] The line width of the first sub-route in the area corresponding to the first detection component group is greater than the line width in the areas corresponding to the second detection component group, the third detection component group, and the fourth detection component group; the line width of the second sub-route in the area corresponding to the second detection component group is greater than the line width in the areas corresponding to the third detection component group and the fourth detection component group; the line width of the third sub-route in the area corresponding to the third detection component group is greater than the line width in the area corresponding to the fourth detection component group.

[0020] In a possible implementation manner, an extended edge line of the first sub-route close to the detection component coincides with an extended edge line of the second sub-route close to the detection component;

[0021] An extended edge line of the second sub-line close to the detection component coincides with an extended edge line of the third sub-line close to the detection component;

[0022] An extended edge line of the third sub-route close to the detection component coincides with an extended edge line of the fourth sub-route close to the detection component.

[0023] In a possible implementation manner, the array substrate further includes a plurality of pixel electrodes; the detection component is located in a row where the pixel electrodes are located;

[0024] The pixel electrode has a first pixel side extending along the first direction, and a second pixel side extending along the second direction, and the length of the first pixel side is greater than the length of the second pixel side;

[0025] The detection component has a first outer edge extending along the first direction, and a second outer edge extending along the second direction, and the length of the first outer edge is greater than the length of the second outer edge;

[0026] The first pixel side is parallel to the first outer edge, and the second pixel side is parallel to the second outer edge.

[0027] In a possible implementation, the length of the first outer edge in the first direction is smaller than the length of the first pixel side in the first direction; the length of the second outer edge in the second direction is smaller than the length of the second pixel side in the second direction.

[0028] In a possible implementation, in the first direction, the number of the detection components is the same as the number of the pixel electrodes.

[0029] In a possible implementation, in the first direction, the number of the pixel electrodes is N, the number of the detection components is M, and M=1 / N, where N is a positive integer greater than 1.

[0030] In a possible implementation manner, the array substrate further includes a floating detection component; and at least one of the first routing line, the second routing line, and the third routing line is disconnected from the floating detection component.

[0031] In a possible implementation, the array substrate further includes: a plurality of transparent electrode portions located on a side of the detection component away from the substrate, wherein the orthographic projections of the transparent electrode portions on the substrate cover the orthographic projections of the detection component on the substrate.

[0032] The embodiment of the present disclosure further provides a display panel, which includes the array substrate provided by the embodiment of the present disclosure, and also includes an opposite substrate opposite to the array substrate;

[0033] The opposing substrate includes: a black matrix, wherein the black matrix has a first black matrix opening at a position corresponding to at least a portion of the detection component, the orthographic projection of the first black matrix opening on the substrate overlaps with at least a portion of the orthographic projection of the detection component on the substrate, and the length of the first black matrix opening in the first direction is greater than the length along the second direction.

[0034] In a possible implementation manner, the opposite substrate further includes: a color filter layer; the color filter layer includes a first color resistance portion, a second color resistance portion, and a third color resistance portion;

[0035] The orthographic projection of the first color resist portion on the substrate covers the orthographic projection of the first detection component group on the substrate; the orthographic projection of the second color resist portion on the substrate covers the orthographic projection of the second detection component group on the substrate; the orthographic projection of the third color resist portion on the substrate covers the orthographic projection of the third detection component group on the substrate.

[0036] An embodiment of the present disclosure further provides a display device, which includes: the display panel provided by the embodiment of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1A is a schematic top view of a display panel;

[0038] Figure 1B for Figure 1ASchematic diagram of the local method in the middle display area;

[0039] Figure 2 It is one of the top view schematic diagrams of a display panel provided with a detection component in the related art;

[0040] Figure 3A One of the overall schematic diagrams of a display panel provided in an embodiment of the present disclosure;

[0041] Figure 3B for Figure 3A The enlarged schematic diagram of the dotted box Q in the middle;

[0042] Figure 4A One of the partial schematic diagrams of the array substrate provided by the embodiment of the present invention;

[0043] Figure 4B for Figure 4A One of the partial enlarged schematic diagrams of a detection component;

[0044] Figure 4C for Figure 4A The second partial enlarged schematic diagram of a detection component;

[0045] Figure 4D for Figure 4A The third partial enlarged schematic diagram of a detection component;

[0046] Figure 5 An equivalent circuit diagram of a detection component provided in an embodiment of the present disclosure;

[0047] Figure 6 A schematic diagram of a black matrix and a color filter at a detection component provided in an embodiment of the present disclosure;

[0048] Fig. 7A is a partial schematic diagram of a detection component J on one side of the array substrate;

[0049] Figure 7B for Fig. 7A An enlarged schematic diagram of the middle dashed line frame S1;

[0050] Figure 7C for Fig. 7A An enlarged schematic diagram of the dashed line frame S2;

[0051] Figure 8 A schematic diagram of a floating detection component provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0053] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0054] As used herein, "approximately" or "substantially the same" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "substantially the same" may mean that the difference relative to the stated value is within one or more standard deviations, or within ±30%, 20%, 10%, 5%.

[0055] In the accompanying drawings, the thickness of layers, films, panels, regions, etc., is exaggerated for clarity. Exemplary embodiments are described herein with reference to cross-sectional views as schematic diagrams of idealized embodiments. In this way, deviations from the shapes of the figures as a result of, for example, manufacturing techniques and / or tolerances will be expected. Thus, the embodiments described herein should not be interpreted as being limited to the specific shapes of the regions as shown herein, but include deviations in shape caused by, for example, manufacturing. For example, a region illustrated or described as flat may typically have rough and / or nonlinear features. In addition, the illustrated sharp corners may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shapes of the regions, and are not intended to limit the scope of the claims.

[0056] In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of well-known functions and well-known components.

[0057] Display panels are usually equipped with detection components to detect the external environment. However, the detection components of display panels in the prior art have unstable performance and large frame area. Among them, the ambient light detection component (sensor) needs to transmit light, so the black matrix on the color filter substrate needs to be designed with openings to expose the light detection component on the array substrate to the ambient light. As a light detection component, the size of the light detection component needs to be larger to achieve photocurrent. Under different semiconductor process conditions, the channel width of the light detection component may be 10 2 μm~10 6 When the area of ​​the light detection component is large, the area of ​​the black matrix opening also needs to be increased. The abrupt black matrix opening design will be noticed by users, which is not good for the visual experience. When the display panel equipped with the light detection component is large in size, the environment at different positions of the display panel is more complicated. In order to make the light detection component perceive the ambient light more accurately, it is necessary to set ambient light detection components on the top, bottom, left and right sides of the display panel. Figure 2 As shown, when the area of ​​the ambient light detection component S is large, the impact on the display panel frame is also large, especially the left and right frames, which are the locations of the gate shift registers of the integrated pixels. Since the characteristics of the light detection component in the shape of the "1" pattern are unstable, the light detection component in the shape of the traditional U-shaped horizontal parallel pattern occupies a larger frame.

[0058] In view of this, see Figure 3A-3B , Figure 4A-4D and Figure 5 As shown, Figure 3A This is one of the overall schematic diagrams of the display panel provided in the embodiment of the present disclosure, Figure 3B for Figure 3A The enlarged schematic diagram of the dotted box Q in the middle, Figure 4A One of the partial schematic diagrams of the array substrate provided by the embodiment of the present invention, Figure 4B for Figure 4A One of the partial enlarged schematic diagrams of a detection component in the Figure 4C for Figure 4A The second partial enlarged schematic diagram of a detection component. Figure 4D for Figure 4A The third partial enlarged diagram of a detection component. Figure 5 This is an equivalent circuit diagram of a detection component provided in an embodiment of the present disclosure. An embodiment of the present disclosure provides an array substrate having a display area AA and a non-display area BB located outside the display area AA, wherein:

[0059] Substrate 1;

[0060] A plurality of data lines 2 are located in the display area AA on one side of the substrate 1, and the plurality of data lines 2 extend along a first direction X;

[0061] A plurality of gate lines 3 are located in a display area AA on one side of the substrate 1, and the plurality of gate lines 3 extend along a second direction Y, the second direction Y intersects with the first direction X, and optionally, the second direction Y is perpendicular to the first direction X; a plurality of data lines 2 intersect with the plurality of gate lines 3 to define a sub-pixel area;

[0062] At least one detection component J is located in the non-display area BB on one side of the substrate 1; the detection component J includes: a plurality of detection components J0 arranged in sequence along the first direction X; the length a1 of the detection component J0 along the first direction X is greater than the length a2 along the second direction Y.

[0063] In the disclosed embodiment, a plurality of detection components J0 extend along the first direction X, and a length a1 of the detection components J0 along the first direction X is greater than a length a2 along the second direction Y, which can save space in the non-display area BB of the array substrate along the second direction Y, and is beneficial to the arrangement of other components (for example, a shift register) in the non-display area BB in the second direction Y, thereby avoiding the problem that the border of the non-display area BB of the array substrate in the second direction Y is too wide due to the detection components J0 occupying too much space in the non-display area BB along the second direction Y, and affecting the arrangement of other components in the non-display area BB.

[0064] In one possible implementation, the detection component J may be a light detection component, the detection component J0 may be a light detection component, and the light detection component may specifically be a transistor. In another possible implementation, the detection component J may also be other components, for example, it may be a color temperature detection component, and the detection component J0 may correspondingly be a color temperature detection component.

[0065] It should be noted that, in the embodiment of the present disclosure, the length of the detection component J0 along the first direction X may be the length of the outermost contour of the detection component J0 along the first direction X, and the length of the detection component J0 along the second direction Y may be the length of the outermost contour of the detection component J0 along the second direction Y; specifically, for example, Figure 4C As shown, among the orthographic projections of the various film layers of the detection component J0 on the substrate 1, the orthographic projection area of ​​the gate TA on the substrate 1 is the largest, covering the orthographic projections of other film layers on the substrate 1. Then, the outer contour of the gate TA can be used as the outermost contour of the detection component J0, and the length of the outer contour of the gate TA on the substrate 1 in the first direction X can be used as the length of the detection component J0 in the first direction X, and the length of the outer contour of the gate TA on the substrate 1 in the second direction Y can be used as the length of the detection component J0 in the second direction Y.

[0066] In one possible implementation, see Figure 4A-4D and Figure 5As shown, the detection component J0 includes: a gate TA, an active TB pattern, a first pole TC1, and a second pole TC2; the length b1 of the active pattern TB along the first direction X is greater than the length b2 along the second direction Y; the second pole TC2 includes: a second pole first portion TC21 extending along the second direction Y, and two second pole second portions TC22 connected to the second pole first portion TC21 and extending along the first direction X. In the embodiment of the present disclosure, the transistor is a U-shaped pattern transistor. Compared with the unstable performance of the "1"-shaped pattern transistor, the detection component J0 of the embodiment of the present disclosure has better stability. In the embodiment of the present disclosure, the U-shaped pattern transistor includes two second pole second portions TC22 extending along the first direction X and arranged along the second direction Y. Compared with the U-shaped parallel transistor with more second pole second portions TC22 arranged in the second direction Y, the length of the detection component J0 of the embodiment of the present disclosure in the second direction Y can be smaller, thereby reducing the occupied space of the detection component J0 in the second direction Y.

[0067] In another possible implementation, while meeting the narrow border requirement of the non-display area BB along the second direction Y and the wiring space permits, the second pole TC2 may also include more first poles TC1 and more second pole second parts TC22. For example, in the second pole TC2, the sum of the numbers of alternating first poles TC1 and second pole second parts TC22 may be 5. For example, the second pole TC2 may include two first poles TC1 and three second pole second parts TC22.

[0068] In a possible implementation, the array substrate further includes: at least one gate shift register (not shown in the figure) located in the non-display area BB, the gate shift register including: a plurality of shift register units sequentially arranged and cascaded along the first direction X; at least one detection component J and the gate shift register are located on the same side of the display area AA; specifically, the detection component J may be located between the gate shift register and the display area AA; see Figure 4A-4D and Figure 5 As shown, the detection component J includes: a first detection component group J1, a second detection component group J2, a third detection component group J3, and a fourth detection component group J4; the first detection component group J1 includes at least one first detection component J01, the second detection component group J2 includes at least one second detection component J02, the third detection component group J3 includes at least one third detection component J03, and the fourth detection component group J4 includes at least one fourth detection component J04; the array substrate also includes: a first wiring D1 extending along the first direction X; the first wiring D1 and the gate TA are located in different layers; each gate TA of the same detection component J is electrically connected to the first wiring D1.

[0069] In the embodiment of the present disclosure, the detection assembly J includes: a first detection component group J1, a second detection component group J2, a third detection component group J3, and a fourth detection component group J4; when the display panel is provided with a black matrix and a color filter layer, see Figure 6 As shown, the black matrix layer can be provided with a first black matrix opening B1 at the position of each detection component J0 to allow external light to pass through, and the color film layer can be provided with a first color resistance CR at the position of the first detection component J1 for covering, a second color resistance CG can be provided at the position of the second detection component J2 for covering, and a third color resistance CB can be provided at the position of the third detection component J3 for covering, and the black matrix can be not opened at the position of the fourth detection component J4. In this way, the detection of external ambient light can be achieved through the first detection component J1, the second detection component J2, and the third detection component J3, and the difference in panel appearance caused by the opening of the detection component J0 of the black matrix can be minimized, and the fourth The detection component J4 can be used as a control component to eliminate the influence of other interference factors; moreover, the array substrate also includes: a first routing line D1 extending along the first direction X, each gate TA of the same detection component J is electrically connected to the first routing line D1, which is convenient for unified control of multiple detection components J0, and each gate TA extending along the first direction X is electrically connected to the first routing line D1 of different layers and extending along the first direction X, that is, the gate TA of each detection component J0 is electrically connected through the first routing line D1 of the changed layer, which can avoid the problem that the array substrate is provided with a gate line 3 extending along the second direction Y. If each gate TA is connected in the same layer, it will cause a short circuit with the gate line 3, affecting the normal display.

[0070] In one possible implementation, see Figure 4A-4D and Figure 5 As shown, the gate TA extends along the first direction X, and the array substrate may further include: a gate connecting portion TAB connected to the gate TA and extending along the second direction Y, and a first overlapping portion TE; the gate connecting portion TAB may be in the same layer and material as the gate TA, and the first overlapping portion TE may be in the same layer as the pixel electrode layer or the common electrode layer; the orthographic projection of the first overlapping portion TE on the substrate 1 may partially overlap with the orthographic projection of the gate connecting portion TAB on the substrate 1, so as to be electrically connected through the first via K1 at the overlapping position; the orthographic projection of the first overlapping portion TE on the substrate 1 may also partially overlap with the orthographic projection of the first wiring D1 on the substrate 1, so as to be electrically connected through the second via K2 at the overlapping position, so as to realize the electrical connection of the gate TA with the first wiring D1 through the first overlapping portion TE.

[0071] In another possible implementation, if other methods can be used to avoid the short circuit between the gate TA of the detection component J0 and the gate line 3 (for example, the gate TA of the detection component J0 and the gate line 3 may not be located on the same layer), the gates TA of multiple detection components J0 may also be connected at the layer where the gates are located, see Figure 7A-7CAs shown, Fig. 7A is a partial schematic diagram of a detection component J on one side (such as the right side) of the array substrate, Figure 7B for Fig. 7A The enlarged schematic diagram of the dashed line frame S1, Figure 7C for Fig. 7A In the enlarged schematic diagram of the dotted line frame S2, the gate electrodes TA of the plurality of detection components J0 are electrically connected to each other in the first direction X.

[0072] Specifically, Figure 6 As shown, the black matrix may be provided with a plurality of second black matrix openings B2 at positions corresponding to each sub-pixel in the display area AA to achieve normal display.

[0073] In one possible implementation, see Figure 4A-4D and Figure 5 As shown, the first detection component group J1 may include two first detection components J01, the second detection component group J2 may include two second detection components J02, the third detection component group J3 may include two third detection components J03, and the fourth detection component group J4 may include two fourth detection components J04; in another possible implementation, the first detection component group J1 may also include other numbers of first detection components J01, the second detection component group J2 may also include other numbers of second detection components J02, the third detection component group J3 may also include other numbers of third detection components J03, and the fourth detection component group J4 may also include other numbers of fourth detection components J04, and the embodiments of the present disclosure are not limited thereto. For example, the first detection component group J1 may include one first detection component J01, the second detection component group J2 may include one second detection component J02, the third detection component group J3 may include one third detection component J03, and the fourth detection component group J4 may include one fourth detection component J04. For another example, the first detection component group J1 may include four first detection components J01, the second detection component group J2 may include four second detection components J02, the third detection component group J3 may include four third detection components J03, and the fourth detection component group J4 may include four fourth detection components J04.

[0074] In one possible implementation, see Figure 4A-4C and Figure 5As shown, the array substrate further includes: a plurality of second routing lines D2 extending along the first direction X, and a third routing line D3; the plurality of second routing lines D2 include: a first sub-routing line D21, a second sub-routing line D22, a third sub-routing line D23, and a fourth sub-routing line D24; in the same detection component J, the first pole TC1 of each first detection component J01 of the first detection component group J1 is electrically connected to the first sub-routing line D21, the first pole TC1 of each second detection component J02 of the second detection component group J2 is electrically connected to the second sub-routing line D22, the first pole TC1 of each third detection component J03 of the third detection component group J3 is electrically connected to the third sub-routing line D23, and the first pole TC1 of each fourth detection component J03 of the fourth detection component group J3 is electrically connected to the fourth sub-routing line D24; each second pole TC2 of the same detection component J is electrically connected to the third routing line D3. In this way, it is convenient to connect each end of the detection component J0 with the external circuit.

[0075] It should be noted that in order to clearly illustrate each detection component, Figure 4A Only the first detection component J1, the second detection component J2, the first sub-line D21, and the second sub-line D22 are schematically shown, and the third detection component J3, the fourth detection component J4, the third sub-line D23, and the fourth sub-line D24 are not shown. However, the embodiment of the present disclosure is not limited to the order. The connection relationship between the third detection component J3, the fourth detection component J4 and the first line D1, the second line D2, and the third line D3, as well as the setting relationship with the black matrix and the color film can be similar to the first detection component J1 and the second detection component J2, and can also be combined Figure 5 The equivalent circuit diagram is shown.

[0076] In one possible implementation, see Figure 4A-4D and Figure 5 As shown, the array substrate further includes: a plurality of terminals located in the non-display area BB, the terminals and the detection component J0 are located on different sides of the display area; specifically, for example, the detection component J0 is located as shown in FIG. Figure 3AOn the left side and right side of the array substrate shown in the figure, the terminal can be located on the lower side of the array substrate; in the same detection component J, the distance between the first detection component group J1 and the terminal is greater than the distance between the second detection component group J2 and the terminal; the distance between the second detection component group J2 and the terminal is greater than the distance between the third detection component group J3 and the terminal; the distance between the third detection component group J3 and the terminal is greater than the distance between the fourth detection component group J4 and the terminal; that is, the distances between the first detection component J1, the second detection component J2, the third detection component J3, the fourth detection component J4 and the terminal decrease in sequence; The line width d11 of a sub-route D21 in the area corresponding to the first detection component group J1 is greater than the line width d12 in the area corresponding to the second detection component group J2, the third detection component group J3, and the fourth detection component group J4; similarly, the line width of the second sub-route D22 in the area corresponding to the second detection component group J2 is greater than the line width in the area corresponding to the third detection component group J3 and the fourth detection component group J3; the line width of the third sub-route D23 in the area corresponding to the third detection component group J3 is greater than the line width in the area corresponding to the fourth detection component group J4. In this way, the problem that the fourth sub-route D24, the third sub-route D23, the second sub-route D22, and the first sub-route D21 gradually become longer, the line resistance gradually increases, and the resistance difference becomes larger, affecting the signal detection, can be improved due to the gradual increase in the distance from the fourth detection component J4, the third detection component J3, the second detection component J2, and the first detection component J1 to the terminal.

[0077] In a possible implementation manner, a detection component J may also be disposed on the opposite side of the array substrate in the non-display area to the terminal.

[0078] In a possible implementation, the terminals of the array substrate may be bound correspondingly to the terminals of a printed circuit board (PCB).

[0079] In one possible implementation, see Figure 4A-4D As shown, the edge extension line w1 of the first sub-route D21 close to the detection component J0 coincides with the edge extension line w2 of the second sub-route D22 close to the detection component J0; similarly, the edge extension line of the second sub-route D22 close to the detection component J0 coincides with the edge extension line of the third sub-route D23 close to the detection component J0; the edge extension line of the third sub-route D23 close to the detection component J0 coincides with the edge extension line of the fourth sub-route D24 close to the detection component J0.

[0080] In one possible implementation, see Figure 4A-4DAs shown, the array substrate further includes a plurality of pixel electrodes 4; the detection component J0 is located in the row where the pixel electrode 4 is located; the pixel electrode 4 has a first pixel side 41 extending along a first direction X, and a second pixel side 42 extending along a second direction Y, and the length e1 of the first pixel side 41 is greater than the length e2 of the second pixel side 42; the detection component J0 has a first outer edge JA extending along the first direction X, and a second outer edge JB extending along the second direction Y, and the length a1 of the first outer edge JA is greater than the length a2 of the second outer edge JB; the first pixel side 41 is parallel to the first outer edge JA, and the second pixel side 42 is parallel to the second outer edge JB. In the disclosed embodiment, when the detection component J0 is placed, the long side of the detection component J0 is parallel to the long side of the pixel electrode 4, and the short side of the detection component J0 is parallel to the short side of the pixel electrode 4.

[0081] In one possible implementation, see Figure 4A-4D As shown, the length a1 of the first outer edge JA in the first direction X is less than the length e1 of the first pixel side 41 in the first direction X; the length a2 of the second outer edge JB in the second direction Y is less than the length e2 of the second pixel side 42 in the second direction Y. Specifically, the detection component J0 can be set at a position corresponding to the row where the pixel electrodes 4 are located, and specifically, one detection component J0 can be set at the position where each pixel electrode 4 is located in the row, or the detection component J0 can be set at the position where some pixel electrodes 4 are located in the row.

[0082] In a possible implementation, in the first direction X, the number of the detection components J0 may be the same as the number of the pixel electrodes 4 .

[0083] In a possible implementation, in the first direction X, the number of pixel electrodes 4 is N, the number of detection components J0 is M, M=1 / N, where N is a positive integer greater than 1. Specifically, when N>1, in order to ensure visual uniformity, the plurality of detection components J0 on one side of the display area AA may be evenly distributed along the first direction X.

[0084] In one possible implementation, see Figure 8As shown, the array substrate also includes a floating detection component JC; at least one of the first wiring D1, the second wiring D2, and the third wiring D3 is disconnected from the floating detection component JC. Specifically, the first wiring D1, the second wiring D2, and the third wiring D3 are all disconnected from the floating detection component JC, that is, no signal is loaded to the floating detection component JC, and the gate TA, the first pole TC1, and the second pole TC2 of the floating detection component JC are all in a floating state. In the disclosed embodiment, the array substrate also includes a floating detection component JC, which can ensure that the process of the area where multiple detection components J0 are arranged in an entire row is more uniform, and can also prevent the problem of uneven Rubbing caused by rubbing the alignment film.

[0085] In one possible implementation, see Figure 4A-4D As shown, the array substrate further includes: a plurality of transparent electrode portions TD located on the side of the detection component J0 away from the substrate 1, and the orthographic projection of the transparent electrode portion TD on the substrate 1 covers the orthographic projection of the detection component J0 on the substrate 1. In the disclosed embodiment, since the detection component J0 is arranged in the liquid crystal box, the electric field generated by the detection component J0 may cause the liquid crystal to flip, thereby affecting the brightness of the ambient light irradiated into the channel of the detection component J0. In order to reduce the influence of the liquid crystal on the light sensing effect of the detection component J0, a transparent electrode portion TD in a floating state is arranged on the detection component J0 (the transparent electrode portion TD is not loaded with an electrical signal), thereby shielding the influence of the electric field generated by the detection component J0 on the liquid crystal. Specifically, the transparent electrode portion TD can be in the same layer and material as the pixel electrode or the common electrode.

[0086] Based on the same inventive concept, the embodiment of the present disclosure further provides a display panel, which includes the array substrate provided by the public embodiment, and also includes an opposite substrate opposite to the array substrate;

[0087] The opposite substrate includes: a black matrix; Figure 6 As shown, the black matrix has a first black matrix opening B1 at a position corresponding to at least part of the detection component, the orthographic projection of the first black matrix opening B1 on the substrate 1 overlaps at least part of the orthographic projection of the detection component J0 on the substrate 1, and the length of the first black matrix opening B1 in the first direction X is greater than the length along the second direction Y.

[0088] In one possible implementation, see Figure 5 or Figure 6As shown, the opposing substrate also includes: a color filter layer; the color filter layer includes a first color resist portion CR, a second color resist portion CG, and a third color resist portion CB; the orthographic projection of the first color resist portion CR on the substrate 1 covers the orthographic projection of the first detection component group J1 on the substrate 1; the orthographic projection of the second color resist portion CG on the substrate 1 covers the orthographic projection of the second detection component group J2 on the substrate 1; the orthographic projection of the third color resist portion CB on the substrate 1 covers the orthographic projection of the third detection component group J3 on the substrate 1.

[0089] Specifically, the first color resist portion CR may be a red color resist, the second color resist portion CG may be a green color resist, and the third color resist portion CB may be a blue color resist.

[0090] Based on the same inventive concept, an embodiment of the present disclosure further provides a display device, which includes: a display panel provided by the embodiment of the present disclosure.

[0091] Based on the same inventive concept, the embodiment of the present disclosure further provides a display device, including the above display panel provided by the embodiment of the present disclosure. The implementation of the display device can refer to the embodiment of the above display panel, and the repeated parts will not be repeated.

[0092] In specific implementation, in the embodiments of the present disclosure, the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc. Other essential components of the display device are well understood by those skilled in the art, and are not described in detail here, nor should they be used as limitations to the present disclosure.

[0093] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

[0094] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. An array substrate, comprising a display area and a non-display area located outside the display area, wherein: include: substrate; A plurality of data lines are located in the display area on one side of the substrate, and the plurality of data lines extend along a first direction; A plurality of gate lines are located in the display area on one side of the substrate, the plurality of gate lines extend along a second direction, the second direction is perpendicular to the first direction; the plurality of data lines intersect with the plurality of gate lines to define a sub-pixel area; At least one detection component is located in the non-display area on one side of the substrate; the detection component comprises: a plurality of detection components arranged in sequence along the first direction; A length of the detection component along the first direction is greater than a length of the detection component along the second direction.

2. The array substrate according to claim 1, wherein: The detection component includes: a gate, an active pattern, a first electrode, and a second electrode; The length of the active pattern along the first direction is greater than the length along the second direction; The second pole includes: a second pole first portion extending along a second direction, and two second pole second portions connected to the second pole first portion and extending along the first direction.

3. The array substrate according to claim 1 or 2, wherein: The array substrate further comprises: at least one gate shift register located in the non-display area, the gate shift register comprising: a plurality of shift register units sequentially arranged and cascaded along the first direction; at least one detection component and the gate shift register are located on the same side of the display area; The detection assembly includes: a first detection component group, a second detection component group, a third detection component group, and a fourth detection component group; the first detection component group includes at least one first detection component, the second detection component group includes at least one second detection component, the third detection component group includes at least one third detection component, and the fourth detection component group includes at least one fourth detection component; The array substrate further includes: a first wiring extending along the first direction; the first wiring and the gate are located in different layers; and each gate of the same detection component is electrically connected to the first wiring.

4. The array substrate according to claim 3, wherein: The array substrate further includes: a plurality of second routing lines extending along the first direction, and a third routing line; the plurality of second routing lines include: a first sub-routing line, a second sub-routing line, a third sub-routing line, and a fourth sub-routing line; In the same detection component, the first pole of each of the first detection components of the first detection component group is electrically connected to the first sub-routing, the first pole of each of the second detection components of the second detection component group is electrically connected to the second sub-routing, the first pole of each of the third detection components of the third detection component group is electrically connected to the third sub-routing, and the first pole of each of the fourth detection components of the fourth detection component group is electrically connected to the fourth sub-routing; Each of the second electrodes of the same detection component is electrically connected to the third wiring.

5. The array substrate according to claim 4, wherein: The array substrate further comprises: a plurality of terminals located in the non-display area, wherein the terminals and the detection component are located on different sides of the display area; In the same detection assembly, the distance between the first detection component group and the terminal is greater than the distance between the second detection component group and the terminal; the distance between the second detection component group and the terminal is greater than the distance between the third detection component group and the terminal; the distance between the third detection component group and the terminal is greater than the distance between the fourth detection component group and the terminal; The line width of the first sub-route in the area corresponding to the first detection component group is greater than the line width in the areas corresponding to the second detection component group, the third detection component group, and the fourth detection component group; the line width of the second sub-route in the area corresponding to the second detection component group is greater than the line width in the areas corresponding to the third detection component group and the fourth detection component group; the line width of the third sub-route in the area corresponding to the third detection component group is greater than the line width in the area corresponding to the fourth detection component group.

6. The array substrate according to claim 5, wherein: An extended edge line of the first sub-route close to the detection component coincides with an extended edge line of the second sub-route close to the detection component; An extended edge line of the second sub-line close to the detection component coincides with an extended edge line of the third sub-line close to the detection component; An extended edge line of the third sub-route close to the detection component coincides with an extended edge line of the fourth sub-route close to the detection component.

7. The array substrate according to any one of claims 1 to 6, wherein: The array substrate further comprises a plurality of pixel electrodes; the detection component is located in the row where the pixel electrodes are located; The pixel electrode has a first pixel side extending along the first direction, and a second pixel side extending along the second direction, and the length of the first pixel side is greater than the length of the second pixel side; The detection component has a first outer edge extending along the first direction, and a second outer edge extending along the second direction, and the length of the first outer edge is greater than the length of the second outer edge; The first pixel side is parallel to the first outer edge, and the second pixel side is parallel to the second outer edge.

8. The array substrate according to claim 7, wherein: The length of the first outer edge in the first direction is smaller than the length of the first pixel side in the first direction; the length of the second outer edge in the second direction is smaller than the length of the second pixel side in the second direction.

9. The array substrate according to claim 7 or 8, wherein: In the first direction, the number of the detection components is the same as the number of the pixel electrodes.

10. The array substrate according to claim 7 or 8, wherein: In the first direction, the number of the pixel electrodes is N, the number of the detection components is M, M=1 / N, where N is a positive integer greater than 1.

11. The array substrate according to claim 10, wherein: The array substrate further includes a floating detection component; at least one of the first routing line, the second routing line, and the third routing line is disconnected from the floating detection component.

12. The array substrate according to any one of claims 1 to 11, wherein: The array substrate further comprises: a plurality of transparent electrode portions located on a side of the detection component away from the substrate, wherein the orthographic projections of the transparent electrode portions on the substrate cover the orthographic projections of the detection component on the substrate.

13. A display panel, wherein: The array substrate comprises the array substrate according to any one of claims 1 to 12, and further comprises an opposite substrate opposite to the array substrate; The opposing substrate includes: a black matrix, wherein the black matrix has a first black matrix opening at a position corresponding to at least a portion of the detection component, the orthographic projection of the first black matrix opening on the substrate overlaps with at least a portion of the orthographic projection of the detection component on the substrate, and the length of the first black matrix opening in the first direction is greater than the length along the second direction.

14. The display panel according to claim 13, wherein: The opposite substrate further includes: a color filter layer; the color filter layer includes a first color resistance portion, a second color resistance portion, and a third color resistance portion; The orthographic projection of the first color resist portion on the substrate covers the orthographic projection of the first detection component group on the substrate; the orthographic projection of the second color resist portion on the substrate covers the orthographic projection of the second detection component group on the substrate; the orthographic projection of the third color resist portion on the substrate covers the orthographic projection of the third detection component group on the substrate.

15. A display device, wherein: include: A display panel as claimed in claim 13 or 14.

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