Method and device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth

Abstract

The invention relates to a method and a device for intelligently identifying server configuration and adaptively configuring PCIe (Peripheral Component Interconnect Express) bandwidth. The method comprises the following steps of: configuring a wiring mode of an I / O (Input / Output) expander in each server expansion card connected with a server mainboard and an onboard PCIe slot; starting a server power supply, and after the substrate management controller is initialized, acquiring a register value of an I / O expander on each server expansion card through an IIC communication protocol; the substrate management controller sends register values of all the I / O expanders to the complex programmable logic device; the complex programmable logic device sends register values of all the I / O expanders to a central processing unit of a server through a vGPIO communication protocol; and based on the register value of the I / O expander, the basic input / output system allocates bandwidth and resources to the onboard PCIE slot in each server expansion card. According to the method, the number of the universal server board cards can be reduced, the PCIe bandwidth can be adaptively configured, and the error probability is reduced.

Description

Technical Field

[0001] The present invention belongs to the field of servers, and in particular relates to a method and a device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth. Background Art

[0002] With the development of the digital economy, the market share of servers is growing, and the increasingly variable configuration requirements of servers also bring huge challenges to server manufacturers. Traditional server manufacturers often adopt customized servers or add various sub-cards to general server motherboards in the face of various configurations, which often comes with a lot of design costs. In addition, multiple configurations also bring higher complexity to the production line and customer operations, increasing the probability of errors. Summary of the invention

[0003] The present invention provides a method and device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth, aiming to solve at least one of the technical problems existing in the prior art.

[0004] The technical solution of the present invention relates to a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth, which is applied to a device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth. The device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth comprises: a server expansion card (Riser card), which is installed on a mainboard PCIE slot on a server mainboard, the number of the server expansion card is at least one, and each of the server expansion cards (Riser card) is provided with at least one onboard PCIE slot and an I / O expander; a baseboard management controller (Baseboard Management Controller, BMC), each of the server expansion cards (Riser card) is electrically connected to the baseboard management controller (Baseboard Management Controller, BMC) respectively; a complex programmable logic device (CPLD), which is electrically connected to the baseboard management controller (Baseboard Management Controller, BMC); a basic input output system (Basic Input Output System, BIOS), which is connected to the basic input output system (Basic Input Output System, BIOS) through a central processing unit (CPU) arranged on the mainboard System, BIOS) is electrically connected, and the method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth includes the following steps: S100, configure the wiring mode between the I / O expander and the onboard PCIE slot in each server expansion card (Riser card) connected to the server motherboard, and different wiring modes correspond to different register values ​​of the I / O expander; S200, start the server power supply, and after the baseboard management controller (Baseboard Management Controller, BMC) is initialized, obtain the register value of the I / O expander on each server expansion card (Riser card) through the IIC communication protocol; S300, Baseboard Management Controller (BMC) sends the register values ​​of all I / O expanders to the Complex Programmable Logic Device (CPLD); S400, the complex programmable logic device (CPLD) sends register values ​​of all I / O expanders to a central processing unit (CPU) of the server through a vGPIO communication protocol; S500, based on the register value of the I / O expander, the Basic Input Output System (BIOS) allocates bandwidth and resources to the onboard PCIE slot in each server expansion card (Riser card).

[0005] Further, in the S100, the wiring method of the I / O expander in the server expansion card (Riser card) and the onboard PCIE slot includes: When a single onboard PCIE slot in a server expansion card (Riser card) is connected to only one MCIO cable, the connection port corresponding to the I / O expander connected to the onboard PCIE slot is a high-level signal and a low-level signal, and the channel width of the current onboard PCIE slot is x8; When a single onboard PCIE slot in a server expansion card (Riser card) is connected to two MCIO cables at the same time, the connection port corresponding to the I / O expander connected to the onboard PCIE slot is a two-bit high-level signal, and the channel width of the current onboard PCIE slot is x16; When a single onboard PCIE slot in a server expansion card (Riser card) is not connected to an MCIO cable, a connection port corresponding to an I / O expander connected to the onboard PCIE slot is a two-bit low-level signal, and the current onboard PCIE slot is in a disabled state.

[0006] Furthermore, based on the OCSP standard specification, the server expansion card (Riser card) reuses idle pins to connect to the I / O expander, and the level state of the idle pins is used to define the bandwidth width adapted by the current onboard PCIE slot.

[0007] Furthermore, the idle pin is a B27 pin on a server expansion card (Riser card).

[0008] Furthermore, the present invention also proposes a device for intelligently identifying and configuring a server PCIe bandwidth and adaptively configuring the PCIe bandwidth, which is used to implement the method for intelligently identifying and configuring a server PCIe bandwidth and adaptively configuring the PCIe bandwidth. The device for intelligently identifying and configuring a server PCIe bandwidth and adaptively configuring the PCIe bandwidth includes: A server expansion card (Riser card), which is installed on a mainboard PCIE slot on a server mainboard. The number of the server expansion card is at least one, and each server expansion card (Riser card) is provided with at least one onboard PCIE slot and an I / O expander; Among them, each onboard PCIE slot is connected to two I / O ports of the I / O expander based on the OCSP MCIO PIN standard; Baseboard Management Controller (BMC), each of the server expansion cards (Riser cards) is electrically connected to the Baseboard Management Controller (BMC); A complex programmable logic device (CPLD), the complex programmable logic device (CPLD) being electrically connected to the baseboard management controller (Baseboard Management Controller, BMC); Basic Input Output System (BIOS), the complex programmable logic device (CPLD) is electrically connected to the Basic Input Output System (BIOS) through a central processing unit (CPU) arranged on a motherboard.

[0009] Furthermore, the channel width of the onboard PCIE slot is x16, and the model of the I / O expander is PCA9554.

[0010] Furthermore, the server expansion card (Riser card) is provided with at least an I / O expander and three onboard PCIE slots, wherein: The three onboard PCIE slots include: A first slot (PCIe slot 1), wherein the first slot (PCIe slot 1) is connected to two I / O ports of the I / O expander through two MCIO cables respectively; A second slot (PCIe slot 2), wherein a channel width of the second slot (PCIe slot 2) is one of x8 and x16; The third slot (PCIe slot 3) is connected to two I / O ports of the I / O expander through two MCIO cables respectively.

[0011] Furthermore, the I / O expander is provided with at least a first input port and a third input port, the number of the first input ports is two, and the first input ports are respectively connected to two MCIO cables of the first slot (PCIe slot1), the number of the third input ports is two, and the third input ports are respectively connected to two MCIO cables of the third slot (PCIe slot3).

[0012] Further, the register value output by the I / O expander is a data byte, and the data byte includes bits 0-7, wherein: Bits 0 and 1 are the voltage levels of the two MCIO cables connected to the first slot (PCIe slot 1). The second and third bits are the voltage levels of the two MCIO cables connected to the third slot (PCIe slot 3). The 4th to 7th bits are the number flags of the current server expansion card (Riser card).

[0013] Furthermore, the present invention also proposes a computer-readable storage medium having program instructions stored thereon, and when the program instructions are executed by a processor, the method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth is implemented.

[0014] Compared with the prior art, the present invention has the following characteristics.

[0015] The method and device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth described in the present invention can not only reduce the number of general server boards and unify materials to reduce production costs, but also adaptively configure PCIe bandwidth, reduce manual operations, and reduce the probability of errors. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The invention provides an overall flow chart of a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth.

[0017] Figure 2 A schematic diagram of the overall topological structure of a device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth.

[0018] Figure 3A flowchart of server intelligent identification configuration and adaptive configuration of PCIe bandwidth in a method for intelligent identification server configuration and adaptive configuration of PCIe bandwidth.

[0019] FIG4 (a) is a schematic diagram of a server expansion card (Riser card) provided with two I / O expanders and three onboard PCIE slots in a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth.

[0020] FIG4( b ) is a schematic diagram showing a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth, in which a server expansion card (Riser card) is provided with an I / O expander and two onboard PCIE slots.

[0021] FIG4( c ) is a schematic diagram showing a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth in which a server expansion card (Riser card) is provided with an I / O expander and an onboard PCIE slot.

[0022] FIG4( d ) is a schematic diagram showing a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth, in which a server expansion card (Riser card) is provided with two I / O expanders and two onboard PCIE slots.

[0023] Figure 5 A schematic diagram of an OCSP MCIO PIN definition standard in a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth.

[0024] Figure 6 A connection diagram when neither the first slot nor the third slot is connected in a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth.

[0025] Figure 7 A connection diagram of a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth when all cables are connected to the first slot and the third slot.

[0026] Figure 8 A connection diagram of a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth when two MCIOs of a first slot are not connected and two MCIOs of a third slot are connected.

[0027] Fig. 9 A connection diagram of a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth when only one MCIO cable is connected to the first slot and the third slot.

[0028] Fig.10The invention discloses byte values ​​corresponding to different server expansion cards (Riser cards) and different wiring modes of a server system in a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth.

[0029] Fig.11 The invention provides a truth table for data processing of the whole system in the method of intelligently identifying server configuration and adaptively configuring PCIe bandwidth.

[0030] Fig.12 A schematic diagram of a configuration example of a whole machine in a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0032] The concept, specific structure and technical effects of the present invention will be clearly and completely described below in conjunction with the embodiments and drawings to fully understand the purpose, scheme and effect of the present invention.

[0033] It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly fixed or connected to another feature, or it may be indirectly fixed or connected to another feature. The singular forms "a", "said" and "the" used herein are also intended to include the plural forms, unless the context clearly indicates otherwise. In addition, unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art. The terms used in this specification are intended only to describe specific embodiments and are not intended to limit the invention. The term "and / or" used herein includes any combination of one or more of the related listed items.

[0034] It should be understood that although the terms first, second, third, etc. may be used to describe various elements in the present disclosure, these elements should not be limited to these terms. These terms are only used to distinguish elements of the same type from each other. For example, without departing from the scope of the present disclosure, the first element may also be referred to as the second element, and similarly, the second element may also be referred to as the first element. The use of any and all examples or exemplary language ("for example", "such as", etc.) provided herein is intended only to better illustrate embodiments of the present invention, and unless otherwise required, will not impose limitations on the scope of the present invention. In addition, the industry term "posture" used herein refers to the position and attitude of a certain element relative to a spatial coordinate system.

[0035] Reference Figures 1 to 12 The embodiment of the present invention provides a method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth, which is applied to a device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth. The device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth includes: a server expansion card (Riser card), which is installed on a mainboard PCIE slot on a server mainboard, and the number of the server expansion cards is at least one, and each of the server expansion cards (Riser card) is provided with at least one onboard PCIE slot and I / O expander; a baseboard management controller (Baseboard Management Controller, BMC), each of the server expansion cards (Riser card) is electrically connected to the baseboard management controller (Baseboard Management Controller, BMC); a complex programmable logic device (CPLD), which is electrically connected to the baseboard management controller (Baseboard Management Controller, BMC); a basic input output system (Basic Input Output System, BIOS), which is connected to the basic input output system (Basic Input Output System, BIOS) through a central processing unit (CPU) arranged on the mainboard System, BIOS) electrical connection, refer to Figure 1 and Figure 3 The method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth comprises the following steps: S100, configure the wiring mode between the I / O expander and the onboard PCIE slot in each server expansion card (Riser card) connected to the server motherboard, and different wiring modes correspond to different register values ​​of the I / O expander; S200, start the server power supply, and after the baseboard management controller (Baseboard Management Controller, BMC) is initialized, obtain the register value of the I / O expander on each server expansion card (Riser card) through the IIC communication protocol; S300, Baseboard Management Controller (BMC) sends the register values ​​of all I / O expanders to the Complex Programmable Logic Device (CPLD); S400, the complex programmable logic device (CPLD) sends register values ​​of all I / O expanders to a central processing unit (CPU) of the server through a vGPIO communication protocol; S500, based on the register value of the I / O expander, the Basic Input Output System (BIOS) allocates bandwidth and resources to the onboard PCIE slot in each server expansion card (Riser card).

[0036] Compared with the prior art, the present invention has the following characteristics.

[0037] The method and device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth described in the present invention can not only reduce the number of general server boards and unify materials to reduce production costs, but also adaptively configure PCIe bandwidth, reduce manual operations, and reduce the probability of errors.

[0038] The key points of the design plan are to design a lightweight, highly mobile, low-cost, and more intelligent liquid-cooled server: (1) Intelligently identify and adaptively configure PCIe bandwidth, eliminating production configuration steps, reducing production processes, and reducing the probability of errors; (2) Decoupling the information collection module, information processing module, and bandwidth configuration module, so that they can be reused on multiple platforms without changing the entire solution; (3) Wiring and using PCIe resources according to customer needs, without wasting resources, making the configuration more flexible; (4) A single card supports multiple configurations, reducing the number of single cards, concentrating the demand on a single board, normalizing materials, and reducing material costs.

[0039] Specifically, in the method and device for intelligently identifying server configuration and adaptively configuring PCIe bandwidth, the server expansion card (Riser card) supports PCIe bandwidth X8 or X16 respectively through different wiring conditions, so that one server expansion card (Riser card) supports multiple configurations. There is a PCA9554 chip on the server expansion card (Riser card), and the registers corresponding to different wiring methods will have different values, so that different configurations can be identified and PCIe bandwidth can be allocated to the Basic Input Output System (BIOS).

[0040] Reference Figure 2 The overall topology is that the baseboard management controller (BMC) or complex programmable logic device (CPLD) reads the register value of the PCA9554 chip on the server expansion card (Riser card) through I2C to collect information, and then transmits the information to the complex programmable logic device (CPLD) for data processing. The processed data is transmitted to the basic input and output system (BIOS) through vGPIO. After receiving the information, the basic input and output system (BIOS) performs PCIe allocation, thereby achieving a technical effect of an adaptive allocation function.

[0041] Reference Figure 2 , a baseboard management controller (BMC) or a complex programmable logic device (CPLD) is connected to four server expansion cards (Riser cards), each of which is provided with a PCA9554 chip for reading an onboard PCIE slot. By changing the wiring mode between the I / O expander and the onboard PCIE slot in each server expansion card (Riser card) connected to the server motherboard, the register value is changed. The register value is sent to the central processing unit (CPU) and the basic input output system (BIOS) through the complex programmable logic device (CPLD) in turn. The basic input output system (BIOS) allocates bandwidth and resources to the onboard PCIE slot in each server expansion card (Riser card).

[0042] Previous solutions for information collection and allocation of PCIe bandwidth often require device information (D1) or dip switches (D2) or special ID PIN pins and connectors (D3). However, this patent can meet the OCSP standard specifications (all PIN pins are defined, there is no special ID PIN pin), and the required bandwidth allocation can be identified only through different wiring methods of different configurations required by customers.

[0043] Further, in the S100, the wiring method of the I / O expander in the server expansion card (Riser card) and the onboard PCIE slot includes: When a single onboard PCIE slot in a server expansion card (Riser card) is connected to only one MCIO cable, the connection port corresponding to the I / O expander connected to the onboard PCIE slot is a high-level signal and a low-level signal, and the channel width of the current onboard PCIE slot is x8; When a single onboard PCIE slot in a server expansion card (Riser card) is connected to two MCIO cables at the same time, the connection port corresponding to the I / O expander connected to the onboard PCIE slot is a two-bit high-level signal, and the channel width of the current onboard PCIE slot is x16; When a single onboard PCIE slot in a server expansion card (Riser card) is not connected to an MCIO cable, a connection port corresponding to an I / O expander connected to the onboard PCIE slot is a two-bit low-level signal, and the current onboard PCIE slot is in a disabled state.

[0044] Furthermore, based on the OCSP standard specification, the server expansion card (Riser card) reuses idle pins to connect to the I / O expander, and the level state of the idle pins is used to define the bandwidth width adapted by the current onboard PCIE slot.

[0045] Furthermore, the idle pin is a B27 pin on a server expansion card (Riser card).

[0046] Specifically, the method for identifying whether an MCIO cable is plugged into a server expansion card (Riser card) is as follows: when there are no extra PIN pins, a PIN pin is reused according to the application scenario and connected to the PCA9554 chip, thereby solving the problem of how to identify whether a cable is plugged in. In the OCSP standard specification, all MCIO PIN pins on the motherboard are used, but the B27 pin on the server expansion card (Riser card) is NC and not used. Therefore, the server expansion card (Riser card) can use this PIN to determine whether a cable is connected, thereby determining what configuration is required and performing PCIe bandwidth configuration.

[0047] Reference Figure 5, A27 of the MCIO cable on the motherboard side is connected to HP_SMB_ALERT#, which is the interrupt signal of NVMe hot plug. It needs 1K strong pull-up on the motherboard side. This signal will not be used when MCIO is connected to the server expansion card (Riser card), so B27 corresponding to MCIO on the server expansion card (Riser card) side is connected to 50K weak pull-down, and B27 is connected to the PCA9554 chip. By connecting B27 of different MCIO cables to different IO of the PCA9554 chip, you can read which cable is connected and which cable is not connected through I2C. Multiple modules are combined and after information processing, the configuration of the whole machine can be intelligently identified.

[0048] Furthermore, the present invention also proposes a device for intelligently identifying and configuring a server PCIe bandwidth and adaptively configuring the PCIe bandwidth, which is used to implement the method for intelligently identifying and configuring a server PCIe bandwidth and adaptively configuring the PCIe bandwidth. The device for intelligently identifying and configuring a server PCIe bandwidth and adaptively configuring the PCIe bandwidth includes: A server expansion card (Riser card), which is installed on a mainboard PCIE slot on a server mainboard. The number of the server expansion card is at least one, and each server expansion card (Riser card) is provided with at least one onboard PCIE slot and an I / O expander; Among them, each onboard PCIE slot is connected to two I / O ports of the I / O expander based on the OCSP MCIO PIN standard; Baseboard Management Controller (BMC), each of the server expansion cards (Riser cards) is electrically connected to the Baseboard Management Controller (BMC); A complex programmable logic device (CPLD), the complex programmable logic device (CPLD) being electrically connected to the baseboard management controller (Baseboard Management Controller, BMC); Basic Input Output System (BIOS), the complex programmable logic device (CPLD) is electrically connected to the Basic Input Output System (BIOS) through a central processing unit (CPU) arranged on a motherboard.

[0049] Furthermore, the channel width of the onboard PCIE slot is x16, and the model of the I / O expander is PCA9554.

[0050] Further, referring to FIG. 4 (a), the server expansion card (Riser card_PR2715B_Riser1&2A) is provided with at least two I / O expanders and three onboard PCIE slots, wherein: The three onboard PCIE slots include: A first slot (PCIe slot 1), wherein the first slot (PCIe slot 1) is connected to two I / O ports of the I / O expander through two MCIO cables respectively; A second slot (PCIe slot 2), wherein a channel width of the second slot (PCIe slot 2) is one of x8 and x16; The third slot (PCIe slot 3) is connected to two I / O ports of the I / O expander through two MCIO cables respectively.

[0051] Specifically, the second slot (PCIe slot 2) provides signals through the gold finger, which are fixed to the X16 PCIe signals, while the first slot (PCIe slot 1) and the third slot (PCIe slot 3) provide X16 PCIe signals, X8 PCIe signals, or no PCIe signals according to the wiring method. Reference Figure 6 , when neither the first slot (PCIe slot1) nor the third slot (PCIe slot3) is wired, a X16 PCIe device is supported, and the byte value obtained is 0000 0000; Reference Figure 7 , when the four MCIO cables on the server expansion card (Riser card) are connected, a total of three X16 PCIe devices are supported, and the byte value obtained is 0000 1111; Reference Figure 8 , when the two MCIOs of the first slot (PCIe slot1) are not connected, and the two MCIOs of the third slot (PCIe slot3) are connected, supporting two X16 PCIe devices, the byte value obtained is 0000 1100; Reference Fig. 9 , when only one MCIO cable is connected to the first slot (PCIe slot1) and the third slot (PCIe slot3), one X16 PCIe device and two X8 PCIes are supported, and the byte value obtained is 0000 0101; When the first slot (PCIe slot 1) is not connected to an MCIO cable, the third slot (PCIe slot 3) is only connected to an MCIO cable, supporting one X16 PCIe device and one X8 PCIe.

[0052] It can be seen that a server expansion card (Riser card) can support multiple types of customer applications, simplifying the number of daughter cards. Moreover, when the PCIe resources on the server expansion card (Riser card) are not fully used, these PCIe resources can be used for hard disks, etc.

[0053] The server expansion card (Riser card) supports multiple configurations. In some embodiments, referring to FIG. 4( b ), the server expansion card (Riser card_ PR2715B_Riser1&2A_L) is provided with an I / O expander and two onboard PCIE slots.

[0054] 4( c ), the server expansion card (Riser card_PR2715B-Riser3A) is provided with an I / O expander and two onboard PCIE slots.

[0055] 4( d ), the server expansion card (Riser card_PR2715B-Riser3B) is provided with two I / O expanders and two onboard PCIE slots.

[0056] The above are several examples. According to the above principles, different server expansion cards (Riser cards) and wiring methods can obtain the corresponding Byte values. Fig.10 , an error may be reported if the wiring method is not within the recommended configuration.

[0057] Reference Fig.10 , you can know the connection method through byte, wrong connection means there is no such connection method, reminding customers that the cable is connected incorrectly): The whole machine slot is used as Fig.10 Replenish, The slots occupied by IO module 1 are Slot 1 to Slot 3; Fig.10 BYTE1 in The slots occupied by IO module 2 are Slot 4 to Slot 6; corresponding Fig.10 BYTE2 in The slots occupied by IO module 3 are Slot 7 to Slot 8; corresponding Fig.10 BYTE3 in The slots occupied by IO module 4 are Slot 9 to Slot 10; corresponding Fig.10 BYTE4 in it.

[0058] Reference Fig.11 After the information collection in the previous stage, the system data can be known based on the byte value data, and then after data processing, vGOIO can be output to the Basic Input Output System (BIOS). The Basic Input Output System (BIOS) performs relative bandwidth configuration based on the corresponding vGOIO.

[0059] Specifically, refer to Fig.11 Through the BYTE obtained earlier, we can know the bandwidth allocation required by the whole machine. After being processed by CPLD, the vGPIO signal is output. Different vGPIO signals represent different configurations. After BIOS obtains the configuration, it allocates it.

[0060] Reference Fig.12 , which is a configuration example of the whole machine. For IO module 1 and IO module 2, PR2715B_Riser1&2A and PR2715B_Riser1&2A_L can be selected; for IO module 3 and IO module 4, PR2715B-Riser3A and PR2715B-Riser3B can be selected.

[0061] Furthermore, the I / O expander is provided with at least a first input port and a third input port, the number of the first input ports is two, and the first input ports are respectively connected to two MCIO cables of the first slot (PCIe slot1), the number of the third input ports is two, and the third input ports are respectively connected to two MCIO cables of the third slot (PCIe slot3).

[0062] Further, the register value output by the I / O expander is a data byte, and the data byte includes bits 0-7, wherein: Bits 0 and 1 are the voltage levels of the two MCIO cables connected to the first slot (PCIe slot 1). The second and third bits are the voltage levels of the two MCIO cables connected to the third slot (PCIe slot 3). The 4th to 7th bits are the number flags of the current server expansion card (Riser card).

[0063] Specifically, taking RISER1 as an example, the 8 IO connections of the PCA9554 chip are as follows: Riser1&2A: IO7--pull down to GND, IO6--pull down to GND, IO5--pull down to GND, IO4--pull down to GND, IO3 - MCIO_B27 of Slot3 (8-15), IO2—MCIO_B27 of Slot3(0-7), IO1--MCIO_B27 of Slot1(8-15), IO0--MCIO_B27 of Slot1(0-7), Different wiring methods correspond to different configurations and obtain different bytes.

[0064] Furthermore, the present invention also proposes a computer-readable storage medium having program instructions stored thereon, and when the program instructions are executed by a processor, the method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth is implemented.

[0065] It should be appreciated that the method steps in the embodiments of the present invention can be implemented or implemented by computer hardware, a combination of hardware and software, or by computer instructions stored in a non-transitory computer readable memory. The method can use standard programming techniques. Each program can be implemented in a high-level process or object-oriented programming language to communicate with a computer system. However, if necessary, the program can be implemented in an assembly or machine language. In any case, the language can be a compiled or interpreted language. In addition, the program can be run on a programmed ASIC for this purpose.

[0066] Furthermore, the operations of the processes described herein may be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The processes described herein (or variations and / or combinations thereof) may be performed under the control of one or more computer systems configured with executable instructions, and may be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) that is executed collectively on one or more processors, by hardware, or a combination thereof. The computer program includes a plurality of instructions that may be executed by one or more processors.

[0067] Further, the method can be implemented in any type of computing platform that is operably connected to a suitable computer, including but not limited to a personal computer, a minicomputer, a mainframe, a workstation, a network or distributed computing environment, a separate or integrated computer platform, or in communication with a charged particle tool or other imaging device, etc. Various aspects of the present invention can be implemented in machine-readable code stored on a non-transitory storage medium or device, whether removable or integrated into a computing platform, such as a hard disk, an optical read and / or write storage medium, a RAM, a ROM, etc., so that it can be read by a programmable computer, and when the storage medium or device is read by the computer, it can be used to configure and operate the computer to perform the process described herein. In addition, the machine-readable code, or portions thereof, can be transmitted via a wired or wireless network. When such media includes instructions or programs that implement the steps described above in conjunction with a microprocessor or other data processor, the invention described herein includes these and other different types of non-transitory computer-readable storage media. When programmed according to the methods and techniques of the present invention, the present invention can also include the computer itself.

[0068] The computer program can be applied to input data to perform the functions described herein, thereby converting the input data to generate output data stored in a non-volatile memory. The output information can also be applied to one or more output devices such as a display. In a preferred embodiment of the present invention, the converted data represents physical and tangible objects, including specific visual depictions of physical and tangible objects produced on the display.

[0069] The above is only a preferred embodiment of the present invention. The present invention is not limited to the above implementation. As long as the technical effect of the present invention is achieved by the same means, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the scope of protection of the present invention. Within the scope of protection of the present invention, its technical scheme and / or implementation method may have various modifications and changes.

Claims

1. A method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth, applied to a device for intelligently identifying and adaptively configuring PCIe bandwidth for a server, the device for intelligently identifying and adaptively configuring PCIe bandwidth for a server comprising: A server expansion card, wherein the server expansion card is installed on a mainboard PCIE slot on a server mainboard, the number of the server expansion card is at least one, and each of the server expansion cards is provided with at least one onboard PCIE slot and an I / O expander; A baseboard management controller, each of the server expansion cards is electrically connected to the baseboard management controller; a complex programmable logic device, the complex programmable logic device is electrically connected to the baseboard management controller; a basic input and output system, the complex programmable logic device is electrically connected to the basic input and output system through a central processing unit arranged on a motherboard, wherein the method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth comprises the following steps: S100, configuring a wiring mode between an I / O expander and an onboard PCIE slot in each server expansion card connected to the server mainboard, wherein different wiring modes correspond to different register values ​​of the I / O expander; S200, starting the server power supply, after the baseboard management controller is initialized, obtaining the register value of the I / O expander on each server expansion card through the IIC communication protocol; S300, the baseboard management controller sends the register values ​​of all I / O expanders to the complex programmable logic device; S400, the complex programmable logic device sends the register values ​​of all I / O expanders to the central processor of the server through the vGPIO communication protocol; S500: Based on the register value of the I / O expander, the basic input and output system allocates bandwidth and resources to the onboard PCIE slot in each server expansion card.

2. The method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth according to claim 1, characterized in that: In S100, the wiring method between the I / O expander in the server expansion card and the onboard PCIE slot includes: When a single onboard PCIE slot in a server expansion card is connected to only one MCIO cable, the connection port corresponding to the I / O expander connected to the onboard PCIE slot is a high-level signal and a low-level signal, and the channel width of the current onboard PCIE slot is x8; When a single onboard PCIE slot in a server expansion card is connected to two MCIO cables at the same time, the connection port corresponding to the I / O expander connected to the onboard PCIE slot is a two-bit high-level signal, and the channel width of the current onboard PCIE slot is x16; When a single onboard PCIE slot in a server expansion card is not connected to an MCIO cable, a connection port corresponding to an I / O expander connected to the onboard PCIE slot is a two-bit low-level signal, and the current onboard PCIE slot is in a disabled state.

3. The method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth according to claim 2, characterized in that: Based on the OCSP standard specification, the server expansion card reuses the idle pins to connect to the I / O expander, and the bandwidth width adapted by the current onboard PCIE slot is defined by the level state of the idle pins.

4. The method for intelligently identifying server configuration and adaptively configuring PCIe bandwidth according to claim 3, characterized in that: The idle pin is the B27 pin on the server expansion card.

5. A device for intelligently identifying and adaptively configuring PCIe bandwidth of a server, used to implement the method for intelligently identifying and adaptively configuring PCIe bandwidth of a server as claimed in any one of claims 1 to 4, characterized in that: The device for intelligently identifying and adaptively configuring PCIe bandwidth of a server includes: A server expansion card, wherein the server expansion card is installed on a mainboard PCIE slot on a server mainboard, the number of the server expansion card is at least one, and each of the server expansion cards is provided with at least one onboard PCIE slot and an I / O expander; Among them, each onboard PCIE slot is connected to two I / O ports of the I / O expander based on the OCSP MCIO PIN standard; A baseboard management controller, each of the server expansion cards is electrically connected to the baseboard management controller; A complex programmable logic device, the complex programmable logic device being electrically connected to the baseboard management controller; The basic input-output system is electrically connected to the complex programmable logic device through a central processing unit arranged on a mainboard.

6. The device for intelligently identifying and adaptively configuring PCIe bandwidth of a server according to claim 5, characterized in that: The channel width of the onboard PCIE slot is x16, and the model of the I / O expander is PCA9554.

7. The device for intelligently identifying and adaptively configuring PCIe bandwidth of a server according to claim 5, characterized in that: The server expansion card is provided with at least an I / O expander and three onboard PCIE slots, wherein: The three onboard PCIE slots include: A first slot, wherein the first slot is connected to two I / O ports of the I / O expander through two MCIO cables respectively; A second slot, wherein the channel width of the second slot is one of x8 and x16; The third slot is connected to two I / O ports of the I / O expander through two MCIO cables respectively.

8. The device for intelligently identifying and adaptively configuring PCIe bandwidth of a server according to claim 7, characterized in that: The I / O expander is provided with at least a first input port and a third input port. There are two first input ports, which are respectively connected to two MCIO cables of the first slot. There are two third input ports, which are respectively connected to two MCIO cables of the third slot.

9. The device for intelligently identifying and adaptively configuring PCIe bandwidth of a server according to claim 8, characterized in that: The register value output by the I / O expander is a data byte, and the data byte includes bits 0-7, wherein: Bits 0 and 1 are the voltage levels connected to the two MCIO cables in the first slot. The second and third bits are the voltage levels for the two MCIO cables connected to the third slot. The 4th to 7th bits are the number flags of the current server expansion card.

10. A computer-readable storage medium having program instructions stored thereon, characterized in that: When the program instructions are executed by a processor, the method according to any one of claims 1 to 4 is implemented.

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