A phase compensator and related methods

Abstract

An embodiment of the present application provides a phase compensator and related methods. The phase compensator includes: a numerical control module, a first feedback servo module, a second feedback servo module, and an input module; the input module is configured to generate an error signal based on a measurement signal and a reference signal, and send the error signal to the numerical control module, the first feedback servo module, and the second feedback servo module; the first feedback servo module is configured to generate a first feedback signal based on the error signal and a bias signal sent by the numerical control module; the second feedback servo module is configured to generate a second feedback signal based on the error signal and a zero-pole adjustment signal sent by the numerical control module; the numerical control module is configured to adjust the measurement signal based on the first feedback signal and the second feedback signal to obtain an adjusted measurement signal. In the embodiment of the present application, the input module, the first feedback servo module, and the second feedback servo module can be controlled based on the numerical control module to realize the adjustment of the measurement signal and improve flexibility.

Description

Technical Field

[0001] This application relates to the field of circuit technologies, and particularly to a phase compensator and related methods. Background Art

[0002] Phase compensation is achieved by adjusting certain components or networks in a circuit to counteract the phase lag caused by factors such as system delay and parasitic effects, thereby ensuring that the system maintains stable gain and phase characteristics within a specific frequency range.

[0003] Currently, phase compensation can be performed through a phase compensator composed of phase delay units, where the phase delay units include gain amplifiers and capacitors, etc. During use, it is necessary to switch the capacitors and resistors in the phase delay unit to adjust the frequency response and achieve phase compensation. However, since both capacitors and resistors are devices with non-continuous adjustability, this phase compensation method is difficult to achieve continuous adjustment of the frequency response and has the problem of poor flexibility.

[0004] Based on this, there is an urgent need for a solution to solve the above technical problems. Summary of the Invention

[0005] This application provides a phase compensator and related methods, aiming to solve the above technical problems.

[0006] The embodiments of this application disclose the following technical solutions:

[0007] First aspect: The embodiments of this application provide a phase compensator, including: a numerical control module, a first feedback servo module, a second feedback servo module, and an input module;

[0008] The input module is configured to generate an error signal based on a measurement signal and a reference signal; and send the error signal to the numerical control module, the first feedback servo module, and the second feedback servo module;

[0009] The first feedback servo module is configured to generate a first feedback signal based on the error signal and a bias signal sent by the numerical control module;

[0010] The second feedback servo module is configured to generate a second feedback signal based on the error signal and a zero-pole adjustment signal sent by the numerical control module;

[0011] The numerical control module is configured to adjust the measurement signal based on the first feedback signal and the second feedback signal to obtain an adjusted measurement signal.

[0012] In a possible implementation, the first feedback servo module includes: a proportional integral derivative (PID) circuit connected to the input module, a first digital-to-analog converter (DAC) module, a first adder, and a polarity switching module; the PID circuit includes a digital potentiometer, a feedback resistor, a proportional signal circuit, an integral signal circuit, and a derivative signal circuit;

[0013] The PID circuit is configured to receive the error signal sent by the input module; adjust the resistance value of the feedback resistor through the digital potentiometer to obtain an adjusted feedback resistor; and obtain a PID signal based on the adjusted feedback resistor and the error signal;

[0014] The first adder is configured to add the PID signal and the bias signal output by the first DAC module to generate a first sub-feedback signal;

[0015] The polarity switching module is configured to perform polarity switching on the first sub-feedback signal to generate the first feedback signal.

[0016] In a possible implementation, the first feedback servo module further includes: a digital single-pole single-throw switch, which is connected in parallel with the integration capacitor of the integrator in the integral signal circuit;

[0017] When the first feedback servo module is disconnected from the input module, the digital single-pole single-throw switch is turned on to discharge and clear the integration capacitor.

[0018] In a possible implementation, the first feedback servo module further includes: a limiting module; the limiting module is configured to, when the voltage of the first feedback signal is greater than a first threshold, adjust the voltage of the first feedback signal to the first threshold; and when the voltage of the second feedback signal is less than a second threshold, adjust the voltage of the second feedback signal to the second threshold.

[0019] In a possible implementation, the second feedback servo module includes a feedback capacitor bank composed of a plurality of feedback capacitors connected in parallel, and each feedback capacitor is connected in series with a single-pole single-throw switch;

[0020] The second feedback servo module is specifically configured to control the single-pole single-throw switch connected in series with the feedback capacitor to connect the corresponding feedback capacitor based on the error signal and the zero-pole adjustment signal sent by the digital control module, and generate a second feedback signal.

[0021] In a possible implementation, the second feedback servo module includes: a voltage-controlled gain operational amplifier module connected in series with the feedback capacitor bank, and the voltage-controlled gain operational amplifier module includes a resistor and an adjustable gain operational amplifier module;

[0022] The voltage-controlled gain operational amplifier module is used to continuously fine-tune the zero and pole points based on a resistor and an adjustable gain operational amplifier module.

[0023] In a possible implementation, the input module includes: an input-stage differential operational amplifier module; the positive-phase terminal of the input-stage differential operational amplifier module is connected to the first terminal of a first numerically controlled single-pole double-throw switch, and the second and third terminals of the first numerically controlled single-pole double-throw switch are respectively connected to a measurement signal and a reference signal; the negative-phase terminal of the input-stage differential operational amplifier module is connected to the first terminal of a second numerically controlled single-pole double-throw switch, and the second and third terminals of the second numerically controlled single-pole double-throw switch are respectively connected to the measurement signal and the reference signal;

[0024] The input-stage differential operational amplifier module is used to obtain the measurement signal and the reference signal through the first numerically controlled single-pole double-throw switch and the second numerically controlled single-pole double-throw switch; and generate an error signal based on the measurement signal and the reference signal.

[0025] Second aspect: An embodiment of the present application provides a phase compensation method, including:

[0026] Generating a bias signal and a zero-pole adjustment signal based on the measurement signal and the error signal; the error signal is generated based on the difference between the measurement signal and the reference signal;

[0027] Generating a first feedback signal based on the error signal and the bias signal; generating a second feedback signal based on the error signal and the zero-pole adjustment signal;

[0028] Adjusting the measurement signal based on the first feedback signal and the second feedback signal to obtain an adjusted measurement signal

[0029] Third aspect: An embodiment of the present application provides a computing device, which includes: a processor and a memory;

[0030] The memory is used to store program code and transmit the program code to the processor;

[0031] The processor is used to execute the steps of a phase compensation method as described above according to the instructions in the program code.

[0032] Fourth aspect: An embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of a phase compensation method as described above are implemented.

[0033] Compared with the prior art, the method provided by the embodiment of the present application has the following beneficial effects:

[0034] Embodiments of the present application provide a phase compensator, which can generate an error signal through an input module based on a measurement signal and a reference signal, send the error signal to the numerical control module, the first feedback servo module, and the second feedback servo module. The first feedback servo module generates a first feedback signal based on the error signal and the bias signal sent by the numerical control module. The second feedback servo module generates a second feedback signal based on the error signal and the zero-pole adjustment signal sent by the numerical control module. The numerical control module is used to adjust the measurement signal based on the first feedback signal and the second feedback signal to obtain an adjusted measurement signal. In the embodiments of the present application, the numerical control module can control the input module, the first feedback servo module, and the second feedback servo module to realize the adjustment of the measurement signal and improve flexibility. Description of the Drawings

[0035] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0036] Figure 1 It is a schematic diagram of the principle of adjusting the frequency response of a traditional analog discrete capacitor;

[0037] Figure 2 It is a schematic diagram of the overall structure of a phase compensator provided by an embodiment of the present application;

[0038] Figure 3 It is a schematic diagram of the circuit of a first feedback servo module provided by an embodiment of the present application;

[0039] Figure 4 It is a circuit diagram of a limiting module provided by an embodiment of the present application;

[0040] Figure 5 It is a circuit diagram of a second feedback servo module provided by an embodiment of the present application;

[0041] Figure 6 It is a schematic diagram of an equivalent circuit provided by an embodiment of the present application. Detailed Embodiments

[0042] To enable those skilled in the art to better understand the solution of this application, the following will clearly and completely describe the technical solution in the embodiments of this application with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of this application.

[0043] Currently, phase compensation can be performed through a phase compensator composed of phase delay units, where the phase delay units include gain amplifiers and capacitors, etc. As Figure 1 shown, this figure is a schematic diagram of the principle of a traditional analog discrete capacitor for adjusting the frequency response. The structure of this type of phase compensator is fixed, and its influence on the gain-frequency and phase-frequency curves is determined by parameters such as the selected capacitance value of the capacitor. The flexibility of use is poor, and the adjustment difficulty is high.

[0044] When in use, this type of phase compensator can only select one of several discrete frequency response curves by switching a limited number of preset resistors and capacitors. For example, by switching Figure 1 at least one of R3, C1, C2, ……, C9 in

[0045] to adjust the frequency response and achieve phase compensation.

[0046] Since both capacitors and resistors are non-continuously adjustable devices, this phase compensation method is difficult to achieve continuous adjustment of the frequency response and has the problem of poor flexibility.

[0047] Next, a phase compensator provided by the embodiments of this application will be introduced with reference to the accompanying drawings.

[0048] See Figure 2 , this figure is a schematic diagram of the overall structure of a phase compensator provided by the embodiments of this application.

[0049] In the embodiment of the present application, the phase compensator includes a numerical control module and an analog servo module. The numerical control module includes a Field-Programmable Gate Array (FPGA) chip, a Double Data Rate Random Access Memory (DDR RAM) chip, a clock oscillator, multiple Analog-to-Digital Converters (ADCs), multiple DACs, a temperature measurement chip, a power detection chip, and an electronic device for remote control and telemetry of the board.

[0050] Among them, the FPGA chip serves as the control center and can control the analog servo circuit through various numerical control devices; the DDR RAM chip is used for high-speed data storage for real-time data analysis; the nominal frequency parameter of the clock oscillator can be 200 MHz; the ADC is used for telemetry and data acquisition; the DAC is used for reference point setting, bias setting, and fine zero-pole adjustment; the temperature measurement chip is used to detect the chip temperature to ensure the normal operation of the chip; the power detection chip is used to detect whether the power supply is in a normal operating state.

[0051] In a possible implementation manner, the FPGA chip can receive a control instruction sent by the electronic device through the TCP communication interface and execute the control instruction.

[0052] It can be understood that in the embodiment of the present application, the type of the chip, the nominal frequency parameter of the clock oscillator, and the communication interface are not specifically limited. Here, only the DDR RAM chip, the nominal frequency parameter that can be 200 MHz, and the TCP communication interface are taken as examples for introduction.

[0053] The analog servo module includes an input module, a first feedback servo module, and a second feedback servo module. Among them, the input module is used to generate an error signal based on the measurement signal and the reference signal, and send the error signal to the numerical control module, the first feedback servo module, and the second feedback servo module. The first feedback servo module is used to generate a first feedback signal based on the error signal and the bias signal sent by the numerical control module. The second feedback servo module is used to generate a second feedback signal based on the error signal and the zero-pole adjustment signal sent by the numerical control module.

[0054] In a possible implementation manner, the input module includes: an input-stage differential operational amplifier module. As Figure 2As shown, the positive phase terminal of the input stage differential operational amplifier module is connected to the first terminal of the first numerically controlled single-pole double-throw switch, and the second terminal and the third terminal of the first numerically controlled single-pole double-throw switch are respectively connected to the measurement signal and the reference signal; the negative phase terminal of the input stage differential operational amplifier module is connected to the first terminal of the second numerically controlled single-pole double-throw switch, and the second terminal and the third terminal of the second numerically controlled single-pole double-throw switch are respectively connected to the measurement signal and the reference signal.

[0055] The input stage differential operational amplifier module is used to obtain the measurement signal and the reference signal through the first numerically controlled single-pole double-throw switch and the second numerically controlled single-pole double-throw switch; and generate an error signal based on the measurement signal and the reference signal.

[0056] Exemplarily, the first numerically controlled single-pole double-throw switch and the second numerically controlled single-pole double-throw switch can be controlled by the general-purpose input / output (GPIO) ports of the FPGA. The FPGA chip can control the first numerically controlled single-pole double-throw switch to connect to the reference signal and control the second numerically controlled single-pole double-throw switch to connect to the measurement signal; or, the FPGA chip can control the first numerically controlled single-pole double-throw switch to connect to the measurement signal, control the second numerically controlled single-pole double-throw switch to connect to the reference signal, and generate an error signal based on the measurement signal and the reference signal. Among them, the reference signal can be set by the numerical control module through the DAC.

[0057] In the embodiment of the present application, by controlling the first numerically controlled single-pole double-throw switch and the second numerically controlled single-pole double-throw switch in the input module through the numerical control module, the switching of the internal and external reference signals and the switching of the input stage polarity can be realized, and an error signal is generated.

[0058] In a possible implementation manner, the first feedback servo module includes: a PID circuit, a first DAC module, a first adder, and a polarity switching module connected to the input module. Among them, the PID circuit includes a numerically controlled potentiometer, a feedback resistor, a proportional (P) signal circuit, an integral (I) signal circuit, and a differential (D) signal circuit, as Figure 3 shown, this figure is a circuit schematic diagram of a first feedback servo module provided by the embodiment of the present application.

[0059] The PID circuit is used to receive the error signal sent by the input module; adjust the resistance value of the feedback resistor through the numerically controlled potentiometer to obtain an adjusted feedback resistor; and obtain a PID signal based on the adjusted feedback resistor and the error signal.

[0060] As shown in the figure, the PID circuit includes a proportional (P) signal circuit, an integral (I) signal circuit, and a derivative (D) signal circuit, each of which is connected in series with a digital potentiometer. By controlling the respective digital potentiometers connected in series, the feedback resistors in the proportional (P) signal circuit, the integral (I) signal circuit, and the derivative (D) signal circuit can be adjusted respectively to adjust the PID gain.

[0061] In a possible implementation, the first feedback servo module further includes: a digital single-pole single-throw switch, which is connected in parallel with the integrating capacitor of the integrator in the integral signal circuit. When the first feedback servo module is disconnected from the input module, the digital single-pole single-throw switch is turned on to discharge and clear the integrating capacitor.

[0062] Exemplarily, as Figure 3 shown, the error signal is connected to the PID circuit through a digital single-pole double-throw switch, and the other end of the digital single-pole double-throw switch is grounded for controlling slow feedback lock / unlock.

[0063] When slow feedback is locked, the PID circuit accesses the error signal through the digital single-pole double-throw switch, and the digital single-pole single-throw switch is turned off, so that the integrating capacitor is connected in parallel with the integrator; when slow feedback is unlocked, the digital single-pole double-throw switch is grounded, the first feedback servo module is disconnected from the input module, and the digital single-pole single-throw switch is turned on, and the integrating capacitor is bypassed, so that the integrating capacitor is discharged and cleared to avoid charge accumulation.

[0064] The PID signals output by the proportional (P) signal circuit, the integral (I) signal circuit, and the derivative (D) signal circuit and the bias signal output by the first DAC module can be connected to the first adder through a digital four-channel single-pole single-throw switch.

[0065] The first adder is used to add the PID signal and the bias signal output by the first DAC module to generate a first sub-feedback signal. The digital four-channel single-pole single-throw switch is used to control the on / off of each signal.

[0066] The first sub-feedback signal can be switched in output polarity through a polarity switching module. Exemplarily, the polarity switching module includes a non-inverting amplification module and an inverting amplification module. The first sub-feedback signal can be connected to the inputs of the non-inverting amplification and inverting amplification through a digital single-pole double-throw switch for polarity switching to generate the first feedback signal.

[0067] In a possible implementation, the first feedback servo module further includes: a clipping module; the clipping module is configured to adjust the voltage of the first feedback signal to the first threshold when the voltage of the first feedback signal is greater than the first threshold; and adjust the voltage of the second feedback signal to the second threshold when the voltage of the second feedback signal is less than the second threshold.

[0068] In the embodiment of the present application, after passing through the clipping module, the first feedback signal can be output through an SMA (SubMiniature version A) interface.

[0069] Exemplarily, the output circuit of the first feedback servo module can be built by an operational amplifier into an operational amplifier circuit with a diode as a feedback device, such as Figure 4 shown. This figure is a circuit diagram of a clipping module provided in the embodiment of the present application. The non-inverting terminal of the operational amplifier of the clipping module is connected to the DAC signal for setting the first threshold and the second threshold.

[0070] When the voltage of the first feedback signal is less than the first threshold, the diode in the clipping module is reversely biased and does not conduct, and the clipping module does not function and does not clip the first feedback signal; when the voltage of the first feedback signal is greater than the first threshold, the diode is forward biased and conducts, and the clipping module becomes a voltage follower, which can adjust the voltage of the first feedback signal to the first threshold. Similarly, when the voltage of the second feedback signal is less than the second threshold, the voltage of the second feedback signal can be adjusted to the second threshold. In the embodiment of the present application, by clipping the first feedback signal, the normal operation of the system can be ensured.

[0071] In a possible implementation, the second feedback servo module includes a feedback capacitor group composed of a plurality of feedback capacitors connected in parallel, and each feedback capacitor is connected in series with a single-pole single-throw switch. As Figure 5 shown. This figure is a circuit diagram of a second feedback servo module provided in the embodiment of the present application.

[0072] The second feedback servo module is specifically configured to control the single-pole single-throw switch connected in series with the feedback capacitor based on the error signal and the zero-pole adjustment signal sent by the numerical control module, connect the corresponding feedback capacitor, and generate a second feedback signal.

[0073] As shown in the figure, the 4-channel single-pole single-throw switch can be controlled through the GPIO interface of the FPGA to switch the feedback capacitor. A plurality of feedback capacitors connected in series with single-pole single-throw switches are connected in parallel. By connecting different numbers of feedback capacitors through the single-pole single-throw switch, the total feedback capacitance can be changed, thereby controlling the zero-pole.

[0074] In a possible implementation, the second feedback servo module includes a voltage-controlled gain operational amplifier module connected in series with the feedback capacitor bank. The voltage-controlled gain operational amplifier module includes a resistor and an adjustable gain operational amplifier module. The voltage-controlled gain operational amplifier module is used for continuously fine-tuning the zero-pole points.

[0075] As Figure 6 shown, this figure is a schematic diagram of an equivalent circuit provided by an embodiment of the present application. The circuit signal in the second feedback servo module is transmitted from the non-inverting input to the output, and the corresponding transfer function can be expressed by Equation (1) as follows:

[0076] Fun=-G fli (G sli + G fld ) × (1 + G xsli ) × V g (1)

[0077] Where G fli , G sli , G fld , G xsli , V g are the gains of the compensators formed by each stage of operational amplifiers respectively. SLI represents Slow Limited Integrator; FLI represents Fast Limited Integrator; FLD represents Fast Limited Differentiator; XSLI represents Extra Slow Limited Integrator. Then, G sli represents the gain corresponding to the slow limited integrator; G fli represents the gain corresponding to the fast limited integrator; G fld represents the gain corresponding to the fast limited differentiator; G xsli represents the gain corresponding to the extra slow limited integrator. Where Slow and Fast respectively correspond to operating in the low-frequency band and the high-frequency band.

[0078] Next, taking the FLI stage as an example, the calculation method of G fli will be introduced.

[0079] According to Kirchhoff's current law, for the circuit (a) in Figure 6 , the following node current equations can be listed:

[0080] (2)

[0081] From this, the circuit (a) in Figure 6 can be equivalent to Figure 6The circuit in (b), where the equivalent resistance R4’ = R4 / (1 + A), V in 、V tmp 、V o are the voltages of each node in the circuit respectively.

[0082] By combining the above formulas, Equation (3) can be obtained as follows:

[0083] (3)

[0084] Therefore, the circuit in (b) in Figure 6 can be equivalent to the circuit in (c) in Figure 6 , that is, a lead-lag compensator, where A is the gain of the voltage-controlled gain amplifier.

[0085] In the embodiment of the present application, based on the voltage-controlled gain op-amp module in the second feedback servo module, continuous adjustment of the circuit zero and pole points can be achieved through continuous voltage adjustment.

[0086] In summary, a phase compensator provided by the embodiment of the present application can achieve board card program control based on digital control of FPGA and can cooperate with the timing of atomic experiments for dynamic control; through the second feedback servo module, continuous fine adjustment of the fast feedback zero and pole points can be achieved. At the same time, through multi-channel ADC acquisition and DAC control, as well as a large-capacity DDR RAM chip, functions such as real-time noise analysis, loop testing, and automatic locking can be implemented within the FPGA.

[0087] The embodiment of the present application provides a phase compensation method, and its specific implementation manner is the same as the implementation manner and the achieved technical effects recorded in the embodiment of the above method, and some contents will not be repeated.

[0088] The embodiment of the present application provides a phase compensation method, which generates a bias signal and a zero-pole adjustment signal based on a measurement signal and an error signal; the error signal is generated based on the difference between the measurement signal and a reference signal; a first feedback signal is generated based on the error signal and the bias signal; a second feedback signal is generated based on the error signal and the zero-pole adjustment signal; the measurement signal is adjusted based on the first feedback signal and the second feedback signal to obtain an adjusted measurement signal.

[0089] For ease of understanding, a holistic introduction to a phase compensation method provided by the embodiment of the present application is given below.

[0090] In the embodiment of the present application, after the measurement signal and the reference signal pass through a low-noise differential op-amp module (AD8130), an error signal can be generated, and the error signal is sent to the subsequent feedback circuit, that is, the first feedback servo module and the second feedback servo module.

[0091] Exemplarily, the reference signal can be switched between the positive and negative terminals of the internal or external input by two digital control single-pole double-throw switches, and the internal bias signal can be set by two 16-bit DACs (e.g., AD5542).

[0092] The first feedback servo module includes a PID controller composed of a first-order proportional control (P), integral control (I), first-order derivative control (D), and an output offset.

[0093] Exemplarily, the PID controller can be built by operational amplifier modules with low bias current (e.g., OPA2192), and the PID parameters can be adjusted by a 10-bit digital control potentiometer (e.g., AD5292). The output offset is realized by a multi-channel 16-bit DAC (e.g., DAC80508).

[0094] In the second feedback servo module, SLI, FLI, FLD, and XSLI can use a compensator built with a high-bandwidth operational amplifier module (e.g., OPA820) and capacitors. Different from the common amplifier circuits built with operational amplifiers, in the embodiments of the present application, the capacitors can be switched by a digital control analog switch (e.g., ADG1411), so as to adjust the zero and pole points of the amplifier circuit, and realize the gain adjustment of the amplifier circuit in different frequency bands.

[0095] In summary, the phase compensation method provided by the embodiments of the present application can realize board card program control based on the digital control of FPGA, and can cooperate with the timing of atomic experiments for dynamic control; through the second feedback servo module, continuous and fine adjustment of the fast feedback zero and pole points can be realized. At the same time, through multi-channel ADC acquisition and DAC control, and large-capacity DDR, functions such as real-time noise analysis, loop testing, and automatic locking can be realized within the FPGA. It has a feedback servo module design with high gain and low noise, and can support the locking of an ultra-stable laser with a frequency stability of up to 10 -17 and low temperature drift, making the working state more stable.

[0096] In a third aspect: The embodiments of the present application provide a computing device, which includes: a processor and a memory;

[0097] The memory is used to store program codes and transmit the program codes to the processor;

[0098] The processor is used to execute the steps of the phase compensation method as described above according to the instructions in the program codes.

[0099] In a fourth aspect: The embodiments of the present application provide a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the phase compensation method as described above are realized.

[0100] As described above, it is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed in the present application should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A phase compensator, characterized in that, Including: A numerical control module, a first feedback servo module, a second feedback servo module, and an input module; The input module is configured to generate an error signal based on a measurement signal and a reference signal; Send the error signal to the numerical control module, the first feedback servo module, and the second feedback servo module; The first feedback servo module is configured to generate a first feedback signal based on the error signal and a bias signal sent by the numerical control module; The second feedback servo module is configured to generate a second feedback signal based on the error signal and a zero-pole adjustment signal sent by the numerical control module; The numerical control module is configured to adjust the measurement signal based on the first feedback signal and the second feedback signal to obtain an adjusted measurement signal; The first feedback servo module includes: a proportional-integral-derivative (PID) circuit connected to the input module, a first digital-to-analog converter (DAC) module, a first adder, and a polarity switching module; the PID circuit includes a digital potentiometer, a feedback resistor, a proportional signal circuit, an integral signal circuit, and a differential signal circuit; The PID circuit is configured to receive the error signal sent by the input module; adjust the resistance value of the feedback resistor through the digital potentiometer to obtain an adjusted feedback resistor; obtain a PID signal based on the adjusted feedback resistor and the error signal; The first adder is configured to add the PID signal and the bias signal output by the first DAC module to generate a first sub-feedback signal; The polarity switching module is configured to perform a polarity switch on the first sub-feedback signal to generate the first feedback signal.

2. The phase compensator according to claim 1, wherein The first feedback servo module further includes: a numerically controlled single-pole single-throw switch, which is connected in parallel with the integration capacitor of the integrator in the integral signal circuit; When the first feedback servo module is disconnected from the input module, the numerically controlled single-pole single-throw switch is turned on to discharge and clear the integration capacitor.

3. The phase compensator according to claim 1, characterized in that, The first feedback servo module further includes: a limiting module; The limiting module is configured to adjust the voltage of the first feedback signal to the first threshold when the voltage of the first feedback signal is greater than the first threshold; adjust the voltage of the second feedback signal to the second threshold when the voltage of the second feedback signal is less than the second threshold.

4. The phase compensator according to claim 1, wherein The second feedback servo module includes a feedback capacitor group composed of a plurality of feedback capacitors connected in parallel, and each feedback capacitor is connected in series with a single-pole single-throw switch; The second feedback servo module is specifically configured to control the single-pole single-throw switch connected in series with the feedback capacitor to connect the corresponding feedback capacitor based on the error signal and the zero-pole adjustment signal sent by the numerical control module to generate a second feedback signal.

5. The phase compensator according to claim 4, characterized in that, The second feedback servo module includes: a voltage-controlled gain operational amplifier module connected in series with the feedback capacitor group, and the voltage-controlled gain operational amplifier module includes a resistor and an adjustable gain operational amplifier module; The voltage-controlled gain operational amplifier module is configured to continuously fine-tune the zero-pole based on the resistor and the adjustable gain operational amplifier module.

6. The phase compensator according to any one of claims 1-5, characterized in that, The input module includes: an input-stage differential operational amplifier module; the non-inverting terminal of the input-stage differential operational amplifier module is connected to the first terminal of a first numerically controlled single-pole double-throw switch, and the second terminal and the third terminal of the first numerically controlled single-pole double-throw switch are respectively connected to a measurement signal and a reference signal; the inverting terminal of the input-stage differential operational amplifier module is connected to the first terminal of a second numerically controlled single-pole double-throw switch, and the second terminal and the third terminal of the second numerically controlled single-pole double-throw switch are respectively connected to the measurement signal and the reference signal. The input-stage differential operational amplifier module is configured to obtain a measurement signal and a reference signal through the first numerically controlled single-pole double-throw switch and the second numerically controlled single-pole double-throw switch; and generate an error signal based on the measurement signal and the reference signal.

7. A phase compensation method, characterized in that It includes: Generate a bias signal and a zero-pole adjustment signal based on the measurement signal and the error signal; The error signal is generated based on the difference between the measurement signal and the reference signal; Generate a first feedback signal based on the error signal and the bias signal; Generate a second feedback signal based on the error signal and the zero-pole adjustment signal; Adjust the measurement signal based on the first feedback signal and the second feedback signal to obtain an adjusted measurement signal; The generating the first feedback signal based on the error signal and the bias signal includes: Obtain a PID signal based on an adjusted feedback resistor and the error signal; the adjusted feedback resistor is obtained by adjusting the resistance value of the feedback resistor through a numerically controlled potentiometer; Add the PID signal and the bias signal to generate a first sub-feedback signal; Perform a polarity switch on the first sub-feedback signal to generate the first feedback signal.

8. A computing device, characterized in that, The computing device includes: a processor and a memory; The memory is configured to store program code and transmit the program code to the processor; The processor is configured to execute the steps of a phase compensation method as claimed in claim 7 according to the instructions in the program code.

9. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of a phase compensation method as claimed in claim 7 are implemented.

Images