Phased-array antenna calibration method and system and storage medium

Abstract

The invention relates to the technical field of antenna data measurement, in particular to a phased-array antenna calibration method, which can acquire input parameters, set a scanning mode of a vector network analyzer as a segmented scanning mode and set parameters. Performing traversal test on each frequency point number under each vector under each channel in sequence, and acquiring and storing the amplitude and phase value radiated by each frequency point number under each channel; and performing vector synthesis on all the frequency point number data under each channel through a PhaseToggle algorithm to obtain a final amplitude and a final phase value under each channel. It can be understood that according to the technical scheme shown by the invention, automatic parameter configuration and high-efficiency data acquisition can be realized by utilizing the segmented trigger mode set by the vector network analyzer and the characteristics of high precision, high sensitivity and programmable control of the vector network analyzer, and meanwhile, the problem of signal coupling between channels is reduced by adopting a PhaseToggle algorithm, so that the accuracy of final calibration data is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of antenna data measurement, and in particular to a phased array antenna calibration method, system and storage medium. Background Art

[0002] Distributed algorithms are often used in phased array antenna wave control systems. The basic idea of ​​the distributed algorithm is that the wave control motherboard receives control instructions from the radar subsystem, and the subarray operation processing module calculates the wave control code, that is, the amplitude and phase code, in real time according to the control instructions. To calculate the wave control code, a theoretical phase calibration code, that is, amplitude and phase compensation data, is required. In actual engineering implementation, due to limitations of assembly, processing technology and other conditions, there will be certain inconsistencies in amplitude gain and phase offset between array element channels, and the phased array antenna is very sensitive to channel inconsistency. When designing the system, the inconsistency data is processed into amplitude and phase compensation data to reduce its impact on the performance of the phased array antenna. This data needs to be calibrated amplitude and phase compensation data obtained by actual acquisition and algorithm processing by the host computer in a standard darkroom environment.

[0003] In the calibration process of the existing method, each channel unit needs to be normalized, and the amplitude of other units needs to be further adjusted and analyzed while the unit remains unchanged (the final code is the amplitude compensation code), and the theoretical phase value of each unit needs to be 0 (the final code is the phase compensation code). Therefore, when making adjustments, it is necessary to ensure that the phase of each unit is in the same cycle, so as to ensure that the adjusted data is as accurate as possible. However, due to the differences in devices between various units and modules, the actual calibration results may not be as good as the theoretical value or target value, so continuous calibration verification or iterative calibration may be required, and this calibration process takes a long time.

[0004] Therefore, the current large-scale phased array antenna test data volume is large, the verification speed is slow, and the verification result accuracy is low. Summary of the invention

[0005] In view of this, an object of the present invention is to provide a phased array antenna calibration method, system and storage medium to solve the problems in the prior art of large-scale phased array antenna test, such as large amount of test data, slow verification speed and low accuracy of verification results.

[0006] According to a first aspect of an embodiment of the present invention, a phased array antenna calibration method is provided, comprising: Get input parameters, set the vector network analyzer scanning mode to segmented scanning mode, and set segmented scanning mode parameters; Using the set segmented scanning mode, each frequency point under each vector under each channel is tested in turn. The vector network analyzer obtains and stores the amplitude and phase values ​​radiated from each frequency point under each channel. After all frequency point data are stored, all frequency point data under each channel are vector synthesized through the PhaseToggle algorithm to obtain the final amplitude and final phase value under each channel.

[0007] Preferably, the setting of segmented scanning mode parameters includes: Set the number of segmented scans of the vector network analyzer according to the vector synthesis method; Set the start frequency, end frequency and number of frequency points of each segment in the segmented sweep of the vector network analyzer; Configure the vector network analyzer to manual point trigger mode.

[0008] Preferably, each frequency point under each vector under each channel is traversed and tested in turn, including: S21, set the initial channel number to 0; S22, determine whether the current channel number is less than the number of channels, if so, execute step S23, if not, complete the test; S23, test and set the current channel, and at the same time, set the initial vector sequence number to 0; S24, determine whether the current vector number is less than the number of vectors, if so, execute step S25, if not, execute step S27; S25, starting from the frequency point number 0, sequentially obtain and store the amplitude and phase values ​​radiated from each frequency point, until the frequency point number is greater than or equal to the number of frequency points, and execute step S26; S26, the current vector number is incremented by 1, and the process goes to step S24; S27, the current channel number is incremented by 1, and the process goes to step S22.

[0009] Preferably, in step S27, before the current channel number is incremented by 1, the following steps are further included: Collect the amplitude and phase values ​​of all frequency points in the current channel stored in the vector network analyzer; The amplitude and phase values ​​of all frequency points are used for vector synthesis to obtain the final amplitude and final phase values ​​of all frequency points of a single channel.

[0010] Preferably, in step S23, the current channel is tested and set, including: Send a power-on command to the wave control motherboard, so that the wave control motherboard powers on the current channel and powers off other channels; Control the probe on the scanning frame to move to the top of the current channel.

[0011] Preferably, in step S25, the amplitude and phase values ​​radiated from each frequency point are obtained and stored, including: Control the phase shifter and attenuator of the TR module under the current channel; A manual trigger command is sent to the vector network analyzer so that the vector network analyzer stores the amplitude and phase values ​​radiated from the current frequency point in the current channel when receiving the manual trigger command.

[0012] Preferably, the obtaining of input parameters includes: Obtain the amplitude and phase compensation data after analysis and leveling, the number of test frequency points that need to be reversed, the number of vector synthesis, the corresponding coordinate points of each channel on the scanning frame, and the test channel list.

[0013] According to a second aspect of an embodiment of the present invention, a phased array antenna calibration system is provided, comprising: A host computer and a vector network analyzer, wherein the host computer is connected to the vector network analyzer; The host computer is used to execute any one of the methods described above.

[0014] According to a third aspect of an embodiment of the present invention, a computer-readable storage medium is provided, storing a computer program, and when the computer program is executed by a processor, the method described in any one of the above is implemented.

[0015] The technical solution provided by the embodiments of the present invention may have the following beneficial effects: It is understandable that the technical solution shown in the present invention can obtain input parameters, set the scanning mode of the vector network analyzer to the segmented scanning mode, and set parameters; perform traversal tests on each frequency point under each vector under each channel in turn, obtain and store the amplitude and phase values ​​radiated by each frequency point under each channel; perform vector synthesis on all frequency point data under each channel through the PhaseToggle algorithm to obtain the final amplitude and final phase value under each channel. It is understandable that the technical solution shown in the present invention, using the segmented trigger mode set by the vector network analyzer and its high-precision, high-sensitivity and programmable characteristics, can realize automatic parameter configuration and high-efficiency data acquisition. At the same time, the PhaseToggle algorithm is used to reduce the problem of signal coupling between channels and ensure the accuracy of the final calibration data.

[0016] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0018] Figure 1 It is the distribution diagram of the phased array antenna design modules; Figure 2 is a schematic diagram of steps of a phased array antenna calibration method according to an exemplary embodiment; Figure 3 is a schematic diagram of a traversal test process according to an exemplary embodiment; Figure 4 The figure is a schematic diagram of a segmented trigger channel reverse play process according to an exemplary embodiment. DETAILED DESCRIPTION

[0019] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with some aspects of the present invention as detailed in the appended claims.

[0020] Phased array antennas are developed from array antennas, and mainly rely on phase changes to achieve the movement or scanning of the antenna beam in space. Phased array antennas are composed of multiple antenna units, also known as radiators. The antenna unit can be a single waveguide horn antenna, dipole antenna, patch antenna, etc. A phase shifter is set at the back end of each antenna unit to change the phase relationship of the signal between units, and the amplitude change of the signal is achieved through a power distribution / addition network or attenuator. The structure distribution of the phased array antenna design module is as follows: Figure 1 shown.

[0021] The phased array antenna near-field test system software (hereinafter referred to as the host computer) uses the test host computer as the operating platform, and usually includes: servo control software package, beam control software package, data sampling software package and data analysis software package. These four software packages usually include several functional modules.

[0022] In the existing near-field calibration work, the most time-consuming step is the channel back-check verification. Because after the amplitude and phase compensation data is obtained for the first time, it is necessary to use the host computer to send the data to the corresponding channel, and then use the vector network to collect and verify whether the compensated data reaches the compensation target. This process is called "channel back-check". The back-checked data is often used for secondary or multiple iterative calibrations. This process has a great demand for improving the efficiency of the entire calibration test. The format of the amplitude and phase compensation data is a two-dimensional table, with the horizontal axis being the frequency point and the vertical axis being the channel number. The corresponding data in the table is the amplitude compensation data / phase compensation data. The amplitude and phase compensation data formats are shown in Tables 1 and 2. Table 1 is the amplitude compensation data format, and Table 2 is the phase compensation data format.

[0023] Table 1 Channel number / frequency number F1 F2 F3 Nth frequency point 1 Amplitude code 1 Amplitude code 2 Amplitude code 3 Amplitude code N 2 … … … … 3 … … … … … … … … … Kth channel … … … … Table 2 Channel number / frequency number F1 F2 F3 Nth frequency point 1 Phase code 1 Phase code 2 Phase code 3 Phase code N 2 … … … … 3 … … … … … … … … … Kth channel … … … … The present invention adds the PhaseToggle algorithm to reduce the coupling effect between channels during the single-channel single-frequency point reverse process. That is, under the single-channel single-frequency point, it is necessary to configure the original phase compensation data plus four states of 0°, 90°, 180°, and 270°, and collect the amplitude and phase data under each corresponding state for the algorithm to synthesize the final amplitude and phase values.

[0024] The specific technical solutions of the present invention are as follows: In one embodiment, Figure 2 is a schematic diagram of steps of a phased array antenna calibration method according to an exemplary embodiment. Figure 2 , a phased array antenna calibration method is provided, comprising: Step S1, obtaining input parameters, setting the scanning mode of the vector network analyzer to the segmented scanning mode, and setting the segmented scanning mode parameters.

[0025] Step S2: Using the set segmented scanning mode, each frequency point under each vector under each channel is traversed and tested in turn, and the vector network analyzer obtains and stores the amplitude and phase values ​​radiated from each frequency point under each channel; Step S3: After all frequency point data are stored, all frequency point data under each channel are vector synthesized by PhaseToggle algorithm to obtain the final amplitude and final phase value under each channel.

[0026] It is understandable that the technical solution shown in this embodiment can obtain input parameters, set the scanning mode of the vector network analyzer to the segmented scanning mode, and set parameters; perform traversal tests on each frequency point under each vector under each channel in turn, obtain and store the amplitude and phase values ​​radiated by each frequency point under each channel; perform vector synthesis on all frequency point data under each channel through the PhaseToggle algorithm to obtain the final amplitude and final phase value under each channel. It is understandable that the technical solution shown in this embodiment, using the segmented trigger mode set by the vector network analyzer and its high-precision, high-sensitivity and programmable characteristics, can realize automatic parameter configuration and high-efficiency data acquisition. At the same time, the PhaseToggle algorithm is used to reduce the problem of signal coupling between channels and ensure the accuracy of the final calibration data.

[0027] It should be noted that, in step S1, the obtaining of input parameters includes: Obtain the amplitude and phase compensation data after analysis and leveling, the number of test frequency points that need to be reversed, the number of vector synthesis, the corresponding coordinate points of each channel on the scanning frame, and the test channel list.

[0028] In specific practice, the host computer needs to obtain the above input parameters and use them to complete the calibration. After completing the acquisition of the input parameters, set the vector network analyzer scanning mode to segmented scanning mode, and set the segmented scanning mode parameters. Vector network analyzers generally support linear scanning mode, logarithmic scanning mode, segmented scanning mode and CW scanning mode.

[0029] It should be noted that the setting of the segmented scanning mode parameters includes: setting the number of segmented scanning of the vector network analyzer according to the vector synthesis method; setting the starting frequency, ending frequency and number of frequency points of each segment in the segmented scanning of the vector network analyzer; and configuring the vector network analyzer to a manual point trigger mode.

[0030] In practice, the number of segmented scans of the vector network analyzer is set according to the vector synthesis method. The number can be n. For example, single vector synthesis only needs to set 1 segment, dual vector synthesis needs 2 segments, and so on. The vector network analyzer is configured to be in manual point trigger mode. In this mode, the host computer can send a manual trigger command to the vector network analyzer, and the vector network analyzer records the amplitude and phase values ​​at the current time point after receiving it.

[0031] It should be noted that see Figure 3 In step S2, each frequency point of each vector under each channel is traversed and tested in turn, including: S21. Set the initial channel number to 0.

[0032] S22, determine whether the current channel number is less than the number of channels, if so, execute step S23, if not, complete the test.

[0033] S23. Perform test settings on the current channel and set the initial vector sequence number to 0.

[0034] S24. Determine whether the current vector sequence number is less than the number of vectors. If so, execute step S25; otherwise, execute step S27.

[0035] S25, starting from the frequency point number 0, sequentially obtain and store the amplitude and phase value radiated from each frequency point until the frequency point number is greater than or equal to the number of frequency points, and execute step S26.

[0036] S26, the current vector number is incremented by 1, and the process proceeds to step S24.

[0037] S27, the current channel number is incremented by 1, and the process goes to step S22.

[0038] It should be noted that, in the step S27, before the current channel number is incremented by 1, it also includes: collecting the amplitude and phase values ​​of all frequency points under the current channel stored in the vector network analyzer; using the amplitude and phase values ​​of all frequency points to perform vector synthesis to obtain the final amplitude and final phase values ​​of all frequency points of a single channel.

[0039] In specific practice, after completing the acquisition of all frequency points under a channel, the current channel can be vector synthesized once, and vector synthesis can be performed through the PhaseToggle algorithm to obtain the final amplitude and phase values. This algorithm is a genetic algorithm that can reduce the coupling effect between channels as much as possible and obtain the standard amplitude and phase values ​​at each frequency point of each channel.

[0040] It should be noted that in step S23, the test setting for the current channel includes: sending a power-on command to the wave control motherboard so that the wave control motherboard powers on the current channel and powers off other channels; and controlling the probe on the scanning frame to move to just above the current channel.

[0041] It should be noted that in step S25, the amplitude and phase values ​​radiated by each frequency point are obtained and stored, including: controlling the phase shifter and attenuator of the TR module under the current channel; sending a manual trigger instruction to the vector network analyzer so that the vector network analyzer stores the amplitude and phase values ​​radiated by the current frequency point under the current channel when receiving the manual trigger instruction.

[0042] In practice, before collecting data, the phase shifter and attenuator of the TR module under the corresponding channel need to be controlled in sequence. After each control of the phase shifter and attenuator of the TR module, the host computer sends a manual trigger command to the vector network analyzer, and the vector network analyzer will store the amplitude and phase values ​​radiated at the corresponding frequency point of the corresponding channel.

[0043] Taking the four-vector synthesis method as an example, the schematic diagram of the segmented trigger channel reverse process is as follows: Figure 4 As shown. Figure 4 In this example, the process is a four-vector synthesis method. When controlling phase shift attenuation, the attenuation code is the compensation code of the channel at this frequency point; four-vector synthesis requires the acquisition of amplitude and phase data of four phase states, namely, phase compensation angles p, p+90, p+180, and p+270, and the amplitude code always uses the analyzed compensation data. During data acquisition, the two windows of the vector network analyzer will display the amplitude / phase values ​​of all frequency points under all vectors respectively.

[0044] It is understandable that, according to different requirements, this method is not limited to storing only single vector (1 set of data), double vector (2 sets of data), and quad vector (4 sets of data). According to theoretical calculations, the more test points there are, the more efficient this method is in actual testing.

[0045] The current method of storing up to four vectors on the vector network analyzer and then collecting data is based on the consideration that the test results can be observed more timely in the user experience. In more mature and stable products, more groups of data can be stored on the vector network analyzer and then read together. Combined with different test processes, the data collection and storage can reach more than 1000 points (depending on the performance of the vector network analyzer, it can be further improved), which can effectively improve the production test efficiency.

[0046] Compared with the traditional testing process, this method effectively reduces the number of times vector network data is collected and greatly reduces the time for data collection.

[0047] In the phased array antenna calibration method of the present invention, there are two vector network analyzer windows, one for recording amplitude data and the other for recording phase data. According to the number of test vectors, the number of segment scans in the window is set, the frequency scan range of each segment is set, and the vector network trigger mode is set to manual point trigger. In the test, the host computer sends a trigger signal to the vector network, and the vector network records the single trigger record data (two windows are triggered and recorded synchronously). After the amplitude and phase control and data storage of all vectors and all frequency points of a single channel are completed, the host computer reads all the data on the vector network for vector synthesis calculation. According to this method, in actual testing, taking 512 channels, 51 frequency points, and four-vector acquisition as an example, it is only necessary to send 512*2 vector network view selection instructions and data reading instructions to the vector network, and another 51*512*4 vector network trigger signal instructions need to be sent to the vector network. Similarly, keeping the communication time of the same command as in the traditional method, the response time of a single view selection command is 5ms, the data reading response time is 15ms, and the trigger and waiting time is 15ms. Then the total time consumed by the host computer to send commands to the vector network and receive data in the entire test is calculated as follows: 512*2*(5+15)+51*512*4*15=1587200ms It is about 26.45min, as shown in Table 3 for details.

[0048] Table 3 Command name Single command response time (ms) The number of times the entire test needs to be sent Total time (ms) Switch View 5 1024 5120 trigger 15 104448 1566720 Data reading 15 1024 15360 1587200 Therefore, compared with the time consumption of the same test amount in the traditional method (see Table 4), this solution greatly reduces the time consumption of switching views and data reading, and eliminates the time consumption of setting the CW frequency separately. The communication time between the host computer and the vector network in the solution of the present invention is reduced by 51.8 minutes as a whole compared with the old method, and the time consumption is reduced by 66%.

[0049] Table 4 Command name Single command response time (ms) The number of times the entire test needs to be sent Total time (ms) Switch View 5 52224 261120 CW Frequency Setting 80 26112 2088960 trigger 15 104448 1566720 Data reading 15 52224 783360 4700160 The phased array antenna calibration method of this solution can be further expanded based on the actual antenna measurement frequency range and the performance of the vector network analyzer, while the traditional method is limited to single-frequency switching testing. In this solution, testers can intuitively observe the product test status, detect abnormalities in time, and improve test efficiency.

[0050] According to a second aspect of an embodiment of the present invention, a phased array antenna calibration system is provided, comprising: A host computer and a vector network analyzer, wherein the host computer is connected to the vector network analyzer; The host computer is used to execute any one of the methods described above.

[0051] According to a third aspect of an embodiment of the present invention, a computer-readable storage medium is provided, storing a computer program, and when the computer program is executed by a processor, the method described in any one of the above is implemented.

[0052] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.

[0053] It should be noted that, in the description of the present invention, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "plurality" refers to at least two.

[0054] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0055] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0056] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0057] In addition, each functional unit in each embodiment of the present invention may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0058] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0059] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0060] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A phased array antenna calibration method, characterized in that: include: Get input parameters, set the vector network analyzer scanning mode to segmented scanning mode, and set segmented scanning mode parameters; Using the set segmented scanning mode, each frequency point under each vector under each channel is tested in turn. The vector network analyzer obtains and stores the amplitude and phase values ​​radiated from each frequency point under each channel. After all frequency point data are stored, all frequency point data under each channel are vector synthesized through the PhaseToggle algorithm to obtain the final amplitude and final phase value under each channel.

2. The phased array antenna calibration method according to claim 1, characterized in that: The step of setting the segmented scanning mode parameters includes: Set the number of segmented scans of the vector network analyzer according to the vector synthesis method; Set the start frequency, end frequency and number of frequency points of each segment in the segmented sweep of the vector network analyzer; Configure the vector network analyzer to manual point trigger mode.

3. The phased array antenna calibration method according to claim 2, characterized in that: Each frequency point of each vector under each channel is traversed and tested in turn, including: S21, set the initial channel number to 0; S22, determine whether the current channel number is less than the number of channels, if so, execute step S23, if not, complete the test; S23, test and set the current channel, and at the same time, set the initial vector sequence number to 0; S24, determine whether the current vector number is less than the number of vectors, if so, execute step S25, if not, execute step S27; S25, starting from the frequency point number 0, sequentially obtain and store the amplitude and phase values ​​radiated from each frequency point, until the frequency point number is greater than or equal to the number of frequency points, and execute step S26; S26, the current vector number is incremented by 1, and the process goes to step S24; S27, the current channel number is incremented by 1, and the process goes to step S22.

4. The phased array antenna calibration method according to claim 3, characterized in that: In the step S27, before the current channel number is incremented by 1, the following steps are also included: Collect the amplitude and phase values ​​of all frequency points in the current channel stored in the vector network analyzer; The amplitude and phase values ​​of all frequency points are used for vector synthesis to obtain the final amplitude and final phase values ​​of all frequency points of a single channel.

5. The phased array antenna calibration method according to claim 3, characterized in that: In step S23, the current channel is tested and set, including: Send a power-on command to the wave control motherboard, so that the wave control motherboard powers on the current channel and powers off other channels; Control the probe on the scanning frame to move to the top of the current channel.

6. The phased array antenna calibration method according to claim 3, characterized in that: In step S25, the amplitude and phase values ​​radiated from each frequency point are obtained and stored, including: Control the phase shifter and attenuator of the TR module under the current channel; A manual trigger command is sent to the vector network analyzer so that the vector network analyzer stores the amplitude and phase values ​​radiated from the current frequency point in the current channel when receiving the manual trigger command.

7. The phased array antenna calibration method according to claim 1, characterized in that: The obtaining of input parameters includes: Obtain the amplitude and phase compensation data after analysis and leveling, the number of test frequency points that need to be reversed, the number of vector synthesis, the corresponding coordinate points of each channel on the scanning frame, and the test channel list.

8. A phased array antenna calibration system, characterized in that: include: A host computer and a vector network analyzer, wherein the host computer is connected to the vector network analyzer; The host computer is used to execute the method according to any one of claims 1 to 7.

9. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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