Touch display panel, preparation method thereof and display device

By setting touch lines and data lines in the fan-out area of ​​the touch display panel, and simplifying the connection of pixel electrodes in the display area, the problem of increasing frame area caused by dense wiring in the prior art is solved, and the effect of frame reduction and process simplification is achieved.

CN119883042APending Publication Date: 2025-04-25BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202311388520.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-10-24
Publication Date
2025-04-25

AI Technical Summary

Technical Problem

When designing a high-resolution, high-touch sensitivity touch display panel, the layout of existing data lines and touch lines leads to dense wiring on the IC side and increasing the frame area, making it difficult to take into account both the frame area requirements and the wiring process requirements.

Method used

A touch display panel is proposed, which includes a display area and a fan-out area. By setting a second touch line and a second data line in the fan-out area, the problem of mutual extrusion of wiring space caused by the same layer is avoided, and the first touch line and the common electrode are connected through a second pixel electrode pattern in the display area, thereby simplifying the preparation process.

Benefits of technology

It realizes that while maintaining high resolution and touch sensitivity, the design of display product borders is reduced, the preparation process is simplified, the preparation cost is reduced, and the production capacity is increased.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a touch display panel, a preparation method thereof and a display device. The touch display panel is provided with a display area and a fan-out area. The touch lines comprise first touch lines located in the display area and second touch lines located in the fan-out area, the data lines comprise first data lines located in the display area and second data lines located in the fan-out area, and the second touch lines and the second data lines are arranged on different layers; the pixel electrode comprises a first pixel electrode pattern and a second pixel electrode pattern which are arranged at an interval, the first pixel electrode pattern is connected with the first data line, and the second pixel electrode pattern is connected with the first touch line and the common electrode. According to the touch display panel, the preparation method thereof and the display device, the second touch lines are independently arranged, on one hand, the wiring gap can be large, the good charging effect can be guaranteed, and the requirement for process precision is low, on the other hand, the overall area of the fan-out area can be designed to be small, and the design requirement for reducing the frame of a display product is met.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a touch display panel and a preparation method thereof, and a display device. Background Art

[0002] Since the launch of touch and display driver integration (TDDI) products in 2015, they have been widely favored by panel manufacturers due to their good performance, thin and light appearance, simplified supply chain and reduced costs. As consumers' requirements for screen-to-body ratio are getting higher and higher, the borders of TDDI products need to be designed to be narrower and narrower. However, as panel design tends to be high-resolution and high-touch sensitivity, more and more existing data lines (Data lines, responsible for the conduction of data signals) and existing touch lines (TPM lines, responsible for touch signal transmission) need to be designed in the touch display panel to support display and touch functions. A large number of existing data lines and existing touch lines need to be connected to the chip (IC) to achieve driving, which inevitably causes dense wiring on the IC side (lower border) and an increase in the border area.

[0003] How to reasonably balance the border area requirements and wiring process requirements has become the focus of research and design of major panel manufacturers. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a touch display panel, a manufacturing method thereof, and a display device.

[0005] Based on the above-mentioned purpose, the first aspect of the present application provides a touch display panel, comprising a display area and a fan-out area located on one side of the display area; the touch display panel comprises a common electrode, a pixel electrode, a touch line and a data line; the common electrode is time-division multiplexed as a touch drive electrode; the touch line comprises a first touch line located in the display area and a second touch line located in the fan-out area, the data line comprises a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers; the common electrode and the pixel electrode are both located in the display area, the pixel electrode comprises a first pixel electrode pattern and a second pixel electrode pattern arranged at intervals, the first pixel electrode pattern is connected to the first data line, and the second pixel electrode pattern is respectively connected to the first touch line and the common electrode.

[0006] Based on the same inventive concept, the second aspect of the present application further provides a touch display panel, comprising a display area and a fan-out area located on one side of the display area; the touch display panel comprises a common electrode, a pixel electrode, a touch line and a data line; the common electrode is time-division multiplexed as a touch drive electrode; the touch line comprises a first touch line located in the display area and a second touch line located in the fan-out area, the data line comprises a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers; the common electrode and the pixel electrode are both located in the display area, the pixel electrode comprises a first pixel electrode pattern and a second pixel electrode pattern arranged at intervals, the first pixel electrode pattern is connected to the first data line, the common electrode is connected to the first touch line at a first position, the second pixel electrode pattern is connected to the common electrode at a second position, and the orthographic projection of the second position on the first touch line covers the orthographic projection of the first position on the first touch line.

[0007] Based on the same inventive concept, the third aspect of the present application provides a display device, comprising the touch display panel as described in the first aspect or the second aspect.

[0008] Based on the same inventive concept, the fourth aspect of the present application provides a method for preparing a touch display panel, comprising:

[0009] A substrate is provided on which data lines and touch lines are formed; wherein the substrate has a display area and a fan-out area, the touch lines include a first touch line located in the display area and a second touch line located in the fan-out area, the data lines include a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers;

[0010] forming a first passivation layer covering the data line and the touch line;

[0011] A common electrode is formed on a side of the first passivation layer away from the touch line; wherein the common electrode is time-division multiplexed as a touch drive electrode;

[0012] forming a second passivation layer on a side of the common electrode away from the first passivation layer;

[0013] A pixel electrode is formed on a side of the second passivation layer away from the common electrode; wherein the pixel electrode includes a first pixel electrode pattern and a second pixel electrode pattern arranged at intervals, the first pixel electrode pattern is connected to the first data line, and the second pixel electrode pattern is respectively connected to the first touch line and the common electrode.

[0014] Based on the same inventive concept, the fifth aspect of the present application provides a method for preparing a touch display panel, comprising:

[0015] A substrate is provided on which data lines and touch lines are formed; wherein the substrate has a display area and a fan-out area, the touch lines include a first touch line located in the display area and a second touch line located in the fan-out area, the data lines include a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers;

[0016] forming a third passivation layer on a side of the touch line away from the substrate;

[0017] forming a common electrode on a side of the third passivation layer away from the touch line, wherein the common electrode is connected to the first touch line at a first position;

[0018] forming a fourth passivation layer on a side of the common electrode away from the third passivation layer;

[0019] A pixel electrode is formed on a side of the fourth passivation layer away from the common electrode; wherein the pixel electrode includes a first pixel electrode pattern and a second pixel electrode pattern that are spaced apart, the first pixel electrode pattern is connected to the first data line, the second pixel electrode pattern is connected to the common electrode at a second position, and the orthographic projection of the second position on the first touch line covers the orthographic projection of the first position on the first touch line.

[0020] From the above, it can be seen that the touch display panel, preparation method thereof, and display device provided by the present application, by arranging the second touch line and the second data line in different layers in the fan-out area, so that the second touch line is separately arranged in the structural layer outside the second data line, can avoid the problem of mutual occupation of wiring space caused by the second touch line and the second data line being arranged in the same layer. On the one hand, arranging the second touch line separately can make the wiring gap larger, ensure better charging effect and lower process precision requirements, and on the other hand, it can also make the overall area of ​​the fan-out area smaller, meeting the design requirements of reducing the border of the display product. At the same time, by connecting the first touch line and the common electrode in the display area through the second pixel electrode pattern, the mask plate used in forming an isolation layer between the first touch line and the common electrode in order to directly connect the two can be omitted, which helps to simplify the preparation process, reduce preparation costs, and improve production capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 It is a top view schematic diagram of an existing touch display panel in the related art;

[0023] Figure 2 A schematic diagram of an existing touch display panel with a Dual Source structure in the related art;

[0024] Figure 3 A schematic diagram of an existing touch display panel with a Double Source structure in the related art;

[0025] Figure 4 A schematic top view of a touch display panel according to an embodiment of the present application;

[0026] Figure 5 A schematic diagram of a fan-out area of ​​a touch display panel according to an embodiment of the present application;

[0027] Figure 6 A schematic diagram of a first display area structure of a touch display panel according to an embodiment of the present application;

[0028] Figure 7 A schematic diagram of a second display area structure of a touch display panel according to an embodiment of the present application;

[0029] Figure 8 A schematic diagram of a touch display panel including a first display area structure according to an embodiment of the present application;

[0030] Fig. 9 is a schematic diagram of a third display area structure of a touch display panel according to an embodiment of the present application;

[0031] Fig.10 is a schematic diagram of a fourth display area structure of a touch display panel according to an embodiment of the present application;

[0032] Figures 11a to 11e It is a schematic diagram of the preparation process of the first display area structure of the touch display panel according to the embodiment of the present application;

[0033] Figures 12a to 12f A schematic diagram of the preparation process of the second display area structure of the touch display panel according to an embodiment of the present application;

[0034] Figures 13a to 13e A schematic diagram of the preparation process of a third display area structure of a touch display panel according to an embodiment of the present application;

[0035] Figures 14a to 14e Schematic diagram of the preparation process of the fourth display area structure of the touch display panel according to the embodiment of the present application. DETAILED DESCRIPTION

[0036] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0037] It should be noted that the relative arrangement of the components, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present application unless specifically stated otherwise.

[0038] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0039] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present application, its application, or uses.

[0040] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0041] like Figure 1 As shown, the TDDI touch display panel includes a display (AA) area 100 and a fan-out (Fan out) area 200 located at the lower side of the display area 100 .

[0042] In the related art, TDDI touch display products include two wiring structures: Dual Source and Double Source.

[0043] by Figure 2 The structure shown is taken as an example to illustrate an existing touch display panel using a dual source structure. The existing touch display panel includes a substrate 1, a light shielding layer 2 (LS) formed on the light emitting side of the substrate 1, a buffer layer 3 (Buffer) covering the light shielding layer 2, a semiconductor layer 4 (poly) formed on the side of the buffer layer 3 away from the substrate 1, a gate insulating layer 5 (GI) covering the semiconductor layer 4, a gate layer 6 (Gate) formed on the side of the gate insulating layer 5 away from the semiconductor layer 4, an interlayer dielectric layer 7 (ILD) covering the gate layer 6, a first source and drain layer 8 formed on the side of the interlayer dielectric layer 7 away from the gate layer 6, an existing first planar layer 9 (PLN) covering the first source and drain layer 8, an existing common electrode 10 (CITO) formed on the side of the existing first planar layer 9 away from the first source and drain layer 8, an existing passivation layer 11 (PVX) covering the existing common electrode 10, and an existing pixel electrode 12 (PITO) formed on the side of the existing passivation layer 11 away from the existing common electrode 10.

[0044] In the display area 100, the first source and drain layer 8 includes a first pattern responsible for data signal conduction (the pattern serves as an existing data line), and a second pattern responsible for touch signal transmission (the pattern serves as an existing touch line). The two patterns are arranged in parallel with each other in the same layer in the first source and drain layer 8, and both patterns use the source and drain materials of thin film transistors.

[0045] In each of the above structural layers, the light shielding layer 2, the semiconductor layer 4, the gate layer 6, the interlayer dielectric layer 7, the first source and drain electrode layer 8, the existing first flat layer 9, the existing common electrode 10, the existing passivation layer 11 and the existing pixel electrode 12 require different masks during the formation process. Among them, the gate pattern pitch (Gate Pitch) of the gate layer 6 in the display area 100 is relatively large, and the allowable critical dimension deviation (CD tolerance) is relatively large, and the gate pattern (W_Gate) of the display area 100 can be formed by wet etching technology (Wet Et); while the gate pattern pitch in the fan-out area 200 is relatively small, and the allowable critical dimension deviation is also relatively small, and the gate pattern (D_Gate) of the fan-out area 200 is formed by dry etching technology (Dry Etch), that is, two different masks are required to form the gate layer 6, and at least ten masks in total.

[0046] by Figure 3 The structure shown in the figure is taken as an example to illustrate the existing touch display panel using the Double Source structure. The existing touch display panel includes a substrate 1, a light shielding layer 2 (LS) formed on the light emitting side of the substrate 1, a buffer layer 3 (Buffer) covering the light shielding layer 2, a semiconductor layer 4 (poly) formed on the side of the buffer layer 3 away from the substrate 1, a gate insulating layer 5 (GI) covering the semiconductor layer 4, a gate layer 6 (Gate) formed on the side of the gate insulating layer 5 away from the semiconductor layer 4, an interlayer dielectric layer 7 (ILD) covering the gate layer 6, a second source and drain layer 8' formed on the side of the interlayer dielectric layer 7 away from the gate layer 6, and a second source and drain layer 8' covering the second source and drain layer An existing third flat layer 9' (PLN) of 8', a first protective layer 13 (PAS) covering the existing third flat layer 9', an existing touch line 14 (TPM) formed on the side of the first protective layer 13 away from the existing third flat layer 9', an existing second flat layer 15 (TVC) covering the existing touch line 14, an existing common electrode 10 (CITO) formed on the side of the existing second flat layer 15 away from the existing touch line 14, an existing passivation layer 11 (PVX) covering the existing common electrode 10, and an existing pixel electrode 12 (PITO) formed on the side of the existing passivation layer 11 away from the existing common electrode 10.

[0047] The existing touch line 14 extends from the display area 100 to the fan-out area 200. The first protective layer 13 is used to isolate the existing touch line 14 and the existing third flat layer 9' to prevent the existing third flat layer 9' from being ashed and contaminating the cavity when the existing touch line 14 is formed by dry etching technology. The existing second flat layer 15 is used to isolate the existing common electrode 10 and the existing touch line 14 to prevent a short circuit defect between the two.

[0048] In the display area 100 , the second source-drain electrode layer 8 ′ includes existing data lines, and the existing data lines and the existing touch control lines 14 are stacked.

[0049] In the above-mentioned structural layers, the shading layer 2, the semiconductor layer 4, the gate layer 6, the interlayer dielectric layer 7, the second source and drain layer 8', the existing third flat layer 9', the first protective layer 13, the existing touch line 14, the existing second flat layer 15, the existing common electrode 10, the existing passivation layer 11 and the existing pixel electrode 12 respectively require different masks during the formation process, with a total of at least twelve masks.

[0050] In combination with the above content, the applicant has found that the existing touch display panel using the Dual Source structure uses a small number of masks in the formation process and the process is relatively simple, but the production process monitoring is relatively complicated, and the risk of short circuit failure between the two patterns in the first source and drain layer 8 is higher. At the same time, although the effect of reducing the lower frame can be achieved by reducing the gate pattern spacing in the fan-out area 200, as the gate pattern spacing decreases, the requirements for process and charging also increase accordingly.

[0051] The existing touch display panel using the Double Source structure has a larger aperture ratio and higher transmittance due to the stacking arrangement of the existing touch lines 14 and the existing data lines in the second source and drain layer 8'. In addition, since the existing touch lines 14 of the fan-out area 200 constitute a separate structural layer, there is more wiring space, which can reduce the area of ​​the lower frame corresponding to the fan-out area 200. At the same time, it can ensure that the spacing between the existing touch lines 14 is larger, the process margin is larger, and the charging requirement is lower. However, a large number of mask plates are used in the preparation process, the process is complicated, and the production capacity is greatly affected.

[0052] In view of this, if Figure 4 , Figure 5 , Figure 6 , Figure 7 and Figure 8As shown, the embodiment of the present application provides a touch display panel, which has a display area 100' and a fan-out area 200' located on one side of the display area 100'; the touch display panel includes a common electrode 21, a pixel electrode 22, a touch line 23 and a data line 24; the common electrode 21 is time-division multiplexed as a touch drive electrode; the touch line 23 includes a first touch line 231 located in the display area 100' and a second touch line 232 located in the fan-out area 200', and the data line 24 includes a first data line 241 located in the display area 100' and a second data line 242 located in the fan-out area 200'. Two data lines 242, the first touch line 231 and the second touch line 232 are connected, the first data line 241 and the second data line 242 are connected; the second touch line 232 and the second data line 242 are arranged in different layers; the common electrode 21 and the pixel electrode 22 are both located in the display area 100, and the pixel electrode 22 includes a first pixel electrode pattern 221 and a second pixel electrode pattern 222 arranged at intervals, the first pixel electrode pattern 221 is connected to the first data line 241, and the second pixel electrode pattern 222 is respectively connected to the first touch line 231 and the common electrode 21.

[0053] Exemplarily, using the time-division multiplexing technology, during the display time period, the driver IC applies a display drive signal to the common electrode 21 and the pixel electrode 22, so that the common electrode 21 and the pixel electrode 22 interact with each other to form a multi-dimensional electric field, thereby realizing the display function; during the touch time period, the driver IC applies a touch signal to the common electrode 21, and the common electrode 21 can be used as a sensing electrode to form a mutual inductance capacitor, thereby realizing the touch function.

[0054] Exemplarily, the first data line 241 and the second data line 242 are disposed in the same layer and are integrally connected to each other. Figure 8 .

[0055] For example, the first touch line 231 and the second touch line 232 may be disposed in the same layer. Figure 7 , can also be set in different layers, such as Figure 6 and Figure 8 .

[0056] Exemplarily, the first pixel electrode pattern 221 is connected to the first data line 241 through a via hole penetrating to the first data line 241 .

[0057] In the touch display panel of this embodiment, the common electrode 21 and the pixel electrode 22 are only located in the display area 100', and there is no common electrode 21 and pixel electrode 22 in the fan-out area 200'. The second touch line 232 is only located in the fan-out area 200', and there is no second touch line 232 in the display area 100'.

[0058] The data signal (Data signal) is transmitted through a path formed by the data line 24 (including the first data line 241 and the second data line 242) and the first pixel electrode pattern 221. The touch signal (Touch signal) is transmitted through a path formed by the touch line 23 (including the first touch line 231 and the second touch line 232), the second pixel electrode pattern 222 and the common electrode 21.

[0059] In the fan-out area 200' of the touch display panel of the present embodiment, the second touch line 232 and the second data line 242 are arranged in different layers, and both are arranged separately in their respective structural layers, with a larger arrangement space. On the one hand, the wiring gap of the second touch line 232 can be made larger to ensure the charging effect of the touch line 23 in the touch display panel, and on the other hand, the lower frame corresponding to the fan-out area 200' in the touch display panel can have a reduced space, that is, the lower frame of the touch display panel of the present embodiment can be designed to be smaller.

[0060] In the display area 100 of the existing touch display panel of the related art, in order to connect the existing touch line 14 and the existing common electrode 10, when forming an isolation layer (such as the existing first flat layer 9 or the existing second flat layer 15) between the existing touch line 14 and the existing common electrode 10, a mask plate is required to form a via hole on the isolation layer that penetrates to the existing touch line 14, and the existing common electrode 10 passes through the isolation layer through the via hole to be connected to the existing touch line 14.

[0061] In the display area 100' of the touch display panel of the present embodiment, the second pixel electrode pattern 222 is respectively connected to the first touch line 231 and the common electrode 21, that is, in the display area 100', the common electrode 21 and the first touch line 231 are not directly connected. Therefore, when forming an isolation layer between the first touch line 231 and the common electrode 21, the isolation layer can be set as a whole layer, and a mask is no longer required to form a via. Compared with the above-mentioned related technology, at least one mask can be saved.

[0062] In addition, it should be noted that the first pixel electrode pattern 221 is used to transmit the Data signal, and the second pixel electrode pattern 222 is used to transmit the Touch signal. If the two are connected, it is easy to cause the capacitor Cst in the pixel circuit of the touch display panel to fail, and the corresponding sub-pixel will have a dark spot. Therefore, in the touch display panel of this embodiment, the first pixel electrode pattern 221 and the second pixel electrode pattern 222 are arranged alternately.

[0063] The touch display panel provided in this embodiment, by arranging the second touch line 232 and the second data line 242 in different layers in the fan-out area 200', makes the second touch line 232 arranged separately in the structural layer outside the second data line 242, which can avoid the problem of mutual occupation of wiring space caused by the second touch line 232 and the second data line 242 being arranged in the same layer. On the one hand, arranging the second touch line 232 separately can make the wiring gap larger, ensure better charging effect and lower process precision requirements, and on the other hand, it can also make the overall area of ​​the fan-out area 200' smaller, meeting the design requirements of reducing the border of the display product. At the same time, in the display area 100', the first touch line 231 and the common electrode 21 are connected through the second pixel electrode pattern 222, which can save the mask plate used in forming the isolation layer between the first touch line 231 and the common electrode 21 in order to directly connect the two, which helps to simplify the preparation process, reduce the preparation cost, and improve the production capacity.

[0064] Combination Figure 6 and Figure 7 In the structure shown, in some embodiments, the touch display panel includes a flat layer 25; in the display area, the flat layer 25 at least covers the first data line 241, and the side of the flat layer 25 away from the first data line 241 is stacked with a first passivation layer 26, a common electrode 21, a second passivation layer 27 and a pixel electrode 22; the first touch line 231 is located on the side of the second passivation layer 27 away from the pixel electrode 22, and the second passivation layer 27 is provided with a first via 271 penetrating to the first touch line 231 and a second via 272 penetrating to the common electrode 21; the second pixel electrode pattern 222 is connected to the first touch line 231 and the common electrode 21 through the first via 271 and the second via 272 respectively.

[0065] Exemplarily, the second passivation layer 27 is further provided with a first data via hole 273 penetrating to the first data line 241 , and the first pixel electrode pattern 221 is connected to the first data line 241 through the first data via hole 273 .

[0066] For example, Figure 6 and Figure 7 In the display area 100', the touch display panel includes a stacked substrate 1, a light shielding layer 2, a buffer layer 3, a semiconductor layer 4, a gate insulating layer 5, a gate layer 6 and an interlayer dielectric layer 7. The first data line 241 is formed on the surface of the interlayer dielectric layer 7. A partial pattern of the first data line 241 passes through the interlayer dielectric layer 7 and the gate insulating layer 5 to connect with the active layer of the transistor in the semiconductor layer 4 to form the source and drain of the transistor.

[0067] The second pixel electrode pattern 222 forms a bridge between the first touch line 231 and the common electrode 21 of a different layer through the first via hole 271 and the second via hole 272, so that the first touch line 231, the second pixel electrode pattern 222 and the common electrode 21 form a path capable of transmitting a touch signal.

[0068] like Figure 6 As shown, in some embodiments, the first data lines 241 and the first touch control lines 231 are arranged in the same layer and spaced apart from each other.

[0069] Exemplarily, the touch display panel includes a plurality of sub-pixels arranged in an array, each sub-pixel is provided with a corresponding transistor, the first data line 241 is connected to the source and drain of at least one transistor in the sub-pixel, and the first touch line 231 is provided in the gap between two adjacent sub-pixels.

[0070] like Figure 6 and Figure 8 The first data line 241, the first touch line 231 and the second data line 242 are all formed on the surface of the interlayer dielectric layer 7, and the three are formed simultaneously in the same patterning process. Since the second touch line 232 and the second data line 242 are arranged in different layers, the second touch line 232 is formed separately in another patterning process.

[0071] In the touch display panel of the present embodiment, the first via hole 271 passes through the second passivation layer 27 , the first passivation layer 26 and the planar layer 25 , and the second via hole 272 passes through the second passivation layer 27 .

[0072] like Figure 8 As shown, in some embodiments, the planar layer 25 covers the second data line 242 in the fan-out area 200', and the second touch line 232 is located on the side of the planar layer 25 away from the second data line 242; the touch line 23 also includes a first extension portion 233 connected to the first touch line 231 and extending to the fan-out area 200', and the planar layer 25 is provided with a third via 251 penetrating to the first extension portion 233 in the fan-out area 200', and the second touch line 232 is connected to the first extension portion 233 through the third via 251.

[0073] For example, Figure 5 and Figure 8 In the fan-out region 200 ′, the touch display panel includes a substrate 1 , a buffer layer 3 , a gate insulating layer 5 , a gate layer 6 , an interlayer dielectric layer 7 and a second data line 242 which are stacked.

[0074] In the fan-out region 200 ′, at least a portion of the pattern in the gate layer 6 and at least a portion of the pattern in the second data line 242 are used to transmit Data signals, and the second touch control line 232 is used to transmit Touch signals.

[0075] In the fan-out area 200', the second data line 242 is located below the flat layer 25 (i.e., on the side close to the substrate 1), and the second touch line 232 is located above the flat layer 25, so that the second data line 242 and the second touch line 232 are arranged in different layers, which helps to make both have more ample wiring space. The first touch line 231 is integrally formed and connected with the first extension part 233. The first touch line 231 extends from the display area 100' to the fan-out area 200' below the flat layer 25 through the first extension part 233. The second touch line 232 passes through the flat layer 25 through the third via 251 in the fan-out area 200' and overlaps with the first extension part 233, so that the first touch line 231 and the second touch line 232 are connected.

[0076] In the touch display panel of the present embodiment, the second touch line 232 does not enter the display area 100', so as to avoid the second touch line 232 causing adverse effects on the aperture ratio and transmittance of the display area 100'. At the same time, since the second data line 242 is arranged in a single structural layer in the fan-out area 200', the wiring space is large, and thus the addition of a short first extension portion 233 in the structural layer will not cause adverse effects on the wiring of the second data line 242.

[0077] In the display area 100', in addition to the structure in which the first touch lines 231 and the first data lines 241 are arranged in the same layer, the first touch lines 231 and the first data lines 241 can also be arranged in different layers. In this case, the touch lines 23 are entirely arranged in the same structural layer, and the data lines 24 are entirely arranged in another structural layer.

[0078] Specifically, Figure 7 As shown, in some embodiments, the first touch line 231 is arranged between the planar layer 25 and the first passivation layer 26, and the first touch line 231 is in contact with the planar layer 25; the touch display panel includes a plurality of sub-pixels arranged in the display area 100', and the orthographic projection of the first touch line 231 on the planar layer 25 at least partially overlaps with the orthographic projection of the sub-pixel on the planar layer 25.

[0079] Exemplarily, the first touch control line 231 and the second touch control line 232 are connected in one piece, and the first data line 241 and the second data line 242 are connected in one piece.

[0080] The following Figure 7 Taking the positional relationship between the first touch line 231 and the transistor in the sub-pixel (including the active layer in the semiconductor layer 4, the gate in the gate layer 6 connected to the active layer, the source and the drain) as an example, the positional relationship between the first touch line 231 and the sub-pixel is described.

[0081] In this embodiment, the touch line 23 and the data line 24 are arranged in different layers in the display area 100', so the wiring position of the first touch line 231 no longer needs to avoid the sub-pixel. Therefore, the first touch line 231 can overlap with the transistor space in the sub-pixel. For example, along the width direction ( Figure 7 In the X direction in the figure, the orthographic projection of the first touch line 231 on the transistor is located within the range where the transistor is located, or the orthographic projection of the first touch line 231 on the transistor is partially located within the range where the transistor is located, and the other part is located outside the range where the transistor is located.

[0082] At the same time, since the first touch line 231 is no longer required between adjacent sub-pixels, the sub-pixels in the display area 100' can be arranged more closely, and the shielding area of ​​the black matrix (BM) between adjacent sub-pixels is also reduced, which helps to improve the aperture ratio and transmittance of the touch display panel of this embodiment.

[0083] In the touch display panel of this embodiment, the touch line 23 is formed on the surface of the flat layer 25. Compared with the above-mentioned related art, the first protective layer 13 between the existing touch line 14 and the existing first flat layer 9 is no longer provided, which simplifies the manufacturing process of the touch display panel. Accordingly, the mask used to form the first protective layer 13 is omitted in the manufacturing process, which reduces the manufacturing cost.

[0084] To prevent the planar layer 25 from being ashed when forming the touch line 23 , in some embodiments, the touch line 23 includes a titanium-aluminum-titanium composite film layer (Ti / Al / Ti) or a molybdenum-aluminum-molybdenum composite film layer (Mo / Al / Mo).

[0085] Exemplarily, the touch line 23 may further include a titanium-aluminum-molybdenum composite film layer.

[0086] When the touch line 23 is a titanium-aluminum-titanium composite film layer, a wet etching process can be used to form the touch line 23. When the touch line 23 is a molybdenum-aluminum-molybdenum composite film layer, a low-power dry etching process can be used to form the touch line 23. The applicant has found that the above two etching processes will not cause the flat layer 25 to be ashed, and the flat layer 25 can be protected when the touch line 23 is formed.

[0087] Based on the same inventive concept, Figure 5 , Fig. 9 and Fig.10As shown, the present embodiment provides a second touch display panel, which has a display area 100' and a fan-out area 200' located on one side of the display area 100'; the touch display panel includes a common electrode 21, a pixel electrode 22, a touch line 23 and a data line 24; the common electrode 21 is time-division multiplexed as a touch drive electrode; the touch line 23 includes a first touch line 231 located in the display area 100' and a second touch line 232 located in the fan-out area 200', the data line 24 includes a first data line 241 located in the display area 100' and a second data line 242 located in the fan-out area 200', and the first touch line 231 and the second touch line 232 are connected , the first data line 241 is connected to the second data line 242; the second touch line 232 and the second data line 242 are arranged in different layers; the common electrode 21 and the pixel electrode 22 are both located in the display area 100, the pixel electrode 22 includes a first pixel electrode pattern 221 and a second pixel electrode pattern 222 arranged at intervals, the first pixel electrode pattern 221 is connected to the first data line 241, the common electrode 21 is connected to the first touch line 231 at a first position, the second pixel electrode pattern 222 is connected to the common electrode 21 at a second position, and the orthographic projection of the second position on the first touch line 231 covers the orthographic projection of the first position on the first touch line 231.

[0088] The structure of the fan-out area 200 ′ of the touch display panel of this embodiment is the same as that of the fan-out area 200 ′ of the first touch display panel. Meanwhile, this embodiment has the corresponding technical effects of the touch display panels of the aforementioned embodiments, which will not be described in detail.

[0089] It should be noted that, in order to simplify the manufacturing process and reduce the manufacturing cost, during the manufacturing process of the first touch display panel, no patterning process is performed when forming the isolation layer between the common electrode 21 and the first touch line 231, thereby saving a mask.

[0090] In the present embodiment, when forming the lower isolation layer between the common electrode 21 and the first touch line 231, a patterning process is performed to form a via hole at the first position of the lower isolation layer, so that the common electrode 21 can be directly connected to the first touch line 231 at the first position. At the same time, when forming the upper isolation layer between the common electrode 21 and the pixel electrode 22, the mask used when forming the lower isolation layer is reused for patterning to form a via hole at the second position of the upper isolation layer, and the first position and the second position are at least concentric. At this time, the common electrode 21 is exposed in the via hole at the second position. In order to avoid damage to the exposed common electrode 21 when forming the pixel electrode 22, the second pixel electrode pattern 222 is used in the touch display panel of the present embodiment to cover the exposed common electrode 21 at the second position, that is, the second pixel electrode pattern 222 is connected to the common electrode 21 at the second position.

[0091] The touch display panel provided in this embodiment can also reduce the manufacturing cost because the same mask is used when forming the lower isolation layer between the common electrode 21 and the first touch line 231 and when forming the upper isolation layer between the common electrode 21 and the pixel electrode 22.

[0092] In addition, compared with the first touch display panel, in the touch display panel of this embodiment, the first touch line 231 and the common electrode 21 are directly connected, so that the signal line loading is relatively small.

[0093] The following combination Fig. 9 and Fig.10 The structure of the second touch display panel is exemplarily described.

[0094] Fig. 9 The structure of the second touch display panel is shown when the first touch lines 231 and the first data lines 241 are arranged in the same layer with an interval.

[0095] In the display area 100', the flat layer 25 and the structure below it are the same as the structure of the first touch display panel, and will not be repeated again. A third passivation layer 26' and a fourth passivation layer 27' are stacked above the flat layer 25, the common electrode 21 is arranged between the third passivation layer 26' and the fourth passivation layer 27', and the pixel electrode 22 is arranged above the fourth passivation layer 27'. The common electrode 21 passes through the third passivation layer 26' and the flat layer 25 to connect with the first touch line 231, and the second pixel electrode pattern 222 passes through the fourth passivation layer 27' to connect with the common electrode 21.

[0096] Fig.10 The structure of the second touch display panel is shown when the first touch lines 231 and the first data lines 241 are arranged in different layers with intervals.

[0097] In the display area 100', the first touch line 321 and the structure below it are the same as the structure of the first touch display panel, and will not be repeated again. A third passivation layer 26' and a fourth passivation layer 27' are stacked above the first touch line 321, the common electrode 21 is arranged between the third passivation layer 26' and the fourth passivation layer 27', and the pixel electrode 22 is arranged above the fourth passivation layer 27'. The common electrode 21 passes through the third passivation layer 26' and is connected to the first touch line 231, and the second pixel electrode pattern 222 passes through the fourth passivation layer 27' and is connected to the common electrode 21.

[0098] Based on the same inventive concept and in combination with the description of the touch display panels of the above embodiments, this embodiment provides a display device having the corresponding technical effects of the touch display panels of the above embodiments, which will not be described in detail herein.

[0099] Based on the same inventive concept and in combination with the description of the touch display panels of the above embodiments, this embodiment provides a method for preparing a touch display panel. The method has the corresponding technical effects of the touch display panels of the above embodiments, which will not be described in detail herein.

[0100] A method for preparing a touch display panel, comprising:

[0101] like Fig.11a and Figure 12b First, a substrate 1 is provided on which data lines 24 and touch lines 23 are formed. The substrate 1 has a display area 100' and a fan-out area 200', the touch lines 23 include a first touch line 231 located in the display area 100' and a second touch line 232 located in the fan-out area 200', the data lines 24 include a first data line 241 located in the display area 100' and a second data line 242 located in the fan-out area 200', the first touch line 231 is connected to the second touch line 232, and the first data line 241 is connected to the second data line 242; the second touch line 232 and the second data line 242 are arranged in different layers.

[0102] In the method of this embodiment, the method of forming the light shielding layer 2, the buffer layer 3, the semiconductor layer 4, the gate insulating layer 5, the gate layer 6 and the interlayer dielectric layer 7 on the substrate 1 is the same as that in the prior art and will not be repeated here.

[0103] After the interlayer dielectric layer 7 is formed, when the first data line 241 and the first touch line 231 are arranged in the same layer and spaced apart, the first data line 241, the first touch line 231, the second data line 242 and the first extension 233 are first formed on the interlayer dielectric layer 7 by a patterning process, and then a flat layer 25 covering the four is formed by using the existing technology, and the flat layer 25 has a data via hole 252 to be formed that penetrates to the first data line 241 and a first via hole 253 to be formed that penetrates to the first touch line 231 in the display area 100'. Fig.11a The flat layer 25 has a third via 251 in the fan-out region 200, such as Figure 8 .

[0104] After the flat layer 25 is formed, the second touch line 232 is formed only on the flat layer 25 of the fan-out area 200' through patterning processes such as deposition (Dep), setting a mask (Mask), exposure (Exp), low-power dry etching and stripping (Strip), and the second touch line 232 does not exist on the flat layer 25 of the display area 100'. The second touch line 232 is connected to the first extension portion 233 through the third via hole 251, as shown in FIG. Figure 8 .

[0105] So far, the touch line 23 and the data line 24 are formed on the substrate 1 .

[0106] When the first data line 241 and the first touch line 231 are arranged in different layers, the data line 24 (including the first data line 241 and the second data line 242 connected in one piece) is first formed on the interlayer dielectric layer 7 by a patterning process, and then a flat layer 25 covering the data line 24 is formed by the prior art. The flat layer 25 has a data via 252 to be formed in the display area 100' and is connected to the first data line 241. Fig.12a .

[0107] After the flat layer 25 is formed, the touch lines 23 (including the first touch lines 231 and the second touch lines 232 connected in one piece) are formed on the flat layer 25 through patterning processes such as deposition (Dep), mask setting (Mask), exposure (Exp), low-power dry etching and stripping (Strip). Figure 12b .

[0108] So far, the touch line 23 and the data line 24 are formed on the substrate 1 .

[0109] After the touch lines 23 and the data lines 24 are formed, a first passivation layer 26 covering the data lines 24 and the touch lines 23 is formed.

[0110] Different from the related art, in this embodiment, the first passivation layer 26 is provided as a whole layer without patterning process.

[0111] Specifically, when the first data line 241 and the first touch line 231 are arranged in the same layer and spaced apart, the first passivation layer 26 covers the flat layer 25, the first data line 241 exposed in the to-be-formed data via hole 252, and the first touch line 231 exposed in the to-be-formed first via hole 253 in the display area 100'. Fig.11b .

[0112] When the first data line 241 and the first touch line 231 are arranged in different layers, the first passivation layer 26 covers the flat layer 25, the first touch line 231, and the first data line 241 exposed in the data via hole 252 to be formed in the display area 100'. Fig.12c The first passivation layer 26 covers the planar layer 25 and the second touch line 232 in the fan-out region 200 ′. Figure 8 .

[0113] After the first passivation layer 26 is formed, a common electrode 21 is formed on a side of the first passivation layer 26 away from the touch line 23. The common electrode 21 is time-divisionally multiplexed as a touch driving electrode.

[0114] The common electrode 21 is formed only on the first passivation layer 26 of the display area 100' by patterning processes such as deposition, mask setting, exposure, wet etching and stripping. Fig.11c and Fig.12dThere is no common electrode 21 on the first passivation layer 26 of the fan-out region 200 ', such as Figure 8 .

[0115] After forming the common electrode 21, forming a second passivation layer 27 on a side of the common electrode 21 away from the first passivation layer 26, the method comprising:

[0116] After forming the first passivation layer 26, a second passivation layer 31 to be formed is formed to cover the common electrode 21 and the first passivation layer 26. Fig.11d and Fig.12e The second passivation layer 3127 to be formed is provided as a whole layer, and can be formed by deposition, for example.

[0117] After forming the second passivation layer 31 to be formed, a first via hole 271 penetrating to the first touch line 231 and a second via hole 272 penetrating to the common electrode 21 are formed, so that the second passivation layer 31 to be formed is formed into the second passivation layer 27. The first via hole 271 is used to connect the second pixel electrode pattern 222 with the first touch line 231, and the second via hole 272 is used to connect the second pixel electrode pattern 222 with the common electrode 21.

[0118] Exemplarily, the first passivation layer 26 and the second passivation layer 31 to be formed are patterned simultaneously by processes such as setting a mask, exposure, dry etching and stripping, that is, the two structural layers are etched simultaneously using one mask.

[0119] After the patterning process is completed, a first data via hole 273 is formed at the data via hole 252 to be formed, and the first data line 241 is exposed inside and outside the first data via hole 273, so as to connect the first pixel electrode pattern 221 with the first data line 241 in the first pixel via hole when forming the pixel electrode 22; a first via hole 271 is formed at the first via hole 253 to be formed, and the first touch line 231 is exposed inside and outside the first via hole 271, so as to connect the second pixel electrode pattern 222 with the first touch line 231 in the first via hole 271 when forming the pixel electrode 22; at the same time, a second via hole 272 is formed, and the common electrode 21 is exposed inside and outside the second via hole 272, so as to connect the second pixel electrode pattern 222 with the common electrode 21 in the second via hole 272 when forming the pixel electrode 22, as shown in FIG. Fig.11e and Fig.12f .

[0120] It should be noted that, since the common electrode 21 does not react with the etching gas, the etching process will not cause damage to the exposed common electrode 21 .

[0121] After forming the second passivation layer 27, a pixel electrode 22 is formed on a side of the second passivation layer 27 away from the common electrode 21. The pixel electrode 22 includes a first pixel electrode pattern 221 and a second pixel electrode pattern 222 that are spaced apart, the first pixel electrode pattern 221 is connected to the first data line 241, and the second pixel electrode pattern 222 is connected to the first touch line 231 and the common electrode 21, respectively.

[0122] The pixel electrode 22 is formed only on the first passivation layer 26 of the display area 100 ′ through patterning processes such as deposition, mask setting, exposure, etching and stripping.

[0123] Based on the same inventive concept, combined with the description of the touch display panel of each of the above embodiments, this embodiment provides a second method for preparing a touch display panel, which has the corresponding technical effects of the touch display panel of each of the above embodiments, and will not be repeated here.

[0124] A method for preparing a touch display panel, comprising:

[0125] A substrate 1 is provided on which data lines 24 and touch lines 23 are formed; wherein the substrate 1 has a display area 100' and a fan-out area 200', the touch lines 23 include a first touch line 231 located in the display area 100' and a second touch line 232 located in the fan-out area 200', the data lines 24 include a first data line 241 located in the display area 100' and a second data line 242 located in the fan-out area 200', the first touch line 231 and the second touch line 232 are connected, and the first data line 241 and the second data line 242 are connected; the second touch line 232 and the second data line 242 are arranged in different layers.

[0126] The method for forming the substrate 1 having the data lines 24 and the touch lines 23 is the same as the method for preparing the first touch display panel, and will not be described in detail herein.

[0127] A third passivation layer 26 ′ is formed on a side of the touch line 23 away from the substrate 1 .

[0128] The method of forming the third passivation layer 26' includes:

[0129] A third passivation layer 32 to be formed covering the data line 24 and the touch line 23 is formed. Fig.13a and Fig.14a ,in, Fig.13a Corresponding to the structure in which the first data line 241 and the first touch control line 231 are arranged in the same layer and spaced apart from each other, Fig.14a This corresponds to a structure in which the first data lines 241 and the first touch control lines 231 are arranged in different layers and at intervals.

[0130] The third passivation layer 32 to be formed is provided as a whole layer, and illustratively, it can be formed by deposition.

[0131] After forming the third passivation layer 32 to be formed, a fourth via hole 321 penetrating to the first touch line 231 and a fifth via hole 322 penetrating to the first data line 241 are formed through the first mask, so that the third passivation layer 32 to be formed is formed into the third passivation layer 26'. The fourth via hole 321 is located at the first position and is used to connect the common electrode 21 with the first touch line 231.

[0132] Exemplarily, the third passivation layer 32 to be formed is patterned by processes such as setting a first mask, exposure, dry etching, and stripping.

[0133] After the patterning process is completed, a fourth via hole 321 and a fifth via hole 322 are formed on the third passivation layer 26 ′. Fig.13b and Fig.14b The first data line 241 is exposed in the fifth via hole 322. The first touch line 231 is exposed in the fourth via hole 321, and is used to connect the common electrode 21 with the first touch line 231 in the fourth via hole 321 when the common electrode 21 is formed.

[0134] After the third passivation layer 26 ′ is formed, a common electrode 21 is formed on a side of the third passivation layer 26 ′ away from the touch line 23 , and the common electrode 21 is connected to the first touch line 231 .

[0135] The common electrode 21 is formed only on the third passivation layer 26' of the display area 100' by patterning processes such as deposition, mask setting, exposure, wet etching and stripping. Fig.13c and Fig.14c The common electrode 21 is connected to the first touch line 231 through the fourth via hole 321 , and the common electrode 21 avoids the fifth via hole 322 .

[0136] After the common electrode 21 is formed, a fourth passivation layer 27 ′ is formed on a side of the common electrode 21 away from the third passivation layer 26 ′.

[0137] The method of forming the fourth passivation layer 27' includes:

[0138] A fourth passivation layer 33 to be formed is formed to cover the common electrode 21, the third passivation layer 26' and the fifth via hole 322. Fig.13d and Fig.14d The fourth passivation layer 33 to be formed is provided as a whole layer, and illustratively, it can be formed by deposition.

[0139] After forming the fourth passivation layer 33 to be formed, the first mask is used again to form a sixth via 331 penetrating to the common electrode 21 and a seventh via 332 penetrating to the first data line 241, so that the fourth passivation layer 33 to be formed is formed into a fourth passivation layer 27'; wherein the sixth via 331 is located at the second position and is used to connect the second pixel electrode pattern 222 with the common electrode 21; the orthographic projection of the second position on the first touch line 231 covers the orthographic projection of the first position on the first touch line 231; the seventh via 332 is used to connect the first pixel electrode pattern 221 with the first data line 241.

[0140] Exemplarily, the fourth passivation layer 33 to be formed is patterned by processes such as setting a first mask, exposure, dry etching, and stripping.

[0141] After the patterning process is completed, the sixth via hole 331 and the seventh via hole 332 are formed on the fourth passivation layer 27 ′. Fig.13e and Fig.14e The first data line 241 is exposed inside and outside the sixth via hole 332, and is used to connect the first pixel electrode pattern 221 with the first data line 241 in the sixth via hole 332 when forming the pixel electrode 22. The common electrode 21 is exposed inside and outside the seventh via hole 331, and is used to connect the second pixel electrode pattern 222 with the common electrode 21 in the seventh via hole 331 when forming the pixel electrode 22.

[0142] It should be noted that, since the common electrode 21 does not react with the etching gas, the etching process will not cause damage to the exposed common electrode 21 .

[0143] After forming the fourth passivation layer 27', a pixel electrode 22 is formed on a side of the fourth passivation layer 27' away from the common electrode 21; wherein the pixel electrode 22 includes a first pixel electrode pattern 221 and a second pixel electrode pattern 222 arranged at intervals, the first pixel electrode pattern 221 is connected to the first data line 241, and the second pixel electrode pattern 222 is connected to the common electrode 21.

[0144] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0145] The various embodiments in the present application are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0146] The description of the present application is given for the purpose of illustration and description, and is not intended to be exhaustive or to limit the present application to the disclosed form. Many modifications and variations are obvious to those of ordinary skill in the art. The embodiments are selected and described in order to better illustrate the principles and practical applications of the present application, and to enable those of ordinary skill in the art to understand the present application and thus design various embodiments with various modifications suitable for specific purposes.

[0147] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0148] Although the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of these embodiments will be apparent to those skilled in the art in light of the foregoing description.

[0149] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A touch display panel, characterized in that: It has a display area and a fan-out area located on one side of the display area; the touch display panel includes a common electrode, a pixel electrode, a touch line and a data line; the common electrode is time-division multiplexed as a touch drive electrode; The touch line includes a first touch line located in the display area and a second touch line located in the fan-out area, the data line includes a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers; The common electrode and the pixel electrode are both located in the display area. The pixel electrode includes a first pixel electrode pattern and a second pixel electrode pattern that are spaced apart. The first pixel electrode pattern is connected to the first data line, and the second pixel electrode pattern is respectively connected to the first touch line and the common electrode.

2. The touch display panel according to claim 1, characterized in that: The touch display panel comprises a flat layer; in the display area, the flat layer at least covers the first data line, and a first passivation layer, the common electrode, a second passivation layer and the pixel electrode are stacked on a side of the flat layer away from the first data line; The first touch line is located on a side of the second passivation layer away from the pixel electrode, and the second passivation layer is provided with a first via hole penetrating to the first touch line and a second via hole penetrating to the common electrode; the second pixel electrode pattern is connected to the first touch line and the common electrode respectively through the first via hole and the second via hole.

3. The touch display panel according to claim 2, characterized in that: The first data lines and the first touch control lines are arranged in the same layer and spaced apart from each other.

4. The touch display panel according to claim 3, characterized in that: The planar layer covers the second data line in the fan-out area; the second touch line is located on a side of the planar layer away from the second data line and contacts the planar layer; The touch line further includes a first extension portion connected to the first touch line and extending to the fan-out region, the planar layer is provided with a third via hole penetrating to the first extension portion in the fan-out region, and the second touch line is connected to the first extension portion through the third via hole.

5. The touch display panel according to claim 2, characterized in that: In the display area, the first touch line is disposed between the planar layer and the first passivation layer, and the first touch line contacts the planar layer; The touch display panel includes a plurality of sub-pixels arranged in the display area, and an orthographic projection of the first touch line on the planar layer at least partially overlaps with an orthographic projection of the sub-pixel on the planar layer.

6. The touch display panel according to claim 1, characterized in that: The touch line includes a titanium-aluminum-titanium composite film layer, a molybdenum-aluminum-molybdenum composite film layer, or a titanium-aluminum-molybdenum composite film layer.

7. A touch display panel, characterized in that: It has a display area and a fan-out area located on one side of the display area; the touch display panel includes a common electrode, a pixel electrode, a touch line and a data line; the common electrode is time-division multiplexed as a touch drive electrode; The touch line includes a first touch line located in the display area and a second touch line located in the fan-out area, the data line includes a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers; The common electrode and the pixel electrode are both located in the display area, the pixel electrode includes a first pixel electrode pattern and a second pixel electrode pattern that are spaced apart, the first pixel electrode pattern is connected to the first data line, the common electrode is connected to the first touch line at a first position, the second pixel electrode pattern is connected to the common electrode at a second position, and the orthographic projection of the second position on the first touch line covers the orthographic projection of the first position on the first touch line.

8. A display device, characterized in that: It comprises the touch display panel as claimed in any one of claims 1 to 7.

9. A method for preparing a touch display panel, characterized in that: include: A substrate is provided on which data lines and touch lines are formed; wherein the substrate has a display area and a fan-out area, the touch lines include a first touch line located in the display area and a second touch line located in the fan-out area, the data lines include a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers; forming a first passivation layer covering the data line and the touch line; A common electrode is formed on a side of the first passivation layer away from the touch line; wherein the common electrode is time-division multiplexed as a touch drive electrode; forming a second passivation layer on a side of the common electrode away from the first passivation layer; A pixel electrode is formed on a side of the second passivation layer away from the common electrode; wherein the pixel electrode includes a first pixel electrode pattern and a second pixel electrode pattern arranged at intervals, the first pixel electrode pattern is connected to the first data line, and the second pixel electrode pattern is respectively connected to the first touch line and the common electrode.

10. The method according to claim 9, characterized in that The forming of a second passivation layer on a side of the common electrode away from the first passivation layer comprises: forming a second passivation layer to be formed covering the common electrode and the first passivation layer; forming a first via hole penetrating to the first touch line and a second via hole penetrating to the common electrode, so that the second passivation layer to be formed is formed into a second passivation layer; The first via hole is used to connect the second pixel electrode pattern with the first touch line, and the second via hole is used to connect the second pixel electrode pattern with the common electrode.

11. A method for preparing a touch display panel, characterized in that: include: A substrate is provided on which data lines and touch lines are formed; wherein the substrate has a display area and a fan-out area, the touch lines include a first touch line located in the display area and a second touch line located in the fan-out area, the data lines include a first data line located in the display area and a second data line located in the fan-out area, the first touch line is connected to the second touch line, and the first data line is connected to the second data line; the second touch line and the second data line are arranged in different layers; forming a third passivation layer on a side of the touch line away from the substrate; forming a common electrode on a side of the third passivation layer away from the touch line, wherein the common electrode is connected to the first touch line at a first position; forming a fourth passivation layer on a side of the common electrode away from the third passivation layer; A pixel electrode is formed on a side of the fourth passivation layer away from the common electrode; wherein the pixel electrode includes a first pixel electrode pattern and a second pixel electrode pattern that are spaced apart, the first pixel electrode pattern is connected to the first data line, the second pixel electrode pattern is connected to the common electrode at a second position, and the orthographic projection of the second position on the first touch line covers the orthographic projection of the first position on the first touch line.

12. The method according to claim 11, characterized in that The forming of a third passivation layer on a side of the touch line away from the substrate comprises: forming a third passivation layer to be formed covering the data line and the touch line; Forming a fourth via hole penetrating to the first touch line and a fifth via hole penetrating to the first data line through a first mask, so that the third passivation layer to be formed is formed into a third passivation layer; Wherein, the fourth via hole is located at the first position and is used to connect the common electrode with the first touch line; The forming of a fourth passivation layer on a side of the common electrode away from the third passivation layer comprises: forming a fourth passivation layer to be formed covering the common electrode, the third passivation layer and the fifth via hole; forming a sixth via hole penetrating to the common electrode and a seventh via hole penetrating to the first data line through the first mask, so that the fourth passivation layer to be formed is formed into a fourth passivation layer; The sixth via hole is located at the second position and is used to connect the second pixel electrode pattern with the common electrode; the seventh via hole is used to connect the first pixel electrode pattern with the first data line.