Controller, data storage system and computing system

Abstract

The invention relates to a data storage system, a controller unit and a computing system. A controller of the data storage system is configured to set an access mode of a first memory region of a plurality of memory regions; in response to the allocation request, allocating a first memory region of the plurality of memory regions as a shared memory region for access by the plurality of host devices; and in response to the access mode change request, changing an access mode of the first memory region allocated as the shared memory region, and allocating the shared memory region to the second host device. The present disclosure reduces direct data transmission and reception between a plurality of host devices and enables data sharing of the data storage devices by managing allocation information and access mode information of memory regions included in the data storage devices used by the plurality of host devices, therefore, the data processing performance of the plurality of host devices and the use efficiency of the data storage device are improved.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent document claims priority to and the benefit of Korean Patent Application No. 10-2023-0142541, filed on October 24, 2023, which is hereby incorporated by reference in its entirety. Technical Field

[0003] Various embodiments of the disclosed technology generally relate to controllers, data storage systems, and computing systems. Background Art

[0004] A computing system may include a host device and a data storage device used by the host device.

[0005] In some cases, a computing system may include more than one host device. In this case, the tasks of the computing system can be distributed and processed by multiple host devices to increase the processing speed of the tasks.

[0006] When tasks are distributed and processed by multiple host devices, the amount of data sent and received between the multiple host devices may increase, which may cause delays and reduce the effectiveness of increasing the processing speed of the computing system. Summary of the Invention

[0007] Various embodiments of the disclosed technology are directed to providing a computing system capable of improving the performance of distributed processing tasks of multiple host devices and a data storage device that can be used in the computing system.

[0008] In an embodiment, a data storage system may include: one or more memory devices, each memory device including multiple memory areas; and a controller, communicatively coupled to the one or more memory devices and configured to control at least one of the one or more memory devices, wherein the controller is configured to: set an access mode of a first memory area among the multiple memory areas; allocate the first memory area among the multiple memory areas as a shared memory area for access by the multiple host devices in response to allocation requests from multiple host devices outside the data storage system; change the access mode of the first memory area allocated as the shared memory area in response to an access mode change request from a first host device among the multiple host devices, and allocate the shared memory area to a second host device among the multiple host devices that is different from the first host device.

[0009] In an embodiment, a controller unit for storing data in one or more memory devices may include: an auxiliary memory configured to store allocation information and access mode information associated with multiple memory regions included in at least one memory device; and a controller configured to: in response to an access mode change request from a first host device external to the memory device when accessing the memory device, change the access mode of a first memory region among the multiple memory regions allocated to a first host device from a first mode to a second mode; and in response to a deallocation request from a second host device different from the first host device, change the access mode of the first memory region from the second mode to the first mode.

[0010] In an embodiment, a computing system may include: a first host device; a second host device; and a data storage device, constructed to include a memory area for storing data, and configured to communicate with the first host device and the second host device so that the first host device and the second host device can access the data storage device, wherein the first host device is configured to: send an allocation request to the data storage device; write data to a shared memory area allocated according to the allocation request; and send an access mode change request to the data storage device for changing an access mode of the shared memory area, and wherein the data storage device changes the access mode of the shared memory area from a first mode to a second mode in response to the access mode change request, and allocates the shared memory area to the second host device.

[0011] In an embodiment, a data storage system may include: one or more memory devices, each memory device including multiple memory areas; and a controller communicatively coupled to the one or more memory devices and configured to control at least one of the one or more memory devices, wherein the controller is configured to: set an access mode of a first memory area among the multiple memory areas; allocate the first memory area among the multiple memory areas as a shared memory area for access by the multiple host devices in response to allocation requests from multiple host devices outside the data storage system; change the access mode of the first memory area allocated as the shared memory area from the first mode to the second mode in response to an access mode change request from a first host device among the multiple host devices for the access mode of the shared memory area; and change the access mode of the first memory area allocated as the shared memory area from the second mode to the first mode in response to a deallocation request from a second host device different from the first host device among the multiple host devices.

[0012] In an embodiment, a data storage system may include: at least one memory device including multiple memory areas; and a controller configured to control the at least one memory device, wherein the controller: sets an access mode for each of the multiple memory areas; allocates a first memory area among the multiple memory areas as a shared memory area in response to allocation requests from multiple host devices; changes the access mode of the shared memory area from the first mode to the second mode in response to an access mode change request for the access mode of the shared memory area from a first host device among the multiple host devices; and changes the access mode of the shared memory area from the second mode to the first mode in response to a deallocation request from a second host device among the multiple host devices, the second host device being at least one host device other than the first device.

[0013] In an embodiment, a controller unit may include: an auxiliary memory configured to store allocation information and access mode information of multiple memory areas included in at least one memory device; and a controller configured to change the access mode of a first memory area allocated to a first host device from a first mode to a second mode based on an access mode change request of the first host device, and change the access mode of the first memory area from the second mode to the first mode based on a deallocation request of a second host device, the second host device being at least one host device other than the first host device.

[0014] In an embodiment, a computing system may include: a first host device; a second host device; and a data storage device used by the first host device and the second host device, wherein the first host device sends an allocation request to the data storage device, writes data to a shared memory area allocated according to the allocation request, and sends an access mode change request to the data storage device for changing an access mode of the shared memory area, and wherein the data storage device changes the access mode of the shared memory area from a first mode to a second mode according to the access mode change request, and allocates the shared memory area to the second host device.

[0015] In some embodiments of the disclosed technology, the performance of distributed processing work by multiple host devices can be improved, and the utilization efficiency of data storage devices used by the multiple host devices can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a diagram illustrating an example of a computing system and a data storage device based on an embodiment of the disclosed technology.

[0017] Figures 2A to 2C is a diagram illustrating an example method of allocating and de-allocating a memory area included in a data storage device based on an embodiment of the disclosed technology.

[0018] Figures 3 to 7 is a diagram illustrating an example method of using a memory area included in a data storage device implemented based on an embodiment of the disclosed technology as a shared memory area.

[0019] Figure 8 and Figure 9 is a diagram illustrating another example method of using a memory area included in a data storage device implemented based on an embodiment of the disclosed technology as a shared memory area. DETAILED DESCRIPTION

[0020] In the following description of examples or embodiments of the present disclosure, reference is made to the accompanying drawings, in which is shown by way of illustration specific examples or embodiments that may be practiced.

[0021] Figure 1 is a diagram illustrating an example configuration of a computing system and a data storage device 100 based on an embodiment of the disclosed technology.

[0022] Reference Figure 1 A computing system based on an embodiment of the disclosed technology may include a data storage device 100 and a host system, which are coupled to communicate with each other so that the host system can access a memory device in the data storage device 100.

[0023] The host system in the computing system may include, for example, a plurality of host devices 200 communicatively coupled to the data storage device 100, and as an example of an embodiment, Figure 1 The computing system is shown to include N host devices 200_1, 200_2, 200_3, ..., 200_N, where N is a positive integer. The N host devices 200_1, 200_2, 200_3, ..., 200_N may be part of a host system. The host system may include a host management server that controls the N host devices 200_1, 200_2, 200_3, ..., 200_N within the host system.

[0024] In some embodiments, each host device 200 (200_1, 200_2, 200_3, ..., 200_N) can be a computer, an ultra-mobile personal computer (UMPC), a workstation, a personal digital assistant (PDA), a tablet computer, a mobile phone, a smart phone, an e-book, a portable multimedia player (PMP), a portable game console, a navigation device, a black box, a digital camera, a digital multimedia broadcasting (DMB) player, a smart TV, a digital audio recorder, a digital audio player, a digital photo recorder, a digital photo player, a digital video recorder, a digital video player, a data storage device in a data center, an electronic device in a home network, an electronic device in a telematics network, a radio frequency identification (RFID) device, a mobile device capable of operating under human control or autonomously (e.g., a vehicle, a robot, or a drone), etc. In some embodiments, the host device 200 can be a virtual / augmented reality device that provides 2D or 3D virtual reality images or augmented reality images. The host device 200 is not limited to the above examples and can be any of a variety of electronic devices that require a data storage device 100 capable of storing data.

[0025] The host device 200 may include at least one operating system. The operating system may manage and control all functions and operations of the host device 200. The operating system may control operations performed between the host device 200 and the data storage device 100. Depending on the mobility of the host device 200, the operating system may be classified into a general-purpose operating system and a mobile operating system.

[0026] The host device 200 may perform data processing using a memory included in the host device 200. The host device 200 may also perform data processing using a data storage device 100 located outside the host device 200.

[0027] The host device 200 may perform communication between the host device 200 and the data storage device 100 through a preset interface.

[0028] In some embodiments, the host device 200 can communicate with the data storage device 100 via a Compute Express Link (CXL) interface. The host device 200 can be configured as a CXL root port, and the data storage device 100 can be configured as a CXL endpoint. Since the host device 200 communicates with the data storage device 100 via the CXL interface, a low-latency, high-bandwidth access environment can be achieved in a structure that communicates with a high-capacity data storage device 100.

[0029] In some embodiments, host device 200 may communicate with data storage device 100 through an interface other than a CXL interface.

[0030] For example, the host device 200 and the data storage device 100 can communicate through at least one of the following interface protocols: Universal Serial Bus (USB) protocol, MultiMediaCard (MMC) protocol, Peripheral Component Interconnect (PCI) protocol, PCI-Express (PCI-E) protocol, Advanced Technology Attachment (ATA) protocol, Serial ATA protocol, Parallel ATA protocol, Small Computer System Interface (SCSI) protocol, Enhanced Minidisk Interface (ESDI) protocol and Integrated Drive Electronics (IDE) protocol, but the disclosed technology is not limited to this.

[0031] The type and number of host devices 200 communicating with the data storage device 100 based on an embodiment of the disclosed technology and the communication interface between the host device 200 and the data storage device 100 may vary, but in the following, it will be described as an example in which two or more host devices 200 communicate with the data storage device 100 via a CXL interface.

[0032] The data storage device 100 may include at least one memory device 110 . Figure 1 As an example, the data storage device 100 includes four memory devices 110_1 , 110_2 , 110_3 , and 110_4 . In some embodiments, the term “data storage system” may also be used to refer to a data storage device, such as the data storage device 100 .

[0033] Memory device 110 may be, for example, a volatile memory device such as DRAM, SDRAM, DDR SDRAM, and LPDDR SDRAM, but the disclosed technology is not limited thereto. In some embodiments, memory device 110 may be a non-volatile memory device. In some embodiments, some of the plurality of memory devices 110 may be volatile memory devices, while others may be non-volatile memory devices. In some embodiments, data storage device 100 includes only one memory device 110.

[0034] The data storage device 100 may include a memory controller 120 that is coupled between a host system (host device 200) and the memory device 110 and controls the operation of the memory device 110 in conjunction with one or more requests from the host system. As an example, Figure 1The following embodiment is shown, that is, the memory controller 120 includes four memory controllers 120_1, 120_2, 120_3, and 120_4. The four memory controllers 120_1, 120_2, 120_3, and 120_4 communicate with the host system and four memory devices 110_1, 110_2, 110_3, and 110_4, and are configured to control the four memory devices 110_1, 110_2, 110_3, and 110_4, respectively. In some embodiments, one memory controller 120 can control the operations of at least two memory devices 110.

[0035] The memory controller 120 may control write, read, and erase operations performed on the memory device 110 in response to commands from the outside (eg, the host device 200 ).

[0036] Unlike the memory controller 120 (the four memory controllers 120_1, 120_2, 120_3, and 120_4), the data storage device 100 may include a controller 131 that manages or controls operations associated with the memory device 110 and the memory controller 120. The data storage device 100 may include an auxiliary memory 132 that stores data associated with the operations of the controller 131. The auxiliary memory 132 may be, for example, a volatile memory device such as an SRAM, but the disclosed technology is not limited thereto.

[0037] The controller 131 and the auxiliary memory 132 may constitute the controller unit 130 .

[0038] The controller 131 and the auxiliary memory 132 can be included in the data storage device 100 as separate components, or can be combined into a single component in the data storage device. In some embodiments, the controller 131 and the auxiliary memory 132 can each be implemented as a small chip and can be packaged together. In this case, the controller unit 130 can be provided in the form of a single package.

[0039] In some embodiments, controller 131 and memory controller 120 may be provided separately. In some embodiments, controller 131 and memory controller 120 may be combined into a single component. In some embodiments, some functions of memory controller 120 may be implemented in controller 131.

[0040] Controller 131 and memory controller 120 may communicate via bus 140. In some embodiments, signals to be received from host device 200 or signals to be sent to host device 200 may be carried by bus 140.

[0041] The controller 131 may allocate or deallocate a memory area (or memory segment) included in the memory device 110 according to a request of the host device 200 .

[0042] Figure 1 An example is shown in which memory areas of four memory devices 110_1 , 110_2 , 110_3 , and 110_4 included in the data storage device 100 are allocated to the host device 200 .

[0043] The memory areas of the first memory device 110_1 may be memory areas that are not allocated to the host device 200. Some memory areas of the second memory device 110_2 may be allocated to the first host device 200_1, and the other memory areas may be allocated to the second host device 200_2. Some memory areas of the third memory device 110_3 may be allocated to the second host device 200_2, and the other memory areas may be allocated to the third host device 200_3. All memory areas of the fourth memory device 110_4 may be allocated to the third host device 200_3.

[0044] The host device 200 may perform an operation or task using the memory area allocated by the controller 131. The controller 131 may manage memory area allocation information using the auxiliary memory 132, and may also manage an access mode of each memory area.

[0045] Figures 2A to 2C is a diagram illustrating an example method of allocating and de-allocating a memory area included in the data storage device 100 based on an embodiment of the disclosed technology. Figures 2A to 2C An example is shown in which memory areas of a plurality of memory devices 110 included in the data storage device 100 are merged.

[0046] Reference Figure 2A , the controller 131 of the data storage device 100 may allocate memory areas #1 and #2 among the memory areas included in the memory device 110 to the first host device 200_1 in response to an allocation request of the first host device 200_1.

[0047] The controller 131 may store and manage the memory area allocation information in the auxiliary memory 132. The controller 131 may manage an access pattern of the allocated memory area through a tag.

[0048] For example, the controller 131 may set the access mode of the allocated memory area to a mode that allows both read and write operations. In some embodiments, the access mode that allows both read and write operations may be referred to as a first mode. The controller 131 may set the access mode of the allocated memory area to a mode that only allows read operations. In some embodiments, the access mode that only allows read operations may be referred to as a second mode.

[0049] In some embodiments, the controller 131 may set the access mode of the memory area in various ways. The controller 130 may set the use of the memory area allocated to each host device 200 by managing the memory area allocation information and the access mode information.

[0050] The controller 131 may deallocate the memory area in response to a deallocation request of the host device 200 .

[0051] For example, refer to Figure 2B Controller 131 may receive a deallocation request for some memory regions from first host device 200_1. First host device 200_1 may request controller 131 to deallocate a memory region. Controller 131 may deallocate memory region #2 of memory regions #1 and #2 allocated to first host device 200_1.

[0052] When de-allocating memory region #2, controller 131 may update the allocation information regarding memory region #2 in the memory region allocation information stored in auxiliary memory 132. In some embodiments, when a memory region is de-allocated, the access mode of the corresponding memory region may be set to the first mode, i.e., the default mode. In some embodiments, these operations may be performed without receiving access mode information for an unallocated memory region.

[0053] The controller 131 may allocate a memory area according to an allocation request of another host device 200 .

[0054] For example, refer to Figure 2C In a state where the memory region #2 is deallocated, the controller 131 may receive an allocation request from the second host device 200_2. The second host device 200_2 may send allocation requests for three memory regions to the controller 131.

[0055] In response to the allocation request from the second host device 200_2, the controller 131 may allocate three memory regions #2, #3, and #4. The controller 131 may indicate that the memory regions #2, #3, and #4 are allocated to the second host device 200_2 in the allocation information stored in the auxiliary memory 132. The access mode of the allocated memory regions #2, #3, and #4 may be set to a first mode that allows both reading and writing.

[0056] In this manner, the controller 131 can manage allocation, deallocation, and access modes of memory areas included in the memory device 110, and can enable the host device 200 to perform operations and tasks using the memory areas included in the memory device 110. By managing the access modes of the memory areas, the controller 131 can ensure that only a specific host device 200 can use the memory areas or that at least two host devices 200 can share and use the memory areas.

[0057] Through the management of the access mode by the controller 131 , the host device 200 and the data storage device 100 can perform operations and tasks more efficiently.

[0058] Figures 3 to 7 is a diagram illustrating an example method of using a memory area included in a data storage device implemented based on an embodiment of the disclosed technology as a shared memory area shared and accessed by different host devices.

[0059] Reference Figure 3 , the host system may include N host devices 200_1, 200_2, 200_3, ..., 200_N.

[0060] The N host devices 200_1, 200_2, 200_3, ..., 200_N included in the host system may each perform an independent job or may perform the same job in a distributed manner.

[0061] The N host devices 200_1 , 200_2 , 200_3 , . . . , 200_N may also perform data processing using the data storage device 100 in addition to the memory devices included in the respective host devices 200 .

[0062] The data storage device 100 may include at least one memory device 110 and a memory controller 120 for controlling operations of the at least one memory device 110 .

[0063] The data storage device 100 may include a controller 131 to control or manage allocation and deallocation of memory areas of the memory device 110. The controller 131 may use an auxiliary memory 132 to maintain or manage information about the memory areas.

[0064] The controller 131 may allocate a memory area included in the memory device 110 according to an allocation request of the host device 200 . Figure 3 An example is shown in which memory areas included in the second memory device 110_2 , the third memory device 110_3 , and the fourth memory device 110_4 are allocated to the first host device 200_1 , the second host device 200_2 , and the third host device 200_3 .

[0065] The above-mentioned memory areas may be memory areas used only by each host device 200. In some embodiments, some memory areas may be set as shared memory areas that can be accessed by different host devices.

[0066] In some embodiments, the access mode of a memory area used only by a specific host device 200 and the access mode of a memory area used as a shared memory area may be different from each other. In some embodiments, even in a memory area used as a shared memory area, the allocation and access mode of the memory area may be modified according to the operation of the corresponding memory area.

[0067] The method of setting the shared memory area may be performed similarly to the method of allocating the memory area.

[0068] For example, an allocation request of the first host device 200_1 may be transmitted to the controller 131 (①).

[0069] The controller 131 may allocate memory areas #1 and #2 among four memory areas included in the first memory device 110_1 to the first host device 200_1.

[0070] The controller 131 may manage allocation information of the memory areas #1 and #2 through a table stored in the auxiliary memory 132. The controller 131 may set an access mode of the memory areas #1 and #2 to a first mode that can read and write.

[0071] The controller 131 may receive a write command from the first host device 200_1. According to the write command, when the first memory controller 120_1 controls the first memory device 110_1, data may be written to the memory areas #1 and #2 of the first memory device 110_1.

[0072] Similar to the method of allocating a memory area to the first host device 200_1 , a memory area included in the first memory device 110_1 and to be used as a shared memory area may be allocated to the first host device 200_1 .

[0073] The controller 131 may receive a request for changing an access mode of a memory area from the host device 200 requesting setting of a shared memory area.

[0074] For example, refer to Figure 4 , the controller 131 may receive a mode change request (e.g., referred to as an “access mode change request”) from the first host device 200_1 (②). The first host device 200_1 may send a request to the controller 131 to change the access mode of the memory areas #1 and #2 allocated from the first memory device 110_1.

[0075] When receiving a mode change request from the first host device 200_1, the controller 131 may change the access mode of the corresponding memory areas #1 and #2 according to the mode change request. The controller 131 may set the access mode of the memory areas #1 and #2 included in the first memory device 110_1 to a second mode that only allows read operations.

[0076] According to the mode change request of the first host device 200_1 , the controller 131 may update the table stored in the auxiliary memory 132 .

[0077] In this manner, in a state where a memory area set to the first mode allowing read and write operations is allocated, the access mode of the memory area can be changed according to a mode change request of the host device 200. According to the change in the access mode of the memory area, a shared memory area accessible to another host device 200 can be set or allocated.

[0078] In some embodiments, when the host device 200 sends an allocation request to the data storage device 100, the host device 200 may request allocation of a shared memory area. In this case, the controller 131 may maintain the access mode of the allocated memory area in the first mode until the data write of the corresponding host device 200 is completed, and when the data write is completed, the controller 131 may change the access mode of the corresponding memory area to the second mode that only allows read operations. In some embodiments, the data write request may be included in the mode change request, and in this case, when the data write corresponding to the data write request is completed, the access mode change may be performed.

[0079] Through the access mode management of the controller 131 , host devices 200 other than the host device 200 that has written data to the memory area can become able to access the corresponding memory area.

[0080] The first host device 200_1 may transmit a mode change request and reader node information to the controller 131 .

[0081] The reader node information may include information about host devices 200 that can access the memory area set as the shared memory area by the first host device 200_1. The first host device 200_1 that writes data to the shared memory area may be referred to as a writer host, and the host device 200 authorized to read data of the corresponding memory area may be referred to as a reader node.

[0082] When receiving the mode change request and the reader node information from the first host device 200_1 , the controller 131 may change the access mode and allocation information of the shared memory area allocated to the first host device 200_1 .

[0083] In some embodiments, reference Figure 5 In response to the mode change request from the first host device 200_1, the controller 131 may change the access mode of the memory areas #1 and #2 of the first memory device 110_1 and may change the allocation information of the memory areas #1 and #2. The controller 131 may deallocate the memory areas #1 and #2 of the first memory device 110_1 for the first host device 200_1 (③).

[0084] In some embodiments, upon receiving a deallocation request from the first host device 200_1, the controller 131 may deallocate the memory regions #1 and #2 of the first memory device 110_1 for the first host device 200_1. In this case, the memory regions #1 and #2 of the first memory device 110_1 may be deallocated for the first host device 200_1 at any time after the first host device 200_1 completes writing data to the memory regions #1 and #2.

[0085] When memory regions #1 and #2 of first memory device 110_1 are deallocated for first host device 200_1, controller 131 may update a table stored in auxiliary memory 132 according to the deallocation. In some embodiments, controller 131 may send a deallocation signal to first host device 200_1.

[0086] In some embodiments, controller 131 may transmit an interrupt signal to at least one host device 200 other than first host device 200_1 based on the reader node information received from first host device 200_1. The interrupt signal may be a signal notifying eligibility to access a shared memory region. A host device 200 that receives the interrupt signal may request allocation of a shared memory region in data storage device 100. The interrupt signal may be transmitted by controller 131. In some cases, the interrupt signal or a signal corresponding to the interrupt signal may be transmitted by first host device 200_1, to which the shared memory region is allocated.

[0087] The controller 131 may transmit an interrupt signal to the host device 200 included in the reader node information. For example, the controller 131 may transmit an interrupt signal to the second host device 200_2 and the third host device 200_3 (④).

[0088] Since the access mode of the memory areas #1 and #2 of the first memory device 110_1 to which the first host device 200_1 writes data is changed to the second mode that only allows read operations, and an interrupt signal is sent by the controller 131 to the host device 200 included in the reader node information, the host device 200 that needs to share data with the first host device 200_1 can obtain the corresponding data through the data storage device 100.

[0089] For example, when data transmission related to an operation or task performed in a distributed manner by the first host device 200_1 and the second and third host devices 200_2 and 200_3 is required, the first host device 200_1 may share the corresponding data through the memory area of ​​the data storage device 100 .

[0090] Since direct data transmission is not required between the first host device 200_1 and the other host devices 200 , delay caused by data transmission and reception between the host devices 200 can be prevented or reduced.

[0091] In addition, since the first host device 200_1 as a writer host indicates the reader node through the reader node information, only the host device 200 that needs access can access the corresponding data.

[0092] For example, refer to Figure 6 , the second host device 200_2 and the third host device 200_3 receiving the interrupt signal from the controller 131 may send an allocation request (⑤) to the controller 131. In addition, the second host device 200_2 and the third host device 200_3 may send a read command to the controller 131.

[0093] When allocation requests are received from the second and third host devices 200_2 and 200_3 , the controller 131 may allocate memory areas # 1 and # 2 of the first memory device 110_1 as shared memory areas to the second and third host devices 200_2 and 200_3 .

[0094] In some embodiments, the controller 131 may update a table stored in the auxiliary memory 132 and may grant access to the memory regions #1 and #2 of the first memory device 110_1 to the second host device 200_2 and the third host device 200_3.

[0095] In some embodiments, since the access mode of memory regions #1 and #2 is changed to the second mode, the controller 131 may transmit an interrupt signal to the host device 200 included in the reader node information and allocate the memory regions #1 and #2 to the host device 200. The host device 200 included in the reader node information may directly transmit a read command without transmitting an allocation request to the controller 131.

[0096] Since the memory areas #1 and #2 of the first memory device 110_1 are set to the second mode allowing only read operations, the second host device 200_2 and the third host device 200_3 can only perform operations of reading data stored in the corresponding memory areas #1 and #2 through read commands.

[0097] The disclosed technology may be implemented to reduce or prevent damage to data stored in the shared memory areas #1 and #2, and the data may be transferred to the second host device 200_2 and the third host device 200_3 requiring data sharing.

[0098] In this manner, during a period in which the shared memory areas #1 and #2 are set to the first mode and data is written to the shared memory areas #1 and #2, the shared memory areas #1 and #2 can be allocated to only one host device 200. During a period in which the shared memory areas #1 and #2 are set to the second mode and data written to the shared memory areas #1 and #2 is read, the shared memory areas #1 and #2 can be allocated to one or at least two host devices 200.

[0099] When the read operation on the data stored in the shared memory areas #1 and #2 is completed, the second host device 200_2 and the third host device 200_3 corresponding to the reader node may request deallocation of the shared memory areas #1 and #2.

[0100] For example, refer to Figure 7 , the second host device 200_2 and the third host device 200_3 may send a deallocation request to the controller 131 of the data storage device 100 (⑥).

[0101] When receiving the deallocation request, the controller 131 may deallocate the memory region for the host device 200. The controller 131 may deallocate the memory regions #1 and #2 for each of the second host device 200_2 and the third host device 200_3.

[0102] When a deallocation request for the shared memory area is received from all host devices 200 included in the reader node information, the controller 131 may change the access mode of the shared memory area.

[0103] For example, when the deallocation is completed by receiving deallocation requests from the second host device 200_2 and the third host device 200_3 for the memory region #1 of the first memory device 110_1, the controller 131 may change the access mode of the memory region #1 from the second mode to the first mode again. When the deallocation is completed by receiving deallocation requests from the second host device 200_2 and the third host device 200_3 for the memory region #2 of the first memory device 110_1, the controller 131 may change the access mode of the memory region #2 from the second mode to the first mode again.

[0104] After the allocation requests of all the host devices 200 included in the reader node information, when the deallocation requests of all the host devices 200 included in the reader node information are received, the controller 131 may change the allocation information and the access mode information of the shared memory area.

[0105] The allocation of the shared memory area can be performed by a request of the writer host, and the deallocation of the shared memory area can be performed by a request of the reader node. The access mode of the shared memory area can be changed from a first mode to a second mode by a request of the writer host, and the access mode of the shared memory area can be changed from the second mode to the first mode by a request of the reader node.

[0106] In some embodiments, deallocation of a writer host's shared memory region may be performed by a deallocation request by the writer host.

[0107] In this way, when the use of the shared memory area by all host devices 200 included in the reader node information is completed, the controller 131 can deallocate the shared memory area and can manage the shared memory area in a state where the shared memory area can be allocated to other host devices 200 again.

[0108] Since the memory area of ​​the memory device 110 included in the data storage device 100 can be used as a shared memory area by performing access mode management on the memory area, the operating performance of the host device 200 can be improved by reducing the data sent and received between multiple host devices 200 using the data storage device 100.

[0109] In addition, since the host device 200 as a reader node capable of accessing the shared memory area is managed by the host device 200 as a writer host through the reader node information, the stability of the shared memory area can be maintained.

[0110] The controller 131 of the data storage device 100 that receives the reader node information can transmit the information about the shared memory area to the host device 200 that serves as the reader node through an interrupt signal. In some embodiments, the information about the use of the shared memory area can be directly sent from the host device 200 that serves as the writer host to the host device 200 that serves as the reader node.

[0111] Information on setting and resetting of the shared memory area can be managed in various ways.

[0112] Figure 8 and Figure 9 is a diagram illustrating another example method of using a memory area included in the data storage device 100 implemented based on an embodiment of the disclosed technology as a shared memory area.

[0113] Reference Figure 8 In one example, a memory area of ​​the memory device 110 included in the data storage device 100 is used as a shared memory area by the first host device 200_1 and the second host device 200_2.

[0114] The first host device 200_1 may include at least one first core processor 210_1 and a first local memory 220_1. The second host device 200_2 may include at least one second core processor 210_2 and a second local memory 220_2.

[0115] The first local memory 220_1 and the second local memory 220_2 may be volatile memory devices, but the disclosed technology is not limited thereto.

[0116] First host device 200_1 and second host device 200_2 can allocate and process tasks. When first host device 200_1 is a writer host, first host device 200_1 can transmit data required for executing tasks to second host device 200_2 via first local storage 220_1. In this case, the operating performance of the host system may be reduced due to the data transmission and reception between first host device 200_1 and second host device 200_2.

[0117] The first host device 200_1 may use some memory areas included in the data storage device 100 as shared memory areas to provide data that needs to be transmitted to the second host device 200_2.

[0118] Similar to the aforementioned example, the first host device 200_1 may request the controller 131 of the data storage device 100 to allocate a memory area and may write data to the allocated memory area. For example, memory areas #1 and #2 may be allocated to the first host device 200_1.

[0119] When the first host device 200_1 is performing a write operation, the memory areas #1 and #2 are allocated only to the first host device 200_1, and the access mode of the memory areas #1 and #2 may be a first mode that can read and write.

[0120] When writing data to memory areas #1 and #2 is completed, first host device 200_1 may send a mode change request (①) to controller 131 of data storage device 100. First host device 200_1 may send reader node information to controller 131, and the reader node information may include information about second host device 200_2.

[0121] The first host device 200_1 may send a shared area access request to the second host device 200_2 serving as a reader node (②).

[0122] Since the first host device 200_1 transmits a shared area access request together with a mode change request to the second host device 200_2, which is a reader node, the controller 131 of the data storage device 100 may not transmit an interrupt signal to the second host device 200_2. The controller 131 of the data storage device 100 may only perform operations according to requests or commands received from the first host device 200_1 or the second host device 200_2.

[0123] Upon receiving the shared area access request from the first host device 200_1, the second host device 200_2 may send an allocation request (③) to the controller 131 of the data storage device 100. The second host device 200_2 may send a read command to the controller 131 of the data storage device 100 (④).

[0124] In some embodiments, upon receiving a mode change request and reader node information from the first host device 200_1, the controller 131 may change the access mode of memory regions #1 and #2 to a second mode that allows only reading, and allocate memory regions #1 and #2 to the second host device 200_2. In this case, upon receiving a shared area access request from the first host device 200_1, the second host device 200_2 may send a read command to the controller 131 of the data storage device 100 to read the data stored in memory regions #1 and #2.

[0125] Since the shared area access request is sent by the first host device 200_1, while reducing the data transmission and reception between the first host device 200_1 and the second host device 200_2, the controller 131 of the data storage device 100 can only manage the allocation information and access mode information of the memory area, and can only perform processing according to the request or command of the host device 200.

[0126] The above example describes a case where the first host device 200_1 as a writer host is deallocated when the access mode of the memory region changes. However, in some embodiments, the allocation of the writer host may change according to a request or command of a reader node.

[0127] For example, refer to Figure 9 When the first host device 200_1, which serves as a writer host, completes writing data to the memory areas #1 and #2, which serve as shared memory areas, the first host device 200_1 may send a mode change request to the data storage device 100. The controller 131 of the data storage device 100 may change the access mode of the memory areas #1 and #2 from the first mode to the second mode in which only reading is possible.

[0128] The first host device 200_1 may transmit reader node information to the data storage device 100. The controller 131 of the data storage device 100 may allocate memory areas #1 and #2 to the second host device 200_2 according to the reader node information.

[0129] The controller 131 of the data storage device 100 may keep allocating the memory areas #1 and #2 to the first host device 200_1 as a writer host without deallocating the memory areas #1 and #2. The memory areas #1 and #2 may remain allocated to the first host device 200_1.

[0130] When the second host device 200_2 completes reading data from the memory regions #1 and #2, the second host device 200_2 may send a deallocation request to the data storage device 100. Upon receiving the deallocation request from the second host device 200_2, the controller 131 of the data storage device 100 may deallocate the memory regions #1 and #2 for the second host device 200_2.

[0131] In some embodiments, upon receiving a deallocation request from second host device 200_2, controller 131 of data storage device 100 may transmit a signal to first host device 200_1 indicating receipt of the deallocation request. Controller 131 may receive the deallocation request from first host device 200_1 upon receiving the corresponding signal and, based on the deallocation request received from first host device 200_1, deallocate memory regions #1 and #2 for first host device 200_1. When both memory regions #1 and #2 are deallocated, controller 131 may change the access mode of memory regions #1 and #2 from the second mode to the first mode.

[0132] As described above, the method in which the controller 131 of the data storage device 100 manages the allocation information and the access pattern information of the memory area included in the memory device 110 may vary.

[0133] Through the management of allocation information and access mode information of the memory area by the controller 131 of the data storage device 100 , data directly transmitted and received between the plurality of host devices 200 can be reduced, and data sharing of the data storage device 100 can be easily performed.

[0134] Only a few embodiments and examples are described. Modifications and variations to the disclosed embodiments and other embodiments may be made based on what is described and illustrated in this patent document.

Claims

1. A data storage system, comprising: one or more memory devices, each memory device comprising a plurality of memory regions; as well as a controller, communicatively coupled to the one or more memory devices and controlling at least one of the one or more memory devices, Wherein, the controller: setting an access mode for a first memory region of the plurality of memory regions; In response to allocation requests from a plurality of host devices outside the data storage system, allocating a first memory area in the plurality of memory areas as a shared memory area for access by the plurality of host devices; and In response to an access mode change request from a first host device among the multiple host devices, an access mode of a first memory area allocated as the shared memory area is changed, and the shared memory area is allocated to a second host device among the multiple host devices that is different from the first host device.

2. The data storage system according to claim 1, wherein: The controller: changing the access mode of a first memory area allocated as the shared memory area from a first mode to a second mode in response to an access mode change request of the first host device to the access mode of the shared memory area; and In response to a deallocation request from the second host device, an access mode of a first memory area allocated as the shared memory area is changed from the second mode to the first mode.

3. The data storage system according to claim 2, wherein: The controller receives reader node information including information about the second host device from the first host device.

4. The data storage system according to claim 3, wherein: The controller sends an interrupt signal to the second host device in response to receiving the reader node information from the first host device.

5. The data storage system according to claim 4, wherein: The controller receives an allocation request of the second host device corresponding to the interrupt signal, and allocates the shared memory area to the second host device based on the reader node information.

6. The data storage system according to claim 5, wherein: In a case where there are two or more second host devices, the controller changes the access mode of the first memory area allocated as the shared memory area to the first mode upon receiving a deallocation request from all of the two or more second host devices.

7. The data storage system according to claim 3, wherein: When the access mode of the first memory area allocated as the shared memory area is changed to the second mode, the controller allocates the shared memory area to the second host device.

8. The data storage system according to claim 2, wherein: When receiving an allocation request from the first host device before receiving the access mode change request from the first host device, the controller sets the shared memory area to the first mode and allocates the shared memory area to the first host device.

9. The data storage system according to claim 2, wherein: The controller: writes data to the shared memory area in response to a write request included in the access mode change request from the first host device; and when the data writing is completed, changes the access mode of the first memory area allocated as the shared memory area to the second mode.

10. The data storage system according to claim 2, wherein: The controller de-allocates the first memory area allocated as the shared memory area for the first host device when the access mode of the first memory area allocated as the shared memory area is changed to the second mode.

11. The data storage system according to claim 2, wherein: When the access mode of the first memory area allocated as the shared memory area is changed to the first mode, the controller de-allocates the first memory area allocated as the shared memory area for the first host device.

12. The data storage system according to claim 2, wherein: The controller deallocates a first memory area allocated as the shared memory area for the first host device based on a deallocation request of the first host device.

13. The data storage system according to claim 2, wherein: The controller allocates the shared memory area to the second host device when the access mode of the first memory area allocated as the shared memory area is the second mode.

14. A controller unit storing data in one or more memory devices, comprising: an auxiliary memory storing allocation information and access mode information associated with a plurality of memory regions included in at least one memory device; as well as a controller: changing an access mode of a first memory area among the plurality of memory areas allocated to the first host device from a first mode to a second mode in response to an access mode change request from a first host device outside the memory device when accessing the memory device; And in response to a deallocation request from a second host device different from the first host device, changing the access mode of the first memory area from the second mode to the first mode.

15. The controller unit according to claim 14, wherein: The controller: receives reader node information including information about the second host device from the first host device; and sends an interrupt signal to the second host device when the reader node information is received.

16. The controller unit according to claim 15, wherein: The controller allocates the first memory area to the second host device upon receiving the reader node information.

17. The controller unit according to claim 16, wherein: When the deallocation requests are all received from at least two second host devices, the controller changes the access mode of the first memory area to the first mode.

18. A computing system comprising: a first host device; a second host device; as well as a data storage device including a memory area for storing data and communicating with the first host device and the second host device so that the first host device and the second host device can access the data storage device, wherein the first host device: sends an allocation request to the data storage device; writes data to the shared memory area allocated according to the allocation request; and sends an access mode change request to the data storage device to change the access mode of the shared memory area, and The data storage device changes the access mode of the shared memory area from the first mode to the second mode in response to the access mode change request, and allocates the shared memory area to the second host device.

19. The computing system of claim 18, wherein: The first host device sends the access mode change request to the data storage device and sends a shared area access request to the second host device, and The second host device sends an allocation request for the first memory area to the data storage device upon receiving the shared area access request.

20. The computing system of claim 18, wherein: When receiving a deallocation request for the first memory area from the second host device, the data storage device deallocates the first memory area for the second host device and changes an access mode of the first memory area from the second mode to the first mode.

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