Device and method for realizing Nand command hierarchical management

Abstract

The invention relates to the field of storage, in particular to a device and method for achieving Nand command hierarchical management. Comprising a command caching unit, a hierarchical management unit and a command processing unit, the command caching unit is used for caching NAND operation commands which are issued by a Host end to an SSD end and are analyzed by FTL, the hierarchical management unit is used for performing hierarchical management on the commands in high and low priority cache queues according to CE, LUN and Planes, each Planes is provided with an independent cache queue, and the command processing unit is used for processing the commands. Each plane cache queue comprises eight command slots, CE and LUN of the plane can be calculated according to the number of the planes, and the command processing unit is mainly used for processing commands of each plane in the hierarchical management unit. According to the method, different NAND commands are classified according to the NAND hierarchy, so that the commands can be more efficiently processed in parallel; and meanwhile, the system consumption caused by the software management NAND command is reduced.

Description

Technical Field

[0001] The present invention relates to the field of storage, and in particular to a device and method for implementing hierarchical management of Nand commands. Background Art

[0002] NandFlash has four levels in its physical structure: Device, CE, LUN, and Plane. Device refers to NandFlash packaged into a chip; CE, also known as Target, is an independent Flash memory module with an independent chip select signal; LUN, also known as Die, is the smallest unit in NandFlash that can execute commands and return command execution status. There are one or more LUNs in one CE; Plane is a unit composed of multiple Blocks. There are one or more Planes in one LUN.

[0003] NandFlash has different operations at four levels, such as CE as the operation unit in ODT (On-die Termination) operation; LUN as the operation unit in parallel read and write operation; Plane as the operation unit in Multi Plane or Single Plane operation. Therefore, when managing NandFlash, different levels of operations need to be performed on different NandFlash instructions. The existing command management does not distinguish between them, and all are put into a command buffer for serial or parallel execution; some may be pre-processed by software, but it consumes CPU computing power. Summary of the invention

[0004] In view of the defects of the prior art, the present invention provides a device and method for implementing hierarchical management of NAND commands, which classifies and processes different NAND commands according to the NAND level, and can process commands in parallel more efficiently; at the same time, it reduces the system consumption caused by software management of NAND commands, which is conducive to improving the time delay of read and write operations.

[0005] In order to solve the technical problem, the technical solution adopted by the present invention is: a device for implementing hierarchical management of Nand commands, including a command cache unit, a hierarchical management unit and a command processing unit. The command cache unit is used to cache the NAND operation commands sent from the Host to the SSD after FTL parsing. The hierarchical management unit is connected to the command cache unit and is used to perform hierarchical management of the NAND operation commands in the command cache unit according to CE, LUN, and Plane respectively. Each Plane is set with a cache queue containing multiple command slots, and each Plane queue contains a status queue corresponding to each command slot. The hierarchical management unit stores the commands in the command cache unit according to the Plane number and releases the command slot in the command cache unit. The command processing unit is connected to the hierarchical management unit and is used to process the commands of each Plane in the hierarchical management unit.

[0006] Furthermore, NAND read / write operation commands are divided into two types: Multi Plane and Single Plane. For multi plane operations, the hierarchical management unit stores the commands in the plane0 queue and sets the corresponding LUN and all Plane states to Busy. For single plane operations, the hierarchical management unit stores the commands in the corresponding Plane queue and sets the corresponding LUN and Plane states to Busy.

[0007] Furthermore, for the multi-plane operation, the command processing unit determines whether there are read operations being performed on multiple planes belonging to the same LUN. A multi-plane command is executed only when all planes on the LUN are in the ready state; if a multi-plane command is being executed, other single-plane commands on the LUN cannot be executed; for the single-plane read operation, if there is no multi-plane read operation in the LUN and no single-plane read operation in the same plane, the single-plane read command is executed, that is, two single-plane read commands cannot be executed simultaneously in the same plane.

[0008] Furthermore, the command cache unit is configured with a high priority command cache queue and a low priority command cache queue, and the execution ratio of high and low priority commands is used as a setting item.

[0009] Furthermore, the high-priority command cache queue is used to store read commands, and the low-priority command cache queue is used to store erase and write commands.

[0010] Furthermore, the number of command cache units is consistent with the number of NAND Channels in the SSD controller.

[0011] The present invention also discloses a method for implementing Nand command hierarchical management, comprising the following steps: S01, system initialization, the hierarchical management unit configures the number of CE, LUN, and Plane to perform hardware initialization; if the number of CE, LUN, and Plane is confirmed, the software operates to the hierarchical level; S02, receiving the operation command sent by the host, applying for an available command slot in the command cache unit according to the high and low priority of the command, and placing the command in the command cache unit if there is an available command slot; S03, the hierarchical management unit takes out the command from the command buffer unit, parses the PBA address of the command, and if it is a Single Plane operation command, stores it in the corresponding Plane slot, and sets the status of the Plane and LUN to BUSY; S04, the hierarchical management unit continues to obtain commands from the command buffer unit. If a command with the same Plane address as that in S03 is obtained, if it is a Single Plane command, it checks whether the Plane state is BUSY. If it is not BUSY, the command is executed, otherwise it is not executed. S05. If the command obtained in step S04 is a Multi Plane command, check whether the LUN status is BUSY. If it is not BUSY, execute the write command. Otherwise, wait until the LUN status changes to Ready before executing. S06. If the command obtained in step S03 is a Multi Plane operation command, the command is stored in the Plane0 slot in the LUN, and the status of the LUN and all Planes under the LUN are set to BUSY; S07, the hierarchical management unit continues to obtain commands from the command cache unit. If the command obtained is the same as the Plane address in step S06, if it is a Single Plane command, it checks whether the Plane state is BUSY. If it is not BUSY, it executes the command, otherwise it does not execute; if the command obtained is a Multi Plane command, it checks whether the LUN state is BUSY. If it is not BUSY, it executes the write command, otherwise it needs to wait for the LUN state to become Ready before it can be executed; S08. After the Single Plane is executed, the slot of the corresponding Plane is released, and the state of the Plane is set to Ready. At the same time, it is checked whether other Planes in the LUN to which it belongs are in Busy state. If so, the LUN to which it belongs is set to Busy state. S09. After Multi Plane is executed, the slot corresponding to Plane0 is released, and the status of the LUN and all Planes under the LUN are set to Ready.

[0012] Beneficial effects of the present invention: The present invention is an SSD hardware unit module that implements NandFlash command management in the main control. According to the characteristics of NANDFlash command execution, it is divided into Plane and LUN commands for classified management to avoid invalid stacking of the same type of commands, improve the use efficiency of NAND IO, and thus improve the SSD read and write performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a functional block diagram of the device described in Example 1; Figure 2 This is a flow chart of the method described in Example 2. DETAILED DESCRIPTION

[0014] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0015] Example 1 This embodiment discloses a device for implementing hierarchical management of Nand commands, such as Figure 1 As shown, it includes a command cache unit, a hierarchical management unit, and a command processing unit. The main function of the command cache unit is to cache the NAND operation commands sent from the Host to the SSD after being parsed by the FTL. The number of command cache units is consistent with the number of NAND Channels in the SSD master. Here, channel refers to the parallel channel connecting NandFlash and the SSD master, which is mainly used to improve the bandwidth and performance of data transmission. The command sent from the Host to the SSD contains LBA (Logical Block Address). After parsing, the NAND operation command containing the PBA (Physical Block Address) information of the specific NandFlash block address is obtained, such as erase, write, read, etc.

[0016] The number of command slots can be configured in the command cache unit, such as 64 or 128. In order to optimize the SSD system performance, a high-priority command cache queue and a low-priority command cache queue are configured, and the high-priority and low-priority command execution ratio can be set, such as 2:1, 3:1, etc. From the actual needs, the high-priority queue mainly stores read commands, and the low-priority queue stores erase commands.

[0017] The hierarchical management unit is connected to the command cache unit. Its function is to manage the commands in the high and low priority cache queues hierarchically according to CE, LUN, and Plane. Each Plane has a separate cache queue. Each Plane cache queue contains 8 command slots. The CE and LUN of the Plane can be calculated according to the number of Planes. In order to improve the read performance, the read commands are mainly managed at the plane level.

[0018] The hierarchical management unit stores the commands in the command cache unit according to the Plane number and releases the command slot in the cache unit. If the Plane queue is full of commands, the command slot in the cache unit will not be released. If all command slots in the cache unit are full of commands, a slot full interrupt notification is reported to notify the software system to perform corresponding processing. Each Plane queue contains a status queue corresponding to each command slot.

[0019] NAND read / write operation commands are divided into two types: Multi Plane and Single Plane. For multiplane operations, the hierarchical management unit stores this type of command in the plane0 queue and sets the corresponding LUN and all Plane states to Busy. For single plane operations, the hierarchical management unit stores it in the corresponding Plane queue and sets the corresponding LUN and Plane states to Busy at the same time.

[0020] The main function of the command processing unit is to process the commands of each plane in the hierarchical management unit. There are different processing methods for multiplane and single plane read operations.

[0021] For multi-plane operations, it is necessary to determine whether there are read operations running on multiple planes belonging to the same LUN. A multi-plane command can be executed only when all planes on the LUN are in the ready state. If a multi-plane command is being executed, other single-plane commands on the LUN cannot be executed. For a single plane read operation, if there is no multi plane read operation in the LUN and there is no single plane read operation in the same plane, the single plane read command can be executed. That is, two single plane read commands cannot be executed simultaneously in the same plane.

[0022] After each command runs to the point where it receives the operation status returned by NAND, the status is updated to the status queue corresponding to each plane queue. The software system needs to poll and read the status of each status queue and process the completed commands in a timely manner. Only when there is an idle slot in the status queue can the hierarchical management unit take the command from the cache unit.

[0023] Example 2 This embodiment discloses a method for implementing hierarchical management of Nand commands, such as Figure 2 As shown, the following steps are included: First, the system is initialized, and the hierarchical management unit configures the number of CEs, LUNs, and Planes to perform hardware initialization; after the number of CEs, LUNs, and Planes is confirmed, the software operates to the hierarchy.

[0024] Second, the software receives the operation command sent by the Host, and requests whether there is an available command slot in the command cache unit based on the high and low priority of the command (for example, reading is high priority, writing and erasing are low priority); the command is placed in the command cache unit only when there is an available command slot. If not, the software needs to cache it temporarily.

[0025] Third, the hierarchical management unit takes out the command from the command buffer unit, parses the PBA address of the command, and if it is a Single Plane operation command, stores it in the corresponding Plane slot and sets the status of the Plane and LUN to BUSY.

[0026] Fourth, the command unit continues to obtain commands from the hierarchical cache unit. If a command with the same Plane address as in step three is obtained, if it is a Single Plane command, it checks whether the Plane status is BUSY. If it is not BUSY, the command is executed, otherwise it is not executed.

[0027] Fifth, based on step 4, if the command obtained is a Multi Plane command, check whether the LUN status is BUSY. If it is not BUSY, execute the write command. Otherwise, wait until the LUN status changes to Ready before executing it.

[0028] Sixth, based on step 3, if the fetch command is a Multi Plane operation command, the command is stored in the Plane0 slot in the LUN, and the status of the LUN and all Planes under the LUN are set to BUSY.

[0029] Seventh, the hierarchical management unit continues to obtain commands from the command buffer unit and performs the same operations as steps four and five.

[0030] Eighth, after the Single Plane is executed, the slot of the corresponding Plane is released, and the Plane state is set to Ready state. At the same time, it is detected whether other Planes in the LUN to which it belongs are in Busy state. If so, the LUN to which it belongs is set to Busy state.

[0031] Ninth, after the Multi Plane is executed, the slot corresponding to Plane0 is released, and the status of the LUN and all Planes under the LUN are set to Ready.

[0032] According to the execution characteristics of NAND Flash commands, the present invention classifies commands into Plane and LUN commands for classification management, avoids invalid stacking of commands of the same type, improves the utilization efficiency of NAND IO, and thus improves the read and write performance of SSD.

[0033] The above description is only the basic principle and preferred embodiments of the present invention. Improvements and substitutions made by those skilled in the art based on the present invention belong to the protection scope of the present invention.

Claims

1. A device for implementing hierarchical management of Nand commands, characterized in that: It includes a command cache unit, a hierarchical management unit and a command processing unit. The command cache unit is used to cache the NAND operation commands sent from the Host to the SSD after FTL parsing. The hierarchical management unit is connected to the command cache unit and is used to perform hierarchical management on the NAND operation commands in the command cache unit according to CE, LUN and Plane respectively. Each Plane is provided with a cache queue containing multiple command slots. At the same time, each Plane queue contains a status queue corresponding to each command slot. The hierarchical management unit stores the commands in the command cache unit according to the Plane number and releases the command slot in the command cache unit. The command processing unit is connected to the hierarchical management unit and is used to process the commands of each Plane in the hierarchical management unit.

2. The device for implementing hierarchical management of Nand commands according to claim 1, characterized in that: NAND read / write operation commands are divided into two types: Multi Plane and Single Plane. For multi plane operations, the hierarchical management unit stores the commands in the plane0 queue and sets the corresponding LUN and all Plane states to Busy. For single plane operations, the hierarchical management unit stores the commands in the corresponding Plane queue and sets the corresponding LUN and Plane states to Busy.

3. The device for implementing hierarchical management of Nand commands according to claim 2, characterized in that: For multiplane operations, the command processing unit determines whether there are read operations running on multiple planes belonging to the same LUN. A multi plane command is executed only when all planes on the LUN are in the ready state. If a multi plane command is being executed, other single plane commands on the LUN cannot be executed. For single plane read operations, if there is no multi plane read operation in the LUN and no single plane read operation in the same plane, the single plane read command is executed. That is, two single plane read commands cannot be executed simultaneously in the same plane.

4. The device for implementing hierarchical management of Nand commands according to claim 1, characterized in that: The command cache unit is configured with a high priority command cache queue and a low priority command cache queue, and the execution ratio of high and low priority commands is used as a setting item.

5. The device for implementing hierarchical management of Nand commands according to claim 4, characterized in that: The high-priority command cache queue is used to store read commands, and the low-priority command cache queue is used to store erase and write commands.

6. The device for implementing hierarchical management of Nand commands according to claim 1, characterized in that: The number of command cache units is consistent with the number of NAND channels in the SSD controller.

7. A method for implementing hierarchical management of Nand commands, characterized in that: The following steps are involved: S01, system initialization, the hierarchical management unit configures the number of CE, LUN, and Plane to perform hardware initialization; if the number of CE, LUN, and Plane is confirmed, the software operates to the hierarchical level; S02, receiving the operation command sent by the host, applying for an available command slot in the command cache unit according to the high and low priority of the command, and placing the command in the command cache unit if there is an available command slot; S03, the hierarchical management unit takes out the command from the command buffer unit, parses the PBA address of the command, and if it is a SinglePlane operation command, stores it in the corresponding Plane slot, and sets the status of the Plane and LUN to BUSY; S04, the hierarchical management unit continues to obtain commands from the command buffer unit. If a command with the same Plane address as that in S03 is obtained, if it is a Single Plane command, it checks whether the Plane state is BUSY. If it is not BUSY, the command is executed, otherwise it is not executed. S05. If the command obtained in step S04 is a Multi Plane command, check whether the LUN status is BUSY. If it is not BUSY, execute the write command. Otherwise, wait until the LUN status changes to Ready before executing. S06. If the command obtained in step S03 is a Multi Plane operation command, the command is stored in the Plane0 slot in the LUN, and the status of the LUN and all Planes under the LUN are set to BUSY; S07, the hierarchical management unit continues to obtain commands from the command cache unit. If the command obtained is the same as the Plane address in step S06, if it is a Single Plane command, it checks whether the Plane state is BUSY. If it is not BUSY, it executes the command, otherwise it does not execute; if the command obtained is a Multi Plane command, it checks whether the LUN state is BUSY. If it is not BUSY, it executes the write command, otherwise it needs to wait for the LUN state to become Ready before it can be executed; S08. After the Single Plane is executed, the slot of the corresponding Plane is released, and the state of the Plane is set to Ready. At the same time, it is checked whether other Planes in the LUN to which it belongs are in Busy state. If so, the LUN to which it belongs is set to Busy state. S09. After Multi Plane is executed, the slot corresponding to Plane0 is released, and the status of the LUN and all Planes under the LUN are set to Ready.

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