Management method and management apparatus for hybrid memory system, and device and medium

Abstract

The present application relates to a management method and management apparatus for a hybrid memory system, and a device and a medium. The method comprises: acquiring a write popularity value and an access popularity value of a currently accessed memory page; comparing the write popularity value with a specified write popularity threshold value, and generating write popularity page migration flag information; comparing the access popularity value with a specified access popularity threshold value, and generating access popularity page migration flag information; grouping hybrid memories in a hybrid memory system, and generating, on the basis of memory page information of all grouped memory banks, memory page management information corresponding to the hybrid memories; and on the basis of the write popularity page migration flag information, the access popularity page migration flag information, and current memory page management information corresponding to the currently accessed memory page, determining whether the current access memory page is a popular data page, and performing data migration according to a preset unpopular and popular data page migration strategy. The technical solution can improve the overall performance of a hybrid memory system having a horizontal architecture.

Description

A management method, management device, equipment and medium for a hybrid memory system

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on November 14, 2023, with application number 202311511069.6, entitled “A management method, management device, equipment and medium for a hybrid memory system”, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of hybrid memory technology, and in particular to a management method, management device, equipment, and medium for a hybrid memory system. Background Art

[0004] Traditional DRAM (Dynamic Random Access Memory) offers excellent performance but faces challenges with scalability and high energy consumption. Emerging non-volatile memory technologies offer higher storage density, lower energy consumption, and the ability to store data persistently, but they also suffer from issues like high write latency and a shorter lifespan. Therefore, building hybrid memory systems using a small amount of DRAM and a large amount of NVM (non-volatile memory)—leveraging the advantages of NVM's large capacity, high density, and low energy consumption while leveraging DRAM to improve overall performance—has become a hot research topic in both academia and industry.

[0005] Currently, there are two different organizational architectures for DRAM-NVM hybrid memory systems: one is a "vertical" management architecture, which places DRAM and NVM at different memory levels, with the faster DRAM used as cache for the NVM. The other is a "horizontal" management architecture for DRAM and NVM, which places DRAM and NVM at the same level of the memory hierarchy and occupies the same address space.

[0006] In a horizontally structured hybrid memory system, the different latencies of the two storage media, DRAM and NVM, the dynamic changes in data hotness and coldness, and the linkage between the main memory system and cache (i.e., cache memory, a first-level memory located between the main memory and the CPU) all affect the overall performance of the hybrid memory system.

[0007] Therefore, it is very necessary to improve the management method of the existing horizontal architecture hybrid memory and enhance the overall performance of the horizontal architecture hybrid memory system.

[0008] Summary of the Invention

[0009] This application provides a management method for a hybrid memory system, including:

[0010] Get the write heat value and access heat value of the currently accessed memory page;

[0011] Compare the write heat value with the specified write heat threshold and generate write heat page migration flag information;

[0012] Comparing the access heat value with a specified access heat threshold and generating access heat page migration flag information; and

[0013] The hybrid memories in the hybrid memory system are grouped, and the memory page management information corresponding to the hybrid memory is generated according to the memory page information of all grouped memory libraries; based on the write hot page migration flag information, the access hot page migration flag information, and the current memory page management information corresponding to the currently accessed memory page, the minimum memory read and write attribute level, and the maximum memory read and write attribute level, it is determined whether the currently accessed memory page is a hot data page, and data migration is performed according to the preset hot and cold data page migration strategy.

[0014] Furthermore, the hybrid memories in the hybrid memory system are grouped, and memory page management information corresponding to the hybrid memories is generated based on the memory page information of all grouped memory banks, including:

[0015] Dividing the hybrid memory in the hybrid memory system into a plurality of grouped memory banks according to a preset unified memory group capacity and a preset unified memory group memory ratio, and grouping all the grouped memory banks; wherein each grouped memory bank includes at least one dynamic random access memory area and at least one non-volatile memory area; and the preset unified memory group memory ratio is the ratio of the dynamic random access memory area to the non-volatile memory area in each grouped memory bank;

[0016] Generate memory page management information corresponding to the hybrid memory based on the memory page information of all grouped memory banks; wherein the memory page management information includes memory page attribute information, and the memory page attribute information includes the grouped memory bank group number, the minimum memory read / write attribute level, and the maximum memory read / write attribute level; and

[0017] Obtain each program in the system and the designated group memory library corresponding to each program, and generate a memory group mapping relationship according to the program calibration information of each memory program and the group memory library group number of the designated group memory library corresponding to each memory program.

[0018] Furthermore, the method further comprises:

[0019] Obtain memory allocation application parameters corresponding to the current memory program; wherein the memory allocation application parameters include memory read and write attribute level parameters;

[0020] Determining whether the memory read / write attribute level parameter reaches a preset read / write attribute level threshold; and

[0021] In response to a memory read / write attribute level parameter reaching a preset read / write attribute level threshold, allocating a storage area in a designated group memory bank corresponding to the current memory program to the current memory program according to a first memory allocation principle; wherein the first memory allocation principle is: prioritizing allocation of dynamic random access memory areas, and allocating non-volatile memory areas when the dynamic random access memory areas are insufficient;

[0022] In response to the memory read-write attribute level parameter not reaching the preset read-write attribute level threshold, the storage area in the designated group memory library corresponding to the current memory program is allocated to the current memory program according to the second memory allocation principle; wherein, the second memory allocation principle is: give priority to allocating non-volatile storage areas, and allocate write attribute memory areas when the non-volatile storage areas are insufficient.

[0023] Furthermore, all group memory banks are grouped, specifically including:

[0024] Addressing all group memory banks according to a preset addressing rule, and generating a group memory bank physical address corresponding to each group memory bank;

[0025] The method also includes:

[0026] Obtaining cache index bit information of each cache slice in the cache memory, and allocating a cache slice of each specific cache index bit to store hot data of a specific physical memory address; and

[0027] A cache-physical address mapping relationship is generated according to a specific physical memory address and the slice tag information of each cache slice.

[0028] Furthermore, generating a cache physical address mapping relationship specifically includes:

[0029] Querying a specific cache slice corresponding to the specific physical memory address according to memory index bit information in the specific physical memory address; wherein the memory index bit information is matched one-to-one with the cache slice number;

[0030] In response to a match between the memory tag bit information in the specific physical memory address and the slice tag bit information in the specific cache slice, querying and obtaining a corresponding specific cache way from the specific cache slice according to the memory tag bit information; and

[0031] A cache-physical address mapping relationship is generated according to information of a specific physical memory address and a specific cache channel.

[0032] Furthermore, the method further comprises:

[0033] Obtain the current group memory bank corresponding to the current program according to the memory group mapping relationship, and obtain the current group memory bank memory page physical address corresponding to the current group memory bank;

[0034] Obtaining current memory mark bit information corresponding to the physical address of the memory page of the current group memory bank, and selecting a specific current memory page according to the current memory mark bit information; and

[0035] The dynamic random access memory page corresponding to the current memory page is allocated to the frequently written data page of the current program; and the non-volatile memory page corresponding to the current memory page is allocated to the frequently read data page of the current program.

[0036] Furthermore, a memory group mapping relationship is generated, specifically including:

[0037] Perform modulo calculation on the program ID information of each memory program and the total number of memory groups in all grouped memory libraries, use the modulo calculation result as the group memory library group number that each memory program can access, and group memory programs with the same modulo calculation result.

[0038] Furthermore, data migration is performed according to the preset hot and cold data page migration strategy, which specifically includes:

[0039] In response to the write hot page migration flag information and the access hot page migration flag information being set, if the currently accessed memory page does not belong to the dynamic random access storage area, and the specific bit of the memory address corresponding to the currently accessed memory page does not meet the specific value of the currently running program, then the dynamic random access storage area of ​​the group memory library where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is queried therefrom, and the data is migrated to the updated memory page.

[0040] Furthermore, data migration is performed according to the preset hot and cold data page migration strategy, which specifically includes:

[0041] In response to the write hot page migration flag information being set and the access hot page migration flag information being not set, if the currently accessed memory page does not belong to the dynamic random access storage area, the dynamic random access storage area of ​​the group memory library where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is queried therefrom, and the data is migrated to the updated memory page.

[0042] Furthermore, data migration is performed according to the preset hot and cold data page migration strategy, which specifically includes:

[0043] In response to the write hot page migration flag information not being set and the access hot page migration flag information being set, if the lowest memory read / write attribute level assigned to the currently accessed memory page is greater than a preset lowest memory read / write attribute level threshold, determining whether the currently accessed memory page belongs to a dynamic random access memory area and whether a specific bit of a memory address corresponding to the currently accessed memory page meets a specific value of a program group; and

[0044] In response to at least one of them not being in compliance, a dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirement is searched therefrom, and data is migrated to the updated memory page.

[0045] Furthermore, data migration is performed according to the preset hot and cold data page migration strategy, which specifically includes:

[0046] In response to the write hot page migration flag information not being set and the access hot page migration flag information being set, if the highest memory read / write attribute level assigned to the currently accessed memory page is greater than a preset highest memory read / write attribute level threshold, determining whether the currently accessed memory page belongs to a dynamic random access memory area and whether a specific bit of a memory address corresponding to the currently accessed memory page meets a specific value of a program group; and

[0047] In response to at least one of them not being in compliance, a dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirement is searched therefrom, and data is migrated to the updated memory page.

[0048] Furthermore, data migration is performed according to the preset hot and cold data page migration strategy, which specifically includes:

[0049] In response to the fact that both the write hot page migration flag information and the access hot page migration flag information are not set, the currently accessed memory page remains unchanged.

[0050] Furthermore, before obtaining the write heat value and the access heat value of the currently accessed memory page, the method further includes:

[0051] The corresponding high-frequency write access page linked list and high-frequency access memory linked list are set according to the information of each group memory bank.

[0052] Furthermore, the write heat value is compared with a specified write heat threshold, and write heat page migration flag information is generated, specifically including:

[0053] In response to the write heat value being greater than the specified write heat threshold and the currently accessed memory page being located in the high-frequency write access page linked list of the corresponding group memory bank, the write heat page migration flag is cleared and write heat page migration flag information is generated.

[0054] Furthermore, the write heat value is compared with a specified write heat threshold, and write heat page migration flag information is generated, specifically including:

[0055] In response to the write heat value being greater than a specified write heat threshold and the currently accessed memory page not being in a high-frequency write access page linked list of the corresponding group memory bank, determining whether the number of members in the high-frequency write access page linked list reaches a specified threshold;

[0056] In response to not reaching a specified threshold, setting a write hot page migration flag and generating write hot page migration flag information;

[0057] In response to reaching the specified threshold, the write access heat values ​​of all members in the high-frequency write access page list and the write heat value corresponding to the currently accessed memory page are compared; in response to the write heat value being less than the write access heat value, the write heat page migration flag is cleared and write heat page migration flag information is generated; in response to the write heat value being not less than the write access heat value, the write heat page migration flag is set and write heat page migration flag information is generated.

[0058] Furthermore, the write heat value is compared with a specified write heat threshold, and write heat page migration flag information is generated, specifically including:

[0059] In response to the write heat value not exceeding the specified write heat threshold, the write heat page migration flag is cleared and write heat page migration flag information is generated.

[0060] Furthermore, the write heat value and access heat value of the currently accessed memory page are obtained, including:

[0061] The write heat value of the currently accessed memory page is calculated using the following formula: write =a 11 f0+a 12 f1+a 13 f2+a 14 f3+a 15 f4, where:

[0062] f0 is the ratio of write access requests to the page in M ​​times in the write access counter;

[0063] f1 is the ratio of write access requests to the page in the last N times in the write access counter;

[0064] f2 is the ratio of write access requests to the page in the last P times in the write access statistics;

[0065] f3 is the ratio of write access requests to the page in the last Q times in the write access statistics;

[0066] f4 is the ratio of write access requests to the page in the last R times in the write access counter;

[0067] a 11 、a 12 、a 13 、a 14 、a 15 is the weight parameter, a 11 +a 12 +a 13 +a 14 +a 15 =1;

[0068] The read access heat value of the currently accessed memory page is calculated using the following formula: Hot read =a 21 f'0+a 22 f'1+a 23 f'2+a 24 f'3+a 25 f'4, where:

[0069] f'0 is the ratio of read access requests to the page in M ​​times in the read access counter;

[0070] f'1 is the ratio of read access requests to the page in the last N times in the read access counter;

[0071] f'2 is the ratio of read access requests to the page in the last P times in the read access counter;

[0072] f'3 is the proportion of read access requests for this page in the last Q times in the read access statistics;

[0073] f'4 is the ratio of read access requests to the page in the last R times in the read access statistics;

[0074] a 21 、a 22 、a 23 、a 24 、a 25 is the weight parameter, and a 21 +a 22 +a 23 +a 24 +a 25 =1;

[0075] The access heat value of the currently accessed memory page is calculated using the following formula: Hot access =Hot read+ Hot write。

[0076] The present application also provides a management device for a hybrid memory system, for implementing the aforementioned management method for a hybrid memory system; the management device includes:

[0077] The heat value acquisition unit is configured to: acquire a write heat value and an access heat value of a currently accessed memory page;

[0078] a write heat page migration flag information generating unit, configured to: compare the write heat value with a specified write heat threshold, and generate write heat page migration flag information;

[0079] The access popularity page migration flag information generating unit is configured to: compare the access popularity value with a specified access popularity threshold value and generate access popularity page migration flag information;

[0080] A group memory bank partitioning unit is configured to: group the hybrid memories in the hybrid memory system, and generate memory page management information corresponding to the hybrid memories based on the memory page information of all group memory banks; and

[0081] The data migration unit is configured to: determine whether the currently accessed memory page is a hot data page based on the write hot page migration flag information, the access hot page migration flag information, and the current memory page management information corresponding to the currently accessed memory page, and perform data migration according to the preset hot and cold data page migration strategy.

[0082] The present application also provides a computer device, including a memory, a processor and computer-readable instructions. The computer-readable instructions are stored in the memory and can be run on the processor. When the processor executes the computer-readable instructions, the steps of the aforementioned hybrid memory system management method are implemented.

[0083] The present application further provides one or more non-volatile computer-readable storage media storing computer-readable instructions. When the computer-readable instructions are executed by one or more processors, the one or more processors implement the steps of the aforementioned hybrid memory system management method.

[0084] The present application further provides a hybrid memory system, including a hybrid memory; the hybrid memory is managed by the aforementioned management method of the hybrid memory system. BRIEF DESCRIPTION OF THE DRAWINGS

[0085] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0086] FIG1 is a flow chart of a method for managing a hybrid memory system in one or more embodiments of the present application;

[0087] FIG2 is a schematic diagram of various flag bits of a memory address in one or more practical embodiments of the present application;

[0088] FIG3 is a schematic diagram showing the correspondence between bits 12-13 of a memory address as a specific physical address and different programs in one or more practical embodiments of the present application;

[0089] FIG4 is a schematic diagram of a write access counter and a read access counter in one or more practical embodiments of the present application;

[0090] FIG5 is a structural block diagram of a management device for a hybrid memory system in one or more embodiments of the present application;

[0091] FIG6 is a diagram showing the internal structure of a computer device in one or more embodiments of the present application. DETAILED DESCRIPTION

[0092] In related technologies, in order to give full play to the advantages of hybrid memory heterogeneous hardware, certain progress has been made in hybrid memory storage technology. For example, the access characteristics of memory data are accurately predicted, and hot data is migrated to DRAM based on the access characteristics, while cold data is stored in large-capacity NVM.

[0093] These research technologies have proposed some management strategies, such as dynamically monitoring the write operations of each memory page at runtime and migrating write-intensive pages from NVM to DRAM to reduce write latency; or improving traditional page migration algorithms, management strategies and other mechanisms, and classifying pages according to their popularity to reduce the frequency of page migration.

[0094] However, the CPU processes data at a much higher rate than the main memory system can drain data. Caches, comprised of static random access memory (SRAM), respond faster than main memory. Having the CPU read data from cache first can significantly improve system performance. Currently, most research focuses solely on improving the performance of hybrid memory itself, without considering the overall memory architecture, particularly the interconnectedness between main memory and cache. Due to the arbitrary mapping of virtual and real memory addresses, data blocks are often unevenly distributed in caches indexed by physical addresses, leading to significant fluctuations in system performance.

[0095] Specifically, in related technologies, applications' read and write access to memory is dynamic. In the multi-core era, due to the concurrent execution of multiple programs, memory access requests from each program will generate cache contention, resulting in a lower cache hit rate and, consequently, reduced overall computer performance. When memory access requests from multiple programs land on the same bank, memory access conflicts will occur, reducing the line buffer hit rate and, in turn, memory access performance, impacting overall system performance.

[0096] For example, the Linux operating system's memory management mechanism uses a random physical page allocation mechanism. When a page miss occurs, a physical page is randomly selected from the partner system, and the operating system establishes a virtual-to-real address mapping in the page table. This uncertainty can cause frequently accessed pages to be randomly allocated to the same physical memory bank, causing memory access conflicts within the bank.

[0097] At the same time, it is very likely that data will be unevenly distributed on the cache set in the on-chip cache, causing more cache misses and affecting system performance.

[0098] In a multi-core processor system, memory access requests from multiple computing units will cause conflicts and interference in the memory system.

[0099] It can be seen that current research technologies for DRAM-NVM hybrid memory management architecture generally focus on main memory architecture, hot page prediction methods and page scheduling issues, but ignore the mutual influence between main memory and cache, and fail to consider the overall situation to further improve the performance of hybrid memory.

[0100] To this end, the present application provides a management method, management device, equipment and medium for a hybrid memory system to solve the above problems.

[0101] To make the purpose, technical solutions, and advantages of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0102] Example 1:

[0103] As shown in FIG1 , an embodiment of the present application provides a management method for a hybrid memory system.

[0104] Among them, management methods include:

[0105] Get the write heat value and access heat value of the currently accessed memory page;

[0106] Compare the write heat value with the specified write heat threshold and generate write heat page migration flag information;

[0107] Compare the access heat value with the specified access heat threshold and generate access heat page migration flag information;

[0108] Grouping the hybrid memories in the hybrid memory system, and generating memory page management information corresponding to the hybrid memories based on the memory page information of all grouped memory banks;

[0109] Based on the write hot page migration flag information, the access hot page migration flag information, and the current memory page management information corresponding to the currently accessed memory page, determine whether the currently accessed memory page is a hot data page, and perform data migration according to the preset hot and cold data page migration strategy.

[0110] The hybrid memories in the hybrid memory system are grouped, and memory page management information corresponding to the hybrid memories is generated according to the memory page information of all grouped memory banks, including:

[0111] Dividing the hybrid memory in the hybrid memory system into a plurality of grouped memory banks according to a preset unified memory group capacity and a preset unified memory group memory ratio, and grouping all the grouped memory banks; wherein each grouped memory bank includes at least one dynamic random access memory area and at least one non-volatile memory area; and the preset unified memory group memory ratio is the ratio of the dynamic random access memory area to the non-volatile memory area in each grouped memory bank;

[0112] Generate a memory page management information table corresponding to the hybrid memory based on the memory page information of all grouped memory banks; wherein the memory page management information table includes memory page attribute information, and the memory page attribute information includes the group memory bank group number, the minimum memory read / write attribute level, and the maximum memory read / write attribute level;

[0113] Obtain each program in the system and the designated group memory library corresponding to each program, and generate a memory group mapping relationship according to the program calibration information of each memory program and the group memory library group number of the designated group memory library corresponding to each memory program.

[0114] In an actual embodiment, the hybrid memory system management method described above first divides the hybrid memory into multiple grouped memory banks and performs memory grouping according to the DRAM-NVM ratio;

[0115] Each hybrid memory group is then managed by page, and a memory page management information table is established to record the attributes of each page and the minimum and maximum memory read / write attribute levels allocated to the current memory page. Page attributes include information such as the memory group number, NVM or DRAM type, and physical address range.

[0116] Next, an association is established between memory programs and memory groups. Each memory program uses only one or a specified group of memory banks, and there is a mapping relationship between the program and the memory bank number it uses. This groups the mixed memory and limits the memory accessed by the program to one or several grouped memory banks.

[0117] This eliminates access interference between programs and ensures the locality of the program's own row buffer. Programs can only access their corresponding memory groups and cannot cross the boundaries to access the memory of other programs, thus ensuring that the hybrid memory system maintains optimal performance.

[0118] At the same time, the hot and cold data pages are determined and migrated to predict the hot data pages in memory and perform memory migration.

[0119] In practice, the hybrid memory system management method can also fully consider the cache linkage effect, grouping the DRAM-NVN memory and limiting the memory accessed by the program to one or several memory bank groups. It then establishes cache and hybrid memory address mapping rules to ensure that different program groups correspond to different cache groups. It also predicts the hot and cold data pages and page migration of the hybrid memory system in real time according to the memory grouping, thereby ensuring the optimal performance of the hybrid memory system.

[0120] In a preferred embodiment, the management method further comprises:

[0121] Obtain memory allocation application parameters corresponding to the current memory program; wherein the memory allocation application parameters include memory read and write attribute level parameters;

[0122] Determine whether the memory read / write attribute level parameter reaches a preset read / write attribute level threshold;

[0123] If the number of memory blocks is reached, the memory area in the designated group memory bank corresponding to the current memory program is allocated to the current memory program according to a first memory allocation principle; wherein the first memory allocation principle is: giving priority to allocating dynamic random access memory areas, and allocating non-volatile memory areas when the dynamic random access memory areas are insufficient;

[0124] If not reached, the storage area in the designated group memory library corresponding to the current memory program is allocated to the current memory program according to the second memory allocation principle; wherein, the second memory allocation principle is: give priority to allocating non-volatile storage areas, and allocate write attribute memory areas when the non-volatile storage areas are insufficient.

[0125] In an actual embodiment, when applying for memory allocation in an application, the application parameters include the memory size and the read / write attribute level of the memory.

[0126] The operating system allocates memory from the DRAM and NVM in the physical memory group corresponding to the program based on the memory read / write attribute level. The operating system prioritizes allocating DRAM to requests with higher memory read / write attribute levels (memory read / write attribute level greater than or equal to 5); if DRAM is insufficient, NVM memory is allocated.

[0127] The operating system preferentially allocates NVM to applications with lower read / write attribute levels (memory read / write attribute level is less than 5); if the NVM type memory is insufficient, memory with write attributes is allocated.

[0128] In a preferred embodiment, grouping all group memory banks specifically includes:

[0129] Addressing all group memory banks according to a preset addressing rule, and generating a group memory bank physical address corresponding to each group memory bank;

[0130] The management method further includes a cache address mapping method, which includes:

[0131] Obtaining cache index bit information of each cache slice in the cache memory, and allocating a cache slice of each specific cache index bit to store hot data of a specific physical memory address;

[0132] A cache-physical address mapping relationship is generated according to a specific physical memory address and the slice tag information of each cache slice.

[0133] In a preferred embodiment, generating a cache physical address mapping relationship specifically includes:

[0134] Querying a specific cache slice corresponding to the specific physical memory address according to memory index bit information in the specific physical memory address; wherein the memory index bit information is matched one-to-one with the cache slice number;

[0135] When the memory mark bit information in the specific physical memory address matches the slice mark bit information in the specific cache slice, querying and obtaining the corresponding specific cache channel from the specific cache slice according to the memory mark bit information;

[0136] A cache-physical address mapping relationship is generated according to information of a specific physical memory address and a specific cache channel.

[0137] In an actual embodiment, the cache address mapping method is used to establish an address mapping relationship between the LLC (Last Level Cache) of the CPU cache and the hybrid memory.

[0138] Since the index bit of the cache set is a specific bit, the operating system will prioritize allocating pages with specific physical addresses to applications to store hot data. The aforementioned method of application grouping associates a specific physical address with the memory group number corresponding to the application to achieve cache isolation of hot data between different application groups, reduce memory access contention generated by multiple programs on the cache, improve cache hit rate, and thus improve the overall performance of hybrid memory.

[0139] A cache can be subdivided into cache sets. Each cache set is of equal size and can contain a certain number of cache lines. Each cache line contains a certain amount of data (perhaps 32 bytes, 64 bytes, or 128 bytes). Assuming a memory address has m bits, the middle s bits correspond to the cache set number, specifying the cache set to index / search into. The lower b bits correspond to the byte offset within the cache line, and the upper MSB bit is the tag field.

[0140] When searching for the cache corresponding to a memory address, first find the corresponding cache set based on the value of the index field, then match the value of the tag field of the memory address with the value of the tag in the cache, and then find the corresponding cache line.

[0141] In a preferred embodiment, the method further comprises:

[0142] Obtain the current group memory bank corresponding to the current program according to the memory group mapping relationship, and obtain the current group memory bank memory page physical address corresponding to the current group memory bank;

[0143] Obtain the current memory mark bit information corresponding to the physical address of the memory page of the current group memory bank, and select a specific current memory page according to the current memory mark bit information;

[0144] The dynamic random access memory page corresponding to the current memory page is allocated to the frequently written data page of the current program; and the non-volatile memory page corresponding to the current memory page is allocated to the frequently read data page of the current program.

[0145] In this way, the distribution of data with different attributes between different memory types can be controlled, while eliminating mutual interference between multiple programs in the memory system, thereby effectively improving the performance of the entire memory system.

[0146] In a preferred embodiment, generating a memory group mapping relationship specifically includes:

[0147] Perform modulo calculation on the program ID information of each memory program and the total number of memory groups in all grouped memory libraries, use the modulo calculation result as the group memory library group number that each memory program can access, and group memory programs with the same modulo calculation result.

[0148] In an actual embodiment, there is a mapping relationship between the program and the memory group number it uses; the memory group number that the program can access is the result of calculating the modulo of the program ID and the total number of memory groups; of course, other algorithms or manual allocation can also be used.

[0149] That is, the method for grouping application programs may be to perform a modulo calculation on the program ID and the number of groups, and group programs with the same calculation result.

[0150] In a preferred embodiment, before obtaining the write heat value and the access heat value of the currently accessed memory page, the method further includes:

[0151] The corresponding high-frequency write access page linked list and high-frequency access memory linked list are set according to the information of each group memory bank.

[0152] In addition, based on the aforementioned management method, the above-mentioned hybrid memory system management method can also dynamically predict the popularity of data pages and perform memory page migration within the memory group as needed based on the read and write access counts of the hybrid memory, the read and write access counts of memory data in the cache, the minimum and maximum memory read and write attribute levels stored in the page, and the memory access sequence.

[0153] Use as little DRAM as possible to absorb write operations, swap hot data or write-intensive data pages into DRAM, and migrate the memory data pages with the highest write frequency to DRAM at a specific address; cold data or read-intensive data pages are stored in large-capacity NVM, and the memory data with the highest read frequency is migrated to NVM at a specific address; thereby further leveraging the synergy advantages of hybrid memory and cache.

[0154] In a preferred embodiment, data migration is performed according to a preset hot and cold data page migration strategy, specifically including:

[0155] When the write hot page migration flag information and the access hot page migration flag information are both set, if the currently accessed memory page does not belong to the dynamic random access storage area, and the specific bit of the memory address corresponding to the currently accessed memory page does not meet the specific value of the currently running program, then obtain the dynamic random access storage area of ​​the group memory library where the currently accessed memory page is located, and query the updated memory page whose memory address meets the program grouping requirements, and migrate the data to the updated memory page.

[0156] In a preferred embodiment, data migration is performed according to a preset hot and cold data page migration strategy, specifically including:

[0157] When the write hot page migration flag information is set and the access hot page migration flag information is not set, if the currently accessed memory page does not belong to the dynamic random access storage area, the dynamic random access storage area of ​​the group memory library where the currently accessed memory page is located is obtained, and the updated memory page whose memory address meets the program grouping requirements is queried therefrom, and the data is migrated to the updated memory page.

[0158] In a preferred embodiment, data migration is performed according to a preset hot and cold data page migration strategy, specifically including:

[0159] When the write hot page migration flag information is not set and the access hot page migration flag information is set, if the lowest memory read / write attribute level assigned to the currently accessed memory page is greater than the preset lowest memory read / write attribute level threshold, then determine whether the currently accessed memory page belongs to the dynamic random access memory area, and whether the specific bit of the memory address corresponding to the currently accessed memory page meets the specific value of the program group;

[0160] When at least one of them does not meet the requirements, the dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is searched therefrom, and the data is migrated to the updated memory page.

[0161] In a preferred embodiment, data migration is performed according to a preset hot and cold data page migration strategy, specifically including:

[0162] When the write hot page migration flag information is not set and the access hot page migration flag information is set, if the highest memory read / write attribute level allocated to the currently accessed memory page is greater than the preset highest memory read / write attribute level threshold, then determine whether the currently accessed memory page belongs to the dynamic random access storage area, and whether the specific bit of the memory address corresponding to the currently accessed memory page meets the specific value of the program group;

[0163] When at least one of them does not meet the requirements, the dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is searched therefrom, and the data is migrated to the updated memory page.

[0164] In a preferred embodiment, data migration is performed according to a preset hot and cold data page migration strategy, specifically including:

[0165] When the write hot page migration flag information and the access hot page migration flag information are both not set, the currently accessed memory page remains unchanged.

[0166] Therefore, after reading the write hot page migration flag information and the access hot page migration flag information, the attribute information of the current memory page and the allocated minimum memory read and write attribute level and the maximum memory read and write attribute level are read from the memory management information, and then judgments are made one by one and corresponding data migration processing is implemented.

[0167] In a preferred embodiment, the write heat value is compared with a specified write heat threshold, and write heat page migration flag information is generated, specifically including:

[0168] If the write heat value is greater than the specified write heat threshold and the currently accessed memory page is in the high-frequency write access page linked list of the corresponding group memory library, the write heat page migration flag is cleared and the write heat page migration flag information is generated.

[0169] In a preferred embodiment, the write heat value is compared with a specified write heat threshold, and write heat page migration flag information is generated, specifically including:

[0170] If the write heat value is greater than the specified write heat threshold and the currently accessed memory page is not in the high-frequency write access page linked list of the corresponding group memory bank, then determine whether the number of members in the high-frequency write access page linked list reaches the specified threshold;

[0171] If the specified threshold is not reached, the write hot page migration flag is set and the write hot page migration flag information is generated;

[0172] If the specified threshold is reached, the write access heat values ​​of all members in the high-frequency write access page list and the write heat value corresponding to the currently accessed memory page are compared; when the write heat value is less than the write access heat value, the write heat page migration flag is cleared and the write heat page migration flag information is generated; when the write heat value is not less than the write access heat value, the write heat page migration flag is set and the write heat page migration flag information is generated.

[0173] In a preferred embodiment, the write heat value is compared with a specified write heat threshold, and write heat page migration flag information is generated, specifically including:

[0174] If the write heat value does not exceed the specified write heat threshold, the write heat page migration flag is cleared and write heat page migration flag information is generated.

[0175] In a preferred embodiment, the write heat value and access heat value of the currently accessed memory page are obtained, specifically including: Hot write =a 11 f0+a 12 f1+a 13 f2+a 14 f3+a 15 f4, where:

[0176] f0 is the ratio of write access requests to the page in M ​​times in the write access counter;

[0177] f1 is the ratio of write access requests to the page in the last N times in the write access counter;

[0178] f2 is the ratio of write access requests to the page in the last P times in the write access statistics;

[0179] f3 is the ratio of write access requests to the page in the last Q times in the write access statistics;

[0180] f4 is the ratio of write access requests to the page in the last R times in the write access counter;

[0181] a 11 、a 12 、a 13 、a 14 、a 15 is the weight parameter, a 11 +a 12 +a 13 +a 14 +a 15 =1;

[0182] The read access heat value of the currently accessed memory page is calculated using the following formula: Hot read =a 21 f'0+a 22 f'1+a 23 f'2+a 24 f'3+a 25 f'4, where:

[0183] f'0 is the ratio of read access requests to the page in M ​​times in the read access counter;

[0184] f'1 is the ratio of read access requests to the page in the last N times in the read access counter;

[0185] f'2 is the ratio of read access requests to the page in the last P times in the read access counter;

[0186] f'3 is the proportion of read access requests for this page in the last Q times in the read access statistics;

[0187] f'4 is the ratio of read access requests to the page in the last R times in the read access statistics;

[0188] a 21 、a 22 、a 23 、a 24 、a 25 is the weight parameter, and a 21 +a 22 +a23 +a 24 +a 25 =1;

[0189] The access heat value of the currently accessed memory page is calculated using the following formula: Hot access =Hot read+ Hot write。

[0190] For example, the write heat value of the currently accessed memory page is calculated using the following formula: Hot write =a 11 f 100 +a 12 f 50 +a 13 f 25 +a 14 f 10 +a 15 f5, where: f 100 The ratio of write access requests to the page in 100 times in the write access counter;

[0191] f 50 The ratio of write access requests to the page in the last 50 times in the write access statistics;

[0192] f 25 The ratio of write access requests to the page in the last 25 times in the write access counter;

[0193] f 10 The ratio of write access requests to the page in the last 10 times in the write access statistics;

[0194] f5 is the proportion of write access requests to the page in the last five times in the write access statistics;

[0195] a 11 、a 12 、a 13 、a 14 、a 15 is the weight parameter, a 11 +a 12 +a 13 +a 14 +a 15 =1;

[0196] The read access heat value of the currently accessed memory page is calculated using the following formula: Hot read =a 21 f' 100 +a 22 f' 50 +a 23 f' 25 +a 24 f' 10+a 25 f'5, where:

[0197] f' 100 The ratio of read access requests to the page in 100 times in the read access counter;

[0198] f' 50 The ratio of read access requests to the page in the last 50 times in the read access statistics;

[0199] f' 25 The ratio of read access requests to the page in the last 25 times in the read access statistics;

[0200] f' 10 The ratio of read access requests to the page in the last 10 times in the read access statistics;

[0201] f'5 is the proportion of read access requests for this page in the last five times in the read access counter;

[0202] a 21 、a 22 、a 23 、a 24 、a 25 is the weight parameter, a 21 +a 22 +a 23 +a 24 +a 25 =1;

[0203] The access heat value of the currently accessed memory page is calculated using the following formula: Hot access =Hot read+ Hot write .

[0204] Thus, by comparing the write heat value with the specified write heat threshold, write heat page migration flag information can be generated;

[0205] Similarly, by comparing the access heat value with a specified access heat threshold, access heat page migration flag information can be generated.

[0206] In summary, the hybrid memory system management method provided by the practical embodiment of the present application can fully consider the correlation between memory and cache for the performance optimization problem of the DRAM-NVM hybrid memory system based on the horizontal architecture. The overall method includes: a DRAM-NVN memory grouping method, cache mapping rules, a memory application allocation method, a method for determining hot data pages by memory grouping, and a page migration method.

[0207] The above management method can reduce conflicts and interference in the memory system, accurately identify hot data and migrate it to the appropriate memory bank to ensure the optimal performance of the hybrid memory system.

[0208] The specific implementation process of the above management method is as follows:

[0209] Phase 1: Implementing DRAM-NVN Memory Grouping Methodology

[0210] First, the DRAM-NVM hybrid memory is divided into BANKs and the memory is grouped according to the DRAM-NVM ratio.

[0211] According to the hardware characteristics of the memory, the DRAM-NVM hybrid memory is divided into multiple banks.

[0212] For example, 8GB of memory is divided into 64 DRAM banks (125MB per bank). DRAM-NVM hybrid memory is uniformly addressed, with a bank information table recording each bank's number, memory attributes, start address, and end address. Memory banks are numbered 1, 2, 3, ..., n, and their memory attributes are NVM or DRAM.

[0213] Afterwards, the memory is grouped according to the ratio of hybrid memory DRAM-NVM. Each group has one or more DRAM banks and one or more NVM banks. The memory size of each group is the same and the ratio of DRAM to NVM is also the same.

[0214] For example, a hybrid memory consisting of 8GB of DRAM and 32GB of NVM is divided into 32 groups, each containing two DRAM banks and eight NVM banks. Each hybrid memory group is addressed according to a specific pattern: the starting address of the DRAM in the i-th hybrid memory group is (DRAM_BASE + i*BANK_SIZE*DRAM_BANK_NUM), and its size is BANK_SIZE*DRAM_BANK_NUM; the starting address of the NVM in the i-th hybrid memory group is (NVM_BASE + i*BANK_SIZE*NVM_BANK_NUM), and its size is BANK_SIZE*NVM_BANK_NUM. Where DRAM_BASE is the starting address of the hybrid memory DRAM, NVM_BASE is the starting address of the hybrid memory NVM, BANK_SIZE is the size of each bank, DRAM_BANK_NUM is the number of DRAM banks in each hybrid memory group, and NVM_BANK_NUM is the number of NVM banks in each hybrid memory group.

[0215] Each hybrid memory group is then managed on a page-by-page basis. A memory page management information table is established to record the attributes of each page, as well as the minimum and maximum memory read / write attribute levels allocated to the current memory page. Page attributes include information such as the memory group number, NVM or DRAM type, and physical address range. The memory read / write attribute levels are set to eight levels, from 1 to 8, with higher levels indicating more frequent write operations.

[0216] Next, we establish associations between applications and memory banks. Each application uses only one or a specific set of memory banks, eliminating access interference between programs and ensuring the program's own row buffer locality. A program can only access its corresponding memory bank and cannot cross the boundaries to access the memory of other programs.

[0217] Each hybrid memory group contains DRAM and NVM, and there is a mapping relationship between the program and the memory group number it uses. The memory group number that the program can access is the result of calculating the modulo of the program ID and the total number of memory groups. Of course, other algorithms or manual allocation can also be used.

[0218] Phase 2: Implementing memory allocation methods

[0219] Then, when applying for memory allocation in the application, the application parameters include the memory size and the read-write attribute level of the memory.

[0220] The operating system allocates memory from the DRAM and NVM in the physical memory group corresponding to the program based on the memory read / write attribute level. The operating system prioritizes allocating DRAM to requests with higher memory read / write attribute levels (memory read / write attribute level greater than or equal to 5); if DRAM is insufficient, NVM memory is allocated.

[0221] The operating system preferentially allocates NVM to applications with lower read / write attribute levels (memory read / write attribute level is less than 5); if the NVM type memory is insufficient, memory with write attributes is allocated.

[0222] After the memory allocation is completed, the memory page attribute information corresponding to the memory page management information table is updated, which includes the highest memory read-write attribute level and the lowest memory read-write attribute level allocated to the page.

[0223] Phase 3: Establishing Cache Mapping Rules

[0224] Then, an address mapping relationship is established between the CPU's LLC (Last Level Cache) and the hybrid memory. Because the cache set index bit is a specific bit, the operating system prioritizes pages with specific physical addresses for applications to store hot data. In the aforementioned application grouping method, specific physical addresses are associated with the memory group number corresponding to the application. This isolates hot data between different application groups in the cache, reduces cache contention caused by multiple programs, improves cache hit rates, and ultimately enhances the overall performance of the hybrid memory.

[0225] Cache can be subdivided into cache sets. Each cache set is of equal size. Each cache set can contain a certain number of cache lines. Each cache line contains a certain amount of data (possibly 32 bytes, 64 bytes, or 128 bytes, etc.).

[0226] As shown in Figure 2, assuming a memory address has m bits, the middle s bits are used to correspond to the cache set number, which is used to specify which cache set to index / search for the cache; the lower b bits correspond to the byte offset in the cache line, and the upper MSB bit is the tag field.

[0227] When searching for the cache corresponding to a memory address, first find the corresponding cache set based on the value of the index field, then match the value of the tag field of the memory address with the value of the tag in the cache, and then find the corresponding cache line.

[0228] In the above method, the method for grouping the application programs may be to perform a modulo calculation on the program ID and the number of groups, and group the programs with the same calculation result into one group.

[0229] For example, as shown in Figure 3, bits 12-18 of the memory address are used as cache set index bits; bits 12 and 13 of the memory address are used to group programs into four groups; programs are also divided into four groups; when a program requests memory, the memory page with a specific physical address value from bits 12 to 13 in its corresponding memory group bank is preferentially allocated to the program;

[0230] Assign the DRAM memory page with the physical address of bit 12-13 as 00 to the frequently written data page of the first group of programs as much as possible, and assign the NVM memory page with the physical address of bit 12-13 as 00 to the frequently read data page of the first group of programs as much as possible;

[0231] Assign the DRAM memory page with the address of bit 12-13 as 01 to the frequently written data page of the second group of programs as much as possible, and assign the NVM memory page with the address of bit 12-13 as 01 to the frequently read data page of the second group of programs as much as possible;

[0232] Assign the DRAM memory page with the address 10 of bit 12-13 to the frequently written data page of the third group of programs as much as possible, and assign the NVM memory page with the address 10 of bit 12-13 to the frequently read data page of the third group of programs as much as possible;

[0233] The DRAM memory page with the 12-13 bit address 11 is allocated to the frequently written data page of the fourth group of programs as much as possible, and the NVM memory page with the 12-13 bit address 11 is allocated to the frequently read data page of the fourth group of programs as much as possible.

[0234] The above method can control the distribution of data with different attributes between different memory types, and eliminate the mutual interference between multiple programs in the memory system, thereby effectively improving the performance of the entire memory system.

[0235] Phase 4: Implementing methods for determining hot data pages by memory grouping and page migration

[0236] Specifically, based on the aforementioned management method, the hybrid memory system management method can also dynamically predict the popularity of data pages based on the read and write access counts of the hybrid memory, the read and write access counts of memory data in the cache, the minimum and maximum memory read and write attribute levels stored in the page, and the memory access sequence, and perform memory page migration within the memory group as needed.

[0237] Use as little DRAM as possible to absorb write operations, swap hot data or write-intensive data pages into DRAM, and migrate the memory data pages with the highest write frequency to DRAM at a specific address; cold data or read-intensive data pages are stored in large-capacity NVM, and the memory data with the highest read frequency is migrated to NVM at a specific address; thereby further leveraging the synergy advantages of hybrid memory and cache.

[0238] The specific implementation process is as follows:

[0239] First, as shown in Figure 4, a write access statistic and a read access statistic are set for each memory group; the write access statistic records the 100 most recent write request accesses in chronological order of the group's write accesses, and the read access statistic records the 100 most recent read request accesses in chronological order of the read accesses, where write access requests include accesses to the cache of the address, and read accesses include cache accesses to the address.

[0240] Next, a high-frequency write access page linked list and a high-frequency access memory linked list are set for each memory group. The linked lists are used to record the page number and the current write heat value and access heat value of the page respectively.

[0241] For the currently accessed memory page, the write heat value, read heat value, and access heat value of the currently accessed memory page are calculated and stored in the memory page management information table.

[0242] First, the write heat value of the memory page can be calculated by the following formula: write =a 11 f 100 +a 12 f 50 +a 13 f 25 +a 14 f 10 +a 15 f5, where:

[0243] f 100 The ratio of write access requests to the page in 100 times in the write access counter;

[0244] f 50 The ratio of write access requests to the page in the last 50 times in the write access statistics;

[0245] f 25 The ratio of write access requests to the page in the last 25 times in the write access counter;

[0246] f 10 The ratio of write access requests to the page in the last 10 times in the write access statistics;

[0247] f5 is the proportion of write access requests to the page in the last five times in the write access statistics;

[0248] a 11 、a 12 、a 13 、a 14 、a 15 is the weight parameter, a 11 +a 12 +a 13 +a 14 +a 15 =1, here we take 0.1, 0.1, 0.2, 0.3, 0.3.

[0249] Secondly, the read access heat value of the memory page can be calculated by the following formula: Hot read =a 21 f' 100 +a 22 f' 50 +a 23 f'25 + a 24 f' 10 +a 25 f'5, where:

[0250] f' 100 The ratio of read access requests to the page in 100 times in the read access counter;

[0251] f' 50 The ratio of read access requests to the page in the last 50 times in the read access statistics;

[0252] f' 25 The ratio of read access requests to the page in the last 25 times in the read access statistics;

[0253] f' 10 The ratio of read access requests to the page in the last 10 times in the read access statistics;

[0254] f'5 is the proportion of read access requests for this page in the last five times in the read access counter;

[0255] a 21 、a 22 、a 23 、a 24 、a 25 is the weight parameter, a 21 +a 22 +a 23 +a 24 +a 25 =1, here we take 0.1, 0.1, 0.2, 0.3, 0.3.

[0256] Finally, the access heat value of the memory page can be calculated by the following formula: Hot access =Hot read+ Hot write Then, the write heat value of the currently accessed memory page is compared with the specified threshold TH write Compare and process. The specific steps are as follows:

[0257] Step 1) If the write heat value of the currently accessed memory page is greater than the specified threshold TH write If the current memory exists in the high-frequency write access linked list of the group, the write heat value of the page in the high-frequency write access page linked list is updated, and the page migration flag and Flag are cleared. write ;

[0258] Step 2) If the write heat value of the currently accessed memory page is greater than the specified threshold TH write And the memory is not in the high-frequency write access page list of the memory group:

[0259] If the number of linked list members has not reached the specified limit, the page migration flag is set. write Set it and record the page number of the memory page as the incoming memory page number. The outgoing memory page is empty.

[0260] If the number of linked list members has reached the specified limit, calculate the write access heat values ​​of all members in the high-frequency write access linked list and then compare them;

[0261] If the write heat value of the memory page is less than the write access heat value of all members, the migration flag is cleared. write ;

[0262] Otherwise, the page migration flag is set write Set, and record the page number of the memory page as the incoming memory page number, and the page with the minimum write heat value as the outgoing memory page number.

[0263] Step 3) If the write heat value of the currently accessed memory page is less than or equal to the specified threshold TH write , then clear Flag write , no processing is done.

[0264] Then, compare the access heat value of the currently accessed memory page with the specified threshold TH access Compare and process. The details are as follows:

[0265] Step 1) If the access heat value of the currently accessed memory page is greater than the specified threshold TH access If the memory is in the frequently accessed page list of the memory group, the access heat value of the page in the frequently accessed page list is updated and the page migration flag is cleared. access ;

[0266] If the access heat value of the currently accessed memory page is greater than the specified threshold TH access And the memory is not in the high-frequency access page list of the memory group:

[0267] If the number of linked list members has not reached the specified limit, the page migration flag is set. access Set it and record the page number of the memory page as the incoming memory page number. The outgoing memory page is empty.

[0268] If the number of linked list members has reached the specified limit, calculate the access heat values ​​of all members in the frequently accessed linked list and then compare them;

[0269] If the access heat value of the memory page is less than the access heat value of all members, the page migration flag is cleared. access ;

[0270] Otherwise, the page migration flag is setaccess Set, and record the page number of the memory page as the incoming memory page number, and the page with the minimum access heat value as the outgoing memory page number.

[0271] Step 3) If the access heat value of the currently accessed memory page is less than the specified threshold TH access , then clear the page migration flag Flag access , no processing is done.

[0272] Next, according to Flag write 、Flag access And the management information of the current memory page, determine whether the current page is a hot page and the migration strategy.

[0273] Specifically, read Flag write and Flag access The state of the memory page is read from the memory management information, along with the assigned minimum and maximum memory read / write attribute levels. The following judgment is then made:

[0274] Judgment 1: When Flag write 、Flag access When both are set, if the memory page does not belong to the DRAM and the specific bit of the memory address does not meet the specific value of the program group, then find a memory page whose memory address meets the program group requirements on the DRAM of the memory group, migrate the data to the page, and then complete the virtual-to-real address remapping work; update the memory page information changes to the memory management information.

[0275] At the same time, the new page information is updated to the high-frequency write access list and the high-frequency access linked list, and the read access statistic and the write access statistic are updated; otherwise, no processing is performed.

[0276] Judgment 2: When Flag write Set, Flag access When it is not set, if the memory page does not belong to DRAM, the memory page is searched from the DRAM of the memory group, the data is migrated to the page, and then the virtual-real address remapping work is completed; the memory page information changes are updated in the memory management information.

[0277] At the same time, the new page information is updated to the high-frequency write access list, and the read access statistic and write access statistic are updated; otherwise, no processing is performed.

[0278] Judgment 3: When Flag write Not set, Flag access When set, if the minimum memory read / write attribute level of the memory page allocation is greater than 4, it is determined whether the memory page belongs to DRAM and whether the specific bit of the memory address matches the specific value of the program group;

[0279] If both are true, no processing will be done;

[0280] Otherwise, search for a memory page on the memory group DRAM whose memory address meets the program grouping requirements, migrate the data to the page, complete the virtual-to-real address remapping, and then update the memory page information changes to the memory management information; at the same time, update the new page information to the high-frequency write access list and the high-frequency access linked list, and update the read access statistic and the write access statistic.

[0281] If the highest memory read / write attribute level of the memory page allocation is less than 5, determine whether the memory page belongs to NVM and whether the specific bit of the memory address matches the specific value of the program group;

[0282] If both are true, no processing will be done;

[0283] Otherwise, search for a memory page on the memory group DRAM whose memory address meets the program grouping requirements, migrate the data to the page, and then complete the virtual-to-real address remapping work. Then, update the memory page information changes to the memory management information, update the new page information to the high-frequency write access list and high-frequency access linked list, and update the read access statistic and write access statistic.

[0284] Other cases are not processed.

[0285] Judgment 4: When Flag write 、Flag write If neither bit is set, no processing will be performed.

[0286] In summary, the above hybrid memory system management method includes: DRAM-NVN memory grouping method, cache mapping rules, memory application allocation method, hot data page determination method and page migration method based on memory grouping;

[0287] The holistic management approach can address the performance optimization issues of DRAM-NVM hybrid memory systems based on horizontal architecture, fully considering the correlation between memory and cache;

[0288] This can reduce conflicts and interference in the memory system, accurately identify hot data, and migrate it to the appropriate memory bank to ensure the optimal performance of the hybrid memory system.

[0289] It should be noted that, although the steps in the flowchart are shown in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowchart may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0290] Example 2:

[0291] As shown in FIG5 , an embodiment of the present application further provides a hybrid memory system management device for implementing the aforementioned hybrid memory system management method; the device comprises:

[0292] The heat value acquisition unit is configured to: acquire a write heat value and an access heat value of a currently accessed memory page;

[0293] a write heat page migration flag information generating unit, configured to: compare the write heat value with a specified write heat threshold, and generate write heat page migration flag information;

[0294] The access popularity page migration flag information generating unit is configured to: compare the access popularity value with a specified access popularity threshold value and generate access popularity page migration flag information;

[0295] The hybrid memory grouping unit is configured to: group the hybrid memory in the hybrid memory system, and generate memory page management information corresponding to the hybrid memory according to the memory page information of all grouped memory banks; the data migration unit is configured to: determine whether the currently accessed memory page is a hot data page according to the write hot page migration flag information, the access hot page migration flag information, and the current memory page management information corresponding to the currently accessed memory page, and

[0296] In a preferred embodiment, the hybrid memory grouping unit includes:

[0297] A group memory bank division unit is configured to: divide the hybrid memory in the hybrid memory system into a plurality of group memory banks and group all the group memory banks according to a preset unified memory group capacity and a preset unified memory group memory ratio; wherein each group memory bank includes at least one dynamic random access memory area and at least one non-volatile memory area; and the preset unified memory group memory ratio is the ratio of the dynamic random access memory area to the non-volatile memory area in each group memory bank;

[0298] A memory page management information table generating unit is configured to: generate a memory page management information table corresponding to the hybrid memory based on the memory page information of all grouped memory banks; wherein the memory page management information table includes memory page attribute information, and the memory page attribute information includes the group memory bank group number, the minimum memory read / write attribute level, and the maximum memory read / write attribute level;

[0299] The memory group mapping relationship generation unit is configured to: obtain each program in the system and the designated group memory library corresponding to each program, and generate a memory group mapping relationship based on the program calibration information of each memory program and the group memory library group number of the designated group memory library corresponding to each memory program.

[0300] In a preferred embodiment, the management device further includes a memory application allocation unit, which is configured to:

[0301] Obtain memory allocation application parameters corresponding to the current memory program; wherein the memory allocation application parameters include memory read and write attribute level parameters;

[0302] Determine whether the memory read / write attribute level parameter reaches a preset read / write attribute level threshold;

[0303] If the number of memory blocks is reached, the memory area in the designated group memory bank corresponding to the current memory program is allocated to the current memory program according to a first memory allocation principle; wherein the first memory allocation principle is: giving priority to allocating dynamic random access memory areas, and allocating non-volatile memory areas when the dynamic random access memory areas are insufficient;

[0304] If not reached, the storage area in the designated group memory library corresponding to the current memory program is allocated to the current memory program according to the second memory allocation principle; wherein, the second memory allocation principle is: give priority to allocating non-volatile storage areas, and allocate write attribute memory areas when the non-volatile storage areas are insufficient.

[0305] In a preferred embodiment, the group memory bank partitioning unit is further configured to:

[0306] Addressing all group memory banks according to a preset addressing rule, and generating a group memory bank physical address corresponding to each group memory bank;

[0307] The management device further includes a cache address mapping unit, which is configured to:

[0308] The specific physical memory address allocation unit is configured to: obtain cache index bit information of each cache slice in the cache memory, and allocate hot data for storing a specific physical memory address to the cache slice of each specific cache index bit;

[0309] The cache physical address mapping relationship generating unit is configured to generate a cache physical address mapping relationship according to a specific physical memory address and the slice tag information of each cache slice.

[0310] In a preferred embodiment, the cache-physical address mapping relationship generating unit is further configured to:

[0311] Querying a specific cache slice corresponding to the specific physical memory address according to memory index bit information in the specific physical memory address; wherein the memory index bit information is matched one-to-one with the cache slice number;

[0312] When the memory mark bit information in the specific physical memory address matches the slice mark bit information in the specific cache slice, querying and obtaining the corresponding specific cache channel from the specific cache slice according to the memory mark bit information;

[0313] A cache-physical address mapping relationship is generated according to information of a specific physical memory address and a specific cache channel.

[0314] In a preferred embodiment, the memory application allocation unit is further configured to:

[0315] Obtain the current group memory bank corresponding to the current program according to the memory group mapping relationship, and obtain the current group memory bank memory page physical address corresponding to the current group memory bank;

[0316] Obtain the current memory mark bit information corresponding to the physical address of the memory page of the current group memory bank, and select a specific current memory page according to the current memory mark bit information;

[0317] The dynamic random access memory page corresponding to the current memory page is allocated to the frequently written data page of the current program; and the non-volatile memory page corresponding to the current memory page is allocated to the frequently read data page of the current program.

[0318] In a preferred embodiment, the memory group mapping relationship generating unit is further configured to:

[0319] Perform modulo calculation on the program ID information of each memory program and the total number of memory groups in all grouped memory libraries, use the modulo calculation result as the group memory library group number that each memory program can access, and group memory programs with the same modulo calculation result.

[0320] In a preferred embodiment, the data migration unit is further configured to:

[0321] When the write hot page migration flag information and the access hot page migration flag information are both set, if the currently accessed memory page does not belong to the dynamic random access storage area, and the specific bit of the memory address corresponding to the currently accessed memory page does not meet the specific value of the currently running program, then obtain the dynamic random access storage area of ​​the group memory library where the currently accessed memory page is located, and query the updated memory page whose memory address meets the program grouping requirements, and migrate the data to the updated memory page.

[0322] In a preferred embodiment, the data migration unit is further configured to:

[0323] When the write hot page migration flag information is set and the access hot page migration flag information is not set, if the currently accessed memory page does not belong to the dynamic random access storage area, the dynamic random access storage area of ​​the group memory library where the currently accessed memory page is located is obtained, and the updated memory page whose memory address meets the program grouping requirements is queried therefrom, and the data is migrated to the updated memory page.

[0324] In a preferred embodiment, the data migration unit is further configured to:

[0325] When the write hot page migration flag information is not set and the access hot page migration flag information is set, if the lowest memory read / write attribute level assigned to the currently accessed memory page is greater than the preset lowest memory read / write attribute level threshold, then determine whether the currently accessed memory page belongs to the dynamic random access memory area, and whether the specific bit of the memory address corresponding to the currently accessed memory page meets the specific value of the program group;

[0326] When at least one of them does not meet the requirements, the dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is searched therefrom, and the data is migrated to the updated memory page.

[0327] In a preferred embodiment, the data migration unit is further configured to:

[0328] When the write hot page migration flag information is not set and the access hot page migration flag information is set, if the highest memory read / write attribute level allocated to the currently accessed memory page is greater than the preset highest memory read / write attribute level threshold, then determine whether the currently accessed memory page belongs to the dynamic random access storage area, and whether the specific bit of the memory address corresponding to the currently accessed memory page meets the specific value of the program group;

[0329] When at least one of them does not meet the requirements, the dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is searched therefrom, and the data is migrated to the updated memory page.

[0330] In a preferred embodiment, the data migration unit is further configured to:

[0331] When the write hot page migration flag information and the access hot page migration flag information are both not set, the currently accessed memory page remains unchanged.

[0332] In a preferred embodiment, the heat value obtaining unit is further configured to:

[0333] The corresponding high-frequency write access page linked list and high-frequency access memory linked list are set according to the information of each group memory bank.

[0334] In a preferred embodiment, the write hot page migration flag information generation unit is further configured to:

[0335] If the write heat value is greater than the specified write heat threshold and the currently accessed memory page is in the high-frequency write access page linked list of the corresponding group memory library, the write heat page migration flag is cleared and the write heat page migration flag information is generated.

[0336] In a preferred embodiment, the write hot page migration flag information generation unit is further configured to:

[0337] If the write heat value is greater than the specified write heat threshold and the currently accessed memory page is not in the high-frequency write access page linked list of the corresponding group memory bank, then determine whether the number of members in the high-frequency write access page linked list reaches the specified threshold;

[0338] If the specified threshold is not reached, the write hot page migration flag is set and the write hot page migration flag information is generated;

[0339] If the specified threshold is reached, the write access heat values ​​of all members in the high-frequency write access page list and the write heat value corresponding to the currently accessed memory page are compared; when the write heat value is less than the write access heat value, the write heat page migration flag is cleared and the write heat page migration flag information is generated; when the write heat value is not less than the write access heat value, the write heat page migration flag is set and the write heat page migration flag information is generated.

[0340] In a preferred embodiment, the write hot page migration flag information generation unit is further configured to:

[0341] If the write heat value does not exceed the specified write heat threshold, the write heat page migration flag is cleared and write heat page migration flag information is generated.

[0342] In a preferred embodiment, the heat value acquisition unit is further configured to: calculate the write heat value of the currently accessed memory page by the following formula: write =a 11 f0+a 12 f1+a13 f2+a 14 f3+a 15 f4

[0343] in:

[0344] f0 is the ratio of write access requests to the page in M ​​times in the write access counter;

[0345] f1 is the ratio of write access requests to the page in the last N times in the write access counter;

[0346] f2 is the ratio of write access requests to the page in the last P times in the write access statistics;

[0347] f3 is the ratio of write access requests to the page in the last Q times in the write access statistics;

[0348] f4 is the ratio of write access requests to the page in the last R times in the write access counter;

[0349] a 11 、a 12 、a 13 、a 14 、a 15 is the weight parameter, a 11 +a 12 +a 13 +a 14 +a 15 =1;

[0350] The read access heat value of the currently accessed memory page is calculated using the following formula: Hot read =a 21 f'0+a 22 f'1+a 23 f'2+a 24 f'3+a 25 f'4

[0351] in:

[0352] f'0 is the ratio of read access requests to the page in M ​​times in the read access counter;

[0353] f'1 is the ratio of read access requests to the page in the last N times in the read access counter;

[0354] f'2 is the ratio of read access requests to the page in the last P times in the read access counter;

[0355] f'3 is the proportion of read access requests for this page in the last Q times in the read access statistics;

[0356] f'4 is the ratio of read access requests to the page in the last R times in the read access statistics;

[0357] a21 、a 22 、a 23 、a 24 、a 25 is the weight parameter, and a 21 +a 22 +a 23 +a 24 +a 25 =1;

[0358] The access heat value of the currently accessed memory page is calculated using the following formula: Hot access =Hot read+ Hot write .

[0359] In an actual embodiment, the management device of the hybrid memory system may include a memory management module, a memory allocation module, a program grouping module, a memory access statistics module, a memory access heat value calculation module, and a memory determination migration module.

[0360] The memory management module is mainly configured to: manage the mixed memory by page, and record the information, attributes and memory grouping relationship of each page of memory; the memory allocation module is mainly configured to: apply for and allocate memory for the program, and select appropriate memory from the mixed memory according to the application parameters to allocate to the program; the program grouping module is mainly configured to: group the application programs to reduce the conflict between different applications in the cache; the memory access statistics module is mainly configured to: record the data of the most recent 100 write access requests and 100 read access requests; the memory access heat value calculation module is mainly configured to: calculate the write access heat value and access heat value of the current page and the high-frequency access page list, and the page in the high-frequency write access page list according to the algorithm; the memory determination migration module is mainly configured to: determine whether the current page needs to be migrated according to the aforementioned algorithm, and perform migration-related actions.

[0361] For the specific definition of the above-mentioned device, please refer to the definition of the method above, which will not be repeated here.

[0362] Each module in the above-mentioned apparatus may be implemented in whole or in part by software, hardware, or a combination thereof. Each module may be embedded in or independent of a processor in a computer device in the form of hardware, or may be stored in a memory in the computer device in the form of software, so that the processor can call and execute the corresponding operations of each module.

[0363] As shown in FIG6 , the computer device may be a terminal comprising a processor, a memory, a network interface, a display screen, and an input device connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device comprises a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer-readable instructions. The internal memory provides an environment for the operation of the operating system and computer-readable instructions in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. The display screen of the computer device may be a liquid crystal display or an electronic ink display screen, and the input device of the computer device may be a touch layer covering the display screen, or a button, trackball, or touchpad provided on the housing of the computer device, or an external keyboard, touchpad, or mouse.

[0364] It will be understood that the structure shown in the above figure is merely a block diagram of a portion of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different arrangement of components.

[0365] The implementation of all or part of the processes in the above-mentioned embodiment methods can be completed by instructing related hardware through computer-readable instructions. The computer-readable instructions can be stored in a non-volatile computer-readable storage medium. When the computer-readable instructions are executed, they can include the processes of the embodiments of the above-mentioned methods.

[0366] Among them, any reference to memory, storage, database or other media used in the various embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0367] It should be noted that the above are only preferred embodiments of the present application and the technical principles employed. Those skilled in the art will understand that the present application is not limited to the specific embodiments herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present application. Therefore, although the present application has been described in more detail through the above embodiments, the present application is not limited to the above embodiments and may include more other equivalent embodiments without departing from the scope of the present application. The scope of the present application is determined by the scope of the appended claims.

Claims

1. A management method for a hybrid memory system, characterized in that: include: Get the write heat value and access heat value of the currently accessed memory page; Compare the write heat value with a specified write heat threshold, and generate write heat page migration flag information; Compare the access heat value with a specified access heat threshold, and generate access heat page migration flag information; Grouping the hybrid memories in the hybrid memory system, and generating memory page management information corresponding to the hybrid memories according to memory page information of all grouped memory banks; and According to the write hot page migration flag information, the access hot page migration flag information, and the current memory page management information corresponding to the currently accessed memory page, determine whether the currently accessed memory page is a hot data page, and perform data migration according to the preset hot and cold data page migration strategy.

2. The hybrid memory system management method according to claim 1, characterized in that: The hybrid memories in the hybrid memory system are grouped, and memory page management information corresponding to the hybrid memories is generated according to memory page information of all grouped memory banks, including: According to a preset unified memory group capacity and a preset unified memory group memory ratio, the hybrid memory in the hybrid memory system is divided into a plurality of group memory banks, and all the group memory banks are grouped; wherein each group memory bank includes at least one dynamic random access storage area and at least one non-volatile storage area; the preset unified memory group memory ratio is the ratio of the dynamic random access storage area and the non-volatile storage area in each group memory bank; Generate memory page management information corresponding to the hybrid memory according to the memory page information of all grouped memory banks; wherein the memory page management information includes memory page attribute information, and the memory page attribute information includes the group memory bank group number, the lowest memory read / write attribute level, and the highest memory read / write attribute level; and Each program in the system and the designated group memory library corresponding to each program are obtained, and a memory group mapping relationship is generated according to the program calibration information of each memory program and the group memory library group number of the designated group memory library corresponding to each memory program.

3. The hybrid memory system management method according to claim 2, characterized in that: The method further comprises: Obtaining memory allocation application parameters corresponding to the current memory program; wherein the memory allocation application parameters include memory read and write attribute level parameters; Determining whether the memory read / write attribute level parameter reaches a preset read / write attribute level threshold; and In response to the memory read / write attribute level parameter reaching a preset read / write attribute level threshold, a storage area in a designated group memory library corresponding to the current memory program is allocated to the current memory program according to a first memory allocation principle; wherein the first memory allocation principle is: giving priority to allocating a dynamic random access storage area, and allocating a non-volatile storage area when the dynamic random access storage area is insufficient; In response to the memory read-write attribute level parameter not reaching a preset read-write attribute level threshold, a storage area in a designated group memory library corresponding to the current memory program is allocated to the current memory program according to a second memory allocation principle; wherein the second memory allocation principle is: giving priority to allocating non-volatile storage areas, and allocating write attribute memory areas when non-volatile storage areas are insufficient.

4. The hybrid memory system management method according to claim 2, characterized in that: Group all group memory banks, including: Addressing all the group memory banks according to the preset addressing rules, and generating the group memory bank physical addresses corresponding to each group memory bank respectively; The method further comprises: Obtaining cache index bit information of each cache slice in the cache memory, and allocating a cache slice of each specific cache index bit for storing hot data of a specific physical memory address; and A cache physical address mapping relationship is generated according to the specific physical memory address and the slice tag information of each cache slice.

5. The hybrid memory system management method according to claim 4, characterized in that: Generating a cache physical address mapping relationship specifically includes: Querying the specific cache slice corresponding to the specific physical memory address according to the memory index bit information in the specific physical memory address; wherein the memory index bit information matches the cache slice number one by one; In response to the memory mark bit information in the specific physical memory address matching the slice mark bit information in the specific cache slice, querying and obtaining a corresponding specific cache way from the specific cache slice according to the memory mark bit information; and The cache-physical address mapping relationship is generated according to the specific physical memory address and information of the specific cache channel.

6. The hybrid memory system management method according to claim 3, characterized in that: The method further comprises: Acquire the current group memory bank corresponding to the current program according to the memory group mapping relationship, and acquire the physical address of the memory page of the current group memory bank corresponding to the current group memory bank; Obtaining current memory mark bit information corresponding to the physical address of the memory page of the current group memory bank, and selecting a specific current memory page according to the current memory mark bit information; and The dynamic random access memory page corresponding to the current memory page is allocated to the frequently written data page of the current program; and the non-volatile memory page corresponding to the current memory page is allocated to the frequently read data page of the current program.

7. The hybrid memory system management method according to claim 2, characterized in that: Generate memory group mapping relationships, including: Perform modulo calculations on the program ID information of each memory program and the total number of memory groups in all grouped memory libraries, use the modulo calculation results as the group memory library group numbers that each memory program can access, and group memory programs with the same modulo calculation results.

8. The hybrid memory system management method according to claim 2, characterized in that: Data migration is performed according to the preset hot and cold data page migration strategy, including: In response to the write hot page migration flag information and the access hot page migration flag information being set, if the currently accessed memory page does not belong to the dynamic random access storage area, and the specific bit of the memory address corresponding to the currently accessed memory page does not conform to the specific value of the currently running program, the dynamic random access storage area of ​​the grouped memory library where the currently accessed memory page is located is obtained, and an updated memory page whose memory address conforms to the program grouping requirements is queried therefrom, and the data is migrated to the updated memory page.

9. The hybrid memory system management method according to claim 2, characterized in that: Data migration is performed according to the preset hot and cold data page migration strategy, including: In response to the write hot page migration flag information being set, and the access hot page migration flag information being not set, if the currently accessed memory page does not belong to the dynamic random access storage area, the dynamic random access storage area of ​​the grouped memory library where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is queried therefrom, and the data is migrated to the updated memory page.

10. The hybrid memory system management method according to claim 2, characterized in that: Data migration is performed according to the preset hot and cold data page migration strategy, including: In response to the write hot page migration flag information not being set and the access hot page migration flag information being set, if the lowest memory read / write attribute level assigned to the currently accessed memory page is greater than a preset lowest memory read / write attribute level threshold, determining whether the currently accessed memory page belongs to a dynamic random access storage area, and whether a specific bit of a memory address corresponding to the currently accessed memory page conforms to a specific value of a program group; and In response to at least one of them not being in compliance, the dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is searched therefrom, and the data is migrated to the updated memory page.

11. The hybrid memory system management method according to claim 2, characterized in that: Data migration is performed according to the preset hot and cold data page migration strategy, including: In response to the write hot page migration flag information not being set and the access hot page migration flag information being set, if the highest memory read / write attribute level assigned to the currently accessed memory page is greater than a preset highest memory read / write attribute level threshold, determining whether the currently accessed memory page belongs to a dynamic random access storage area, and whether a specific bit of a memory address corresponding to the currently accessed memory page conforms to a specific value of a program group; and In response to at least one of them not being in compliance, the dynamic random access storage area of ​​the group memory bank where the currently accessed memory page is located is obtained, and an updated memory page whose memory address meets the program grouping requirements is searched therefrom, and the data is migrated to the updated memory page.

12. The hybrid memory system management method according to claim 1, characterized in that: Data migration is performed according to the preset hot and cold data page migration strategy, including: In response to the fact that both the write hot page migration flag information and the access hot page migration flag information are not set, the currently accessed memory page is kept unchanged.

13. The hybrid memory system management method according to claim 1, characterized in that: Before obtaining the write heat value and the access heat value of the currently accessed memory page, the method further includes: The corresponding high-frequency write access page linked list and high-frequency access memory linked list are set according to the information of each group memory bank.

14. The hybrid memory system management method according to claim 13, characterized in that: Comparing the write heat value with a specified write heat threshold, and generating write heat page migration flag information, including: In response to the write heat value being greater than the specified write heat threshold and the currently accessed memory page being located in a high-frequency write access page linked list of a corresponding group memory library, a write heat page migration flag is cleared and the write heat page migration flag information is generated.

15. The hybrid memory system management method according to claim 13, characterized in that: Comparing the write heat value with a specified write heat threshold, and generating write heat page migration flag information, including: In response to the write heat value being greater than the specified write heat threshold and the currently accessed memory page not being in the high-frequency write access page linked list of the corresponding group memory bank, determining whether the number of members in the high-frequency write access page linked list reaches a specified threshold; In response to the specified threshold not being reached, setting a write hot page migration flag and generating the write hot page migration flag information; and In response to the specified threshold being reached, the write access heat values ​​of all members in the high-frequency write access page list and the write heat value corresponding to the currently accessed memory page are compared; in response to the write heat value being less than the write access heat value, the write heat page migration flag is cleared and the write heat page migration flag information is generated; in response to the write heat value being not less than the write access heat value, the write heat page migration flag is set and the write heat page migration flag information is generated.

16. The hybrid memory system management method according to claim 13, characterized in that: Comparing the write heat value with a specified write heat threshold, and generating write heat page migration flag information, including: In response to the write heat value not exceeding the specified write heat threshold, a write heat page migration flag is cleared and the write heat page migration flag information is generated.

17. The hybrid memory system management method according to claim 1, characterized in that: Get the write heat value and access heat value of the currently accessed memory page, including: The write heat value of the currently accessed memory page is calculated using the following formula: Hotwrite=a11f0+a12f1+a13f2+a14f3+a15f4 in: f0 is the proportion of write access requests to the page in M ​​times in the write access counter; f1 is the proportion of write access requests to the page in the most recent N times in the write access statistics; f2 is the proportion of write access requests to the page in the most recent P times in the write access statistics; f3 is the proportion of write access requests to the page in the most recent Q times in the write access counter; f4 is the proportion of write access requests to the page in the most recent R times in the write access statistics; a11, a12, a13, a14, a15 are weight parameters, a11+a12+a13+a14+a15=1; The read access heat value of the currently accessed memory page is calculated by the following formula: Hotread=a21f'0+a22f'1+a23f'2+a24f'3+a25f'4, where: f'0 is the proportion of read access requests to this page in M ​​times in the read access counter; f'1 is the proportion of read access requests for this page in the most recent N times in the read access statistics; f'2 is the proportion of read access requests for this page in the most recent P times in the read access statistics; f'3 is the proportion of read access requests for this page in the most recent Q times in the read access counter; f'4 is the proportion of read access requests for this page in the most recent R times in the read access statistics; a21, a22, a23, a24, a25 are weight parameters, and a21+a22+a23+a24+a25=1; The access heat value of the currently accessed memory page is calculated by the following formula: Hotaccess=Hotread+Hotwrite.

18. A management device for a hybrid memory system, characterized in that: Used to implement the management method of the hybrid memory system according to any one of claims 1 to 17; the management device comprises: The heat value acquisition unit is configured to: acquire a write heat value and an access heat value of a currently accessed memory page; A write heat page migration flag information generating unit is configured to: compare the write heat value with a specified write heat threshold value, and generate write heat page migration flag information; The access heat page migration mark information generating unit is configured to: compare the access heat value with the specified access heat threshold value, and generate the access heat page migration mark information; A hybrid memory grouping unit, configured to: group the hybrid memories in the hybrid memory system, and generate memory page management information corresponding to the hybrid memories according to memory page information of all grouped memory banks; and The data migration unit is configured to: determine whether the currently accessed memory page is a hot data page based on the write hot page migration flag information, the access hot page migration flag information, and the current memory page management information corresponding to the currently accessed memory page, and perform data migration according to the preset hot and cold data page migration strategy.

19. A computer device comprising a memory, a processor and computer-readable instructions, wherein the computer-readable instructions are stored in the memory and can be executed on the processor, wherein: When the processor executes the computer-readable instructions, the processor implements the steps of the hybrid memory system management method according to any one of claims 1 to 17.

20. One or more non-volatile computer-readable storage media storing computer-readable instructions, wherein when the computer-readable instructions are executed by one or more processors, the one or more processors execute the steps of the hybrid memory system management method according to any one of claims 1 to 17.

21. A hybrid memory system, characterized in that: Including hybrid memory; the hybrid memory is managed by the management method of the hybrid memory system as described in any one of claims 1-17.

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