Memory partition reading method, memory and electronic equipment

Abstract

The invention relates to a memory partition reading method, a memory and electronic equipment, the memory comprises at least two storage areas, and different firmware configuration information is stored in the at least two storage areas respectively; the method comprises the following steps: acquiring a configuration demand; and reading firmware configuration information from one storage area according to the configuration requirement. The data structure of one memory is divided into a plurality of storage areas, so that one memory can store configuration information of a plurality of pieces of firmware, the memory utilization rate of the memory is improved, idleness and waste of storage space are avoided, meanwhile, the number of storage board cards and design of additional lines are reduced, the reliability and use consistency of the board cards are improved, and the cost is reduced. And hardware cost and operation and maintenance cost are saved. Moreover, through the memory and the method in the embodiment, multiple pieces of firmware configuration information can be stored in the memory, the configuration information does not need to be stored in an additional space of the controller, and the memory pressure of the controller is reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of data storage, and in particular to a memory partition reading method, a memory, and an electronic device. Background Art

[0002] In today's digital age, electronic devices have become an indispensable tool in people's lives and work, and memory plays a vital role in these devices. Memory is the memory center of electronic devices, responsible for storing various data, program codes, system configurations and other key information. The quality of its design and application methods are directly related to the overall performance of the device.

[0003] With the development of technology, the capacity and requirements of devices for memory are getting higher and higher. The traditional storage mode can no longer meet the growing storage demand. Therefore, improving the capacity utilization of memory has become an urgent need for current technological development. Summary of the invention

[0004] To solve the above technical problems, the present disclosure provides a memory partition reading method, wherein the memory includes at least two storage areas, and at least two of the storage areas respectively store different firmware configuration information; the method includes: obtaining configuration requirements; and reading firmware configuration information from one of the storage areas according to the configuration requirements.

[0005] On the other hand, the memory includes a first storage area and a second storage area, the reading priority of the first storage area is higher than the reading priority of the second storage area, the first storage area stores first firmware configuration information, and the second storage area stores second firmware configuration information; reading firmware configuration information from one of the storage areas according to the configuration requirement includes: when the configuration requirement is the second firmware configuration information, replacing the first firmware configuration information in the first storage area with the second firmware configuration information; reading the second firmware configuration information from the first storage area.

[0006] On the other hand, reading the second firmware configuration information from the first storage area includes: reading the second firmware configuration information from the first storage area through a controller; after replacing the first firmware configuration information in the first storage area with the second firmware configuration information, the method also includes: restarting the controller.

[0007] On the other hand, reading the second firmware configuration information from the first storage area includes: reading the second firmware configuration information from the first storage area through a controller; after replacing the first firmware configuration information in the first storage area with the second firmware configuration information, the method also includes: restarting the memory reading program of the controller.

[0008] On the other hand, replacing the first firmware configuration information in the first storage area with the second firmware configuration information includes: modifying part of the data in the first firmware configuration information that is different from the second firmware configuration information, so that the firmware configuration information stored in the first storage area is the same as the second firmware configuration information.

[0009] On the other hand, the memory further includes a third storage area, in which the first firmware configuration information is stored.

[0010] On the other hand, the firmware configuration information includes version verification data, and the version verification data in different firmware configuration information is different.

[0011] On the other hand, the memory is an electrically erasable programmable read-only memory.

[0012] In order to solve the above technical problems, the present disclosure further provides a memory, including at least two storage areas, at least two of which respectively store different firmware configuration information; different firmware configuration information respectively corresponds to different configuration requirements.

[0013] In order to solve the above technical problems, the present disclosure also provides an electronic device, comprising any one of the above-mentioned memories and a controller, wherein the controller is used to execute any one of the above-mentioned memory partition reading methods.

[0014] The present disclosure divides the data structure of a memory into multiple storage areas, so that the configuration information of multiple firmware can be stored in one memory, and then the configuration information of multiple firmware can be read from one memory through the above partition reading method, thereby improving the memory utilization of the memory, avoiding idleness and waste of storage space, and reducing the number of storage boards and the design of additional lines, improving the reliability and consistency of boards, and saving hardware costs and operation and maintenance costs. In addition, through the memory and method of the above embodiment, multiple firmware configuration information can be stored in the memory, without using the extra space of the controller to store the configuration information, reducing the memory pressure of the controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0017] Figure 1 A schematic diagram of a frame structure of a memory provided in an embodiment of the present disclosure;

[0018] Figure 2 A schematic diagram of an internal data structure of a memory provided by an embodiment of the present disclosure;

[0019] Figure 3 A schematic diagram of a flow chart of a memory partition reading method provided in an embodiment of the present disclosure;

[0020] Figure 4 A schematic diagram of the internal data structure of a second memory provided by an embodiment of the present disclosure;

[0021] Figure 5 A schematic diagram of the framework structure of a second memory provided in an embodiment of the present disclosure;

[0022] Figure 6 A schematic diagram of the internal data structure of a third memory provided in an embodiment of the present disclosure;

[0023] Figure 7 A schematic diagram of a topological relationship between a memory and an external module provided in an embodiment of the present disclosure;

[0024] Figure 8 A schematic diagram of the framework structure of a third memory provided in an embodiment of the present disclosure;

[0025] Fig. 9 A schematic flow chart of a second memory partition reading method provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0026] In order to more clearly understand the above-mentioned purposes, features and advantages of the embodiments of the present disclosure, the scheme of the embodiments of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features therein can be combined with each other without conflict.

[0027] In the following description, many specific details are set forth to facilitate a full understanding of the embodiments of the present disclosure, but the embodiments of the present disclosure may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0028] Memory is usually used in electronic devices and servers to implement FRU (Field Replaceable Unit) or FW (Firmware) functions. When implementing the FRU function, the memory is mainly used to store key information that does not need to be changed during the entire life cycle of the device, such as hardware specifications, manufacturer information, board SN (Serial Number) and PN (Part Number) information, etc., which can be used for subsequent asset management of the device and board information tracing.

[0029] When implementing the FW function, the memory can be used in embedded systems to store configuration data, calibration information, user settings, etc., and can also be used to store firmware information of the controller chip (including firmware function configuration, firmware working status configuration, etc.).

[0030] Regarding the FW function of the memory, in the related technology, the memory is mounted under the controller. When the controller is turned on, it will directly read and load the firmware information stored in the memory. After loading, the controller will work normally according to the preset mode. Based on this related technology, a memory can usually only store the configuration information of one firmware. When the controller needs multiple firmwares to run, different circuit boards need to be added to manage the memory. Multiple firmwares and multiple boards increase the operation and maintenance costs and hardware costs, and also lead to low board reuse rates, while causing waste of free storage areas in the memory. If the firmware information is directly integrated into the controller, it will also cause a waste of controller resources.

[0031] To solve the problem of single storage area used for FW storage, Figure 1 A schematic diagram of a memory structure provided by an embodiment of the present disclosure is shown. Figure 2 The internal data structure of a memory provided by the embodiment of the present disclosure is shown. Figure 1 and Figure 2 As shown, the memory 10 includes at least two storage areas SA, and different firmware configuration information CFG is respectively stored in the at least two storage areas SA.

[0032] Specifically, Figure 2 A memory with a capacity of 256 bytes is shown, wherein at least two storage areas SA specifically include a first storage area SA1 and a second storage area SA2, wherein the first storage area SA1 stores first firmware configuration information FW1_CFG of the first firmware FW1, and the second storage area SA2 stores second firmware configuration information FW2_CFG of the second firmware FW2. Figure 2 As shown, the memory 10 includes data addresses 00000000h to 000000f0h, and the specific location of each storage area SA in the memory can be marked by the first row of data addresses of the storage area SA.

[0033] The location in the memory where no data is written can be called a redundant bit. The memory in the related art only includes a storage redundant area consisting of continuous redundant bits. In the memory provided in the embodiment of the present disclosure, Figure 2 As shown, since the capacity of each storage area SA is usually not fully occupied, each storage area SA includes redundant bits FF, and thus the data structure of the memory provided by the embodiment of the present disclosure includes multiple redundant storage areas composed of redundant bits FF.

[0034] Understandably, Figure 1 and Figure 2 This is only an example. In a specific implementation, the number of storage areas SA divided in the memory is not limited to two, and can be determined according to the size of the firmware configuration information CFG and the total capacity of the memory, all within the protection scope of the present disclosure.

[0035] Figure 3 A schematic diagram of a memory partition reading method provided by an embodiment of the present disclosure is shown. Figure 3 As shown, the method includes:

[0036] S1. Obtain configuration requirements.

[0037] S2. Read firmware configuration information from a storage area according to configuration requirements.

[0038] Specifically, the method provided by the embodiment of the present disclosure can be executed by a controller or by other external modules, without further limitation. The external module has a communication connection relationship with the memory, and the external module obtains the firmware configuration requirements after startup. For example, the current configuration requirement of the external module is the first firmware FW1 or the second firmware FW2. At the same time, in order to facilitate the reading of the external module, the memory stores the correspondence between different firmware configuration information CFG and different storage areas SA, so that after the external module obtains the configuration requirements, it can determine in which storage area SA the required configuration information is located, and then read it. In specific implementation, when reading the memory, the external device can use the reading of at least one redundant bit FF as a mark to terminate the reading, so as to only read the firmware configuration information in one storage area SA.

[0039] The disclosed embodiment divides the data structure of a memory into multiple storage areas, so that the configuration information of multiple firmware can be stored in one memory, and then the configuration information of multiple firmware can be read from one memory through the above partition reading method, thereby improving the memory utilization of the memory, avoiding idleness and waste of storage space, and reducing the number of storage boards and the design of additional lines, improving the reliability and consistency of boards, and saving hardware costs and operation and maintenance costs. In addition, through the memory and method of the above embodiment, multiple firmware configuration information can be stored in the memory, without using the additional space of the external module to store the configuration information, reducing the memory pressure of the controller.

[0040] In specific implementation, the memory partition reading method can be executed by a controller in an electronic system or a commonly used embedded system. In the server field, the controller can be specifically a BMC (Baseboard Management Controller, server management chip). The following embodiments are similar and will not be described in detail.

[0041] In some embodiments, the memory is an Electrically Erasable Programmable Read-Only Memory (EEPROM).

[0042] EEPROM is a non-volatile memory chip that can save data after power failure and can erase and write data through electrical signals. The number of erase and write operations can usually reach tens of thousands or even hundreds of thousands of times, and it has a long service life. EEPROM has a fast data reading speed and is widely used in various electronic devices, such as the BIOS (Basic Input Output System) chip on the computer motherboard, which is used to store the hardware configuration information required for system startup; in smart meters, EEPROM can be used to store important data such as calibration parameters; in embedded systems, EEPROM can be used to store device configuration information and key data, providing strong support for the normal operation of the device and the persistent storage of data.

[0043] In other embodiments, the memory may also be a programmable ROM (PROM), an erasable programmable ROM (EEPROM) or an electrically alterable ROM (EAROM). Those skilled in the art can apply the above embodiments of the present disclosure to other memory scenarios, which are all within the protection scope of the present disclosure.

[0044] In the above embodiment, the external module (such as the above controller) can dynamically read and load the firmware configuration information directly from the corresponding storage area, but in the related art, due to functional limitations, the external module starts from a fixed position (such as the first data) by default when reading the memory, which also causes the problem in the related art that one memory can only carry one firmware configuration information.

[0045] In view of this, based on Figure 1 and Figure 2 The memory structure shown (the first storage area SA1 and the second storage area SA2, the first storage area SA1 stores the first firmware configuration information FW1_CFG of the first firmware FW1, and the second storage area SA2 stores the second firmware configuration information FW2_CFG of the second firmware FW2), in some embodiments, the reading priority of the first storage area SA1 is higher than the reading priority of the second storage area SA2, that is, when the external module (such as the above-mentioned controller) reads the data in the memory, it will give priority to reading the firmware configuration information in the first storage area SA1 compared to the second storage area SA2. In a specific embodiment, the memory includes three or more storage areas SA, and the first storage area SA1 can be the storage area SA with the highest reading priority among all storage areas SA.

[0046] It should be noted that in the embodiment provided by the present disclosure, after the external device reads the firmware configuration information in the storage area SA with the highest priority, it will not continue to read the firmware configuration information in other storage areas SA. The "priority" here is only used to limit the external device to read one of the storage areas SA in priority among multiple storage areas SA, and it is not limited to the storage area SA that needs to be read later.

[0047] Meanwhile, the above S2 includes:

[0048] S21. When the configuration requirement is the second firmware configuration information FW2_CFG, and the firmware configuration information stored in the first storage area SA1 is the first firmware configuration information FW1_CFG, the first firmware configuration information FW1_CFG in the first storage area SA1 is replaced with the second firmware configuration information FW2_CFG. Figure 4 Shows Figure 2 The internal data structure of the memory after executing the above S21 is shown. The configuration information replacement process may specifically be to first erase the first firmware configuration information FW1_CFG in the first storage area SA1, and then write the second firmware configuration information FW2_CFG from the second storage area SA2 to the first storage area SA1.

[0049] S22, read the second firmware configuration information FW2_CFG from the first storage area SA1. Then the external module can obtain the second firmware configuration information FW2_CFG by directly reading the memory.

[0050] In a specific implementation, the external module may be configured to preferentially read data from a certain data address (equivalent to a certain storage area SA), for example, Figure 2 and Figure 4 In the illustrated embodiment, the data address of the first storage area SA1 includes the first data address, and the external module is configured to read data from the first data address by default. In other embodiments, the first storage area SA1 is located at other locations in the memory. In this case, the data address read by the external module by default can be adjusted according to the location of the first storage area SA1, all of which are within the protection scope of the present disclosure.

[0051] In a specific embodiment, the above S2 also includes: if the firmware configuration information currently stored in the first storage area SA1 is the first firmware configuration information FW1_CFG, and the configuration requirement is the first firmware configuration information FW1_CFG, there is no need to erase and write the memory, and the first firmware configuration information FW1_CFG can be directly read from the first storage area SA1.

[0052] In some embodiments, the process of replacing the first firmware configuration information FW1_CFG in the first storage area SA1 with the second firmware configuration information FW2_CFG in S21 specifically includes:

[0053] Part of the data in the first firmware configuration information FW1_CFG that is different from the second firmware configuration information FW2_CFG is modified so that the firmware configuration information CFG stored in the first storage area SA1 is the same as the second firmware configuration information FW2_CFG.

[0054] Specifically, the basis for determining whether certain data in two firmware configuration information are the same includes data position and data content. Only when the data position and data content are the same can they be regarded as the same data, and there is no need to repeat the erasing and writing operation.

[0055] During the erasing and writing process of the memory, the physical structure of its internal storage unit will change. Taking the ROM in the related art as an example, during erasing, electrons will move between the floating gate layer and the substrate of the storage unit, and this process will cause certain damage to the insulating medium of the floating gate layer. The integrity of the insulating medium is the key to ensuring the stability and accuracy of data storage. As the number of erasures increases, the insulating medium gradually ages and degrades, the risk of electron leakage increases, and data is prone to errors. Moreover, frequent erasures will also change the transistor characteristics of the storage unit, affecting its read and write performance. Therefore, reducing the number of erasures of the ROM can effectively reduce damage to the internal structure, maintain its good storage performance, and thus extend the service life of the ROM. In the above-mentioned embodiment of the present disclosure, during the erasure of the firmware configuration information, only part of the data is modified, thereby reducing the number of erasures of some data storage locations, thereby extending the service life of the memory.

[0056] In a specific implementation, the first firmware configuration information FW1_CFG stored in the first storage area SA1 may be the most commonly used firmware configuration information of the external module, which further reduces the number of times the firmware configuration information is erased and written, thereby further extending the service life of the memory.

[0057] Since the first firmware configuration information FW1_CFG stored in the first storage area SA1 will be erased after executing the above S21, in order to ensure the validity of the first firmware FW1 in the subsequent work of the external module, the memory 10 provided in the embodiment of the present disclosure also includes a third storage area SA3. Figure 5 FIG. 4 shows a schematic diagram of the memory structure in the embodiment. Figure 6 The internal data structure of the memory in this embodiment is shown as Figure 5 and Figure 6 As shown, the third storage area SA3 stores the first firmware configuration information FW1_CFG.

[0058] In specific implementation, after executing the above S21, the firmware configuration information stored in the first storage area SA1 is the second firmware configuration information FW2_CFG. The method provided by the embodiment of the present disclosure also includes: when the configuration requirement is the first firmware configuration information FW1_CFG, the second firmware configuration information FW2_CFG in the first storage area SA1 is replaced with the first firmware configuration information FW1_CFG stored in the third storage area SA3.

[0059] In one embodiment, in the method of the above embodiment, the step of reading the second firmware configuration information from the first storage area includes: reading the second firmware configuration information from the first storage area by a controller. In specific implementation, the method of the above embodiment can be executed by a controller.

[0060] In the related art, since a memory only stores the configuration information of one firmware, after the controller is started, it will directly read the configuration information once from the corresponding memory according to the firmware configuration requirements, and will not read it repeatedly; but in the embodiment provided in the present disclosure, taking the above-mentioned S21 as an example, it is necessary to erase and write the contents of the memory, and the erase operation will interrupt the reading operation of the controller, resulting in the controller not reading the contents from the memory after the required firmware configuration information is erased.

[0061] In view of this, after S21 and before S22, the method provided in the embodiment of the present disclosure further includes: restarting the controller, or restarting the memory reading program of the controller, so that the controller reloads the memory reading program. After the controller is reloaded, the firmware configuration information required by the controller has been written into the storage area with the highest reading priority in the memory, and there is no need to perform an erase and write operation on the memory, and the controller can directly read the required firmware configuration information.

[0062] Specifically, the operation of restarting the controller can be regarded as a hard restart, that is, restarting the entire controller. If the controller is regarded as a computer, a hard restart is equivalent to restarting the entire computer. In specific implementation, the hard restart operation can be performed by sending a reset signal to the reset pin of the controller chip, or by powering off and on. Those skilled in the art can select a suitable hard restart method according to the actual application scenario of the controller, and no further limitation is given here.

[0063] Specifically, the operation of restarting the memory reading program of the controller can be regarded as a soft restart, that is, restarting some modules in the controller, and the controller always remains in the startup state. If the controller is regarded as a computer, the soft restart is equivalent to restarting a software in the computer. In specific implementation, the soft restart operation can be achieved by sending a software restart code to the controller. Those skilled in the art can select a suitable soft restart method according to the actual application scenario of the controller, which is not limited here.

[0064] In some embodiments, Figure 2 , Figure 4 and Figure 6 As shown, each firmware configuration information CFG includes at least one byte of version verification data VCD, and the version verification data VCD in different firmware configuration information CFG is different. Figure 2 , Figure 4 and Figure 6 As shown, the version verification data VCD may be the last bit of data in each firmware configuration information CFG.

[0065] Specifically, since multiple firmware configuration information CFG are stored in a memory in the embodiment of the present disclosure, in order to avoid confusion between the firmware configuration information, the version verification data VCD can be used by the external module to verify whether the firmware configuration information CFG is the correct firmware configuration information during the reading process and subsequent work, thereby ensuring the normal operation of the firmware.

[0066] At the same time, in order to facilitate external module reading, the memory stores the correspondence between different firmware configuration information CFG and different storage areas SA. Specifically, the correspondence between the firmware configuration information CFG and the storage area SA can be the correspondence between the version verification data VCD in the firmware configuration information CFG and the storage area SA.

[0067] The present disclosure also provides a specific embodiment, in which the above-mentioned memory and the reading method thereof are used for the controller to switch between different network configuration requirements. Figure 7 The topological relationship between the memory and the external module in a specific embodiment of the present disclosure is shown.

[0068] like Figure 7 As shown, the external module includes a controller 20, specifically a control module 21 and a network switch 22. The control module 21 is connected to the memory 10 through the network switch 22 to jointly control the read and write operations of the memory 10. Specifically, the controller 20 can be the execution subject of the method provided in the above embodiment, and the control module 21 can be the BMC in the above embodiment. The control module 21 and the network switch 22 can communicate with PHY (Physical) through RGMII (Reduced Gigabit Media Independent Interface), and the network switch 22 and the memory 10 can communicate through I2C (Inter-Integrated Circuit, serial communication bus). The control module 21 can communicate with the memory 10 through the above interface and the network switch 22, and perform read and write operations on the memory 10. The network switch 22 is also connected to the RJ45 network cable through MDI (Medium Dependent Interface).

[0069] like Figure 7 As shown, the controller 20 includes two control modules 21 and is connected to two network nodes (i.e., RJ45 network cables). At this time, the controller 20 may have multiple network configuration requirements, and then have multiple firmware configuration requirements. For example, whether the two network nodes of the controller 20 need to be isolated corresponds to two different firmware configuration requirements, and whether a single network node of the controller 20 can access two control modules 21 corresponds to another firmware configuration requirement.

[0070] In specific implementation, any control module 21 may obtain the configuration requirements in the above embodiment through the network switch 22, taking the configuration requirements of network isolation / non-isolation as an example, Figure 8 The framework structure of the memory 10 in a specific embodiment of the present disclosure is shown. The specific data structure can be referred to in Figure 2 , Figure 4 as well as Figure 6 In the illustrated embodiment, as shown in the figure, the memory includes a first storage area SA1, a second storage area SA2, a third storage area SA3 and a fourth storage area SA4, wherein the reading priority of the first storage area SA1 is higher than that of the second storage area SA2, the third storage area SA3 and the fourth storage area SA4, the first storage area SA1 stores first firmware configuration information FW1_CFG of the first firmware FW1, the second storage area SA2 stores second firmware configuration information FW2_CFG of the second firmware FW2, the third storage area SA3 stores third firmware configuration information FW3_CFG of the third firmware FW3, and the fourth storage area SA4 stores fourth firmware configuration information FW4_CFG of the fourth firmware FW4.

[0071] Fig. 9 A schematic diagram of a controller partition reading method in a specific embodiment of the present disclosure is shown. Fig. 9 As shown, after powering on, the control module 21 determines the current network status configuration requirements, specifically, whether the network needs to be isolated. If the network needs to be isolated, the firmware corresponding to the configuration requirement is determined to be the second firmware FW2, and the second firmware configuration information FW2_CFG located in the second storage area SA2 is written into the first storage area SA1; if the network does not need to be isolated, the firmware corresponding to the configuration requirement is determined to be the third firmware FW3, and the third firmware configuration information FW3_CFG located in the third storage area SA3 is written into the first storage area SA1. The controller 20 is soft-restarted or hard-restarted as described above, so that the controller 20 reloads and reads the firmware configuration information in the memory 10. At this time, the controller 20 reads the firmware configuration information corresponding to the configuration requirement located in the first storage area SA1.

[0072] The memory partition reading method provided by the embodiment of the present disclosure has a wide range of applications, and is not limited to the specific field of server whole machine design. In similar scenarios corresponding to many embedded designs, this method can also play an important role and achieve good results. Whether it is a small embedded device or other complex systems, the method provided by the embodiment of the present disclosure can achieve efficient and accurate data reading, thereby improving overall performance and operating efficiency, and providing a flexible and reliable memory reading solution for various embedded application scenarios.

[0073] It should be noted that the method of the embodiment of the present application can be performed by a single device, such as a single controller. The method of the present embodiment can also be applied to a distributed scenario, and multiple devices cooperate with each other to complete it, such as the above-mentioned control module and the network switch. In the case of such a distributed scenario, one of the multiple devices can only perform one or more steps in the method of the embodiment of the present application, and the multiple devices will interact with each other to complete the above method.

[0074] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0075] Based on the same inventive concept, corresponding to any of the above embodiments and methods, the present application also provides a memory, such as Figure 1 and Figure 2 As shown, the memory includes at least two storage areas SA, and different firmware configuration information CFG is respectively stored in the at least two storage areas SA, and different firmware configuration information CFG corresponds to different configuration requirements.

[0076] Specifically, Figure 2 A memory with a capacity of 256 bytes is shown, wherein at least two storage areas SA specifically include a first storage area SA1 and a second storage area SA2, wherein the first storage area SA1 stores first firmware configuration information FW1_CFG of the first firmware FW1, and the second storage area SA2 stores second firmware configuration information FW2_CFG of the second firmware FW2. Figure 2 As shown, the memory includes data addresses 00000000h to 000000f0h, and the specific location of each storage area SA in the memory can be marked by the first row of data addresses of the storage area SA.

[0077] The location in the memory where no data is written can be called a redundant bit. The memory in the related art only includes a storage redundant area consisting of continuous redundant bits. In the memory provided in the embodiment of the present disclosure, Figure 2 As shown, since the capacity of each storage area SA is usually not fully occupied, each storage area SA includes redundant bits FF, and thus the data structure of the memory provided by the embodiment of the present disclosure includes multiple redundant storage areas composed of redundant bits FF.

[0078] The disclosed embodiment divides the data structure of a memory into multiple storage areas, so that the configuration information of multiple firmware can be stored in one memory, and then the configuration information of multiple firmware can be read from one memory through the above partition reading method, thereby improving the memory utilization of the memory, avoiding idleness and waste of storage space, and reducing the number of storage boards and the design of additional lines, improving the reliability and consistency of boards, and saving hardware costs and operation and maintenance costs. In addition, through the memory and method of the above embodiment, multiple firmware configuration information can be stored in the memory, without using the additional space of the external module to store the configuration information, reducing the memory pressure of the controller.

[0079] In some embodiments, the memory provided by the embodiments of the present disclosure is an Electrically Erasable Programmable Read-Only Memory (EEPROM).

[0080] EEPROM is a non-volatile memory chip that can save data after power failure and can erase and write data through electrical signals. The number of erase and write operations can usually reach tens of thousands or even hundreds of thousands of times, and it has a long service life. EEPROM has a fast data reading speed and is widely used in various electronic devices, such as the BIOS (Basic Input Output System) chip on the computer motherboard, which is used to store the hardware configuration information required for system startup; in smart meters, EEPROM can be used to store important data such as calibration parameters; in embedded systems, EEPROM can be used to store device configuration information and key data, providing strong support for the normal operation of the device and the persistent storage of data.

[0081] In other embodiments, the memory may also be a programmable ROM (PROM), an erasable programmable ROM (EEPROM) or an electrically alterable ROM (EAROM). Those skilled in the art can apply the above embodiments of the present disclosure to other memory scenarios, which are all within the protection scope of the present disclosure.

[0082] The memory provided in the embodiment of the present disclosure may refer to the memory in the above method embodiment and has the beneficial effects of the corresponding embodiment, which will not be described in detail here.

[0083] The memory provided by the embodiment of the present disclosure can be read by the memory partition reading method in the above embodiment, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0084] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments and methods, the present application also provides an electronic device, including the memory and controller in any of the above-mentioned embodiments, wherein the controller is used to execute the memory partition reading method in any of the above-mentioned embodiments.

[0085] The disclosed embodiment divides the data structure of a memory into multiple storage areas, so that the configuration information of multiple firmware can be stored in one memory, and then the configuration information of multiple firmware can be read from one memory through the above partition reading method, thereby improving the memory utilization of the memory, avoiding idleness and waste of storage space, and reducing the number of storage boards and the design of additional lines, improving the reliability and consistency of boards, and saving hardware costs and operation and maintenance costs. In addition, through the memory and method of the above embodiment, multiple firmware configuration information can be stored in the memory, without using the additional space of the external module to store the configuration information, reducing the memory pressure of the controller.

[0086] The memory and controller provided in the embodiments of the present disclosure may refer to the above-mentioned method embodiments and have the beneficial effects of the corresponding embodiments, which will not be described in detail here.

[0087] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "including a..." do not exclude the existence of other identical elements in the process, method, article or device including the above elements.

[0088] The above are only specific embodiments of the present disclosure, which enable those skilled in the art to understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to the embodiments described above, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A memory partition reading method, characterized in that: The memory comprises at least two storage areas, and different firmware configuration information is respectively stored in at least two of the storage areas; The method comprises: Get configuration requirements; Firmware configuration information is read from one of the storage areas according to the configuration requirement.

2. The method according to claim 1, characterized in that The memory includes a first storage area and a second storage area, the reading priority of the first storage area is higher than the reading priority of the second storage area, the first storage area stores first firmware configuration information, and the second storage area stores second firmware configuration information; The step of reading firmware configuration information from one of the storage areas according to the configuration requirements includes: When the configuration requirement is the second firmware configuration information, replacing the first firmware configuration information in the first storage area with the second firmware configuration information; The second firmware configuration information is read from the first storage area.

3. The method according to claim 2, characterized in that The reading the second firmware configuration information from the first storage area includes: Reading the second firmware configuration information from the first storage area through a controller; After replacing the first firmware configuration information in the first storage area with the second firmware configuration information, the method further includes: Restart the controller.

4. The method according to claim 2, characterized in that: The reading the second firmware configuration information from the first storage area includes: Reading the second firmware configuration information from the first storage area through a controller; After replacing the first firmware configuration information in the first storage area with the second firmware configuration information, the method further includes: Restart the memory read procedure of the controller.

5. The method according to claim 2, characterized in that: The replacing the first firmware configuration information in the first storage area with the second firmware configuration information includes: Modify a portion of data in the first firmware configuration information that is different from the second firmware configuration information, so that the firmware configuration information stored in the first storage area is the same as the second firmware configuration information.

6. The method according to claim 2, characterized in that The memory further includes a third storage area, in which the first firmware configuration information is stored.

7. The method according to claim 1, characterized in that The firmware configuration information includes version verification data, and the version verification data in different firmware configuration information is different.

8. The method according to claim 1, characterized in that The memory is an electrically erasable programmable read-only memory.

9. A memory, characterized in that: comprising at least two storage areas, wherein different firmware configuration information is respectively stored in at least two of the storage areas; Different firmware configuration information corresponds to different configuration requirements.

10. An electronic device, characterized in that: The method comprises the memory as claimed in any one of claims 1 to 8 and a controller, wherein the controller is used to execute the method as claimed in any one of claims 1 to 8.

Images