Test method, device, system and equipment for memory fault recovery function and storage medium

By establishing a communication connection between the test platform and the substrate management controller, using the substrate management controller to pass test parameters to the operating system, and performing memory error repair during the power-on self-test phase, the problem of cumbersome and low efficiency of testing memory fault repair functions in the existing technology is solved, and a more efficient testing process is achieved.

CN119883772APending Publication Date: 2025-04-25INSPUR SUZHOU INTELLIGENT TECH CO LTD

Patent Information

Application Number
CN202510125755.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-27
Publication Date
2025-04-25

AI Technical Summary

Technical Problem

The methods for testing memory fault repair functions in the prior art are cumbersome and low-efficiency, and require multiple restarts of the server and collecting BIOS serial port information for comparison and analysis.

Method used

By establishing a communication connection between the test platform and the substrate management controller, the substrate management controller is used to pass the test parameters to the operating system, and memory error repair is performed during the POST phase. After that, the system event log in the substrate management controller is obtained to determine whether the memory repair function is operating normally.

Benefits of technology

Simplifies the test steps, reduces the number of server restarts, and improves the testing efficiency, without the need to obtain and compare BIOS serial port information multiple times.

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Abstract

The invention discloses a test, device, system and equipment for a memory fault recovery function and a storage medium, and relates to the technical field of servers. In the whole test process, a user only needs to complete the test triggering operation, and does not need to acquire serial port information for many times for contrastive analysis, so that the operation steps are simple, and errors are not easy to occur; and in the whole test process, the operating system only needs to be restarted once, and finally, whether the memory fault repair function is normally operated or not is determined by obtaining the system event log in the substrate management controller, so that the test efficiency of the memory fault repair function is high.
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Description

Technical Field

[0001] The present application relates to the field of server technology, and in particular to a method, device, system, equipment and storage medium for testing a memory fault repair function. Background Art

[0002] With the rapid development of server technology, the requirements for memory hardware and software technology are also increasing. Among them, the memory fault repair function can repair memory row and bit faults during the power-on self-check phase, reduce the memory failure rate, and thus ensure the stable operation of the server.

[0003] In the related art, when testing the memory fault repair function, the server needs to be restarted multiple times, and the BIOS (Basic Input Output System) serial port information before and after the test needs to be collected, and then compared and analyzed to determine whether the memory fault repair function is normal. Therefore, the memory fault repair function testing method in the related art has the problems of cumbersome steps and low efficiency. Summary of the invention

[0004] The present application provides a method, apparatus, system, device and storage medium for testing a memory fault repair function, so as to at least solve the problem that the method for testing a memory fault repair function in the related art has complicated steps and low efficiency.

[0005] In a first aspect, the present application provides a method for testing a memory fault repair function, the method being applied to a test platform, the method comprising:

[0006] In response to receiving a test trigger operation input by a user through an input device, sending a test parameter to a baseboard management controller;

[0007] In response to receiving the parameter correctness information sent by the baseboard management controller, an operating system restart instruction is sent to the baseboard management controller; the operating system restart instruction is used to control the operating system to restart, so that during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters;

[0008] In response to receiving the self-test completion information sent by the baseboard management controller, sending a system event log acquisition instruction to the baseboard management controller;

[0009] Based on the received system event log sent by the baseboard management controller, it is determined whether there is a memory repair success log, and if so, the test success information is displayed.

[0010] In a second aspect, the present application further provides a method for testing a memory fault repair function, the method being applied to a baseboard management controller, the method comprising:

[0011] In response to receiving the test parameters sent by the test platform, verifying the test parameters;

[0012] In response to the test parameter verification being passed, sending parameter correctness information to the test platform;

[0013] In response to receiving an operating system restart instruction sent by the test platform, the operating system is controlled to restart; during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters;

[0014] In response to determining that the power-on self-test phase is completed, sending self-test completion information to the test platform;

[0015] In response to receiving the system event log acquisition instruction sent by the test platform, the system event log is sent to the test platform.

[0016] In a third aspect, the present application further provides a memory fault repair function test device, the memory fault repair function test device is located in a test platform, and the device includes:

[0017] A test parameter sending module, configured to send a test parameter to a baseboard management controller in response to receiving a test trigger operation input by a user through an input device;

[0018] The system restart sending module is used to send an operating system restart instruction to the baseboard management controller in response to receiving the parameter correctness information sent by the baseboard management controller; the operating system restart instruction is used to control the operating system to restart, so that during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters;

[0019] A log acquisition instruction sending module, configured to send a system event log acquisition instruction to the baseboard management controller in response to receiving self-test completion information sent by the baseboard management controller;

[0020] The determination module is used to determine whether there is a memory repair success log based on the received system event log sent by the baseboard management controller, and if so, display the test success information.

[0021] In a fourth aspect, the present application further provides a memory fault repair function test device, the memory fault repair function test device is located in a baseboard management controller, and the device includes:

[0022] A verification module, configured to verify the test parameters in response to receiving the test parameters sent by the test platform;

[0023] A verification result sending module, used for sending parameter correctness information to the test platform in response to the test parameter verification being passed;

[0024] A control module, configured to control the operating system to restart in response to receiving an operating system restart instruction sent by the test platform; so that during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters;

[0025] A self-test completion sending module, used for sending self-test completion information to the test platform in response to determining that the power-on self-test phase is completed;

[0026] The log sending module is used to send the system event log to the test platform in response to receiving the system event log acquisition instruction sent by the test platform.

[0027] In a fifth aspect, the present application also provides a testing system, comprising:

[0028] A test platform, a baseboard management controller, a basic input-output system and an operating system, wherein the test platform is in communication connection with the baseboard management controller, and the baseboard management controller, the basic input-output system and the operating system are in communication connection with each other;

[0029] The test platform is used to send test parameters to the baseboard management controller according to the test trigger operation input by the user through the input device;

[0030] The baseboard management controller is used to verify the test parameters and send parameter correctness information to the test platform after the test parameters are verified;

[0031] The test platform is also used to send an operating system restart instruction to the baseboard management controller according to the parameter correctness information;

[0032] The baseboard management controller is also used to control the operating system to restart according to the operating system restart instruction;

[0033] Basic input and output system, used to repair memory errors based on test parameters during the power-on self-test phase after the operating system restarts;

[0034] The baseboard management controller is further used to send self-test completion information to the test platform according to the operating system restart completion information;

[0035] The test platform is also used to send a system event log acquisition instruction to the baseboard management controller according to the self-test completion information;

[0036] The baseboard management controller is further used to obtain instructions according to the system event log and send the system event log to the test platform;

[0037] The test platform is also used to determine whether there is a memory repair success log based on the system event log. If so, the test success information is displayed.

[0038] In the sixth aspect, the present application also provides an electronic device, comprising: a memory for storing computer programs; an input device for inputting test trigger operations; an output device for displaying test success information; and a processor for implementing the steps of the test method for the memory fault repair function of any one of the first and second aspects mentioned above when executing the computer program.

[0039] In the seventh aspect, the present application also provides a computer-readable storage medium, in which a computer program is stored, wherein when the computer program is executed by a processor, the steps of the test method for the memory fault repair function of any one of the first and second aspects mentioned above are implemented.

[0040] In an eighth aspect, the present application further provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the test method for the memory fault repair function of any one of the first and second aspects mentioned above.

[0041] Through the test method of the memory fault repair function provided by the present application, during the entire test process, the user only needs to perform a test trigger operation, and there is no need to obtain serial port information multiple times for comparative analysis, so that the operation steps are simple and less prone to errors; and during the entire test process, the operating system only needs to be restarted once, and finally determines whether the memory fault repair function is operating normally by obtaining the system event log in the baseboard management controller, so that the test efficiency of the memory fault repair function is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0043] Figure 1 An application scenario diagram corresponding to a test method for a memory fault repair function provided in an embodiment of the present application;

[0044] Figure 2 A flowchart of a method for testing a memory fault repair function provided in one embodiment of the present application;

[0045] Figure 3 A flowchart of a method for testing a memory fault repair function provided by another embodiment of the present application;

[0046] Figure 4 A schematic diagram of the structure of a test device for a memory fault repair function provided in one embodiment of the present application;

[0047] Figure 5 A schematic diagram of the structure of a memory fault repair function testing device provided in yet another embodiment of the present application;

[0048] Figure 6 A schematic diagram of the structure of a test system provided in one embodiment of the present application;

[0049] Figure 7 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0050] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0051] It should be noted that, in the description of this application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0052] In order to facilitate those skilled in the art to better understand the present application, first of all, the professional terms appearing in the present application are explained:

[0053] BMC (Baseboard Management Controller): BMC is an embedded system management software that runs independently of the server's operating system. It is mainly used to monitor the server's hardware status, power management, remote access and control functions.

[0054] OS (Operation System): The operating system is the basic software of the computer, responsible for managing the hardware and software resources of the computer and providing an interface for users to interact with the computer. The main functions of the operating system include processor management, storage management, device management, file management and user interface.

[0055] BIOS (Basic Input / Output System): BIOS is the bridge between computer hardware and operating system. It is responsible for initializing hardware, loading operating system and boot program when the computer starts.

[0056] PPR (Post Package Repair): PPR is a technology that repairs faults in memory particles after packaging. It allows a specific fault address to be repaired after a fault is found in the memory. PPR technology is mainly divided into HPPR (Hard PPR) and SPPR (Soft PPR). The memory fault repair function mentioned in this application refers to the PPR function.

[0057] SPPR (Soft Post Package Repair): is a repair method in PPR technology. It mainly repairs single-bit failures or row failures in memory and is a fast but temporary repair method. Compared with HPPR, SPPR does not physically change the state of memory particles, but only repairs the fault through logical remapping.

[0058] HPPR (Hard Post Package Repair): is a repair method in PPR technology. Unlike SPPR, HPPR is a permanent and irreversible repair method. It repairs memory failures by physical means and remaps the faulty address to a redundant row.

[0059] MMBI (Memory-Mapped BMC Interface): MMBI is an interface specification for communication between platform components. It mainly defines the communication mechanism between host software (such as the operating system kernel) and the baseboard management controller. Through memory mapping, MMBI allows data packets to be exchanged between communication devices and supports efficient data transmission.

[0060] SMI (System Management Interrupt): SMI is an interrupt signal generated by hardware to notify the operating system or system management software to perform system management operations. SMI is usually used to handle tasks related to power management, thermal management, hardware error detection, etc.

[0061] SEL (System Event Log): SEL is a log used by the system to record system events and error information. It usually contains information about hardware failures, software errors, system startup and shutdown events, etc.

[0062] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0063] With the rapid development of server technology, the requirements for memory hardware and software technology are also constantly increasing. Among them, the fault repair function of the memory (i.e., PPR technology) can repair the row and bit faults of the memory during the power-on self-check phase, reduce the memory failure rate, and thus ensure the stable operation of the server. In the related art, when testing the fault repair function of the memory, it is necessary to first set the parameters of the BIOS, and then collect the serial port information of the BIOS after restarting the server; then, use the debugging tools and scripts to simulate the memory failure. After the memory failure simulation, it is necessary to restart the server again, and then collect the serial port information of the BIOS again, and check and compare the serial port information of the BIOS to determine whether the memory repair function is normal. It can be seen that in the related art, the server needs to be restarted multiple times, and the BIOS serial port information before and after the test needs to be collected, and then compared and analyzed to determine whether the memory fault repair function is normal. Therefore, the method for testing the memory fault repair function in the related art has the problems of cumbersome steps and low efficiency.

[0064] Therefore, in the face of the above technical problems, in order to simplify the steps of the method for testing the memory fault repair function and improve the test efficiency. First, multiple restarts of the server should be avoided, and secondly, multiple collection and comparison of BIOS serial port information should be avoided to improve the test efficiency. Specifically, by communicating with the test tool and the baseboard management controller, the baseboard management controller is used as a data transfer station, and the test parameters sent by the test tool are passed to the operating system through the baseboard management controller, and the memory error repair is completed through the interaction between the baseboard management controller, the operating system and the basic input and output system, and then the baseboard management controller is used to obtain the system event log, so as to determine whether there is a memory repair log in the system event log, and then determine whether the memory repair function can operate normally.

[0065] Figure 1 An application scenario diagram corresponding to the test method for the memory fault repair function provided in an embodiment of the present application. Figure 1As shown, the application scenario provided by this embodiment includes: an input device 10 , a test platform 20 , and a baseboard management controller 30 . The input device 10 is communicatively connected to the test platform 20 , and the test platform 20 is communicatively connected to the baseboard management controller 30 . Specifically, when a memory fault repair function test is required, the user inputs a test trigger operation to the test platform 20 through the input device 10. After the test platform 20 recognizes the test trigger, it sends a test parameter to the baseboard management controller 30; the baseboard management controller 30 receives the test parameter and verifies the test parameter. After the test parameter verification is passed, the baseboard management controller 30 sends parameter correctness information to the test platform 20. After the test platform 20 receives the parameter normal information, it sends an operating system restart instruction to the baseboard management controller 30. The operating system restart instruction is used to control the operating system to restart, so that during the power-on self-test phase after the operating system restarts, the basic input and output system repairs memory errors based on the test parameters; after the operating system restart is completed, the baseboard management controller 30 sends self-test completion information to the test platform 20. When the test platform 20 receives the self-test completion information sent by the baseboard management controller 30, it sends a system event log acquisition instruction to the baseboard management controller 30; after receiving the system event log acquisition instruction, the baseboard management controller 30 sends a system event log to the test platform 20; the test platform 20 determines whether there is a memory repair success log based on the received system event log, and if so, displays the test success information. Thus, the user can know that the memory fault repair function can operate normally according to the displayed test success information.

[0066] Figure 2 A flowchart of a method for testing a memory fault repair function provided in an embodiment of the present application. The embodiment of the present application can be applied to Figure 1 The test platform 20 in the embodiment can be a server or a terminal device. The execution subject of this embodiment is a test device for memory fault repair function, which can be implemented by a computer program; it can also be implemented by a medium storing relevant computer programs, such as a USB flash drive and / or a CD, or it can also be implemented by a physical device integrated or installed with relevant computer programs, such as a chip or an electronic device. The electronic device can be a computer or a server, such as Figure 2 As shown, the test method of the memory fault repair function specifically includes the following steps:

[0067] Step S201 : in response to receiving a test trigger operation input by a user through an input device, sending a test parameter to a baseboard management controller.

[0068] Specifically, when a memory fault repair function test is required, the user inputs a test trigger operation on the test platform through an input device, thereby triggering the test platform to send a test parameter to the baseboard management controller.

[0069] The test parameters are parameters used to test the memory fault repair function, and the test parameters can determine the particle location for performing memory fault repair. Optionally, the test parameters can be preset by the user in the test platform, or can be temporarily input into the test platform through an input device by the user during the test. Exemplarily, the test parameters include but are not limited to:

[0070] Socket refers to the physical location where the memory module is inserted into the motherboard. In memory testing, the Socket parameter is usually used to specify the memory slot to be tested; Memory Controller is the hardware component responsible for managing and controlling memory access. In the test parameters, Memory Controller is used to specify the memory controller to be tested; Channel is used to specify the memory channel to be tested in the test parameters; Slot is used to specify the specific memory slot to be tested in the test parameters; Rank refers to a group of memory chips in the memory architecture. In the test parameters, Rank is used to specify the rank to be tested; Device is used to specify the memory chip or device to be tested in the test parameters; Bank Group: Memory bank group is a concept in memory architecture, which is used to divide memory into multiple independent banks for parallel access. In the test parameters, BankGroup is used to specify the bank group to be tested. Bank: Memory bank is an independent unit in memory architecture, which is used to store data. In the test parameters, Bank is used to specify the specific memory bank to be tested. Row: Memory row is one of the basic units for storing data in memory chip. In the test parameters, Row is used to specify the memory row to be tested. Column: Memory column is the basic unit corresponding to memory row, which is used to organize data in memory. In the test parameters, Column is used to specify the memory column to be tested.

[0071] The input device is a device that the user triggers the test platform to send test parameters, and can also allow the user to input parameters into the test platform. Optionally, the input device can be a keyboard, a mouse, or a touch screen, etc. Correspondingly, the test trigger operation can be clicking a button, inputting a command, or selecting a menu item. In this embodiment, the input device and the test trigger operation are not specifically limited.

[0072] Specifically, in this embodiment, the Redfish interface is set on both the test platform and the baseboard management controller. Redfish is based on the HTTPS / SSL (Secure Sockets Layer) standard and provides a more universal, more secure and more auditable network transmission protocol. Of course, the test platform can also establish a communication connection with the baseboard management controller through communication protocols such as IPMI (Intelligent Platform Management Interface) and SNMP (Simple Network Management Protocol).

[0073] Step S202, in response to receiving the parameter correctness information sent by the baseboard management controller, sending an operating system restart instruction to the baseboard management controller; the operating system restart instruction is used to control the operating system to restart, so that during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters.

[0074] Specifically, when the test platform receives the correct parameter information sent by the baseboard management controller, it indicates that the test parameters are accurate and the subsequent test process can be carried out. At this time, the test platform sends an operating system restart instruction to the baseboard management controller. The operating system restart instruction will trigger the operating system restart process so as to perform memory error repair during the power-on self-test phase. During the power-on self-test phase, the basic input and output system will check the memory errors according to the test parameters and repair them through the memory fault repair function.

[0075] The parameter correctness information is information sent by the baseboard management controller, which is used to indicate that the test parameters sent by the test platform are accurate and can be used for subsequent test processes. Optionally, the parameter correctness information can have multiple forms of expression, such as a status code, a hash value, etc. In this embodiment, the parameter correctness information is not specifically limited.

[0076] The operating system restart instruction is an instruction sent by the test platform to the baseboard management controller to trigger the restart process of the operating system. The instruction usually includes specific parameters or requirements for restarting, such as whether to save the current state, whether to enter the safe mode, etc. Optionally, the operating system restart instruction can be a command line instruction, such as shutdown-r; or a scripting language. In this embodiment, the operating system restart instruction is not specifically limited.

[0077] The POST phase is a series of self-checking steps that the server performs during startup.

[0078] The self-test phase includes checking hardware connections, verifying hardware configuration, initializing memory, and loading the basic input and output system.

[0079] Step S203: in response to receiving the self-test completion information sent by the baseboard management controller, sending a system event log acquisition instruction to the baseboard management controller.

[0080] Specifically, the baseboard management controller can monitor the status of the operating system. When the baseboard management controller determines that the operating system has been restarted and the power-on self-test phase has been completed, it will send self-test completion information to the test platform. After the test platform receives the self-test completion information sent by the baseboard management controller, it will send a system event log acquisition instruction to the baseboard management controller to obtain the system event log in the baseboard management controller.

[0081] The self-test completion information is information sent by the baseboard management controller to the test platform to indicate that the memory error repair process has been completed. Optionally, the format of the self-test completion information has multiple options, such as a simple text message, a data packet in XML or JSON format, etc.

[0082] The system event log acquisition instruction is an instruction sent by the test platform to the baseboard management controller to obtain the system event log in the baseboard management controller. Optionally, the system event log acquisition instruction can have multiple forms, such as a simple command string, such as "GET_SEL" or "RETRIEVE_EVENT_LOG"; calling these APIs through HTTP requests to obtain the system event log; or a structured data format, etc. Specifically, in this embodiment, the form of the system event log acquisition instruction is not limited.

[0083] Among them, the System Event Log (SEL) is a log mechanism used in computer systems to record important system events and hardware status changes, including errors during the power-on self-test (POST), hardware failures, temperature warnings, power events, security-related events, etc. The system event log is usually maintained and managed by the baseboard management controller (BMC).

[0084] Optionally, in the non-testing stage, the test platform may also acquire the system event log in the server based on the user triggering a system event log acquisition instruction through an input device.

[0085] Step S204: determine whether there is a memory repair success log based on the received system event log sent by the baseboard management controller, and if so, display test success information.

[0086] Specifically, after the test platform receives the system event log, it also needs to analyze the system event log to find out whether there is a successful memory repair log. The system event log may contain detailed information about successful repair, failed repair, or memory errors that need further inspection. If the test platform finds a successful memory repair record in the system event log, it indicates that the memory fault repair function is running normally. At this time, the test platform displays the test success information to the user.

[0087] The test success information may be a dialog box popping up on the user interface, an email being sent, or a report being generated.

[0088] Optionally, if the test platform finds a record of repair failure or no record of successful modification in the system event log, it indicates that the memory fault repair function has not been successfully executed. At this time, the test platform can display the test failure information to the user, so that the user can perform the test operation again or replace the memory.

[0089] Optionally, there are multiple ways to determine whether there is a successful memory repair log based on the system event log, for example, by searching for keywords related to memory repair in the system event log, such as "memory repair", "repair success", "memory error", etc.; or, analyzing the event type and status field in the log entry to determine whether the memory repair is successful. This is not limited in this embodiment.

[0090] Specifically, the test method of the memory fault repair function provided by the present embodiment sends test parameters to the baseboard management controller after receiving the test trigger operation of the user; when the baseboard management controller returns the correct parameter information, it sends the operating system restart instruction to the baseboard management controller to restart the operating system, so that, in the power-on self-test stage, the basic input and output system can perform memory error repair according to the test parameters; when the restart is completed, it indicates that the memory detection is completed, and based on the self-test completion information sent by the baseboard management controller, a system event log acquisition instruction is sent to the baseboard management controller to obtain the system event log, and it is determined whether there is a memory repair success log according to the obtained system event log. If so, it indicates that the memory fault repair function is running normally, and the test success information is displayed at this time. Therefore, in the entire test process, the user only needs to perform the test trigger operation, and there is no need to obtain information for comparison and analysis multiple times. The operation steps are simple and it is not easy to make mistakes. In the entire test process, the operating system is only restarted once, and the test efficiency is high.

[0091] As an optional implementation manner, based on any of the above embodiments, determining whether there is a memory repair success log based on the received system event log sent by the baseboard management controller includes:

[0092] A search is performed in the system event log based on a preset search keyword; the preset search keyword is memory repair success; in response to determining that there is a system event log matching the preset search keyword, it is determined that there is a memory repair success log.

[0093] Specifically, when determining whether there is a successful memory repair log based on the system event log received from the baseboard management controller; a search is performed in the system event log according to a preset search keyword in the test platform, and the preset search keyword is: "memory repair successful"; when it is determined that a system event log matches the preset search keyword, it indicates that there is a successful memory repair log.

[0094] The preset search keywords are words preset by the user for searching whether there is a successful memory repair log. Optionally, in addition to "successful memory repair", other search keywords may be preset, such as "memory repair", "successful repair", "no memory error", etc. With this setting, even if a log entry does not directly use the "successful memory repair" field, as long as it contains other keywords related to successful memory repair, it can be retrieved, thus ensuring the accuracy of the search.

[0095] The memory repair success log is a log containing information such as the successfully repaired memory address, repair time, and repair strategy used.

[0096] Optionally, all system event logs may be searched by text matching algorithms, regular expression matching or other efficient string search techniques.

[0097] Optionally, after the memory repair success log is retrieved, the memory repair success log is displayed.

[0098] Specifically, the test method for the memory fault repair function provided in this embodiment searches the system event log by using a preset search keyword, and when it is determined that there is a system event log matching the preset search keyword, it is determined that there is a memory repair success log. Thus, it is possible to efficiently and accurately query whether there is a memory repair success log.

[0099] As an optional implementation manner, based on any of the above embodiments, in response to receiving a test trigger operation input by a user through an input device, before sending the test parameters to the baseboard management controller, the method further includes:

[0100] A memory information viewing request is sent to a baseboard management controller; in response to receiving the memory information sent by the baseboard management controller, the memory information is displayed, and the memory information is used to determine the test parameters.

[0101] Specifically, before the user triggers the test through the input device, the user can first send a memory information viewing request to the baseboard management controller, and the test platform receives and displays the memory information. Thus, the user can intuitively understand the memory status information, so that the user can determine the test parameters that need to be input through the input device.

[0102] The memory information viewing request is a request sent by the test platform to the baseboard management controller, which is used to request the baseboard management controller to return the memory status information of the current system. Optionally, the memory information viewing request can be a simple command line instruction or query string.

[0103] It should be noted that after receiving the request, the baseboard management controller will query the memory status of the current system and return the memory information to the test platform.

[0104] The memory information includes but is not limited to the serial number, capacity, speed, manufacturer, installation location, health status, etc. of the memory module. After receiving the memory information, the test platform will display it on the user interface for users to view and analyze.

[0105] It should be noted that after the test platform displays the memory information, the user can determine the test parameters more accurately based on the displayed memory information to avoid the situation where the memory to be tested does not exist.

[0106] Optionally, before displaying the memory information, the test platform can pre-process the acquired memory information so that it is easier for users to understand and analyze. For example, information such as the serial number, capacity, and speed of the memory module can be presented in a table format, or a graphical representation of the memory health status can be provided, such as a bar chart or a pie chart.

[0107] Specifically, the test method for the memory fault repair function provided in this embodiment allows the test platform to send a memory information viewing request to the baseboard management controller before triggering the test operation; thereby, the memory information is obtained and displayed so that the user can clearly know the memory status and determine accurate test parameters.

[0108] Figure 3 A flowchart of a method for testing a memory fault repair function provided in another embodiment of the present application. The embodiment of the present application can be applied to Figure 1 The baseboard management controller 30 in the embodiment can be a server or a terminal device. The execution subject of this embodiment is a test device for memory fault repair function, which can be implemented by a computer program; it can also be implemented by a medium storing relevant computer programs, such as a USB flash drive and / or a CD, or it can also be implemented by a physical device integrated or installed with relevant computer programs, such as a chip or an electronic device. The electronic device can be a computer or a server, such as Figure 3 As shown, the test method of the memory fault repair function specifically includes the following steps:

[0109] Step S301: In response to receiving the test parameters sent by the test platform, verify the test parameters.

[0110] Specifically, after the baseboard management controller receives the test parameters from the test platform, first, the test parameters need to be verified to avoid performing invalid test processes and ensure the accuracy of the test results.

[0111] Optionally, the parameter verification process includes but is not limited to checking the integrity, format correctness, and value range rationality of the parameters, for example, verifying whether the test parameters contain illegal memory addresses or exceed the memory capacity supported by the system.

[0112] Step S302: In response to the test parameter verification being passed, parameter correctness information is sent to the test platform.

[0113] Specifically, when the test parameters are verified, the baseboard management controller will send a parameter correct information to the test platform. The parameter correct information is a confirmation signal, indicating that the test parameters have been verified by the baseboard management controller and are ready for the next step of operation.

[0114] The parameter correctness information is used to indicate that the test parameters sent by the test platform are accurate and can be used in subsequent test processes. Optionally, the parameter correctness information can have multiple forms of expression, such as a status code, a hash value, etc. In this embodiment, the parameter correctness information is not specifically limited.

[0115] Optionally, if the test parameter verification fails, a parameter error message is sent to the test platform, thereby prompting the user that there is an error in the test parameter, so that the user can correct the erroneous parameter immediately.

[0116] Step S303, in response to receiving the operating system restart instruction sent by the test platform, control the operating system to restart; in the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters.

[0117] Specifically, after receiving the operating system restart instruction sent by the test platform, the baseboard management controller will control the operating system to restart. In the power-on self-test phase after the restart, the basic input and output system will perform memory error repair according to the test parameters received previously.

[0118] Optionally, the repair process may include steps such as detecting memory errors, locating the error locations, and attempting to repair or isolate the error memory regions.

[0119] Optionally, the operating system restart is a hot restart, that is, WarmReset. WarmReset does not clear data in the system memory, which means that data such as running processes and open files usually remain unchanged, which can reduce the probability of data loss and shorten the time of operating system restart.

[0120] It should be noted that before testing, the basic input and output system needs to be set up to confirm that the PPR-related functions are turned on. When HPPR needs to be tested, confirm that the option PPR Type is set to Hard PPR; when SPPR needs to be tested, set it to Soft PPR.

[0121] Step S304: In response to determining that the power-on self-test phase is completed, sending self-test completion information to the test platform.

[0122] Specifically, when the baseboard management controller determines that the power-on self-test phase of the operating system is completed, it will send a self-test completion message to the test platform, so that the test platform knows that the operating system has been restarted and the memory fault repair has been completed, so that the test platform can perform subsequent operations.

[0123] Optionally, the self-test completion information may also include the specific time when the self-test was completed, the number of memory errors detected, the memory area that was successfully repaired, etc., so that the test platform can better understand the health status and repair effect of the memory.

[0124] Step S305: In response to receiving the system event log acquisition instruction sent by the test platform, send the system event log to the test platform.

[0125] Specifically, when the test platform requests a system event log, the baseboard management controller sends the system event log to the test platform. The system event log may include a log of a memory error repair result.

[0126] It should be noted that the baseboard management controller can regularly archive and back up the system event log to prevent data loss or damage.

[0127] Specifically, the test method for the memory fault repair function provided in this embodiment ensures the accuracy of subsequent test results by verifying the test parameters; the operating system is restarted by receiving the operating system restart instruction sent by the test platform, so that the memory error repair can be performed based on the test parameters during the power-on self-test phase after the operating system is restarted, thereby verifying whether the memory fault repair function can operate normally; after determining that the power-on self-test phase is completed, the self-test completion information is sent to the test platform; after receiving the system event log acquisition instruction sent by the test platform, the system event log is sent to the test platform, so that the test platform can determine whether the memory fault repair function works effectively based on the system event log. Therefore, when testing the memory fault repair function, only one operating system restart is required, and the system event log after the operating system restart is used to determine whether the memory fault repair function can operate normally, without having to obtain the serial port information of the basic input and output system for multiple comparisons and analyses, and the test efficiency is higher.

[0128] As an optional implementation manner, based on any of the above embodiments, after sending the parameter correctness information to the test platform, the method further includes:

[0129] A system management interrupt request is sent to the basic input / output system, and test parameters are sent to the memory shared area of ​​the baseboard management controller and the operating system; wherein the system management interrupt request is used to trigger the basic input / output system to send a read data instruction to the operating system, and the read data instruction is used to trigger the operating system to read the test parameters in the memory shared area, and the operating system determines the memory fault location based on the test parameters.

[0130] Specifically, after sending the parameter correctness information to the test platform, the baseboard management controller will send a system management interrupt request to the basic input and output system. The system management interrupt request is a special signal used to notify the basic input and output system that there is an important system management event to be processed.

[0131] At the same time, the baseboard management controller sends the test parameters to the memory shared area between the baseboard management controller and the operating system. The memory shared area is essentially a specific memory space allocated and managed by the operating system, which allows data exchange and communication between different processes or components (such as the baseboard management controller and the operating system). By storing the test parameters in the memory shared area, it can ensure that the operating system can easily obtain these parameters when needed.

[0132] It should also be noted that the baseboard management controller transmits the test parameters to the memory shared area of ​​the baseboard management controller and the operating system through the MMBI protocol.

[0133] Specifically, when the basic input and output system receives the system management interrupt request, the basic input and output system sends a read data instruction to the operating system, wherein the read data instruction is an instruction sent by the basic input and output system to the operating system to notify the operating system to read the test parameters from the shared memory area.

[0134] Specifically, when the operating system receives the data read instruction, it will access the shared memory area and read the test parameters therein. Further, the operating system uses its own memory diagnostic tools or algorithms to determine the specific location of the memory fault based on the read test parameters. The specific process may include memory scanning, error detection, fault location and other steps.

[0135] Specifically, when the operating system completes reading the parameters, it can be restarted. During the power-on self-test phase after the restart, the basic input and output system will try to repair the memory fault based on the previously read test parameters and the determined memory fault location.

[0136] Optionally, after the baseboard manager verifies the test parameters and before sending a system management interrupt request to the basic input and output system, the test parameters are first stored in the memory error information structure of the baseboard management controller. After the system management interrupt request is sent, the test parameters stored in the memory error information structure are sent to the memory shared area. Among them, the memory error information structure is a specially designed data structure for storing error information related to management hardware, including test parameters. The memory error information structure can provide a safe and reliable storage area to prevent data loss or damage. Thereby, the loss of test parameters that may be caused by the simultaneous execution of the request sending task and the test parameter sending task can be avoided, thereby ensuring the accuracy of subsequent test results.

[0137] As an optional implementation manner, based on any of the above embodiments, in response to determining that the power-on self-test phase is completed, the method further includes:

[0138] Receive log information sent by the basic input and output system; generate a system event log based on the log information.

[0139] Specifically, when it is determined that the POST phase is completed, the baseboard management controller receives log information sent by the basic input and output system. The log information includes all key events and error information in the POST phase, which may include memory error repair content.

[0140] Specifically, the baseboard management controller generates a detailed system event log based on the received log information. Optionally, the baseboard management controller formats and parses the received log information to ensure that it meets the processing requirements of the baseboard management controller. After that, a detailed system event log is generated based on the processed log information and the built-in logic of the baseboard management controller. The system event log should contain the timestamp, source, type, and description of the event. Finally, the generated system log information is stored in a non-volatile memory inside the baseboard management controller, such as a flash memory or a hard disk.

[0141] It should also be noted that data is transmitted between the basic input and output system and the baseboard management controller via IPMI.

[0142] Specifically, the memory fault repair function testing method provided in this embodiment receives the log information of the basic input and output system through the baseboard management controller to generate a system event log for subsequent test result analysis.

[0143] As an optional implementation manner, based on any of the above embodiments, in response to receiving the test parameters sent by the test platform, verifying the test parameters includes:

[0144] The test parameters are compared with the memory parameters to determine whether the memory in the test parameters is in place, and a parameter correct information code or a parameter error information code is generated based on the comparison result.

[0145] Specifically, when verifying the test parameters, the test parameters are first compared and analyzed with the memory parameters to determine whether the memory in the test parameters is in place. When it is determined that the memory is in place, a parameter correct information code is generated. When it is determined that the memory is not in place, a parameter error information code is generated.

[0146] Among them, memory parameters may include information such as memory model, capacity, speed, serial number, etc. Memory parameters are usually recorded during system configuration or hardware installation.

[0147] The purpose of the comparison is to determine whether the memory in the test parameters is actually in place, that is, whether the memory configuration in the test parameters matches the actual memory configuration of the system.

[0148] Optionally, after generating the parameter correct information code, the baseboard management controller sends the parameter correct information code to the test platform, and the test platform can determine that the test parameter verification has passed according to the received parameter correct information code. After generating the parameter error information code, the baseboard management controller sends the parameter error information code to the test platform, and the test platform can determine that the test parameter verification has not passed according to the received parameter error information code, so as to prompt the user to correct the test parameters.

[0149] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method.

[0150] Figure 4 A memory fault repair function test device is provided in an embodiment of the present application. The memory fault repair function test device is located in a test platform, such as Figure 4 As shown in , the memory fault repair function testing device 40 includes: a test parameter sending module 41, a system restart sending module 42, a log acquisition instruction sending module 43 and a determination module 44.

[0151] Specifically, a test parameter sending module 41 is used to send test parameters to the baseboard management controller in response to receiving a test trigger operation input by a user through an input device; a system restart sending module 42 is used to send an operating system restart instruction to the baseboard management controller in response to receiving parameter correctness information sent by the baseboard management controller; the operating system restart instruction is used to control the operating system to restart, so that during the power-on self-test phase after the operating system is restarted, the basic input and output system repairs memory errors based on the test parameters; a log acquisition instruction sending module 43 is used to send a system event log acquisition instruction to the baseboard management controller in response to receiving self-test completion information sent by the baseboard management controller; a determination module 44 is used to determine whether there is a memory repair success log based on the system event log received from the baseboard management controller, and if so, display the test success information.

[0152] Optionally, the determination module 44, when determining whether there is a memory repair success log based on the system event log received and sent by the baseboard management controller, is specifically used to: search the system event log based on a preset search keyword; the preset search keyword is memory repair success; in response to determining that there is a system event log that matches the preset search keyword, determine that there is a memory repair success log.

[0153] Optionally, the memory fault repair function testing device 40 further includes: a memory information viewing module and a display module.

[0154] Optionally, in response to receiving a test trigger operation input by a user through an input device, before sending test parameters to the baseboard management controller, the memory information viewing module is used to: send a memory information viewing request to the baseboard management controller; the display module is used to: in response to receiving the memory information sent by the baseboard management controller, display the memory information, and the memory information is used to determine the test parameters.

[0155] For the description of the features in the embodiment corresponding to the above-mentioned memory fault repair function testing device, reference may be made to the relevant description of the embodiment corresponding to the memory fault repair function testing method, which will not be described in detail here. Figure 5 A memory fault repair function test device is provided in another embodiment of the present application. The memory fault repair function test device is located in a baseboard management controller, such as Figure 5 As shown in , the memory fault repair function testing device 50 includes: a verification module 51, a verification result sending module 52, a control module 53, a self-test completion sending module 54 and a log sending module 55.

[0156] Specifically, a verification module 51 is used to verify the test parameters in response to receiving the test parameters sent by the test platform; a verification result sending module 52 is used to send parameter correctness information to the test platform in response to the test parameter verification being passed; a control module 53 is used to control the operating system to restart in response to receiving the operating system restart instruction sent by the test platform; during the power-on self-test phase after the operating system is restarted, the basic input and output system performs memory error repair based on the test parameters; a self-test completion sending module 54 is used to send self-test completion information to the test platform in response to determining that the power-on self-test phase is completed; a log sending module 55 is used to send a system event log to the test platform in response to receiving a system event log acquisition instruction sent by the test platform.

[0157] Optionally, the memory fault repair function testing device 50 further includes: a parameter sending module, a log information receiving module and a system log generating module.

[0158] Optionally, after sending correct parameter information to the test platform, the parameter sending module is used to: send a system management interrupt request to the basic input and output system, and send the test parameters to the memory shared area of ​​the baseboard management controller and the operating system; wherein the system management interrupt request is used to trigger the basic input and output system to send a read data instruction to the operating system, and the read data instruction is used to trigger the operating system to read the test parameters in the memory shared area, and the operating system determines the memory fault location based on the test parameters.

[0159] Optionally, in response to determining that the power-on self-check phase is completed, the log information receiving module is used to: receive log information sent by the basic input and output system; the system log generating module is used to: generate a system event log based on the log information.

[0160] Optionally, in response to receiving the test parameters sent by the test platform, when verifying the test parameters; the verification module 51 is specifically used to: compare the test parameters with the memory parameters, determine whether the memory in the test parameters is in place, and generate a parameter correct information code or a parameter error information code based on the comparison result.

[0161] For the description of the features in the embodiment corresponding to the above-mentioned memory fault repair function testing device, reference may be made to the relevant description of the embodiment corresponding to the memory fault repair function testing method, which will not be described in detail here.

[0162] Figure 6 This is a structural diagram of a test system provided in one embodiment of the present application. The present application also provides a test system, including: a test platform 20, a baseboard management controller 30, a basic input-output system 60 and an operating system 70. The test platform 20 is communicatively connected with the baseboard management controller 30, and the baseboard management controller 30, the basic input-output system 60 and the operating system 70 are all communicatively connected with each other.

[0163] Specifically, the test platform 20 is used to send test parameters to the baseboard management controller 30 according to the test trigger operation input by the user through the input device. The baseboard management controller 30 is used to verify the test parameters and send parameter correctness information to the test platform 20 after the test parameters are verified; the test platform 20 is also used to send an operating system restart instruction to the baseboard management controller 30 according to the parameter correctness information. The baseboard management controller 30 is also used to control the operating system 70 to restart according to the operating system restart instruction. The basic input and output system 60 is used to repair memory errors based on the test parameters during the power-on self-test phase after the operating system 70 is restarted. The baseboard management controller 30 is also used to send self-test completion information to the test platform 20 according to the operating system restart completion information. The test platform 20 is also used to send a system event log acquisition instruction to the baseboard management controller 30 according to the self-test completion information. The baseboard management controller 30 is also used to send a system event log to the test platform 20 according to the system event log acquisition instruction. The test platform 20 is also used to determine whether there is a memory repair success log based on the system event log, and if so, display the test success information.

[0164] It should be noted that by applying the test platform 20 to send test parameters to the baseboard management controller 30, the test of the memory fault repair function is completed. The test tools and dedicated hardware provided by the memory manufacturer are no longer required. The test can be carried out by simply establishing a communication connection between the test platform and the baseboard management controller of any server, which improves the flexibility and versatility of memory testing.

[0165] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application is shown in FIG. Figure 7 As shown, the electronic device 80 provided in the embodiment of the present application includes: a memory 81, an input device 82, an output device 83 and a processor 84.

[0166] The memory 81 stores a computer program, the input device 82 is used to input a test trigger operation, the output device 83 is used to display a test success message, and the processor 84 is configured to run the computer program to execute the steps in any of the above-mentioned memory fault repair function test method embodiments.

[0167] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned memory fault repair function test method embodiments when running.

[0168] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0169] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above-mentioned memory fault repair function test method embodiments are implemented.

[0170] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, the non-volatile computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, implementing the steps in any of the above-mentioned memory fault repair function test method embodiments.

[0171] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0172] The above is a detailed introduction to the test, device, system, equipment and storage medium of a memory fault repair function provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A method for testing a memory fault repair function, characterized in that: The method is applied to a test platform, and the method comprises: In response to receiving a test trigger operation input by a user through an input device, sending a test parameter to a baseboard management controller; In response to receiving the parameter correctness information sent by the baseboard management controller, sending an operating system restart instruction to the baseboard management controller; the operating system restart instruction is used to control the operating system to restart, so that during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters; In response to receiving the self-test completion information sent by the baseboard management controller, sending a system event log acquisition instruction to the baseboard management controller; Based on the received system event log sent by the baseboard management controller, it is determined whether there is a memory repair success log, and if so, test success information is displayed.

2. The method for testing the memory fault repair function according to claim 1, characterized in that: The determining whether there is a memory repair success log based on the received system event log sent by the baseboard management controller includes: Searching the system event log based on a preset search keyword; the preset search keyword is memory repair success; In response to determining that there is a system event log matching the preset search keyword, it is determined that there is a memory repair success log.

3. The method for testing the memory fault repair function according to claim 1, characterized in that: Before sending the test parameters to the baseboard management controller in response to receiving the test trigger operation input by the user through the input device, the method further includes: Sending a memory information viewing request to the baseboard management controller; In response to receiving the memory information sent by the baseboard management controller, the memory information is displayed, and the memory information is used to determine the test parameter.

4. A method for testing a memory fault repair function, characterized in that: The method is applied to a baseboard management controller, and the method comprises: In response to receiving the test parameters sent by the test platform, verifying the test parameters; In response to the test parameter verification being passed, sending parameter correctness information to the test platform; In response to receiving the operating system restart instruction sent by the test platform, controlling the operating system to restart; so that during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters; In response to determining that the power-on self-test phase is completed, sending self-test completion information to the test platform; In response to receiving the system event log acquisition instruction sent by the test platform, the system event log is sent to the test platform.

5. The method for testing the memory fault repair function according to claim 4, characterized in that: After sending the parameter correctness information to the test platform, the method further includes: A system management interrupt request is sent to a basic input / output system, and the test parameters are sent to a memory shared area between the baseboard management controller and the operating system; wherein the system management interrupt request is used to trigger the basic input / output system to send a read data instruction to the operating system, and the read data instruction is used to trigger the operating system to read the test parameters in the memory shared area, and the operating system determines the memory fault location according to the test parameters.

6. The method for testing the memory fault repair function according to claim 4, characterized in that: After the power-on self-test phase is determined to be completed, the method further includes: Receiving log information sent by the basic input and output system; The system event log is generated based on the log information.

7. A memory fault repair function testing device, characterized in that: The memory fault repair function test device is located in the test platform, and the device includes: A test parameter sending module, configured to send a test parameter to a baseboard management controller in response to receiving a test trigger operation input by a user through an input device; A system restart sending module, configured to send an operating system restart instruction to the baseboard management controller in response to receiving parameter correctness information sent by the baseboard management controller; the operating system restart instruction is used to control the operating system to restart, so that during the power-on self-test phase after the operating system restarts, the basic input and output system performs memory error repair based on the test parameters; A log acquisition instruction sending module, configured to send a system event log acquisition instruction to the baseboard management controller in response to receiving the self-test completion information sent by the baseboard management controller; The determination module is used to determine whether there is a memory repair success log based on the received system event log sent by the baseboard management controller, and if so, display the test success information.

8. A memory fault repair function testing device, characterized in that: The memory fault repair function test device is located in a baseboard management controller, and the device includes: A verification module, configured to verify the test parameters in response to receiving the test parameters sent by the test platform; A verification result sending module, used for sending parameter correctness information to the test platform in response to the test parameter verification being passed; A control module, configured to control the operating system to restart in response to receiving an operating system restart instruction sent by the test platform; so that during a power-on self-test phase after the operating system restarts, a basic input / output system performs memory error repair based on the test parameters; A self-test completion sending module, configured to send self-test completion information to the test platform in response to determining that the power-on self-test phase is completed; The log sending module is used to send the system event log to the test platform in response to receiving the system event log acquisition instruction sent by the test platform.

9. A testing system, characterized in that: include: A test platform, a baseboard management controller, a basic input-output system and an operating system, wherein the test platform is communicatively connected to the baseboard management controller, and the baseboard management controller, the basic input-output system and the operating system are all communicatively connected to each other; The test platform is used to send test parameters to the baseboard management controller according to the test trigger operation input by the user through the input device; The baseboard management controller is used to verify the test parameters and send parameter correctness information to the test platform after the test parameters are verified; The test platform is further used to send an operating system restart instruction to the baseboard management controller according to the parameter correctness information; The baseboard management controller is further used to control the operating system to restart according to the operating system restart instruction; The basic input and output system is used to perform memory error repair based on the test parameters during a power-on self-test phase after the operating system is restarted; The baseboard management controller is further used to send self-test completion information to the test platform according to the operating system restart completion information; The test platform is further used to send a system event log acquisition instruction to the baseboard management controller according to the self-test completion information; The baseboard management controller is further used to obtain instructions according to the system event log and send the system event log to the test platform; The test platform is also used to determine whether there is a memory repair success log based on the system event log, and if so, display the test success information.

10. An electronic device, characterized in that: include: Memory for storing computer programs; An input device, used for inputting a test trigger operation; Output device, used for displaying test success information; A processor, configured to implement the steps of the method for testing the memory fault repair function as described in any one of claims 1 to 3 or any one of claims 4 to 6 when executing the computer program.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method for testing the memory fault repair function as described in any one of claims 1 to 3 or any one of claims 4 to 6.

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