A server and a control method

Abstract

A server and a control method provided by the present invention relate to the technical field of server architecture design. The server includes: a main board is provided with a CPU and a Switch chip connected to each other; the Switch chip is connected to a dual-control backplane; the dual-control backplane is further connected with a plurality of storage peripherals; the Switch chip is used to connect a plurality of pluggable control peripherals; the Switch chip, the pluggable control peripherals and the storage peripherals jointly form a virtual Ethernet-attached flash cluster to provide storage services; the Switch chip is further used to configure its uplink port to determine whether the CPU or the pluggable control peripherals control the storage peripherals to implement the storage function. The present invention achieves the effect that the server can also be used as a complete high-availability storage server while completing computing tasks.

Description

Technical Field

[0001] The present invention relates to the technical field of server architecture design, and more particularly, to a server and a control method. Background Art

[0002] With the rapid development of artificial intelligence (AI) technology, how to make the computing power and storage capacity of AI servers work more efficiently together has become a key factor in improving overall performance. Currently, AI servers, such as high-performance servers represented by NVIDIA DGX H100 / H200, have largely utilized the powerful computing capabilities of GPUs.

[0003] However, in the construction of intelligent computing centers or supercomputing centers, existing solutions generally consider that the storage reliability inside nodes is insufficient and difficult to meet the requirements of high availability and isolation from computing resources. Therefore, many solutions tend to adopt the design idea of separating the storage network from the computing network, that is, achieving higher reliability and flexibility by physically separating storage devices from computing devices. Although such a design can improve the stability and maintainability of the system, it also brings problems of network latency and data transmission efficiency. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a server and a control method to enable the server to be used as a complete high-availability storage server while completing computing tasks. To achieve the above purpose, the technical solutions adopted in the embodiments of the present invention are as follows:

[0005] In a first aspect, the present invention provides a server, including: a main board and a dual-control backplane; the main board is provided with a CPU and a Switch chip connected to each other; the Switch chip is connected to the dual-control backplane; the dual-control backplane is further connected with a plurality of storage peripherals; the Switch chip is used to connect a plurality of pluggable control peripherals; the Switch chip, the pluggable control peripherals, and the storage peripherals together form a virtual Ethernet-attached flash cluster to provide storage services; the Switch chip is further used to configure its uplink port to determine whether the CPU or the pluggable control peripherals control the storage peripherals to implement the storage function.

[0006] In an optional embodiment, the Switch chip is specifically used for: when it is determined that no pluggable control peripheral is inserted, configuring the uplink port to be connected to the CPU, so that the storage peripherals communicate with the CPU through the Switch chip; when it is determined that a pluggable control peripheral is inserted, configuring the uplink port to be connected to the pluggable control peripheral, so that the storage peripherals communicate with the pluggable control peripheral through the Switch chip.

[0007] In an alternative embodiment, the pluggable control peripheral is configured to send a configuration instruction to the Switch chip after being inserted into the Switch chip, so as to instruct the Switch chip to configure the upstream port.

[0008] In an alternative embodiment, the pluggable control peripheral is further configured to load the newly connected storage peripheral if a new storage peripheral is detected when the upstream port is configured as the pluggable control peripheral itself.

[0009] In an alternative embodiment, the Switch chip is further configured to switch the upstream port to another pluggable control peripheral inserted by the Switch chip itself to which it is connected if the pluggable control peripheral currently controlling the storage peripheral fails.

[0010] In an alternative embodiment, the number of Switch chips is one or two.

[0011] In an alternative embodiment, the number of CPUs is one or two.

[0012] In an alternative embodiment, when there are two CPUs and two Switch chips, each CPU is respectively connected to a Switch chip through a pluggable backplane or a data bus.

[0013] In an alternative embodiment, the pluggable control peripheral is any one of the following: DPU, IPU, and the device of the upstream port of the Switch chip.

[0014] In a third aspect, the present invention provides a control method applied to a server, where the server includes: a motherboard and a dual-control backplane; the motherboard is provided with a CPU and a Switch chip connected to each other; the Switch chip is connected to the dual-control backplane; the dual-control backplane is further connected with a plurality of storage peripherals; the Switch chip is used to connect a plurality of pluggable control peripherals; the Switch chip, the pluggable control peripherals, and the storage peripherals jointly form a virtual Ethernet-attached flash cluster to provide storage services; the method includes: the Switch chip detecting whether a pluggable control peripheral is inserted into itself; the Switch chip configuring its own upstream port to determine whether the CPU or the pluggable control peripheral controls the storage peripheral to implement the storage function.

[0015] A server and a control method provided by the present invention, the server includes: a main board and a dual-control backplane; the main board is provided with a CPU and a Switch chip connected to each other; the Switch chip is connected to the dual-control backplane; the dual-control backplane is further connected with a plurality of storage peripherals; the Switch chip is used to connect a plurality of pluggable control peripherals; the Switch chip, the pluggable control peripherals and the storage peripherals jointly form a virtual Ethernet-attached flash cluster to provide storage services; the Switch chip is used to configure its uplink port to determine whether the CPU or the pluggable control peripherals control the storage peripherals to implement the storage function. The server architecture provided by the embodiments of the present invention realizes the effect that the server can also be used as a complete high-availability storage server while completing computing tasks through the high-availability design of the dual-control backplane, the dynamic allocation of control right ability of the Switch chip, and the virtualization integration of the storage peripherals.

[0016] To make the above objects, features and advantages of the present invention more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes a detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0018] Figure 1 It is an architecture diagram of the server provided by the embodiments of the present invention;

[0019] Figure 2 It is an example diagram when the pluggable control peripherals are not inserted provided by the embodiments of the present invention;

[0020] Figure 3 It is an example diagram when the pluggable control peripherals are inserted provided by the embodiments of the present invention;

[0021] Figure 4 It is an example diagram when a pluggable control peripheral fails provided by the embodiments of the present invention;

[0022] Figure 5 It is an example diagram of the server provided by the embodiments of the present invention;

[0023] Figure 6 It is one of the other architecture diagrams of the server provided by the embodiments of the present invention;

[0024] Figure 7Scenario example diagram of the dual-Switch chip provided by the embodiment of the present invention;

[0025] Figure 8 Another architecture diagram II of the server provided by the embodiment of the present invention;

[0026] Figure 9 Another architecture diagram III of the server provided by the embodiment of the present invention;

[0027] Figure 10 Another architecture diagram IV of the server provided by the embodiment of the present invention;

[0028] Figure 11 Schematic flowchart of the control method provided by the embodiment of the present invention.

[0029] Icons: Server - 10; Main board - 101; First main board - 101-1; Second main board - 101-2; Dual-control backplane - 102; CPU - 103; First CPU - 103-1; Second CPU - 103-2; Switch chip - 104; First Switch chip - 104-1; Second Switch chip - 104-2; First pluggable control peripheral - 105-1; Second pluggable control peripheral - 105-2; Third pluggable control peripheral - 105-3; Fourth pluggable control peripheral - 105-4; First storage peripheral - 106-1; Second storage peripheral - 106-2; Nth storage peripheral - 106-N; EP - 107. Detailed implementation manners

[0030] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Usually, the components of the embodiments of the present invention described and shown in the accompanying drawings here can be arranged and designed in various different configurations.

[0031] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but merely represents the selected embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0032] It should be noted that relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device.

[0033] In the prior art, it is generally considered that the storage reliability inside the node is insufficient to meet the requirements of high availability and isolation from computing resources. Therefore, a design of separating the computing device from the storage device is adopted to improve the reliability of the system. However, considering that this separated architecture is prone to problems such as increased network latency and reduced data transmission efficiency. Embodiments of the present invention provide a server architecture that can ensure the high availability of internal storage of the node while the node provides computing capabilities externally.

[0034] Please refer to Figure 1 , Figure 1 which is an architecture diagram of a server provided by an embodiment of the present invention. The server 10 includes: a main board 101 and a dual-control backplane 102; the main board 101 is provided with a CPU 103 and a Switch chip 104 connected to each other; the Switch chip 104 is connected to the dual-control backplane 102; the dual-control backplane 102 is connected with a first storage peripheral 106-1 to an Nth storage peripheral 106-N; the Switch chip 104 is used to connect a first pluggable control peripheral 105-1 and a second pluggable control peripheral 105-2; the Switch chip 104, the first pluggable control peripheral 105-1, the second pluggable control peripheral 105-2, the first storage peripheral 106-1, the second storage peripheral 106-2 to the Nth storage peripheral 106-N together form a virtual Ethernet-attached flash cluster to provide storage services.

[0035] It should be understood that Figure 1 only shows two first pluggable control peripherals 105-1 and a second pluggable control peripheral 105-2 connected to the Switch chip 104, but this does not limit the number of pluggable control peripherals provided in the embodiments of the present invention. In fact, a Switch chip can be connected to multiple pluggable control peripherals. In addition, Figure 1 the shown structure is only an example architecture of the server. The actual configuration of the server may include more or fewer components than Figure 1 shown, or adopt a configuration different from Figure 1 shown. Details are not described herein.

[0036] InFigure 1 In this case, the CPU 103 can be used to provide computing power and can also be used to take over the first storage peripheral 106-1, the second storage peripheral 106-2 to the Nth storage peripheral 106-N when the Switch chip 104 configures the upstream port as the CPU 103 itself to form a virtual Ethernet-attached flash cluster to provide storage services.

[0037] In an embodiment of the present invention, the Switch chip has the ability to dynamically allocate control rights and is used to configure the upstream port according to the pluggable control peripheral configuration inserted into the Switch chip itself to determine whether the CPU or the pluggable control peripheral takes over the storage peripheral. Specifically:

[0038] When it is determined that there is no pluggable control peripheral inserted, the upstream port is configured to be connected to the CPU so that the storage peripheral communicates with the CPU through the Switch chip;

[0039] When it is determined that there is a pluggable control peripheral inserted, the upstream port is configured to be connected to the pluggable control peripheral so that the storage peripheral communicates with the pluggable control peripheral through the Switch chip.

[0040] In the embodiment of the present invention, there are two cases where no pluggable control peripheral is inserted: the first is that no peripheral is inserted on the Switch chip; the second is that although a peripheral is inserted, the peripheral does not have control capabilities, such as an ordinary graphics card being inserted. In this case, the Switch chip will configure the upstream port to be connected to the CPU. Of course, regardless of which of the above cases, it is required that the CPU is in the powered-on state so that it can take over the storage peripheral in a timely manner.

[0041] In an embodiment of the present invention, when a pluggable control peripheral is inserted on the Switch chip, the upstream port can be configured to be connected to the pluggable control peripheral. In this case, regardless of whether the CPU 103 is in the powered-on state, the powered-off state, or the standby state, the pluggable control peripheral will independently operate in the controller mode and take over the storage peripheral as an independent controller. At the same time, other servers in the network can still normally access all disks and storage services without being affected. Of course, even if a pluggable control peripheral is inserted, the Switch chip can also configure the upstream port to be connected to the CPU, which depends on the actual configuration and control requirements.

[0042] From Figure 1As can be seen in server 10, Switch chip 104, the first pluggable control peripheral 105-1, the second pluggable control peripheral 105-2, the first storage peripheral 106-1, the second storage peripheral 106-2 to the Nth storage peripheral 106-N jointly form a virtual Ethernet-attached flash cluster to provide efficient and flexible storage services. It can be understood that when the virtual EBOF is not connected to CPU1, its function is more reliable than that of the traditional NVMe EBOF, and it has the ability to communicate and transfer data directly with the computing node. Through the pluggable control peripheral with the NVMe over Fabric (NVMe oF) offloading function, such as DPU or smart network card control, this virtual EBOF can provide standard NVMe block storage function externally, similar to a group of independent disk enclosures. When the virtual EBOF is connected to the CPU, it can work with the motherboard as a component of the motherboard or run independently of the motherboard, thus fully realizing the storage function. This design not only retains the efficiency of the traditional NVMe EBOF, but also greatly improves the flexibility, scalability and reliability of the system through cooperation or independent operation with the CPU.

[0043] For the convenience of understanding the above process, please refer to Figure 2 and Figure 3 , Figure 2 which is an architecture example diagram provided by an embodiment of the present invention when the pluggable control peripheral is not inserted. Figure 3 which is an architecture example diagram provided by an embodiment of the present invention when the pluggable control peripheral is inserted.

[0044] In Figure 2 , taking the first storage peripheral 106-1 as an example, neither the first pluggable control peripheral 105-1 nor the second pluggable control peripheral 105-2 is inserted into the Switch chip 104. At this time, the Switch chip 104 configures the uplink port to be connected to the CPU103, thereby forming a communication link between the CPU103, the Switch chip 104 and the first storage peripheral 106-1. In this case, the CPU103 directly takes over the first storage peripheral 106-1 to provide storage services.

[0045] In Figure 3Still taking the first storage peripheral 106-1 as an example, the first pluggable control peripheral 105-1 and the second pluggable control peripheral 105-2 are both inserted into the Switch chip 104. Assume that the Switch chip 104 configures the upstream port to be connected to the first pluggable control peripheral 105-1. Then, a communication link will be formed among the first pluggable control peripheral 105-1, the Switch chip 104, and the first storage peripheral 106-1. The first pluggable control peripheral 105-1 will take over the first storage peripheral 106-1 to provide storage services. Of course, if the Switch chip 104 configures the upstream port to be connected to the second pluggable control peripheral 105-2, the second pluggable control peripheral 105-2 will take over the first storage peripheral 106-1 to provide the corresponding storage services.

[0046] As can be seen from the above example, in the embodiments of the present invention, a Switch chip can be connected to multiple pluggable control peripherals. When multiple pluggable control peripherals are inserted simultaneously, the upstream port can be flexibly configured to be connected to any one of them. In this way, if the pluggable control peripheral currently responsible for controlling the storage peripheral fails, the system can quickly switch the upstream port to other normally operating pluggable control peripherals, thereby achieving high availability of the storage service and ensuring the stable operation of the system.

[0047] To understand the above process more clearly, please refer to Figure 3 on the basis of Figure 4 . Figure 4 shows an example scenario when a pluggable control peripheral fails in the embodiments of the present invention. In Figure 4 , assume that the first pluggable control peripheral 105-1 currently responsible for controlling the first storage peripheral 106-1 fails. At this time, the Switch chip 104 will automatically reconfigure the upstream port to be connected to the second pluggable control peripheral 105-2. Subsequently, a new communication link will be quickly established among the second pluggable control peripheral 105-2, the Switch chip 104, and the first storage peripheral 106-1. The second pluggable control peripheral 105-2 will take over the first storage peripheral 106-1 to continue providing storage services. This mechanism effectively guarantees the continuity and high availability of the storage service.

[0048] In an embodiment of the present invention, for the convenience of the Switch chip to perform upstream port switching in a timely manner, the pluggable control peripheral is used to send a configuration instruction to the Switch chip after being inserted into the Switch chip to instruct the Switch chip to configure the upstream port. Specifically, continue to refer to Figure 3, when the first storage peripheral 106-1 is taken over by the CPU 103, after the first pluggable control peripheral 105-1 is inserted into the Switch chip 104, it will complete the power-on process and load the operating system prior to the motherboard 101. After the motherboard 101 is powered on, it will recognize the first pluggable control peripheral 105-1 as an external device and load it. Subsequently, the first pluggable control peripheral 105-1 will send a configuration instruction to the control circuit of the Switch chip 104. After receiving this instruction, the Switch chip 104 will reconfigure the upstream port to be connected to the first pluggable control peripheral 105-1, thereby realizing the takeover of the first storage peripheral 106-1.

[0049] In another embodiment of the present invention, the configuration instruction may not be sent by the pluggable control peripheral either, and it may also be sent by other circuits or chips after detecting the insertion of the pluggable control peripheral.

[0050] In an embodiment of the present invention, the pluggable control peripheral is further configured to, when the upstream port is configured as the pluggable control peripheral itself, load a new storage peripheral if a new storage peripheral is detected to be connected.

[0051] Optionally, the pluggable control peripheral may be, but is not limited to, a PCIe peripheral, and has an independent control mode and can take over the storage peripheral as an independent controller. For example, the pluggable control peripheral may be, but is not limited to, a DPU (Data Processing Unit), an IPU, a device of the upstream port of the Switch chip, and the device mentioned here refers to an external device that can be disconnected from the upstream of the Switch chip.

[0052] In an embodiment of the present invention, the storage peripheral may be, but is not limited to, an NVMe SSD.

[0053] In an embodiment of the present invention, each link in the server may be, but is not limited to, a PCIe link.

[0054] For example, as an example, Figure 5 is an example diagram of the server provided by the embodiment of the present invention. In Figure 5 , the DPU1 and DPU2 are respectively used as the first pluggable control peripheral 105-1 and the second pluggable control peripheral 105-2, and can be inserted into the PCIe Switch chip serving as the Switch chip 104. In addition, the connection links between the PCIe Switch chip and the dual-control backplane 102, and between the dual-control backplane 102 and the NVMe SSD1 to NVMe SSDN respectively serving as the first storage peripheral 106-1 to the Nth storage peripheral 106-N can all be implemented by PCIe links. This design not only ensures the efficient data transmission of the system, but also improves the flexibility and scalability of the overall architecture.

[0055] In one embodiment of the present invention, the number of Switch chips can be one or two. When two Switch chips are used, each Switch chip is connected to the CPU and the dual-control backplane to form a redundant architecture to improve the reliability and performance of the system.

[0056] To more clearly understand the above architecture, please refer to Figure 6 , Figure 6 which is one of the other architecture diagrams of the server provided by the embodiment of the present invention. Figure 6 The schematic of the virtual Ethernet-attached flash cluster is omitted in Figure 6 . In

[0057] it should be understood that, in Figure 6 , the first Switch chip 104-1 is connected to the first pluggable control peripheral 105-1 and the second pluggable control peripheral 105-2, while the second Switch chip 104-2 is connected to the third pluggable control peripheral 105-3 and the fourth pluggable control peripheral 105-4. However, this does not limit the number of pluggable control peripherals connected to each Switch chip. In fact, designers can flexibly configure the number of pluggable control peripherals that can be inserted on each Switch chip according to actual needs to meet the system scalability and functional requirements in different application scenarios.

[0058] Similarly, when the system includes two Switch chips, for the same storage peripheral, it can be taken over by any pluggable control peripheral on each Switch chip. To more clearly show this architecture, please refer to Figure 7 , Figure 7 which is an example diagram of the dual-Switch chip architecture provided by the embodiment of the present invention. Figure 7The schematic diagram of the virtual Ethernet-attached flash cluster is omitted. The blue lines represent the links connected to the first Switch chip 104-1; the red lines represent the links connected to the second Switch chip 104-2.

[0059] In Figure 7 a communication link is formed among the second pluggable control peripheral 105-2, the first Switch chip 104-1, and the first storage peripheral 106-1. The second pluggable control peripheral 105-2 takes over the first storage peripheral 106-1 to provide storage services. Meanwhile, another communication link can also be formed among the third pluggable control peripheral 105-3, the second Switch chip 104-2, and the first storage peripheral 106-1. The third pluggable control peripheral 105-3 takes over the first storage peripheral 106-1 to provide the same storage services. This design further enhances the redundancy and high availability of the system.

[0060] In an embodiment of the present invention, the number of CPUs is one or two. When there are two CPUs, combined with Figure 6 the present invention further provides an optimized system architecture. Please refer to Figure 8 and Figure 8 which is the second alternative architecture diagram of the server provided by the embodiment of the present invention. Figure 8 the schematic diagram of the virtual Ethernet-attached flash cluster is omitted. The blue lines represent the links connected to the first Switch chip 104-1; the red lines represent the links connected to the second Switch chip 104-2. In Figure 8 the first CPU 103-1 and the second CPU 103-2 are shown, both of which are arranged on the same main board 101. Among them, the first CPU 103-1 is connected to the first Switch chip 104-1, the second CPU 103-2 is connected to the second Switch chip 104-2, and at the same time, the first CPU 103-1 and the second CPU 103-2 communicate at high speed through the UPI (UltraPath Interconnect) interface.

[0061] By connecting the Switch chip to another CPU, the system can achieve a higher level of redundancy design. In this architecture, even if one CPU (such as the first CPU 103-1) fails, the other CPU (such as the second CPU 103-2) can still take over and manage all the storage peripherals on the dual-control backplane to ensure the continuous operation of the system. In addition, when a pluggable control peripheral is inserted, the system can still seamlessly take over the storage peripheral and continue to provide stable storage services.

[0062] In Figure 8 on the basis of, please refer to Figure 9 andFigure 9 This is the third alternative architecture diagram of the server provided by the embodiments of the present invention. Figure 9 The schematic of the virtual Ethernet-attached flash cluster and the motherboard where the Switch chip is located are omitted. The blue lines represent the links connected to the first Switch chip 104-1; the red lines represent the links connected to the second Switch chip 104-2. In Figure 9 , the first CPU 103-1 is set on the first motherboard 101-1, and the second CPU 103-2 is set on the second motherboard 101-2. Each CPU is connected to a Switch chip through a pluggable backplane or a data bus, for example, the connection is achieved through a PCIe extension cable. This design can still effectively control the storage peripherals and provide stable storage services. By distributing the CPU and the Switch chip on independent motherboards, the system achieves higher isolation and flexibility in the physical architecture, further enhancing the reliability and scalability of the system.

[0063] In an embodiment of the present invention, as Figure 10 shown, Figure 10 This is the fourth alternative architecture diagram of the server provided by the embodiments of the present invention. In this architecture, the CPU 103 can also be additionally connected to a Switch chip 104, and multiple EPs 107 can be connected to the Switch chip 104. In this way, the CPU 103, the Switch chip 104, and the multiple EPs 107 together constitute a complete motherboard architecture.

[0064] In Figure 10 , the EP 107 can be various peripherals compliant with the PCIe specification, including but not limited to devices such as GPUs (Graphics Processing Units), DPUs (Data Processing Units), IPUs (Intelligent Processing Units), and network cards. This design enables the system to flexibly expand and configure different types of peripherals to meet diverse computing and storage requirements.

[0065] In summary, the server provided by the embodiment of the present invention integrates a set of detachable and replaceable high-availability and dynamically configurable peripheral systems. This system can not only support the server to efficiently complete computing tasks, but also enable it to be used as a complete high-availability storage server. Specifically: First, in the embodiment of the present invention, by dynamically configuring the uplink port of the Switch chip where the dual-control storage peripheral is located, when the CPU on the server is not powered on, a virtual EBOF is jointly formed with the pluggable control peripheral and the Switch chip. When the storage software runs in the pluggable control peripheral, it is a dual-control and dual-active storage server. When the CPU on the server is not powered on, if the pluggable control peripheral is not inserted, or other peripherals without the controller mode are inserted, the uplink port of the Switch chip is configured as the CPU, and the storage peripheral can be directly accessed through the device connected to the CPU. When the CPU on the server is not powered on and the pluggable control peripheral is inserted, the uplink port of the Switch chip where the storage peripheral is located can be dynamically configured as the pluggable control peripheral, so as to achieve the effect that the network device directly accesses the storage peripheral without passing through the CPU, achieving the closest distance between the storage and computing resources and the effect of isolating the storage and computing resources. Second, the storage peripheral is connected to the server through a dual-control backplane, achieving the effect of dual-control and multi-active. When the CPU or the pluggable control peripheral fails, the storage access is still reachable.

[0066] Generally speaking, in the embodiment of the present invention, through the direct connection between the hardware-level dual-control backplane and the Switch chip, the storage control right switching is sunk from the software layer to the hardware layer, realizing nanosecond-level fault switching. Through the modular design of the pluggable control peripheral, it is allowed to replace the control peripherals with different functions during operation, and the Switch chip automatically synchronizes the storage topology information without restarting or remounting the storage device, realizing the physical decoupling of the storage control logic and the motherboard. The entire server can be used as a complete high-availability storage server while completing computing tasks. Without starting the CPU and other peripherals of the server motherboard, the storage peripheral on the dual-control backplane can be taken over by the pluggable control peripheral inserted on the motherboard and used as an independent high-availability node. When the pluggable control peripheral is not inserted, the storage peripheral is taken over by the CPU and can still provide storage services as a general server.

[0067] Based on the server 10 provided in the above embodiment, the embodiment of the present invention also provides a control method. Please refer to Figure 11 , Figure 11 which is a schematic flowchart of the control method provided by the embodiment of the present invention and is described as follows:

[0068] S110: The Switch chip detects whether a pluggable control peripheral is inserted into itself;

[0069] S120: The Switch chip configures its uplink port to determine whether the storage function is implemented by the CPU or a pluggable control peripheral for controlling the storage peripheral.

[0070] In an alternative embodiment, the Switch chip determines whether a pluggable control peripheral is inserted into itself by detecting whether a configuration instruction from the pluggable control peripheral is received. If a configuration instruction is received, it is determined that a pluggable control peripheral is inserted into itself, and the uplink port of the Switch chip is configured according to the peripheral and the configuration. Otherwise, no pluggable control peripheral is inserted.

[0071] In an alternative embodiment, the control method further includes: when it is determined that no pluggable control peripheral is inserted, the Switch chip configures the uplink port to be connected to the CPU, so that the storage peripheral communicates with the CPU through the Switch chip; when it is determined that a pluggable control peripheral is inserted, the Switch chip configures the uplink port to be connected to the pluggable control peripheral, so that the storage peripheral communicates with the pluggable control peripheral through the Switch chip.

[0072] In an alternative embodiment, the control method further includes: after the pluggable control is inserted into the Switch chip, it sends a configuration instruction to the Switch chip to instruct the Switch chip to configure the uplink port.

[0073] In an alternative embodiment, the control method further includes: when the uplink port is configured as the pluggable control peripheral itself, if the pluggable control peripheral detects that a new storage peripheral is connected, it loads the new storage peripheral.

[0074] In an alternative embodiment, the control method further includes: if the Switch chip determines that the pluggable control peripheral currently controlling the storage peripheral fails, it switches the uplink port to be connected to another pluggable control peripheral inserted into the Switch chip itself.

[0075] In several embodiments provided in this application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions, and operations of devices, methods, and computer program products according to multiple embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and a module, a program segment, or a part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks can actually be executed substantially in parallel, and they can sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, as well as the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0076] In addition, in each embodiment of the present invention, the functional modules can be integrated together to form an independent part, or each module can exist alone, or two or more modules can be integrated to form an independent part.

[0077] If the above functions are implemented in the form of software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in each embodiment of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0078] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A server, characterized in that: include: A main board and a dual-control backplane; the main board is provided with a CPU and a Switch chip which are interconnected; the Switch chip is connected to the dual-control backplane; the dual-control backplane is also connected to a number of storage peripherals; the Switch chip is used to connect a number of pluggable control peripherals; the Switch chip, the pluggable control peripherals and the storage peripherals together form a virtual Ethernet attached flash memory cluster to provide storage services; the Switch chip is also used to configure its own uplink port to determine whether the CPU or the pluggable control peripheral controls the storage peripheral to realize the storage function.

2. The server according to claim 1, characterized in that: The Switch chip is specifically used to: when it is determined that no pluggable control peripheral is inserted, configure the upstream port to be connected to the CPU, so that the storage peripheral communicates with the CPU through the Switch chip; When it is determined that a pluggable control peripheral device is inserted, the uplink port is configured to be connected to the pluggable control peripheral device, so that the storage peripheral device communicates with the pluggable control peripheral device through the Switch chip.

3. The server according to claim 1 or 2, characterized in that: The pluggable control peripheral is used to send a configuration instruction to the Switch chip after being inserted into the Switch chip, so as to instruct the Switch chip to configure the uplink port.

4. The server according to claim 1, characterized in that: The pluggable control peripheral is further configured to load the new storage peripheral if it is detected that a new storage peripheral is connected when the uplink port is configured as the pluggable control peripheral itself.

5. The server according to claim 1, characterized in that: The Switch chip is also used for switching the upstream port to connect to other pluggable control peripherals inserted into the Switch chip itself if the pluggable control peripheral currently controlling the storage peripheral fails.

6. The server according to claim 1, characterized in that: The number of the Switch chips is one or two.

7. The server according to claim 1 or 6, characterized in that: The number of the CPUs is one or two.

8. The server according to claim 7, characterized in that: When there are two CPUs and two Switch chips, each CPU is connected to a Switch chip via a pluggable backplane or a data bus.

9. The server according to claim 1, characterized in that: The pluggable control peripheral is any one of the following: DPU, IPU, and a device of the upstream port of the Switch chip.

10. A control method, characterized in that: The method is applied to a server, the server comprising: a mainboard and a dual-control backplane; the mainboard is provided with a CPU and a Switch chip connected to each other; the Switch chip is connected to the dual-control backplane; the dual-control backplane is also connected to a plurality of storage peripherals; the Switch chip is used to connect a plurality of pluggable control peripherals; the Switch chip, the pluggable control peripherals and the storage peripherals together form a virtual Ethernet attached flash memory cluster to provide storage services; the method comprises: The Switch chip detects whether a pluggable control peripheral is inserted into itself; The Switch chip configures its own uplink port to determine whether the CPU or the pluggable control peripheral controls the storage peripheral to implement the storage function.

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