Data routing method of multi-core processor and related equipment thereof

Abstract

The invention discloses a data routing method of a multi-core processor and related equipment thereof, and belongs to the technical field of computers, and the method comprises the following steps: when a first core needs to perform data access on a second core, if the two cores are judged to be in rows and columns with different matrix topologies, counting the data access frequency of the first core to the second core, obtaining a target frequency; if the target frequency is greater than the preset frequency, respectively determining a shortest route transmission path and a second shortest route transmission path when the first core accesses the second core based on a principle that the route can carry out data transmission along any direction; and determining a corresponding final routing transmission path when the first core accesses the second core according to the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core by taking the shortest communication delay as a principle. According to the method, the access efficiency of the two cores in the multi-core processor during data access can be improved, the communication delay between the two cores is reduced, and the overall performance of the multi-core processor is improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a data routing method, device, equipment, medium and computer program product of a multi-core processor. Background Art

[0002] Multi-core processors are widely used in the field of computer applications. In most multi-core processors, they are generally used Routing algorithms are used to implement data access between two cores in a multi-core processor. Although the hardware implementation logic of this method is relatively simple and reliable, the efficiency of the algorithm is low, especially when the two cores in the multi-core processor are far apart, the access route from one core to another is very long, which leads to a large communication delay between the two cores when accessing data, thereby reducing the overall performance of the multi-core processor. At present, there is no more effective solution to this technical problem.

[0003] It can be seen that how to improve the access efficiency of two cores in a multi-core processor when accessing data, reduce the communication delay between the two cores, and improve the overall performance of the multi-core processor are technical problems that need to be urgently solved by technical personnel in this field. Summary of the invention

[0004] The purpose of the embodiment of the present invention is to provide a data routing method, device, equipment, medium and computer program product of a multi-core processor to solve the problem that two cores in a multi-core processor in the related art are connected when using The routing algorithm suffers from low efficiency in data access, long communication delays, and poor overall performance of multi-core processors.

[0005] In order to solve the above technical problems, the present invention provides a data routing method for a multi-core processor, comprising: when a first core wants to access data to a second core, determining whether the first core and the second core are in different rows and columns of a matrix topology; the first core and the second core are two different cores in a multi-core processor, all cores in the multi-core processor constitute the matrix topology, and all cores are connected to a route in a one-to-one correspondence; if so, then counting the data access frequency of the first core to the second core to obtain a target frequency; if the target frequency is greater than a preset frequency, then based on the principle that the route can perform data transmission in any direction, respectively determining the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core; based on the principle of shortest communication delay, determining the final route transmission path corresponding to the first core when accessing the second core according to the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core.

[0006] In a specific implementation manner of the present application, after determining whether the first core and the second core are in different rows and columns of the matrix topology, the method further includes: if not, The routing algorithm determines a final routing transmission path corresponding to the first core when accessing the second core.

[0007] In a specific implementation of the present application, after counting the data access frequency of the first core to the second core and obtaining the target frequency, the method further includes: if the target frequency is less than or equal to the preset frequency, continuing to execute the The routing algorithm determines the final routing transmission path corresponding to the first core when accessing the second core.

[0008] In a specific embodiment of the present application, the principle that the routing can be used for data transmission in any direction, respectively determining the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, includes: establishing a plane rectangular coordinate system corresponding to the matrix topology, and respectively determining the coordinates of the routes corresponding to the first core and the second core in the plane rectangular coordinate system, to obtain a first coordinate point and a second coordinate point; respectively determining the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core according to the first coordinate point, the second coordinate point, the shortest routing mapping table, and the second shortest routing mapping table; the creation process of the shortest routing mapping table and the second shortest routing mapping table includes: randomly selecting two cores from the multi-core processor to obtain a third core and a fourth core, and respectively determining the coordinates of the routes corresponding to the third core and the fourth core in the plane rectangular coordinate system, to obtain a third coordinate point and a fourth coordinate point; the third core and the fourth core are in different rows and columns of the matrix topology; firstly transmitting data along the routes in the diagonal direction of the third coordinate point and the fourth coordinate point, and then transmitting data along the X-axis direction or the Y-axis direction. The method comprises the steps of: determining the shortest routing transmission path when the third core accesses the fourth core based on the principle of data transmission by routing; determining the shortest routing transmission path corresponding to any two cores in different rows and columns in the matrix topology when performing data access according to the shortest routing transmission path when the third core accesses the fourth core, and creating the shortest routing mapping table according to the shortest routing transmission path corresponding to any two cores in different rows and columns in the matrix topology when performing data access; adding 1 to the abscissa or ordinate of the third coordinate point to obtain a fifth coordinate point, and firstly following the fifth coordinate point and The principle is to perform data transmission along the diagonal direction of the fourth coordinate point and then perform data transmission along the route in the X-axis direction or the Y-axis direction to determine the second shortest route transmission path when the third core accesses the fourth core; determine the second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data according to the second shortest route transmission path when the third core accesses the fourth core, and create the second shortest route mapping table according to the second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data.

[0009] In a specific embodiment of the present application, the principle of first performing data transmission along the route in the diagonal direction of the third coordinate point and the fourth coordinate point and then performing data transmission along the route in the X-axis direction or the Y-axis direction is used to determine the shortest route transmission path for the third core when accessing the fourth core, including: judging whether the routes in the diagonal direction of the third coordinate point and the fourth coordinate point are both on the same straight line; if so, determining the route transmission path in the diagonal direction of the third coordinate point and the fourth coordinate point as the shortest route transmission path for the third core when accessing the fourth core; if not, determining a coordinate point with the same horizontal coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point to obtain a first intermediate coordinate point, and determining a coordinate point with the same vertical coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point to obtain a second intermediate coordinate point; first performing data transmission along the diagonal direction of the third coordinate point and the fourth coordinate point to obtain a second intermediate coordinate point; The principle is that data is transmitted along the connection line between the third coordinate point and the first intermediate coordinate point to reach the first intermediate coordinate point, and then data is transmitted along the Y-axis direction to reach the fourth coordinate point, and the number of route forwardings that the third core passes through when accessing the fourth core is determined to obtain a first value; the principle is that data is first transmitted along the connection line between the third coordinate point and the second intermediate coordinate point to reach the second intermediate coordinate point, and then data is transmitted along the X-axis direction to reach the fourth coordinate point, and the number of route forwardings that the third core passes through when accessing the fourth core is determined to obtain a second value; it is determined whether the first value is less than the second value; if so, the route transmission path that first transmits data along the connection line between the third coordinate point and the first intermediate coordinate point to reach the first intermediate coordinate point, and then transmits data along the Y-axis direction to reach the fourth coordinate point is determined as the shortest route transmission path for the third core when accessing the fourth core.

[0010] In a specific embodiment of the present application, after determining whether the first value is less than the second value, it also includes: if not, the routing transmission path that first transmits data along the connecting line between the third coordinate point and the second intermediate coordinate point to reach the second intermediate coordinate point, and then transmits data along the X-axis direction to reach the fourth coordinate point is determined as the shortest routing transmission path for the third core when accessing the fourth core.

[0011] In a specific embodiment of the present application, the principle of minimizing communication delay is used to determine the final routing transmission path corresponding to the first core when accessing the second core according to the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, including: determining the final routing transmission path corresponding to the first core when accessing the second core according to the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core.

[0012] In a specific embodiment of the present application, the determining of the final routing transmission path corresponding to the first core when accessing the second core based on the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core, includes: determining all core groups performing data transmission in the multi-core processor at the current moment to obtain a first set; determining a second set based on the first set; wherein the two cores corresponding to any element in the second set are in different rows and columns of the matrix topology; determining the shortest routing transmission path when the two cores corresponding to each element in the second set perform data access to obtain a first path set; determining the shortest routing transmission path when the first core accesses the second core excluding the first core and the second core in the shortest routing transmission path. The method comprises the steps of: calculating the total number of times that all the routes in the first route set appear in the shortest route transmission path corresponding to each element in the first path set, and obtaining the first number; determining the second shortest route transmission path when the two cores corresponding to each element in the second set perform data access, and obtaining the second path set; determining other routes except the routes corresponding to the first core and the second core in the second shortest route transmission path when the first core accesses the second core, and obtaining the second route set; determining the total number of times that all the routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set, and obtaining the second number; and determining the final route transmission path corresponding to the first core when the first core accesses the second core according to the first number and the second number.

[0013] In a specific embodiment of the present application, determining the final routing transmission path corresponding to the first core when accessing the second core based on the first number and the second number includes: judging whether the sum of the first number and a first preset threshold value is less than the second number; if so, determining the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core; if not, determining the second shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core.

[0014] In a specific implementation of the present application, it also includes: setting the first preset threshold based on the principle of preferentially selecting the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core.

[0015] In a specific implementation of the present application, after determining the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set to obtain the second number, the method further includes: determining a third set according to the first set; wherein the two cores corresponding to any one element in the third set are in the same column or row of the matrix topology; determining the shortest route transmission path of the two cores corresponding to each element in the third set when performing data access to obtain a third path set; calculating the total number of times all routes in the first route set appear in the shortest route transmission path corresponding to each element in the third path set to obtain the third number; determining the second shortest route transmission path of the two cores corresponding to each element in the third set when performing data access to obtain a fourth path set; determining the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the fourth path set to obtain the fourth number; determining the final route transmission path corresponding to the first core when accessing the second core according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value.

[0016] In a specific implementation of the present application, determining the final routing transmission path corresponding to the first core when accessing the second core according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value includes: multiplying the first number by the first weight value to obtain a first product value, and multiplying the third number by the third weight value to obtain a third product value; adding the first product value and the third product value to obtain a first added value; multiplying the second number by the second weight value to obtain a third product value. The method comprises the following steps: obtaining a first core accessing the second core and determining a product of the fourth number of times and the fourth weight value to obtain a fourth product value; adding the second product value and the fourth product value to obtain a second addition value; judging whether the sum of the first addition value and the second preset threshold value is less than the second addition value; if so, determining the shortest route transmission path when the first core accesses the second core as the final route transmission path corresponding to the first core when accessing the second core; if not, determining the second shortest route transmission path when the first core accesses the second core as the final route transmission path corresponding to the first core when accessing the second core.

[0017] In order to solve the above technical problems, the present invention also provides a data routing device for a multi-core processor, comprising: a memory for storing a computer program; a processor for executing the computer program to implement the steps of a data routing method for a multi-core processor as disclosed above.

[0018] In order to solve the above technical problem, the present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of a data routing method for a multi-core processor as disclosed above are implemented.

[0019] In order to solve the above technical problem, the present invention also provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of a data routing method for a multi-core processor as disclosed above.

[0020] Beneficial effect: In the data routing method for a multi-core processor provided by the present invention, when the first core wants to access data to the second core, it is first determined whether the first core and the second core are in different rows and columns of the matrix topology; the first core and the second core are two different cores in the multi-core processor, all the cores in the multi-core processor form a matrix topology, and all the cores are connected to a route in a one-to-one correspondence; if the first core and the second core are in different rows and columns of the matrix topology, it means that the first core and the second core are in different rows and columns of the matrix topology. The routing transmission path calculated by the routing algorithm when the first core accesses the second core is not the shortest routing transmission path when the first core accesses the second core. At this time, it is necessary to count the frequency of the first core sending data to the second core to obtain the target frequency. If the target frequency is greater than the preset frequency, it means that the frequency of the first core sending data to the second core is higher. In this case, it is not limited to the original physical communication link in the multi-core processor, but based on the principle that routing can transmit data in any direction, the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core are determined separately. Under this setting, since routing can transmit data in any direction, compared to The routing algorithm can relatively reduce the number of routing forwardings that two cores in a multi-core processor need to go through when accessing data.

[0021] Furthermore, after determining the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, the shortest communication delay is taken as the principle, and the final routing transmission path corresponding to the first core when accessing the second core is determined according to the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core. In this way, the network congestion problem when the two cores in the multi-core processor access data is fully considered, thereby significantly reducing the communication delay when the two cores in the multi-core processor access data, and greatly improving the overall performance of the multi-core processor.

[0022] Correspondingly, the data routing device, equipment, medium and computer program product of a multi-core processor provided by the present invention also have the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1 for Schematic diagram of the processor architecture.

[0025] Figure 2 The present invention provides a flowchart of a data routing method for a multi-core processor.

[0026] Figure 3 A topological diagram of a multi-core processor provided in an embodiment of the present invention.

[0027] Figure 4 for Figure 3A data forwarding diagram of any route in the topology diagram shown.

[0028] Figure 5 A hardware architecture diagram of two different cores in a multi-core processor when performing data access provided by an embodiment of the present invention.

[0029] Figure 6 A structural diagram of a data routing device for a multi-core processor provided by an embodiment of the present invention.

[0030] Figure 7 A structural diagram of a data routing device for a multi-core processor provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0032] The terms "including" and "having" in the specification of the present invention and the above-mentioned drawings, as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but may include steps or units that are not listed.

[0033] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0034] The most common multi-core processor now is 16 cores. processor( , the fifth generation of reduced instruction set computers), in The processor architecture usually adopts See Figure 1 , Figure 1 for Schematic diagram of the processor architecture. Figure 1 shown There are 16 cores in the processor, and each core is connected to a router. From the software application layer, these 16 cores are a processor. ( , central processing unit). That is to say, the operation of application software is usually performed by these 16 cores in the processor, and the operation and processing of data are completed in the cores of the processor, while the router connected to the core is responsible for forwarding the data. For example, if the running program on core 1 needs to access the result of the operation program on core 15, core 1 will issue a command to access the corresponding cache on core 15, and retrieve the data from the cache corresponding to core 15, and then perform the operation on core 1. Among them, how the instruction issued by core 1 finds core 15 is the function to be realized by routing forwarding.

[0035] In the related art, data access between two cores in a multi-core processor is usually performed by This is done by a routing algorithm. See Figure 1 If core 0 wants to access data from core 15, the instruction issued by core 0 must first pass through routes 1, 2, and 3 along the X-axis, and after reaching route 3, it must pass through routes 7, 11, and 15 along the Y-axis before core 0 can access the data in core 15. In this process, core 0 needs to pass through 6 routes when accessing data from core 15, and the communication delay between processes is large, which will greatly reduce the overall performance of the multi-core processor.

[0036] In order to solve the above technical problems, the present invention provides a new data routing method for a multi-core processor. The method can solve the problem that two cores in a multi-core processor in the prior art are connected in parallel. The algorithm suffers from low efficiency in data access, long communication delays, and poor overall performance of multi-core processors.

[0037] See also Figure 2 , Figure 2 A flowchart of a data routing method for a multi-core processor provided by an embodiment of the present invention, the method comprising:

[0038] Step S11: When the first core wants to access data to the second core, determine whether the first core and the second core are in different rows and columns of the matrix topology; the first core and the second core are two different cores in the multi-core processor, all the cores in the multi-core processor form a matrix topology, and all the cores are connected to a route one by one.

[0039] Step S12: If yes, the data access frequency of the first core to the second core is counted to obtain the target frequency.

[0040] Step S13: If the target frequency is greater than the preset frequency, based on the principle that routing can transmit data in any direction, the shortest routing transmission path and the second shortest routing transmission path are respectively determined when the first core accesses the second core.

[0041] Step S14: Based on the principle of shortest communication delay, a final routing transmission path corresponding to the first core when accessing the second core is determined according to the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core.

[0042] A data routing method for a multi-core processor provided by the present invention is described by taking a process in a first core of the multi-core processor as the execution subject. The multi-core processor is provided with multiple cores, which are usually arranged in a matrix array in the multi-core processor. In other words, all the cores in the multi-core processor form a matrix topology. Moreover, all the cores in the multi-core processor are connected to a routing one by one. The first core and the second core are two different cores in the multi-core processor.

[0043] When the first core wants to access data from the second core, it first determines whether the first core and the second core are in different rows and columns of the matrix topology. If the first core and the second core are in different rows and columns of the matrix topology, it means that the use The routing algorithm cannot find the shortest routing transmission path when the first core accesses the second core. At this time, in order to reduce the resource overhead of the multi-core processor, it is also necessary to count the data access frequency of the first core to the second core, obtain the target frequency, and determine whether the target frequency is greater than the preset frequency.

[0044] If the target frequency is greater than the preset frequency, based on the principle that the route can transmit data in any direction, the shortest route transmission path and the second shortest route transmission path are determined when the first core accesses the second core. In other words, when the data access frequency of the first core to the second core is greater than the preset frequency, the route on any core in the multi-core processor can transmit data not only along the X-axis and the Y-axis, but also along any direction.

[0045] See also Figure 3 , Figure 3 A topological diagram of a multi-core processor provided by an embodiment of the present invention. Figure 3 The multi-core processor shown has 16 cores, and each core is connected to a corresponding route. In the rectangular coordinate system established by the matrix topology of the multi-core processor, the route connected to each core can transmit data along the X-axis and Y-axis directions, as well as along the route connected to the diagonal direction. For example: Figure 3 In addition to forwarding data to routes 1 and 4 along the X-axis and Y-axis directions respectively, route 0 in the figure can also forward data to route 5 along its diagonal direction.

[0046] See also Figure 4 , Figure 4 for Figure 3The data forwarding diagram of any route in the topology diagram shown. Figure 4 It can be seen that Figure 3 Any route in the network can forward and transmit data not only along the X-axis and Y-axis directions, but also along its diagonal direction. Compared with the prior art, we can call the link that transmits data along the X-axis and Y-axis directions a regular routing link, and the link that transmits data along its diagonal direction a special routing link. In the related art, a multi-core processor generally only sets a regular routing link between two adjacent cores, and does not set a special routing link.

[0047] Based on the principle that routing can transmit data in any direction, it is necessary to determine the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core. Under this setting, the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core include some routing transmission paths in the diagonal position. Compared with only using the routing transmission paths on the straight line of the X-axis direction and the Y-axis direction, this can reduce the number of routing forwardings when the first core accesses the second core, thereby improving the efficiency of the first core in accessing data to the second core.

[0048] In addition, considering that when a multi-core processor performs related operations, there may sometimes be data access between multiple groups of cores within it. In order to ensure that there is no particularly long communication delay when the first core accesses the second core, after determining the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, it is also necessary to take the shortest communication delay as the principle and determine the final routing transmission path corresponding to the first core when accessing the second core based on the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core.

[0049] Under this setting, the network congestion problem when the two cores in the multi-core processor access data is fully considered, which can significantly reduce the communication delay when the two cores in the multi-core processor access data and greatly improve the overall performance of the multi-core processor.

[0050] Based on the above embodiment, this embodiment further illustrates and optimizes the technical solution. As a preferred implementation, the above step: after determining whether the first core and the second core are in different rows and columns of the matrix topology, further includes: if not, then according to The routing algorithm determines the final routing transmission path corresponding to the first core when accessing the second core.

[0051] In practical applications, if the first core and the second core are not in different rows and columns of the matrix topology, it means that the first core and the second core are in the same row or the same column of the matrix topology. In this case, you can continue to use The routing algorithm determines the final routing transmission path corresponding to the first core when accessing the second core. In other words, the first core forwards data along the route in the X-axis or Y-axis direction of the rectangular coordinate system where the matrix topology is located, and can find the shortest routing transmission path when accessing the second core.

[0052] As a preferred implementation, the above step of: counting the data access frequency of the first core to the second core, and obtaining the target frequency, further includes: if the target frequency is less than or equal to the preset frequency, continuing to execute according to The routing algorithm determines the final routing transmission path corresponding to the first core when accessing the second core.

[0053] In this embodiment, if the data access frequency of the first core to the second core is less than or equal to the preset frequency, it means that the data access frequency of the first core to the second core is low. From the perspective of resource overhead and power consumption required by the multi-core processor, it is not necessary to establish a routing communication link on the diagonal line between the first core and the second core. The routing algorithm can be used to determine the final routing transmission path corresponding to the first core when accessing the second core.

[0054] If the routing algorithm of the present invention that can transmit data in any direction is called a special routing algorithm, then the technical solution provided by this embodiment can be implemented under different trigger conditions. Adaptive switching between routing algorithms and special routing algorithms can accurately determine the shortest routing transmission path when the first core accesses data to the second core in different application scenarios.

[0055] Based on the above embodiments, the present embodiment further illustrates and optimizes the technical solution. As a preferred implementation mode, the above steps: based on the principle that routing can transmit data in any direction, respectively determine the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, including: establishing a plane rectangular coordinate system corresponding to the matrix topology, and respectively determining the coordinates of the routes corresponding to the first core and the second core in the plane rectangular coordinate system to obtain a first coordinate point and a second coordinate point; respectively determine the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core according to the first coordinate point, the second coordinate point, the shortest routing mapping table and the second shortest routing mapping table.

[0056] The creation process of the shortest route mapping table and the second shortest route mapping table includes: randomly selecting two cores from the multi-core processor to obtain the third core and the fourth core, and respectively determining the coordinates of the routes corresponding to the third core and the fourth core in the plane rectangular coordinate system to obtain the third coordinate point and the fourth coordinate point; the third core and the fourth core are in different rows and columns of the matrix topology; based on the principle of first transmitting data along the route in the diagonal direction of the third coordinate point and the fourth coordinate point, and then transmitting data along the route in the X-axis direction or the Y-axis direction, determine the shortest route transmission path when the third core accesses the fourth core; according to the shortest route transmission path when the third core accesses the fourth core, determine the shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data, and according to the shortest route transmission path in the matrix topology The shortest route mapping table is created based on the shortest route transmission path corresponding to any two cores in different rows and columns when accessing data; 1 is added to the abscissa or ordinate of the third coordinate point to obtain the fifth coordinate point, and the second shortest route transmission path of the third core when accessing the fourth core is determined based on the principle of first transmitting data along the route in the diagonal direction of the fifth coordinate point and the fourth coordinate point, and then transmitting data along the route in the X-axis direction or the Y-axis direction; the second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data is determined based on the second shortest route transmission path of the third core when accessing the fourth core, and the second shortest route mapping table is created based on the second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data.

[0057] In this embodiment, in order to determine the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core, it is necessary to pre-create a shortest route mapping table and a second shortest route mapping table. Among them, the shortest route mapping table stores the shortest route transmission paths corresponding to any two cores in different rows and columns in the matrix topology when performing data access, that is, the shortest route mapping table stores any two cores in different rows and columns in the matrix topology and their corresponding shortest route transmission paths. The second shortest route mapping table stores the second shortest route transmission paths corresponding to any two cores in different rows and columns in the matrix topology when performing data access, that is, the second shortest route mapping table stores any two cores in different rows and columns in the matrix topology and their corresponding second shortest route transmission paths.

[0058] Specifically, when creating the shortest route mapping table, firstly, two cores are randomly selected from the multi-core processor to obtain the third core and the fourth core, and the coordinates of the routes corresponding to the third core and the fourth core in the plane rectangular coordinate system are determined respectively to obtain the third coordinate point and the fourth coordinate point. The rectangular coordinate system is a plane rectangular coordinate system corresponding to the matrix topology. The third core and the fourth core are in different rows and columns of the matrix topology.

[0059] Since the third core and the fourth core are located in different rows and columns of the matrix topology, the shortest routing transmission path corresponding to the third core when accessing data from the fourth core must include a routing transmission path on the diagonal line. Figure 3 In the example, if core 0 wants to access data from core 15, it can be observed that the shortest route transmission path corresponding to core 0 when accessing data from core 15 is: route 0 → route 5 → route 10 → route 15. If core 1 wants to access data from core 11, it can be observed that the shortest route transmission path corresponding to core 1 when accessing data from core 11 is: route 1 → route 6 → route 11. If core 0 wants to access data from core 11, it can be observed that the shortest route transmission path corresponding to core 0 when accessing data from core 11 is: route 0 → route 5 → route 10 → route 11.

[0060] In view of this situation, in order to find the shortest routing transmission path when the third core accesses the fourth core, the shortest routing transmission path when the third core accesses the fourth core can be determined based on the principle of first transmitting data along the route in the diagonal direction of the third coordinate point and the fourth coordinate point, and then transmitting data along the route in the X-axis direction or the Y-axis direction.

[0061] When the shortest routing transmission path for the third core to access the fourth core is determined, it is equivalent to determining the shortest routing transmission path between any group of cores in different rows and columns in the matrix topology. At this time, the shortest routing transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data can be determined in the same way. In this case, a shortest routing mapping table can be created based on the shortest routing transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data.

[0062] When creating the second shortest route mapping table, first add 1 to the horizontal coordinate or vertical coordinate of the third coordinate point to obtain the fifth coordinate point. Then, the second shortest route transmission path of the third core when accessing the fourth core is determined based on the principle of first transmitting data along the route in the diagonal direction of the fifth coordinate point and the fourth coordinate point, and then transmitting data along the route in the X-axis direction or the Y-axis direction.

[0063] It should be noted that in actual applications, in order to avoid routing access blocking or line congestion, when determining the second shortest routing transmission path when two adjacent cores access data from other cores, the routes corresponding to the adjacent cores need to be transmitted separately along the X-axis and the Y-axis. Figure 3 In the example, if core 0 wants to access data from core 15, the next shortest route transmission path corresponding to core 0 when accessing data from core 15 is: route 0 → route 1 → route 6 → route 11 → route 15. If core 1 wants to access data from core 11, the next shortest route transmission path corresponding to core 1 when accessing data from core 11 is: route 1 → route 5 → route 10 → route 11. Under this setting, when determining the next shortest route transmission path when the third core accesses the fourth core, it is actually set based on one more route forwarding than the shortest route transmission path when the third core accesses the fourth core.

[0064] When the second shortest routing transmission path of the third core when accessing the fourth core is determined, it is equivalent to determining the second shortest routing transmission path between any group of cores in different rows and columns in the matrix topology. In the same way, the second shortest routing transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data can be determined. In this case, a second shortest routing mapping table can be created based on the second shortest routing transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data.

[0065] After the shortest route mapping table and the second shortest route mapping table are created, any two cores in different rows and columns in the matrix topology and their corresponding shortest route transmission paths can be found from the shortest route mapping table, and any two cores in different rows and columns in the matrix topology and their corresponding second shortest route transmission paths can be found from the second shortest route mapping table.

[0066] In this case, in order to determine the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core, it is only necessary to determine the coordinates of the routes corresponding to the first core and the second core in the plane rectangular coordinate system respectively, and obtain the first coordinate point and the second coordinate point; then, based on the first coordinate point, the second coordinate point and the shortest route mapping table, the shortest route transmission path when the first core accesses the second core can be determined; finally, based on the first coordinate point, the second coordinate point and the second shortest route mapping table, the second shortest route transmission path when the first core accesses the second core can be determined.

[0067] Obviously, through the technical solution provided by this embodiment, the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core can be found more quickly from the shortest route mapping table and the second shortest route mapping table respectively.

[0068] As a preferred implementation, the above steps: based on the principle of first transmitting data along the route in the diagonal direction of the third coordinate point and the fourth coordinate point, and then transmitting data along the route in the X-axis direction or the Y-axis direction, determine the shortest route transmission path for the third core when accessing the fourth core, including: judging whether the routes in the diagonal direction of the third coordinate point and the fourth coordinate point are both on the same straight line; if so, determining the route transmission path in the diagonal direction of the third coordinate point and the fourth coordinate point as the shortest route transmission path for the third core when accessing the fourth core; if not, determining a coordinate point with the same horizontal coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point to obtain a first intermediate coordinate point, and determining a coordinate point with the same vertical coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point to obtain a second intermediate coordinate point; first transmitting data along the connecting line between the third coordinate point and the first intermediate coordinate point to reach the first intermediate coordinate point, and then transmitting data along the Y-axis direction. Based on the principle that data transmission arrives at the fourth coordinate point, the number of route forwardings that the third core passes through when accessing the fourth core is determined to obtain a first value; based on the principle that data transmission first arrives at the second intermediate coordinate point along the connecting line between the third coordinate point and the second intermediate coordinate point, and then arrives at the fourth coordinate point along the X-axis direction, the number of route forwardings that the third core passes through when accessing the fourth core is determined to obtain a second value; it is determined whether the first value is less than the second value; if so, the route transmission path that first arrives at the first intermediate coordinate point along the connecting line between the third coordinate point and the first intermediate coordinate point, and then arrives at the fourth coordinate point along the Y-axis direction is determined as the shortest route transmission path for the third core when accessing the fourth core; if not, the route transmission path that first arrives at the second intermediate coordinate point along the connecting line between the third coordinate point and the second intermediate coordinate point, and then arrives at the fourth coordinate point along the X-axis direction is determined as the shortest route transmission path for the third core when accessing the fourth core.

[0069] In this embodiment, the process of determining the shortest route transmission path when the third core accesses the fourth core is specifically described. When determining the shortest route transmission path when the third core accesses the fourth core, firstly, it is determined whether the routes in the diagonal direction of the third coordinate point and the fourth coordinate point are both on the same straight line.

[0070] If the routes in the diagonal direction of the third coordinate point and the fourth coordinate point are all on the same straight line, it means that the third core only needs to forward data through the routes in the diagonal direction of the third coordinate point and the fourth coordinate point to quickly access the fourth core with the shortest route transmission path. In this case, the route transmission path in the diagonal direction of the third coordinate point and the fourth coordinate point can be determined as the shortest route transmission path for the third core to access the fourth core.

[0071] See also Figure 3 , assuming that the coordinates of route 12 corresponding to core 12 are , if core 0 wants to access data from core 15, then the coordinates of route 0 are , the coordinates of route 15 are The diagonal routes of route 0 and route 15 are on the same straight line. In this case, route 0 → route 5 → route 10 → route 15 can be determined as the shortest route transmission path when core 0 accesses core 15.

[0072] If the routes in the diagonal direction of the third coordinate point and the fourth coordinate point are not all on the same straight line, it is necessary to first determine a coordinate point with the same horizontal coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point to obtain the first intermediate coordinate point, and determine a coordinate point with the same vertical coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point to obtain the second intermediate coordinate point.

[0073] Then, based on the principle of first transmitting data along the connection line between the third coordinate point and the first intermediate coordinate point to reach the first intermediate coordinate point, and then transmitting data along the Y-axis direction to reach the fourth coordinate point, the number of route forwardings that the third core passes through when accessing the fourth core is determined to obtain a first value; thereafter, based on the principle of first transmitting data along the connection line between the third coordinate point and the second intermediate coordinate point to reach the second intermediate coordinate point, and then transmitting data along the X-axis direction to reach the fourth coordinate point, the number of route forwardings that the third core passes through when accessing the fourth core is determined to obtain a second value.

[0074] Finally, it is determined whether the first value is less than the second value; if the first value is less than the second value, the route transmission path that first transmits data along the connection line between the third coordinate point and the first intermediate coordinate point to the first intermediate coordinate point, and then transmits data along the Y-axis direction to the fourth coordinate point is determined as the shortest route transmission path for the third core to access the fourth core. If the first value is greater than the second value, the route transmission path that first transmits data along the connection line between the third coordinate point and the second intermediate coordinate point to the second intermediate coordinate point, and then transmits data along the X-axis direction to the fourth coordinate point is determined as the shortest route transmission path for the third core to access the fourth core.

[0075] See also Figure 3 , assuming that the coordinates of route 12 corresponding to core 12 are , if core 0 wants to access data from core 11, then the coordinates of route 0 corresponding to core 0 are , the coordinates of route 11 corresponding to core 11 are Since the diagonal routes of route 0 and route 11 are not all on the same straight line, it is necessary to find the first midpoint and the second midpoint between route 0 and route 11. The coordinates of the first midpoint between route 0 and route 11 are , the coordinates of the second midpoint are .

[0076] In this case, if you first follow route 0 and the first intermediate coordinate point The connecting line between the two carries out data transmission to the first intermediate point , and then transmit data along the Y-axis direction to reach router 11 , then the routing transmission path of core 0 when accessing core 11 is: route 0→route 5→route 10→route 15→route 11, the number of routing forwardings it passes through is 5, and the first value is 5 at this time.

[0077] If you first follow route 0 and the second intermediate coordinate point The connecting line between the two carries out data transmission to the second intermediate point , and then transmit data along the X-axis direction to route 11 , then the routing transmission path of core 0 when accessing core 11 is: route 0 → route 5 → route 10 → route 11, and the number of routing forwardings it passes through is 4, and the second value is 4. Since the first value 5 is greater than the first value 4, route 0 → route 5 → route 10 → route 11 can be determined as the shortest routing transmission path when core 0 accesses core 11.

[0078] When determining the second shortest routing transmission path when the third core accesses the fourth core, it is necessary to first add 1 to the abscissa or ordinate of the third coordinate point to obtain the fifth coordinate point, and then the second shortest routing transmission path when the third core accesses the fourth core can be determined according to the above method for determining the shortest routing transmission path when the third core accesses the fourth core. This process will not be described in detail here.

[0079] Obviously, through the technical solution provided by this embodiment, the shortest routing transmission path when the third core accesses the fourth core can be accurately found.

[0080] Based on the above embodiments, this embodiment further illustrates and optimizes the technical solution. As a preferred implementation mode, the above steps: based on the principle of shortest communication delay, determine the final routing transmission path corresponding to the first core when accessing the second core according to the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, including: determining the final routing transmission path corresponding to the first core when accessing the second core according to the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core.

[0081] In this embodiment, when the shortest communication delay is taken as the principle and the final routing transmission path corresponding to the first core when accessing the second core is determined based on the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, the final routing transmission path corresponding to the first core when accessing the second core is actually determined based on the line congestion information on the shortest routing transmission path when the first core accesses the second core and the line congestion information on the second shortest routing transmission path when the first core accesses the second core.

[0082] It is not difficult to imagine that in the process of multi-core processors performing calculations and processing on data, there may be multiple groups of cores accessing and transmitting data at the same time. In this case, line congestion will inevitably occur on certain routing transmission paths. If the first core and the second core forward and transmit data on a routing path with line congestion, the communication delay time of the first core when accessing data from the second core will inevitably increase. Therefore, in this embodiment, the final routing transmission path corresponding to the first core when accessing the second core is determined based on the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core.

[0083] Obviously, through the technical solution provided in this embodiment, the communication delay time when the first core accesses data to the second core can be reduced.

[0084] As a preferred implementation, the above steps: determining the final routing transmission path corresponding to the first core when accessing the second core according to the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core, include: determining all core groups performing data transmission in the multi-core processor at the current moment to obtain a first set; determining the second set according to the first set; wherein the two cores corresponding to any element in the second set are in different rows and columns of the matrix topology; determining the shortest routing transmission path when the two cores corresponding to each element in the second set perform data access to obtain a first path set; determining the shortest routing transmission path when the first core accesses the second core, excluding the core groups relative to the first core and the second core. The method comprises the following steps: calculating the total number of times that all the routes in the first route set appear in the shortest route transmission paths corresponding to the elements in the first path set, and obtaining the first number; determining the second shortest route transmission paths when the two cores corresponding to the elements in the second set perform data access, and obtaining the second path set; determining the other routes except the routes corresponding to the first core and the second core in the second shortest route transmission paths when the first core accesses the second core, and obtaining the second route set; determining the total number of times that all the routes in the second route set appear in the second shortest route transmission paths corresponding to the elements in the second path set, and obtaining the second number; determining the final route transmission path corresponding to the first core when accessing the second core according to the first number and the second number.

[0085] In this embodiment, when determining the final routing transmission path corresponding to the first core when accessing the second core based on the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core, firstly, all core groups performing data transmission in the multi-core processor are determined at the current moment to obtain a first set.

[0086] In most application scenarios, the line congestion of the first core when accessing the second core is determined based on the routing congestion on the special transmission path. Therefore, in this embodiment, in order to determine the line congestion of the first core when accessing the second core, it is necessary to determine the second set based on the first set. Among them, the two cores corresponding to any element in the second set are in different rows and columns of the matrix topology. Through this operation method, it is equivalent to screening out the core groups in different rows and columns in the matrix topology and performing data access from the first set.

[0087] Then, the shortest route transmission path of the two cores of the core group corresponding to each element in the second set when accessing data is determined to obtain the first path set, and other routes except the routes corresponding to the first core and the second core in the shortest route transmission path when the first core accesses the second core are determined to obtain the first route set; thereafter, the total number of times all the routes in the first route set appear in the shortest route transmission path corresponding to each element in the first path set is calculated to obtain the first count.

[0088] According to the same method, the second shortest route transmission path of the two cores corresponding to each element in the second set when accessing data can be first determined to obtain the second path set, and other routes except the routes corresponding to the first core and the second core in the second shortest route transmission path when the first core accesses the second core can be determined to obtain the second route set; then, the total number of times all the routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set can be determined to obtain the second number.

[0089] After obtaining the first number and the second number, it is equivalent to obtaining the line congestion information on the shortest routing transmission path and the second shortest routing transmission path used to characterize the first core when accessing the second core. At this time, the final routing transmission path corresponding to the first core when accessing the second core can be determined based on the first number and the second number.

[0090] As a preferred implementation, the above step: determining the final routing transmission path corresponding to the first core when accessing the second core based on the first number and the second number, includes: judging whether the sum of the first number and the first preset threshold value is less than the second number; if so, determining the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core; if not, determining the second shortest routing transmission path when the first core is in the second core as the final routing transmission path corresponding to the first core when accessing the second core.

[0091] In this embodiment, when determining the final routing transmission path corresponding to the first core when accessing the second core according to the first number and the second number, firstly, it is determined whether the sum of the first number and the first preset threshold is less than the second number.

[0092] If the sum of the first number and the first preset threshold is less than the second number, it means that the line congestion on the shortest routing transmission path when the first core accesses the second core is better than the line congestion on the second shortest routing transmission path when the first core accesses the second core. At this time, the shortest routing transmission path when the first core accesses the second core can be determined as the final routing transmission path corresponding to the first core when accessing the second core.

[0093] If the sum of the first number and the first preset threshold is greater than or equal to the second number, it means that the line congestion on the second shortest routing transmission path when the first core accesses the second core is better than the line congestion on the shortest routing transmission path when the first core accesses the second core. At this time, the second shortest routing transmission path when the first core accesses the second core can be determined as the final routing transmission path corresponding to the first core when accessing the second core.

[0094] It should be noted that when setting the first preset threshold, the first preset threshold is set on the principle of giving priority to selecting the shortest route transmission path when the first core accesses the second core as the final route transmission path corresponding to the first core when accessing the second core. That is, the purpose of setting the first preset threshold is to allow the multi-core processor to select the shortest route transmission path when the first core accesses the second core as the final route transmission path when the first core accesses the second core with a greater probability. Unless the load of routing forwarding on the shortest route transmission path when the first core accesses the second core is too large and the delay time is long, which will affect the overall performance of the multi-core processor, the second shortest route transmission path when the first core accesses the second core will be determined as the final route transmission path corresponding to the first core when accessing the second core.

[0095] Here is a specific example to illustrate. Figure 3 , when core 0 accesses core 15, its shortest routing transmission path is: route 0→route 5→route 10→route 15, and the forwarding routes in its shortest routing transmission path are route 5 and route 10 (route 5 and route 10 are elements in the first routing set). At the current moment, there are other two core groups in the matrix topology that correspond to the shortest routing transmission paths when performing data access, namely, route 2→route 5→route 8, and route 7→route 10→route 13 (route 2→route 5→route 8, and route 7→route 10→route 13 are elements in the first path set). In this case, the total number of times all routes in the first routing set appear in the shortest routing transmission paths corresponding to each element in the first path set is 2 (the first number is 2).

[0096] When core 0 accesses core 15, its second shortest route transmission path is: route 0 → route 1 → route 6 → route 11 → route 15, and the forwarding routes in the second shortest route transmission path are route 1, route 6 and route 11 (route 1, route 6 and route 11 are elements in the second route set). At the current moment, there are other two core groups in the matrix topology that correspond to the second shortest route transmission paths when accessing data, that is, route 3 → route 6 → route 9, and route 8 → route 5 → route 1 (route 3 → route 6 → route 9, and route 8 → route 5 → route 1 are elements in the second path set). Then the total number of times all routes in the second route set appear in the shortest route transmission paths corresponding to each element in the second path set is 2 (the second number is 2).

[0097] Assuming that the first preset threshold is 0, the first number 2 is equal to the sum of the second number 2 and the first preset threshold 0. At this time, the shortest route transmission path of core 0 when accessing core 15, route 0→route 5→route 10→route 15, can be determined as the final route transmission path corresponding to core 0 when accessing core 15.

[0098] Obviously, through the technical solution provided by this embodiment, it is possible to accurately determine the routing transmission path with the minimum communication delay time when the first core accesses data to the second core.

[0099] As a preferred implementation, the above step: determining the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set, and obtaining the second number, further includes: determining a third set according to the first set; wherein the two cores corresponding to any element in the third set are in the same column or row of the matrix topology; determining the shortest route transmission path of the two cores corresponding to each element in the third set when performing data access, and obtaining a third path set; calculating the total number of times all routes in the first route set appear in the shortest route transmission path corresponding to each element in the third path set, and obtaining the third number; determining the second shortest route transmission path of the two cores corresponding to each element in the third set when performing data access, and obtaining a fourth path set; determining the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the fourth path set, and obtaining the fourth number; determining the final route transmission path corresponding to the first core when accessing the second core according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value.

[0100] In this embodiment, in order to more accurately determine the final routing transmission path when the first core accesses the second core, the third set can also be determined based on the first set. The two cores corresponding to any element in the third set are in the same column or row of the matrix topology. Then, the shortest routing transmission path when the two cores corresponding to each element in the third set perform data access is determined to obtain the third path set, and the total number of times all the routes in the first routing set appear in the shortest routing transmission path corresponding to each element in the third path set is calculated to obtain the third number.

[0101] Afterwards, the second shortest route transmission path of the two cores corresponding to each element in the third set when accessing data is determined to obtain a fourth path set, and the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the fourth path set is determined to obtain a fourth number.

[0102] Finally, the final routing transmission path corresponding to the first core when accessing the second core is determined according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value.

[0103] As a preferred implementation, the above step: determining the final routing transmission path corresponding to the first core when accessing the second core according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value, includes: obtaining the product of the first number and the first weight value to obtain the first product value, and obtaining the product of the third number and the third weight value to obtain the third product value; adding the first product value and the third product value to obtain the first added value; obtaining the product of the second number and the second weight value to obtain the second product value, and obtaining the product of the fourth number and the fourth weight value to obtain the fourth product value; adding the second product value and the fourth product value to obtain the second added value; judging whether the sum of the first added value and the second preset threshold value is less than the second added value; if so, determining the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core; if not, determining the second shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core.

[0104] In this embodiment, when determining the final routing transmission path corresponding to the first core when accessing the second core according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value, firstly, the product of the first number and the first weight value is obtained to obtain the first product value, and the product of the third number and the third weight value is obtained to obtain the third product value; then, the first product value and the third product value are added to obtain the first added value. After that, the product of the second number and the second weight value is obtained to obtain the second product value, and the product of the fourth number and the fourth weight value is obtained to obtain the fourth product value, and the second product value and the fourth product value are added to obtain the second added value.

[0105] Finally, it is determined whether the sum of the first added value and the second preset threshold value is less than the second added value. If the sum of the first added value and the second preset threshold value is less than the second added value, the shortest route transmission path when the first core accesses the second core is determined as the final route transmission path corresponding to the first core when accessing the second core. If the sum of the first added value and the second preset threshold value is greater than or equal to the second added value, the second shortest route transmission path when the first core accesses the second core is determined as the final route transmission path corresponding to the first core when accessing the second core.

[0106] Here is a specific example to illustrate. Figure 3 , when core 0 accesses core 15, its shortest route transmission path is: route 0→route 5→route 10→route 15, and the forwarding routes in its shortest route transmission path are route 5 and route 10 (route 5 and route 10 are elements in the first route set), and at the current moment, there are two other groups of shortest route transmission paths corresponding to the cores when performing data access in the matrix topology, namely, route 2→route 5→route 8, route 7→route 10→route 13 (route 2→route 5→route 8, and route 7→route 10→route 13 are elements in the first path set), route 0→route 1→route 2→route 3 (route 0→route 1→route 2→route 3 are elements in the third path set), then in this case, the total number of times all routes in the first route set appear in the shortest route transmission path corresponding to each element in the first path set is 2 (the first number is 2), and the total number of times all routes in the first route set appear in the shortest route transmission path corresponding to each element in the third path set is 0 (the third number is 0).

[0107] When core 0 accesses core 15, its second shortest route transmission path is: route 0→route 1→route 6→route 11→route 15, and the forwarding routes in the second shortest route transmission path are route 1, route 6 and route 11 (route 1, route 6 and route 11 are elements in the second route set), and at the current moment, there are other three core groups in the matrix topology corresponding to the second shortest route transmission paths when performing data access, that is, route 3→route 6→route 9, route 8→route 5→route 1 (route 3→route 6→route 9, route 8→route 5→route 1 are elements in the second path set) and route 1→route 2→route 3 (route 1→route 2→route 3 are elements in the fourth path set), then the total number of times all routes in the second route set appear in the shortest route transmission paths corresponding to each element in the second path set is 2 (the second number is 2), and the number of times all routes in the second route set appear in the second shortest route transmission paths corresponding to each element in the fourth path set is 1 (the fourth number is 1).

[0108] Assume that the second preset threshold is 0 and the first weight value is The second weight value is The third weight value is The fourth weight value is ,because At this time, the shortest routing transmission path when core 0 accesses core 15: route 0→route 5→route 10→route 15 can be determined as the final routing transmission path corresponding to core 0 when accessing core 15.

[0109] Obviously, through the technical solution provided by this embodiment, the final routing transmission path when the first core accesses the second core can be accurately determined.

[0110] Based on the above embodiments, the present embodiment further illustrates and optimizes the above technical solution. As a preferred implementation mode, the above steps: based on the principle of shortest communication delay, after determining the final routing transmission path corresponding to the first core when accessing the second core according to the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, also include: real-time monitoring of the final routing transmission path corresponding to the first core when accessing the second core, and determining whether the first core has completed the data access to the second core; if so, determining the route connected by the diagonal line in the final routing transmission path corresponding to the first core when accessing the second core, obtaining the diagonal routing transmission path, and shutting down the physical link of the diagonal routing transmission path.

[0111] In this embodiment, after determining the final routing transmission path corresponding to the first core when accessing the second core, in order to reduce the power consumption of the multi-core processor, the final routing transmission path corresponding to the first core when accessing the second core can also be monitored in real time, and it is determined whether the first core has completed the data access to the second core. If the first core has completed the data access to the second core, the physical link between the first core and the second core is in an idle state. At this time, it is necessary to determine the route connected by the oblique line in the final routing transmission path corresponding to the first core when accessing the second core, obtain the oblique line routing transmission path, and shut down the physical link on the oblique line routing transmission path.

[0112] Obviously, the technical solution provided by this embodiment can reduce the power consumption of the multi-core processor.

[0113] See also Figure 5 , Figure 5 A hardware architecture diagram of two different cores in a multi-core processor provided by an embodiment of the present invention when performing data access. Assume that the first core and the second core are two different cores in the multi-core processor, all cores in the multi-core processor form a matrix topology, and all cores are connected to a route one by one. The first core and the second core are located in different rows and columns of the matrix topology.

[0114] When the first core in the multi-core processor accesses data to the second core, the access monitoring module is first used to determine the data access frequency of the first core to the second core. If the data access frequency of the first core to the second core is less than or equal to the preset threshold, the XY routing module is called and the access monitoring module is used to determine the data access frequency of the first core to the second core. The routing algorithm determines a final routing transmission path when the first core accesses data to the second core.

[0115] If the data access frequency of the first core to the second core is greater than a preset threshold, the multi-directional routing module is used based on the principle that routing can transmit data in any direction, and the optimal route calculation unit and the sub-optimal route calculation unit inside it are used to respectively determine the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core; then, the congestion monitoring unit in the multi-directional routing module will use the shortest communication delay as the principle, and determine the final route transmission path when the first core accesses the second core based on the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core.

[0116] Finally, the link interface control module will monitor the final routing transmission path corresponding to the first core when accessing the second core in real time, and determine whether the first core has completed the data access to the second core. If the first core has completed the data access to the second core, the routing transmission path connected by the slash in the final routing transmission path corresponding to the first core when accessing the second core will be turned off to reduce the power consumption of the multi-core processor.

[0117] The technical solution provided in this embodiment can solve the problem that two cores in a multi-core processor in the related art are used The routing algorithm suffers from low efficiency in data access, long communication delays, and poor overall performance of multi-core processors.

[0118] See also Figure 6 , Figure 6 A structural diagram of a data routing device for a multi-core processor provided by an embodiment of the present invention, the device comprising:

[0119] The access judgment module 21 is used to judge whether the first core and the second core are in different rows and columns of the matrix topology when the first core wants to access data to the second core; the first core and the second core are two different cores in a multi-core processor, all the cores in the multi-core processor constitute the matrix topology, and all the cores are connected to a route one by one.

[0120] The frequency statistics module 22 is used to count the data access frequency of the first core to the second core to obtain a target frequency when the determination result of the access determination module is yes.

[0121] The path calculation module 23 is used to determine the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core based on the principle that routing can transmit data in any direction if the target frequency is greater than the preset frequency.

[0122] The routing determination module 24 is used to determine the final routing transmission path corresponding to the first core when accessing the second core based on the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core, based on the principle of minimizing communication delay.

[0123] In a specific implementation of the present application, it also includes: an XY routing module, which is used to, when the determination result of the access determination module is no, The routing algorithm determines a final routing transmission path corresponding to the first core when accessing the second core.

[0124] In a specific implementation of the present application, it further includes: a routing jump module, which is used to count the data access frequency of the first core to the second core and obtain a target frequency, and if the target frequency is less than or equal to the preset frequency, continue to execute the The routing algorithm determines the final routing transmission path corresponding to the first core when accessing the second core.

[0125] In a specific embodiment of the present application, the path calculation module 23 includes: a coordinate system establishment submodule, which is used to establish a plane rectangular coordinate system corresponding to the matrix topology, and respectively determine the coordinates of the routes corresponding to the first core and the second core in the plane rectangular coordinate system to obtain a first coordinate point and a second coordinate point; a path determination submodule, which is used to determine the shortest route transmission path and the second shortest route transmission path of the first core when accessing the second core according to the first coordinate point, the second coordinate point, the shortest route mapping table, and the second shortest route mapping table.

[0126] The shortest route mapping table and the second shortest route mapping table creation module are established, and the mapping table creation module includes: a core screening submodule, which is used to randomly screen two cores from the multi-core processor to obtain a third core and a fourth core, and respectively determine the coordinates of the routes corresponding to the third core and the fourth core in the plane rectangular coordinate system to obtain a third coordinate point and a fourth coordinate point; the third core and the fourth core are located in different rows and columns of the matrix topology; a shortest path determination submodule, which is used to determine the shortest route transmission path of the third core when accessing the fourth core based on the principle of first transmitting data along the route in the diagonal direction of the third coordinate point and the fourth coordinate point, and then transmitting data along the route in the X-axis direction or the Y-axis direction; a first mapping table determination submodule, which is used to determine the shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data according to the shortest route transmission path of the third core when accessing the fourth core The shortest route mapping table is created according to the transmission path and the shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when performing data access; the second shortest path determination submodule is used to add 1 to the abscissa or ordinate of the third coordinate point to obtain the fifth coordinate point, and determine the second shortest route transmission path when the third core accesses the fourth core based on the principle of first transmitting data along the route in the diagonal direction of the fifth coordinate point and the fourth coordinate point, and then transmitting data along the route in the X-axis direction or the Y-axis direction; the second mapping table determination submodule is used to determine the second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when performing data access according to the second shortest route transmission path when the third core accesses the fourth core, and create the second shortest route mapping table according to the second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when performing data access.

[0127] In a specific embodiment of the present application, the shortest path determination submodule includes: a route judgment unit, which is used to judge whether the routes in the diagonal direction of the third coordinate point and the fourth coordinate point are all on the same straight line; a first judgment unit, which is used to determine the route transmission path in the diagonal direction of the third coordinate point and the fourth coordinate point as the shortest route transmission path when the third core accesses the fourth core when the judgment result of the route judgment unit is yes; a second judgment unit, which is used to determine a coordinate point with the same horizontal coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point when the judgment result of the route judgment unit is no, to obtain a first intermediate coordinate point, and to determine a coordinate point with the same vertical coordinate as the fourth coordinate point in the diagonal direction of the third coordinate point and the fourth coordinate point to obtain a second intermediate coordinate point; a first value determination unit, which is used to first transmit data along the connecting line between the third coordinate point and the first intermediate coordinate point The method comprises: a first value determining unit, which is used to determine the number of routing forwardings that the third core passes through when accessing the fourth core based on the principle of first transmitting data along the connecting line between the third coordinate point and the second intermediate coordinate point to reach the second intermediate coordinate point and then transmitting data along the X-axis direction to reach the fourth coordinate point, and obtain a second value; a value judging unit, which is used to judge whether the first value is less than the second value; and a first path judging unit, which is used to judge the routing transmission path that first transmits data along the connecting line between the third coordinate point and the first intermediate coordinate point to reach the first intermediate coordinate point and then transmits data along the Y-axis direction to reach the fourth coordinate point as the shortest routing transmission path for the third core to access the fourth core when the third core accesses the fourth core when the judgment result of the value judging unit is yes.

[0128] In a specific embodiment of the present application, it also includes: a second path judgment unit, which is used to, when the judgment result of the numerical judgment unit is no, determine the routing transmission path that first transmits data along the connecting line between the third coordinate point and the second intermediate coordinate point to reach the second intermediate coordinate point, and then transmits data along the X-axis direction to reach the fourth coordinate point as the shortest routing transmission path for the third core to access the fourth core.

[0129] In a specific embodiment of the present application, the routing determination module 24 includes: a routing determination submodule, which is used to determine the final routing transmission path corresponding to the first core when accessing the second core based on the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core.

[0130] In a specific embodiment of the present application, the route determination submodule includes: a first set determination unit, which is used to determine all core groups in the multi-core processor that are performing data transmission at the current moment to obtain a first set; a second set determination unit, which is used to determine a second set based on the first set; wherein the two cores corresponding to any one element in the second set are in different rows and columns of the matrix topology; a first path set determination unit, which is used to determine the shortest route transmission path when the two cores corresponding to each element in the second set perform data access, to obtain a first path set; a first route set determination unit, which is used to determine the shortest route transmission path when the first core accesses the second core, excluding the routes corresponding to the first core and the second core, to obtain a first route set; a first number determination unit, which is used to calculate all routes in the first route set. The total number of times each element in the first path set appears in the shortest route transmission path corresponding to each element in the second path set is obtained to obtain the first number; the second path set determination unit is used to determine the second shortest route transmission path when the two cores corresponding to each element in the second set perform data access, and obtain the second path set; the second route set determination unit is used to determine the other routes in the second shortest route transmission path when the first core accesses the second core, excluding the routes corresponding to the first core and the second core, to obtain the second route set; the second number determination unit is used to determine the total number of times all the routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set, and obtain the second number; the path determination unit is used to determine the final route transmission path corresponding to the first core when accessing the second core according to the first number and the second number.

[0131] In a specific embodiment of the present application, the path determination unit includes: a sum judgment subunit, used to judge whether the sum of the first number of times and the first preset threshold is less than the second number of times; a first path determination unit, used to, when the judgment result of the sum judgment subunit is yes, determine the shortest route transmission path of the first core when accessing the second core as the final route transmission path corresponding to the first core when accessing the second core; a second path determination unit, used to, when the judgment result of the sum judgment subunit is no, determine the second shortest route transmission path of the first core when accessing the second core as the final route transmission path corresponding to the first core when accessing the second core.

[0132] In a specific embodiment of the present application, it also includes: a threshold setting unit, which is used to set the first preset threshold based on the principle of preferentially selecting the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core.

[0133] In a specific implementation of the present application, it also includes: a third set determination unit, which is used to determine the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set, and after obtaining the second number, determine the third set according to the first set; wherein the two cores corresponding to any element in the third set are in the same column or the same row of the matrix topology; the third path set determination unit is used to determine the shortest route transmission path when the two cores corresponding to each element in the third set perform data access, and obtain the third path set; the third number determination unit is used to calculate the total number of times all routes in the first route set appear in each element in the third path set a fourth path set determining unit, used to determine the second shortest route transmission path of the two cores corresponding to each element in the third set when accessing data, to obtain a fourth path set; a fourth number determining unit, used to determine the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the fourth path set, to obtain a fourth number; a transmission path determining unit, used to determine the final route transmission path corresponding to the first core when accessing the second core according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value.

[0134] In a specific implementation of the present application, the transmission path determination unit includes: a first product subunit, used to obtain the product of the first number of times and the first weight value to obtain a first product value, and to obtain the product of the third number of times and the third weight value to obtain a third product value; a first addition subunit, used to add the first product value and the third product value to obtain a first addition value; a second product subunit, used to obtain the product of the second number of times and the second weight value to obtain a second product value, and to obtain the product of the fourth number of times and the fourth weight value to obtain a fourth product value; a second addition subunit, used to add the second product value and the fourth product value. a first route determination subunit, for determining the shortest route transmission path when the first core accesses the second core as the final route transmission path corresponding to the first core when accessing the second core, when the determination result of the addition value determination subunit is yes; and a second route determination subunit, for determining the second shortest route transmission path when the first core accesses the second core as the final route transmission path corresponding to the first core when accessing the second core, when the determination result of the addition value determination subunit is no.

[0135] A data routing device for a multi-core processor provided by an embodiment of the present invention has the beneficial effects of the data routing method for a multi-core processor disclosed above.

[0136] See also Figure 7 , Figure 7 This is a structural diagram of a data routing device for a multi-core processor provided in an embodiment of the present invention, the device comprises: a memory 31 for storing a computer program; a processor 32 for executing the computer program to implement the steps of a data routing method for a multi-core processor as disclosed above.

[0137] The data routing device of the multi-core processor provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer or a desktop computer. The processor 32 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 32 may use a digital signal processing , Field Programmable Gate Array , Programmable Logic Array The processor 32 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit; the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 32 may be integrated with an image processor. , It is responsible for rendering and drawing the content that needs to be displayed on the display screen. In some embodiments, the processor 32 may also include an artificial intelligence processor, the The processor is used to handle the computational operations related to machine learning.

[0138] The memory 31 may include one or more computer-readable storage media, which may be non-transitory. The memory 31 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 31 is at least used to store the following computer program 301, wherein the computer program, after being loaded and executed by the processor 32, can implement the relevant steps of a data routing method for a multi-core processor disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 31 may also include an operating system 302 and data 303, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 302 may include , , Etc. Data 303 may include but is not limited to data involved in the data routing method of the multi-core processor.

[0139] In some embodiments, the data routing device of the multi-core processor may further include a display screen 33 , an input and output interface 34 , a communication interface 35 , a power supply 36 , and a communication bus 37 .

[0140] Those skilled in the art will understand that Figure 7 The structure shown in the figure does not constitute a limitation on the data routing device of the multi-core processor, and may include more or less components than those shown in the figure.

[0141] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or partly contributed to the current technology or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and executes all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: USB flash drive, mobile hard disk, read-only memory , Random Access Memory , Electrically Erasable Programmable , registers, hard disks, removable disks, , disks or CDs, etc. that can store program codes.

[0142] A data routing device for a multi-core processor provided in an embodiment of the present invention has the beneficial effects of the data routing method for a multi-core processor disclosed above.

[0143] Correspondingly, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the data routing method for a multi-core processor disclosed above are implemented.

[0144] A computer-readable storage medium provided by an embodiment of the present invention has the beneficial effects of the aforementioned data routing method for a multi-core processor disclosed above.

[0145] Accordingly, an embodiment of the present invention further provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of a data routing method for a multi-core processor as disclosed above.

[0146] A computer program product provided by an embodiment of the present invention has the beneficial effects of the aforementioned data routing method for a multi-core processor.

[0147] The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0148] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0149] The above is a detailed introduction to the data routing method, device, equipment, medium and computer program product of a multi-core processor provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A data routing method for a multi-core processor, characterized in that: include: When the first core wants to access data from the second core, it is determined whether the first core and the second core are in different rows and columns of the matrix topology; the first core and the second core are two different cores in a multi-core processor, all cores in the multi-core processor form the matrix topology, and all cores are connected to a route in a one-to-one correspondence; If yes, then counting the data access frequency of the first core to the second core to obtain a target frequency; If the target frequency is greater than the preset frequency, based on the principle that routing can transmit data in any direction, respectively determining the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core; Based on the principle of shortest communication delay, a final routing transmission path corresponding to the first core when accessing the second core is determined according to the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core.

2. The data routing method of a multi-core processor according to claim 1, characterized in that: After determining whether the first core and the second core are in different rows and columns of the matrix topology, the method further includes: If not, then according to The routing algorithm determines a final routing transmission path corresponding to the first core when accessing the second core.

3. The data routing method of a multi-core processor according to claim 2, characterized in that: After counting the data access frequency of the first core to the second core to obtain the target frequency, the method further includes: If the target frequency is less than or equal to the preset frequency, continue to execute the The routing algorithm determines the final routing transmission path corresponding to the first core when accessing the second core.

4. The data routing method of a multi-core processor according to claim 1, characterized in that: The method of determining the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core based on the principle that routing can perform data transmission in any direction includes: Establishing a plane rectangular coordinate system corresponding to the matrix topology, and respectively determining the coordinates of the routes corresponding to the first core and the second core in the plane rectangular coordinate system to obtain a first coordinate point and a second coordinate point; Determine respectively the shortest route transmission path and the second shortest route transmission path when the first core accesses the second core according to the first coordinate point, the second coordinate point, the shortest route mapping table, and the second shortest route mapping table; The process of creating the shortest route mapping table and the second shortest route mapping table includes: Randomly selecting two cores from the multi-core processor to obtain a third core and a fourth core, and respectively determining the coordinates of the routes corresponding to the third core and the fourth core in the plane rectangular coordinate system to obtain a third coordinate point and a fourth coordinate point; the third core and the fourth core are in different rows and columns of the matrix topology; Determine the shortest route transmission path when the third core accesses the fourth core based on the principle of first transmitting data along the route in the diagonal direction of the third coordinate point and the fourth coordinate point and then transmitting data along the route in the X-axis direction or the Y-axis direction; Determining the shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when performing data access according to the shortest route transmission path when the third core accesses the fourth core, and creating the shortest route mapping table according to the shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when performing data access; Add 1 to the abscissa or ordinate of the third coordinate point to obtain a fifth coordinate point, and determine the second shortest routing transmission path when the third core accesses the fourth core based on the principle of first transmitting data along a route in a diagonal direction between the fifth coordinate point and the fourth coordinate point and then transmitting data along a route in an X-axis direction or a Y-axis direction; The second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data is determined according to the second shortest route transmission path when the third core accesses the fourth core, and the second shortest route mapping table is created according to the second shortest route transmission path corresponding to any two cores in different rows and columns in the matrix topology when accessing data.

5. The data routing method of a multi-core processor according to claim 4, characterized in that: The method of determining the shortest route transmission path when the third core accesses the fourth core based on the principle of first transmitting data along a route in a diagonal direction between the third coordinate point and the fourth coordinate point and then transmitting data along a route in an X-axis direction or a Y-axis direction includes: Determine whether the routes in the diagonal direction of the third coordinate point and the fourth coordinate point are both on the same straight line; If yes, determining the routing transmission path in the diagonal direction between the third coordinate point and the fourth coordinate point as the shortest routing transmission path when the third core accesses the fourth core; If not, a coordinate point having the same horizontal coordinate as the fourth coordinate point is determined in the diagonal direction between the third coordinate point and the fourth coordinate point to obtain a first intermediate coordinate point, and a coordinate point having the same vertical coordinate as the fourth coordinate point is determined in the diagonal direction between the third coordinate point and the fourth coordinate point to obtain a second intermediate coordinate point; Based on the principle of first transmitting data along the connection line between the third coordinate point and the first intermediate coordinate point to reach the first intermediate coordinate point, and then transmitting data along the Y-axis direction to reach the fourth coordinate point, determining the number of routing forwardings that the third core passes through when accessing the fourth core, and obtaining a first value; Based on the principle of first transmitting data along the connection line between the third coordinate point and the second intermediate coordinate point to reach the second intermediate coordinate point, and then transmitting data along the X-axis direction to reach the fourth coordinate point, the number of routing forwardings that the third core passes through when accessing the fourth core is determined to obtain a second value; Determine whether the first value is less than the second value; If so, the routing transmission path that first transmits data along the connecting line between the third coordinate point and the first intermediate coordinate point to reach the first intermediate coordinate point and then transmits data along the Y-axis direction to reach the fourth coordinate point will be determined as the shortest routing transmission path for the third core when accessing the fourth core.

6. The data routing method of a multi-core processor according to claim 5, characterized in that: After determining whether the first value is less than the second value, the method further includes: If not, the routing transmission path that first transmits data along the connecting line between the third coordinate point and the second intermediate coordinate point to reach the second intermediate coordinate point and then transmits data along the X-axis direction to reach the fourth coordinate point will be determined as the shortest routing transmission path for the third core when accessing the fourth core.

7. The data routing method of a multi-core processor according to claim 1, characterized in that: The method of determining the final routing transmission path corresponding to the first core when accessing the second core based on the shortest routing transmission path and the second shortest routing transmission path when the first core accesses the second core based on the principle of shortest communication delay includes: The final routing transmission path corresponding to the first core when accessing the second core is determined based on the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core.

8. The data routing method of a multi-core processor according to claim 7, characterized in that: The determining, according to the line congestion information on the shortest routing transmission path when the first core accesses the second core, and the line congestion information on the second shortest routing transmission path when the first core accesses the second core, a final routing transmission path corresponding to the first core when accessing the second core includes: At the current moment, all core groups in the multi-core processor that are performing data transmission are determined to obtain a first set; Determine a second set according to the first set; wherein two cores corresponding to any one element in the second set are in different rows and columns of the matrix topology; Determine the shortest routing transmission path between two cores corresponding to each element in the second set when accessing data, and obtain a first path set; Determine other routes except routes corresponding to the first core and the second core in the shortest route transmission path when the first core accesses the second core, and obtain a first route set; Calculate the total number of times all routes in the first route set appear in the shortest route transmission path corresponding to each element in the first path set to obtain the first number; Determine the second shortest routing transmission path when two cores corresponding to each element in the second set perform data access, and obtain a second path set; Determine other routes except the routes corresponding to the first core and the second core in the second shortest route transmission path when the first core accesses the second core, to obtain a second route set; Determine the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set, and obtain a second number; A final routing transmission path corresponding to when the first core accesses the second core is determined according to the first number of times and the second number of times.

9. The data routing method of a multi-core processor according to claim 8, characterized in that: The determining, according to the first number of times and the second number of times, a final routing transmission path corresponding to when the first core accesses the second core includes: Determine whether the sum of the first number of times and a first preset threshold is less than the second number of times; If yes, then determining the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core; If not, the second shortest routing transmission path of the first core when accessing the second core is determined as the final routing transmission path corresponding to the first core when accessing the second core.

10. The data routing method of a multi-core processor according to claim 9, characterized in that: Also includes: The first preset threshold is set based on the principle of preferentially selecting the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when the first core accesses the second core.

11. The data routing method of a multi-core processor according to claim 8, characterized in that: The determining of the total number of times all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the second path set, after obtaining the second number, further includes: Determine a third set according to the first set; wherein two cores corresponding to any one element in the third set are in the same column or the same row of the matrix topology; Determine the shortest routing transmission path between two cores corresponding to each element in the third set when accessing data, and obtain a third path set; Calculate the total number of times all routes in the first route set appear in the shortest route transmission path corresponding to each element in the third path set to obtain a third number; Determine the second shortest routing transmission path when two cores corresponding to each element in the third set perform data access, and obtain a fourth path set; Determine the total number of times that all routes in the second route set appear in the second shortest route transmission path corresponding to each element in the fourth path set, to obtain a fourth number; A final routing transmission path corresponding to the first core when accessing the second core is determined according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value.

12. The data routing method of a multi-core processor according to claim 11, characterized in that: The determining, according to the first number, the second number, the third number, the fourth number, the first weight value, the second weight value, the third weight value and the fourth weight value, a final routing transmission path corresponding to when the first core accesses the second core comprises: Calculate the product of the first number of times and the first weight value to obtain a first product value, and calculate the product of the third number of times and the third weight value to obtain a third product value; Adding the first product value and the third product value to obtain a first added value; Calculate the product of the second number of times and the second weight value to obtain a second product value, and calculate the product of the fourth number of times and the fourth weight value to obtain a fourth product value; Adding the second product value and the fourth product value to obtain a second added value; Determine whether the sum of the first added value and the second preset threshold is less than the second added value; If yes, then determining the shortest routing transmission path when the first core accesses the second core as the final routing transmission path corresponding to the first core when accessing the second core; If not, the second shortest routing transmission path when the first core accesses the second core is determined as the final routing transmission path corresponding to the first core when the first core accesses the second core.

13. A data routing device for a multi-core processor, characterized in that: include: Memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of a data routing method for a multi-core processor as claimed in any one of claims 1 to 12.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the data routing method for a multi-core processor as claimed in any one of claims 1 to 12 are implemented.

15. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the steps of the data routing method for a multi-core processor as claimed in any one of claims 1 to 12 are implemented.

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