Wafer inspection apparatus calibration method, device and medium, and wafer inspection method
By setting markers on the wafer surface and calibrating them using optical and electron beam inspection equipment to detect their positions, the coordinate system mismatch between optical and electron beam inspection equipment is solved, thus improving the accuracy of defect detection.
Patent Information
- Application Number
- CN202411801828.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-09
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2044-12-09
AI Technical Summary
In the semiconductor manufacturing process, the mismatch of coordinate systems between optical inspection equipment and electron beam inspection equipment can lead to missed detections, affecting the accuracy of defect detection.
By setting markers on the wafer surface, the positions of the markers are detected using optical inspection equipment and electron beam inspection equipment, respectively. Calibration is then performed based on these positions to eliminate differences in the coordinate system.
It improves the accuracy of defect detection, avoids missed detections, and ensures the consistency of the coordinate systems of optical inspection equipment and electron beam inspection equipment.
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Figure CN119890064B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor inspection technology, and in particular to a calibration method, apparatus and medium for wafer inspection equipment, and a wafer inspection method. Background Technology
[0002] During semiconductor manufacturing, undesirable defects inevitably appear on the wafer surface, thus reducing wafer quality. Therefore, detecting wafer surface defects is an important step in semiconductor manufacturing, both during and after the manufacturing process.
[0003] In the relevant scheme, the defect detection strategy is a two-step process. In the first step, bright-field or optical inspection equipment is used to measure the entire area of the wafer surface to mark potential defects, creating a coordinate file of the marked potential defects. In the second step, inspection equipment is used to examine all marked potential defects according to the coordinate file to ultimately confirm whether each marked potential defect is a real defect and to determine the defect type. In the second step, electron beam inspection equipment is typically used to confirm whether it is a defect and to determine the defect type.
[0004] During the two-step process of implementing the relevant scheme, there may be a mismatch in the coordinate systems between the optical inspection equipment and the electron beam inspection equipment. This can cause the electron beam inspection equipment to fail to detect the marked potential defects at some of the coordinates of the potential defects recorded in the coordinate file when it performs the inspection according to the coordinates recorded in the coordinate file, resulting in missed detections. Summary of the Invention
[0005] This disclosure provides a calibration method, apparatus, and medium for wafer inspection equipment, as well as a wafer inspection method; by calibrating the coordinate system between the optical inspection equipment and the electron beam inspection equipment, missed detections can be avoided.
[0006] The technical solution disclosed herein is implemented as follows:
[0007] In a first aspect, this disclosure provides a calibration method for a wafer inspection device, the calibration method comprising:
[0008] The first detection position of the set mark is obtained by detecting the set mark on the wafer surface using optical inspection equipment;
[0009] The second detection position of the designated mark is obtained by detecting the designated mark using an electron beam detection device;
[0010] The coordinate systems of the optical detection equipment and the electron beam detection equipment are calibrated based on the first and second detection positions.
[0011] Secondly, this disclosure provides a calibration device for a wafer inspection apparatus, the calibration device comprising: a first detection unit, a second detection unit, and a calibration unit; wherein,
[0012] The first inspection unit is configured to inspect a predetermined mark on the wafer surface using an optical inspection device to obtain the first inspection position of the predetermined mark;
[0013] The second detection unit is configured to detect the set mark using an electron beam detection device to obtain the second detection position of the set mark;
[0014] The calibration unit is configured to calibrate the coordinate systems of the optical inspection equipment and the electron beam inspection equipment based on the reference position, the first detection position and the second detection position of the set mark.
[0015] Thirdly, this disclosure provides a computing device including a processor and a memory; the processor is configured to execute instructions stored in the memory to implement a calibration method for a wafer inspection device as described in the first aspect.
[0016] Fourthly, this disclosure provides a computer-readable storage medium storing at least one instruction that is executed by a processor to implement a calibration method for a wafer inspection apparatus as described in the first aspect.
[0017] Fifthly, this disclosure provides a wafer inspection method, the method comprising:
[0018] When it is determined that the wafer to be tested needs to be inspected for defects by an electron beam inspection device, the optical inspection device and the electron beam inspection device are calibrated using the wafer to be tested through the calibration method of the wafer inspection device described in the first aspect;
[0019] Defect detection is performed on the wafer under test using calibrated optical inspection equipment and electron beam inspection equipment.
[0020] This disclosure provides a calibration method, apparatus, and medium for wafer inspection equipment, as well as a wafer inspection method. By setting a calibration reference mark, the calibration mark is inspected using both an optical inspection device and an electron beam inspection device. The coordinate systems of the optical and electron beam inspection devices are calibrated using the detection positions detected by the calibration mark, eliminating the difference between their coordinate systems, preventing missed detections, and improving the accuracy of defect detection. Attached Figure Description
[0021] Figure 1 A schematic diagram of the wafer inspection process for relevant solutions.
[0022] Figure 2 This is a diagram showing the distribution of anomalies on the surface of wafer W, as detected by a laser particle counter, as provided in this disclosure.
[0023] Figure 3 (A) in this disclosure is a schematic diagram of the detection result obtained by scanning electron microscopy (SEM).
[0024] Figure 3 (B) in the diagram is another schematic diagram of the detection results obtained by SEM according to this disclosure.
[0025] Figure 4 This is a schematic diagram of a calibration method for a wafer inspection device provided in this disclosure.
[0026] Figure 5 This is a schematic diagram illustrating the shape and position of a setting mark provided in this disclosure.
[0027] Figure 6 This is a schematic diagram showing the division of candidate areas centered on the reference position O, as provided in this disclosure.
[0028] Figure 7 This is a calibration diagram for the cross-shaped mark provided in this disclosure.
[0029] Figure 8 This is a schematic diagram of a wafer inspection method provided in this disclosure.
[0030] Figure 9 This is a schematic diagram of the calibration device for a wafer inspection equipment provided in this disclosure.
[0031] Figure 10 This is a schematic diagram of the structure of a computing device provided in this disclosure. Detailed Implementation
[0032] The technical solutions in this disclosure will now be clearly and completely described with reference to the accompanying drawings.
[0033] See Figure 1 It illustrates the general process of wafer inspection during wafer manufacturing, which may include:
[0034] S11: Use optical inspection equipment to inspect the wafer surface and obtain the defects on the wafer surface and the coordinate information of the defects.
[0035] Specifically, taking a laser particle counter as an example, the particle counter detects the abnormal distribution on the wafer surface and generates an anomaly detection file, such as a klarf file, based on the detected anomalies and information such as their location and size.
[0036] S12: When it is determined that some anomalies need to be confirmed based on the anomalies detected by the optical inspection equipment on the wafer surface, the electron beam inspection equipment is used to detect the part of the anomaly based on the anomaly on the wafer surface and the coordinate information of the anomaly, so as to determine whether the part of the anomaly is a defect.
[0037] Specifically, after inspection by optical inspection equipment, the distribution of anomalies on the wafer surface can be obtained. Based on the distribution of these anomalies, it can be determined whether any anomalies require confirmation using electron beam inspection equipment, such as a scanning electron microscope (SEM). If none are found, the wafer can proceed with other subsequent inspection processes. If necessary, the aforementioned klarf file is transferred to the SEM, allowing the SEM to confirm the anomalies based on the coordinate information of the anomalies in the klarf file.
[0038] During the SEM verification process, due to the difference between the coordinate systems of the particle counter and the SEM, the SEM may fail to capture and verify the corresponding anomalies when performing anomaly verification based on the coordinate information of the klarf file. For example... Figure 2 The image shows the distribution of anomalies on the surface of wafer W detected by a particle counter. These detected anomalies are represented by solid squares in the image. Figure 2 In the diagram, the circled point represents an example anomaly detected by the particle counter. The coordinate information of this anomaly can be saved in the klarf file generated by the particle counter. Figure 2 The coordinate information of all detected anomalies is saved in a klarf file.
[0039] When the selected anomaly needs to be confirmed by SEM, the SEM device captures and detects the anomaly based on the coordinate information recorded in the klarf file. When the SEM captures the anomaly, the detection results are as follows: Figure 3 As shown in (A), from Figure 3 (A) It can be seen that the anomaly is a linear defect. Due to the difference between the coordinate systems of the particle counter and the SEM, there is a probability that the SEM will fail to detect the anomaly, resulting in the following detection results: Figure 3 As shown in (B). Because Figure 3 (B) does not contain a topographic image of the defect, so SEM will determine that there is no defect at the anomaly, thus causing the defect to be missed.
[0040] To avoid the aforementioned missed detections, this disclosure aims to eliminate the difference between the coordinate systems of the particle counter and the SEM through calibration. Based on this, as follows... Figure 4 As shown, this disclosure provides a calibration method for a wafer inspection device, the calibration method including steps S401 to S403.
[0041] In step S401, the set mark on the wafer surface is detected by an optical inspection device to obtain the first detection position of the set mark.
[0042] In this disclosure, in order to calibrate the coordinate systems of optical inspection equipment, such as a particle counter, and electron beam inspection equipment, such as a SEM, a reference object can be inspected by both the optical inspection equipment and the electron beam inspection equipment, and calibration can be performed using the position information detected by each.
[0043] It should be noted that the reference object can be a designated mark on the wafer surface, and the shape of this mark should be significantly distinguishable from the defect morphology of the wafer surface to avoid misidentifying the mark as an anomaly or defect on the wafer surface during calibration. In some examples, the process of setting this mark may include:
[0044] Provide one wafer;
[0045] The designated markings are processed on the surface of the wafer using laser technology;
[0046] The reference position of the measurement setting mark.
[0047] Specifically, in the example above, a cross-shaped mark with a size of 150nm × 150nm can be processed on the wafer surface using a 265nm laser, such as... Figure 5 The magnified image of the area circled in the ellipse is shown. The size of this mark can be appropriately set according to the actual application scenario. If the size is set too large, it will lead to a large calibration error, failing to meet the nanometer-level precision requirements of wafer inspection. If the size is set too small, it will result in excessively high requirements for the lenses of each device during the calibration process, causing significant waste of resources. Furthermore, to avoid the large surface area required for semiconductor manufacturing on the wafer surface, such as... Figure 5 As shown, the mark can be processed near the notch on wafer W to avoid using too much of the wafer surface for manufacturing processes during calibration.
[0048] After the designated mark is fabricated, its reference position can be measured using an optical microscope. It should be noted that this reference position can serve as a "standard" for subsequent calibration.
[0049] In this disclosure, an optical inspection device, such as a particle counter, inspects the entire surface of a wafer marked with a set mark, and is able to detect anomalies on the wafer surface and the distribution of these anomalies. Among all detected anomalies, the anomaly corresponding to the set mark can be determined based on the shape of the set mark, and the detection position of the anomaly corresponding to the set mark on the wafer surface, i.e., the first detection position, can be obtained based on the distribution of the anomalies. Understandably, the anomaly corresponding to the set mark and its first detection position on the wafer surface are stored in a klarf format file.
[0050] It should be noted that the first detection position is obtained based on the coordinate system of the optical inspection equipment itself, thus reflecting the properties of the optical inspection equipment's own coordinate system. When the properties of the optical inspection equipment's own coordinate system differ from the properties of the coordinate systems of other devices used in this disclosure, i.e., the consistency is poor, then the first detection position will deviate from the detection position of the set mark detected by other devices.
[0051] In step S402, the set mark is detected by an electron beam detection device to obtain the second detection position of the set mark.
[0052] In this disclosure, for the wafer with the aforementioned setting mark, inspection using an electron beam inspection device, such as SEM, can also detect the setting mark and obtain its detection position, i.e., the second detection position. It is understood that the second detection position also reflects the electron beam inspection device. When the coordinate system of the electron beam inspection device differs from the coordinate systems of other devices used in this disclosure, i.e., the consistency is poor, the second detection position will deviate from the detection position of the setting mark detected by other devices.
[0053] In step S403, the coordinate systems of the optical detection device and the electron beam detection device are calibrated based on the first detection position and the second detection position.
[0054] In this disclosure, since the first and second detection positions respectively embody the properties of the coordinate systems of the optical inspection device and the electron beam inspection device, a significant deviation will occur between the two detection positions when their properties differ considerably, i.e., when their consistency is poor. By quantifying this deviation, the coordinate systems of the optical inspection device and the electron beam inspection device can be calibrated accordingly. This reduces the differences in the properties of the coordinate systems of the optical inspection device and the electron beam inspection device, improves consistency, and prevents missed detections.
[0055] Regarding the aforementioned Figure 4 The technical solution disclosed herein involves setting a calibration benchmark, and then detecting the calibration benchmark using both an optical inspection device and an electron beam inspection device. By using the optical inspection device and the electron beam inspection device to detect the detection position of the calibration benchmark, the coordinate systems of the optical inspection device and the electron beam inspection device are calibrated, eliminating the difference between the coordinate systems of the two devices, avoiding missed detections, and improving the accuracy of defect detection.
[0056] for Figure 4 In some examples of the technical solutions shown, step S401, which involves detecting a designated mark on the wafer surface using an optical inspection device to obtain the first detection position of the designated mark, includes:
[0057] The wafer surface is inspected using optical inspection equipment to obtain the detection location corresponding to the anomaly on the wafer surface;
[0058] Based on the reference position and shape of the set mark, anomalies that match the set mark are selected from the anomalies on the wafer surface, and the first detection position corresponding to the anomaly that matches the set mark is obtained.
[0059] In this disclosure, a particle counter is used as an example. The particle counter can perform anomaly detection on the entire wafer surface, thereby obtaining the distribution of surface anomalies. This anomaly distribution is stored in a klarf file and includes the detection location of each detected surface anomaly. Of course, the anomaly locations corresponding to set markers are also included in the aforementioned klarf file. Typically, the distribution of surface anomalies included in the klarf file can be obtained through methods such as... Figure 2 The distribution is shown in the diagram.
[0060] In this klarf file, anomalies matching the set markers can be selected from surface anomalies using the reference positions of the set markers, and the detection position of these anomalies, i.e., the first detection position, can be obtained. Specifically, the coordinate system deviation is not a large value, typically several hundred nanometers. Based on this, in the anomaly distribution map represented by the klarf file, as shown... Figure 6 As shown, with the reference position O as the center, a candidate area is divided according to the maximum possible deviation range, such as the rectangle shown in the dashed box. Of course, this candidate area can also be divided into other shapes, such as circles, ellipses, triangles, etc., depending on the specific implementation scenario. Each anomaly (e.g., ...) within this candidate area is then considered... Figure 6 The shape of the solid square dot (shown in the image) is compared with the shape of the set mark, and the anomaly that matches the shape of the set mark is identified as an anomaly that conforms to the set mark. The detection position corresponding to the anomaly that conforms to the set mark is found in the klarf file, which is the first detection position.
[0061] for Figure 4 In some possible implementations of the technical solution shown, step S402, which involves detecting the designated mark using an electron beam detection device to obtain the second detection position of the designated mark, includes:
[0062] The wafer surface is inspected within a defined detection area based on the reference position or first detection position of the set mark;
[0063] Based on the shape of the set mark, determine the defects that match the set mark from the detected defects, and obtain the second detection position corresponding to the defect that matches the set mark.
[0064] In this disclosure, SEM is used as an example. SEM can only detect anomalies at one location at a time, and the detection time is relatively long. Therefore, SEM cannot inspect the entire wafer surface, but only detects defects in specific locations. In some examples, SEM can detect anomalies that need to be confirmed based on the coordinate information of the anomalies recorded in the klarf file.
[0065] Also considering that the coordinate system deviation is not a large value, in some examples, it can be based on the reference position according to... Figure 6 The method shown identifies candidate areas, and each anomaly within a candidate area is verified using SEM. During the defect verification process, when an anomaly matching the shape of a set mark is found in the candidate area, the SEM records the detection location corresponding to this defect that matches the set mark, which is the second detection location.
[0066] In this disclosure, the coordinate system deviation between the optical detection device and the electron beam detection device is not a large value. Therefore, in some examples, it can also be based on the first detection position according to... Figure 6 The method shown identifies candidate areas, and each anomaly within a candidate area is verified using SEM. During the defect verification process, when an anomaly matching the shape of a set mark is found in the candidate area, the SEM records the detection location corresponding to this defect that matches the set mark, which is the second detection location.
[0067] for Figure 4 In some possible implementations of the technical solution shown, step S403, which involves calibrating the coordinate systems of the optical detection device and the electron beam detection device based on the first and second detection positions, includes:
[0068] The coordinate system of the electron beam detection device is calibrated based on the difference between the first and second detection positions to match the coordinate system of the electron beam detection device with that of the optical detection device.
[0069] In the above implementation, after obtaining the detection positions (i.e., the first detection position and the second detection position) detected by the optical detection device and the electron beam detection device for the same set mark, the deviation of the coordinate system of the electron beam detection device relative to the optical detection device can be calibrated based on the difference between the first detection position and the second detection position. For example... Figure 7 As shown, for the cross-shaped mark, the first detection position is as follows: Figure 7 Taking the solid line marker in the image as an example, the second detection position is... Figure 7 Taking the dashed line marker as an example, the difference between the first and second detection positions is 73nm. This means that when using klarf files for defect confirmation, SEM needs to subtract 73nm from the coordinate information of each anomaly in the klarf file before detection. This ensures that the coordinate systems of the electron beam inspection equipment and the optical inspection equipment are matched, avoiding errors. Figure 3 The missed detections shown in (A) and (B).
[0070] for Figure 4 The technical solution shown can also be used as a reference position for calibration as a "standard". In some possible implementations, the calibration of the coordinate systems of the optical detection device and the electron beam detection device based on the first detection position and the second detection position as described in step S403 includes:
[0071] The first calibration value of the electron beam detection device is obtained based on the reference position of the set mark and the first detection position;
[0072] The second calibration value of the electron beam detection device is obtained based on the reference position of the set mark and the second detection position;
[0073] The coordinate systems of the optical inspection device and the electron beam inspection device are calibrated to a matched state based on the first calibration value and the second calibration value, respectively.
[0074] In the above implementation, after obtaining the detection positions (i.e., the first detection position and the second detection position) detected by the optical inspection device and the electron beam inspection device for the same set mark, the maximum difference between the first detection position and the second detection position and the reference position of the set mark can be obtained. Specifically, for the first difference corresponding to the optical inspection device, i.e., the first calibration value, calibration can be performed to match the coordinate system of the optical inspection device with the reference position. For the second difference corresponding to the electron beam inspection device, i.e., the second calibration value, calibration can be performed to match the coordinate system of the electron beam inspection device with the reference position. It can be understood that when the optical inspection device and the electron beam inspection device have completed calibration based on the same reference position, the coordinate systems of the optical inspection device and the electron beam inspection device are also in a matched state with the reference position, that is, the optical inspection device and the electron beam inspection device have completed calibration.
[0075] Based on the aforementioned technical solution, this disclosure also provides a wafer inspection method, which can be executed by a Manufacturing Execution System (MES). See [link to relevant documentation]. Figure 8 The method includes:
[0076] S801: When it is determined that the wafer to be tested needs to be inspected for defects by an electron beam inspection device, a set mark is processed on the surface of the wafer by laser processing, and the reference position of the set mark is measured.
[0077] In this disclosure, a cross-shaped mark with a size of 150nm × 150nm is processed on the wafer surface using a 265nm laser. This mark is used as a designation mark, such as... Figure 5 The magnified image of the area circled in the ellipse is shown. The reference position of this mark was measured using an optical microscope.
[0078] S802: The set mark on the wafer surface is detected by an optical inspection device to obtain the first detection position of the set mark.
[0079] S803: The set mark is detected by an electron beam detection device to obtain the second detection position of the set mark.
[0080] S804: Calibrate the coordinate systems of the optical inspection equipment and the electron beam inspection equipment based on the first and second detection positions.
[0081] In this disclosure, in conjunction with the foregoing Figure 4 The technical solution shown is that MES executes... Figure 7 In the wafer inspection method shown, when it is determined that the wafer to be inspected needs to be inspected for defects by an electron beam inspection device, steps S801 to S804 are as described above. Figure 4 The steps in the calibration method for the wafer inspection equipment shown are as described above. The specific implementation methods and procedures are the same as those described earlier. Figure 4 The technical solutions shown are the same, and will not be repeated here.
[0082] S805: Defect detection is performed on the wafer under test using calibrated optical inspection equipment and electron beam inspection equipment.
[0083] It should be noted that after calibration is completed through steps S801 to S804, the optical inspection equipment transmits the klarf file representing the anomaly distribution to the electron beam inspection equipment. The electron beam inspection equipment can then verify each anomaly by reading the coordinate information of each anomaly from the klarf file and combining it with the calibration results obtained from the calibration process, thus avoiding [further issues]. Figure 3 The cases (A) and (B) in the diagram represent situations that cannot be captured, thus avoiding missed detections and improving the accuracy of defect detection.
[0084] Based on the same inventive concept as the aforementioned technical solution, see [link to inventive concept]. Figure 9 The present disclosure illustrates a calibration device 90 for a wafer inspection apparatus, comprising: a first inspection unit 901, a second inspection unit 902, and a calibration unit 903; wherein,
[0085] The first detection unit 901 is configured to detect a predetermined mark on the surface of a wafer using an optical detection device to obtain a first detection position of the predetermined mark;
[0086] The second detection unit 902 is configured to detect the set mark using an electron beam detection device to obtain a second detection position of the set mark;
[0087] The calibration unit 903 is configured to calibrate the coordinate systems of the optical detection device and the electron beam detection device based on the reference position of the set mark, the first detection position, and the second detection position.
[0088] In some examples, the first detection unit 901 is configured to:
[0089] The wafer surface is inspected using optical inspection equipment to obtain the detection location corresponding to the anomaly on the wafer surface;
[0090] Based on the reference position of the set mark, anomalies that match the set mark are selected from the anomalies on the wafer surface, and the detection position corresponding to the anomaly that matches the set mark is obtained.
[0091] In some examples, the first detection unit 901 is configured to:
[0092] The wafer surface is inspected using optical inspection equipment to obtain the detection location corresponding to the anomaly on the wafer surface;
[0093] Based on the shape of the set mark, anomalies that match the set mark are selected from the anomalies on the wafer surface, and the detection position corresponding to the anomaly that matches the set mark is obtained.
[0094] In some examples, the second detection unit 902 is configured to:
[0095] The wafer surface is inspected within a defined detection area based on the reference position of the defined mark;
[0096] Based on the shape of the set mark, determine the defects that match the set mark from the detected defects, and obtain the detection position corresponding to the defect that matches the set mark.
[0097] In some examples, calibration unit 903 is configured as follows:
[0098] The coordinate system of the electron beam detection device is calibrated based on the difference between the first detection position and the second detection position, so that the coordinate system of the electron beam detection device matches that of the optical detection device.
[0099] In some examples, calibration unit 903 is configured as follows:
[0100] The first calibration value of the electron beam detection device is obtained based on the reference position of the set mark and the first detection position;
[0101] The second calibration value of the electron beam detection device is obtained based on the reference position and the second detection position;
[0102] The coordinate systems of the optical detection device and the electron beam detection device are calibrated to a matched state based on the first calibration value and the second calibration value, respectively.
[0103] Please refer to Figure 10This illustration shows a structural block diagram of a computing device provided in an exemplary embodiment of the present disclosure. In some examples, the computing device 100 can be at least one of devices such as a smartphone, smartwatch, desktop computer, laptop, virtual reality terminal, augmented reality terminal, wireless terminal, and laptop computer. The computing device 100 has communication functions and can access wired or wireless networks. The computing device 100 can refer to one of a plurality of terminals, and those skilled in the art will understand that the number of such terminals can be more or less. In some examples, the computing device 100 can receive data based on the accessed wired or wireless network. It is understood that the computing device 100 undertakes the calculation and processing work of the technical solution of the present disclosure, and the present disclosure does not limit it in this respect.
[0104] like Figure 10 As shown, the computing device in this disclosure may include one or more of the following components: processor 1010 and memory 1020.
[0105] Optionally, the processor 1010 connects various parts within the computing device using various interfaces and lines. It executes various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 1020, and by calling data stored in the memory 1020. Optionally, the processor 1010 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 1010 can integrate one or more of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Specifically, the CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required for display on the touch screen; the NPU implements Artificial Intelligence (AI) functions; and the baseband chip handles wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor 1010, but may be implemented using a separate chip.
[0106] The memory 1020 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 1020 may include a non-transitory computer-readable storage medium. The memory 1020 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 1020 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.
[0107] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, WiFi module, power supply, Bluetooth module, etc., which will not be described in detail here.
[0108] This disclosure also provides a computer-readable storage medium storing at least one instruction that is executed by a processor to implement the calibration method of the wafer inspection apparatus as described in the various embodiments above.
[0109] This disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform a calibration method for the wafer inspection equipment described in the above embodiments.
[0110] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.
[0111] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily as long as they do not conflict.
[0112] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A calibration method for a wafer inspection device, characterized in that, The calibration method comprises: detecting a set mark on a wafer surface by an optical detection device to obtain a first detection position of the set mark; detecting the set mark by an electron beam detection device to obtain a second detection position of the set mark; calibrating coordinate systems of the optical detection device and the electron beam detection device based on the first detection position and the second detection position; wherein the detecting the set mark on the wafer surface by the optical detection device to obtain the first detection position of the set mark comprises: detecting the wafer surface by the optical detection device to obtain a detection position corresponding to an abnormality on the wafer surface; and selecting an abnormality conforming to the set mark from the abnormality on the wafer surface based on a reference position and a shape of the set mark to obtain a first detection position corresponding to the abnormality conforming to the set mark; the detecting the set mark by the electron beam detection device to obtain the second detection position of the set mark comprises: detecting the wafer surface based on the reference position or the first detection position of the set mark within a set detection area; and determining a defect conforming to the set mark from the detected defects according to the shape of the set mark to obtain a second detection position corresponding to the defect conforming to the set mark; the calibrating the coordinate systems of the optical detection device and the electron beam detection device based on the first detection position and the second detection position comprises: calibrating the coordinate system of the electron beam detection device according to a difference between the first detection position and the second detection position, so that the coordinate systems of the electron beam detection device and the optical detection device are matched.
2. The calibration method of claim 1, wherein, The calibration method comprises: obtaining a first calibration value of the electron beam detection device according to the reference position of the set mark and the first detection position; obtaining a second calibration value of the electron beam detection device according to the reference position and the second detection position; calibrating the coordinate systems of the optical detection device and the electron beam detection device to a matching state based on the first calibration value and the second calibration value.
3. The method of calibration of claim 1, wherein, The calibration method further comprises: providing a wafer; processing the set mark on the wafer surface by laser; measuring a reference position of the set mark.
4. A calibration device for a wafer inspection apparatus, characterized by, The calibration device comprises a first detection part, a second detection part and a calibration part, wherein: the first detection part is configured to detect a set mark on a wafer surface by an optical detection device to obtain a first detection position of the set mark; the second detection part is configured to detect the set mark by an electron beam detection device to obtain a second detection position of the set mark; the calibration part is configured to calibrate coordinate systems of the optical detection device and the electron beam detection device based on a reference position of the set mark, the first detection position and the second detection position; the first detection part is configured to detect a set mark on a wafer surface by an optical detection device to obtain a first detection position of the set mark; the second detection part is configured to detect the set mark by an electron beam detection device to obtain a second detection position of the set mark; the calibration part is configured to calibrate coordinate systems of the optical detection device and the electron beam detection device based on a reference position of the set mark, the first detection position and the second detection position; The first detection unit is configured to detect the wafer surface by the optical detection device to obtain a detection position corresponding to an abnormality of the wafer surface; and select an abnormality conforming to the set mark from the abnormality of the wafer surface based on the reference position and shape of the set mark, and obtain a first detection position corresponding to the abnormality conforming to the set mark; The second detection unit is configured to detect the wafer surface in a set detection area based on the reference position or the first detection position of the set mark; and determine a defect conforming to the set mark from the detected defects according to the shape of the set mark, and obtain a second detection position corresponding to the defect conforming to the set mark; The calibration unit is configured to calibrate the coordinate system of the electron beam detection device according to the difference between the first detection position and the second detection position, so as to match the coordinate system of the electron beam detection device with the coordinate system of the optical detection device.
5. A computing device, comprising: The computing device comprises a processor and a memory; the processor is used to execute instructions stored in the memory to realize the calibration method of the wafer detection device according to any one of claims 1 to 3.
6. A computer-readable storage medium, characterized in that, The computer readable storage medium stores at least one instruction, and the at least one instruction is used to be executed by the processor to realize the calibration method of the wafer detection device according to any one of claims 1 to 3.
7. A wafer inspection method characterized by comprising: The method comprises: When it is determined that the wafer to be detected needs to be detected for defects by the electron beam detection device, the optical detection device and the electron beam detection device are calibrated by the calibration method of the wafer detection device according to any one of claims 1 to 3; The calibrated optical detection device and the electron beam detection device are used to detect defects of the wafer to be detected.
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