Packaging structure and manufacturing method thereof

Abstract

The invention discloses a packaging structure and a manufacturing method thereof, the packaging structure comprises a circuit substrate, a packaging layer and a supporting piece, and at least one electronic component is arranged on the first surface of the circuit substrate; the packaging layer is located on the first surface and packages the electronic components, and the area, corresponding to each electronic component, of the packaging layer is provided with a slot; the supporting piece is located in each open groove, and the thermal expansion coefficient of the supporting piece is basically consistent with the thermal expansion coefficient of the electronic component. According to the packaging structure provided by the invention, the first open slot is formed in the packaging layer corresponding to the first electronic component, and the first supporting piece is embedded in the first open slot, so that the thermal expansion coefficient of the first supporting piece is close to that of the first electronic component, and meanwhile, the internal stress of the packaging layer can be effectively released through the formation of the first open slot; therefore, the risks of warping, layering, internal stress, welding spot separation and the like of the packaging structure can be effectively reduced, and the smoothness and reliability of the packaging structure are improved.

Description

Technical Field

[0001] The present application relates to the technical field of printed circuit boards, and in particular to a packaging structure and a manufacturing method thereof. Background Art

[0002] As people's demand for multifunctional electronic devices increases, advanced packaging technology is driven to develop towards high I / O density, high electrical performance, high thermal performance, low power consumption and high bandwidth.

[0003] The general process of current semiconductor system-level packaging is: mounting chips and components on the substrate, then using plastic encapsulation materials (EMC) for plastic encapsulation, and finally performing ball planting and sputtering shielding layer. However, due to the large difference and mismatch between the thermal expansion coefficients (CTE) of packaging materials such as epoxy resin and substrates and chips, warping is easy to occur, especially for the packaging structure of large chips, the warping is more obvious, and it is difficult to carry out subsequent processes; moreover, after the packaging structure warps, the internal parts or chips are subject to greater internal stress, and there will be reliability problems such as cold soldering; in addition, after the packaging structure warps, the EMC plastic encapsulation material and the substrate may separate, and in the subsequent ball planting reflow process, the tin layer is easy to enter the separation gap to form a tin series short circuit. Summary of the invention

[0004] In view of this, in order to overcome at least one of the above-mentioned defects, it is necessary to provide a packaging structure.

[0005] In addition, the present application also provides a method for manufacturing the above-mentioned packaging structure.

[0006] An embodiment of the present application provides a packaging structure, the packaging structure comprising:

[0007] A circuit substrate, wherein at least one electronic component is disposed on a first surface of the circuit substrate;

[0008] A packaging layer, located on the first surface and packaging the electronic components, wherein the packaging layer is provided with a groove in a region corresponding to each electronic component;

[0009] A support member is located in each of the slots, and a thermal expansion coefficient CTE1 of the support member and a thermal expansion coefficient CTE2 of the electronic component have the following relationship: |CTE1-CTE2| / CTE1 or CTE2 is less than or equal to 10%.

[0010] In some possible embodiments, the support member is made of metal; and a through hole is provided on the support member.

[0011] In some possible embodiments, the support member is an antenna substrate.

[0012] In some possible embodiments, the antenna substrate is located on a side of the electronic component away from the circuit substrate, the antenna substrate includes a connection pad close to the electronic component, the packaging layer is formed with an opening corresponding to the connection pad, the connection end of the electronic component is exposed in the opening and is electrically connected to the connection pad through the conductive part, and two adjacent connection pads are electrically isolated.

[0013] In some possible embodiments, the packaging structure also includes a shielding layer located on the surface of the packaging layer, the shielding layer covers the support member, the shielding layer extends to the bottom surface of the groove and the inner wall of the opening, and there is a gap in the shielding layer between two adjacent connecting pads.

[0014] In some possible embodiments, the circuit substrate also includes a second surface arranged opposite to the first surface, the second surface is recessed toward the first surface to form a groove, the inner layer circuit of the circuit substrate is exposed in the groove, and solder balls are provided on the second surface and in the groove.

[0015] The present application also provides a method for manufacturing a packaging structure, the method comprising:

[0016] Disposing at least one electronic component on the first surface of the circuit substrate;

[0017] forming a packaging layer on the first surface, wherein the packaging layer packages the electronic components;

[0018] forming a groove in the packaging layer in a region corresponding to each of the electronic components; and

[0019] A support member is disposed in each of the slots, and the thermal expansion coefficient CTE1 of the support member and the thermal expansion coefficient CTE2 of the electronic component have the following relationship: |CTE1-CTE2| / CTE1 or CTE2 is less than or equal to 10%, thereby obtaining the packaging structure.

[0020] In some possible embodiments, the support member is made of metal, and before the step of disposing a support member in each of the slots, the manufacturing method further includes:

[0021] A through hole is formed on the support member.

[0022] In some possible embodiments, the support member is an antenna substrate;

[0023] The step of disposing a support member in each of the slots comprises:

[0024] An opening is formed at the bottom of the slot, and the connection end of the electronic component is exposed in the opening;

[0025] forming a shielding layer on the surface of the packaging layer, wherein the shielding layer extends to the inner wall of the opening, and the shielding layer around the opening has a gap so that the packaging layer is exposed in the gap;

[0026] forming a conductive portion in the opening;

[0027] placing the support member in the slot, so that the connection pad of the support member is connected to the conductive part by thermal compression bonding; and

[0028] A filling glue layer is formed between the support member and the shielding layer.

[0029] In some possible embodiments, in the step of forming a groove in a region of the packaging layer corresponding to each of the electronic components, the manufacturing method further includes:

[0030] A groove is formed on the second surface of the circuit substrate, the second surface is arranged opposite to the first surface, and the inner layer circuit of the circuit substrate is exposed in the groove;

[0031] The production method further comprises:

[0032] Solder balls are formed on the second surface and in the grooves.

[0033] The packaging structure provided in the embodiment of the present application is formed by opening a groove in the packaging layer corresponding to the electronic component and embedding a support member in the groove. Since the CTE1 of the support member is close to the thermal expansion coefficient CTE2 of the electronic component, and the formation of the groove can also effectively release the internal stress of the packaging layer, it can effectively reduce the risks of warping, delamination, internal stress and solder joint separation of the packaging structure, facilitate subsequent processes such as ball planting, and at the same time ensure the coplanarity of the packaging structure after singulation, thereby improving the flatness of the packaging structure and product reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A schematic diagram of a packaging structure provided in accordance with an embodiment of the present application.

[0035] Figure 2 A schematic structural diagram of a first support member provided in one embodiment of the present application.

[0036] Figure 3 A schematic diagram of a shielding layer provided in one embodiment of the present application.

[0037] Figure 4 A schematic diagram of a packaging structure provided in another embodiment of the present application.

[0038] Figure 5 A flowchart of the manufacturing process of a packaging structure provided in one embodiment of the present application.

[0039] FIG. 6A to FIG. 6D A schematic diagram of a manufacturing process of a circuit substrate provided in one embodiment of the present application.

[0040] Figure 7 For Fig.6D A schematic structural diagram of a packaging layer formed on the first surface of a circuit substrate.

[0041] Figure 8 For Figure 7 A schematic diagram of a structure in which a first groove, a second groove and a groove are formed on a packaging layer.

[0042] Fig. 9 For Figure 8 A structural schematic diagram of a first support member is arranged in the first groove.

[0043] Fig.10 For Fig. 9 Schematic diagram of the structure in which a shielding layer is formed on the surface of the encapsulation layer.

[0044] Fig.11 A schematic structural diagram of a second support member provided in one embodiment of the present application.

[0045] Fig.12 A schematic structural diagram of forming two first grooves on a packaging layer of a circuit substrate provided in another embodiment of the present application.

[0046] Fig.13 For Fig.12 A structural schematic diagram of a first electronic component is respectively arranged in two first slots.

[0047] Main component symbols

[0048] Package structure 100,200

[0049] Circuit board 1

[0050] First surface 11

[0051] Second surface 12

[0052] The first outer circuit layer 13

[0053] The second outer circuit layer 14

[0054] Inner circuit layer 15

[0055] Groove 16

[0056] Solder ball 17

[0057] Encapsulation layer 2

[0058] Opening 21

[0059] First support member 3

[0060] Through hole 31

[0061] Barcode area 32

[0062] First Electronic Components 4

[0063] First slot 51

[0064] The second slot 52

[0065] Second electronic components 6

[0066] Second support member 7

[0067] Connection pad 71

[0068] Conductive portion 72

[0069] Tin layer 73

[0070] Filling layer 8

[0071] Shielding layer 9

[0072] Gap 91

[0073] First floor 92

[0074] Second floor 93

[0075] Third floor 94

[0076] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0077] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0078] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0079] The embodiment of the present application provides a packaging structure, which includes: a circuit substrate, a packaging layer and a support. At least one electronic component is provided on the first surface of the circuit substrate; the packaging layer is located on the first surface and encapsulates the electronic component, and the packaging layer has a groove corresponding to the area of ​​each electronic component; the support is located in each groove, wherein the thermal expansion coefficient CTE1 of the support and the thermal expansion coefficient CTE2 of the electronic component have the following relationship, |CTE1-CTE2| / CTE1 or CTE2 are both less than or equal to 10%, that is, the thermal expansion coefficient CTE1 of the support is close to the thermal expansion coefficient CTE2 of the electronic component. By opening a groove in the packaging layer corresponding to the electronic components and embedding a support in the groove, and the CTE1 of the support is close to the thermal expansion coefficient CTE2 of the electronic components, the thermal expansion coefficient of the circuit substrate and the overall packaging part located on the circuit substrate (including the packaging layer and the internal electronic components and the support) are matched, thereby effectively reducing the risks of packaging structure warping, delamination, internal stress, and solder joint separation, facilitating subsequent processes such as ball planting, and ensuring the coplanarity of the packaging structure after singulation, improving the flatness of the packaging structure and product reliability. In addition, setting a groove on the packaging layer can further release the internal stress of the packaging layer.

[0080] The packaging structure provided in the present application is described in detail below in conjunction with specific embodiments.

[0081] Example 1

[0082] See also Figure 1 and Figure 2 The present application embodiment provides a packaging structure 100, including: a circuit substrate 1, electronic components, a packaging layer 2 and a support. The electronic components in this embodiment include two types, which are respectively named as a first electronic component and a second electronic component, wherein two types of support are provided corresponding to the two electronic components, which are respectively named as a first support and a second support.

[0083] Specifically, at least one first electronic component 4 is disposed on the first surface 11 of the circuit substrate 1. The encapsulation layer 2 is located on the first surface 11 and encapsulates the first electronic component 4, and the encapsulation layer 2 is provided with a first slot 51 in a region corresponding to each first electronic component 4. One first support member 3 is located in one first slot 51, and the thermal expansion coefficient (CTE1) of the first support member 3 and the thermal expansion coefficient (CTE2) of the first electronic component 4 have the following relationship, |CTE1-CTE2| / CTE1 or CTE2 are both less than or equal to 10%, that is, CTE1 is close to CTE2, and the difference between the two is within the range of 10%.

[0084] The circuit substrate 1 can be a circuit board with a single-layer circuit layer, or a circuit board with multiple circuit layers. In this embodiment, the circuit substrate 1 has a first surface 11 and a second surface 12 that are arranged opposite to each other, wherein a first outer circuit layer 13 is provided on the first surface 11, and a second outer circuit layer 14 is provided on the second surface 12. At the same time, the circuit substrate 1 also has at least one inner circuit layer 15 inside, wherein the first outer circuit layer 13, the second outer circuit layer 14 and the inner circuit layer 15 are electrically connected. The first electronic component 4 is arranged on the first surface 11 and is electrically connected to the first outer circuit layer 13. It can be understood that the type of the circuit substrate 1 can be FPC, PCB, ICs, etc. The manufacturing method of the circuit substrate 1 can be formed by adopting a conventional circuit board manufacturing method.

[0085] According to actual needs, the first electronic component 4 can be an active device, such as an active chip, including but not limited to a semiconductor power chip, a power chip, a digital chip, a radio frequency chip, etc. In some embodiments, the first electronic component 4 can be a large chip, such as an insulated gate bipolar transistor (IGBT), a diode, a metal oxide semiconductor field effect transistor (MOSFET) and other power chips. The back of the first electronic component 4 can be set on the first surface 11 by a mounting method, and the electrical connection between the first electronic component 4 and the first outer circuit layer 13 is achieved by gold wire. It can be understood that the first electronic component 4 can also be directly mounted on the first outer circuit layer 13 by welding.

[0086] The packaging material of the packaging layer 2 can be selected from materials with insulating properties. Specifically, the material of the packaging layer 2 can be one of epoxy resin, prepreg (PP), BT resin, polyphenylene oxide (PPO), polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), etc. In this embodiment, the packaging layer 2 can be a black epoxy resin.

[0087] Since the CTE of the packaging material of the packaging layer 2 is significantly different from the CTE of the first electronic component 4 and the circuit substrate 1, problems such as warping, delamination and internal stress are likely to occur, especially for large chips, the above problems are more obvious, thereby causing adverse effects on subsequent processes and product quality. To this end, this embodiment opens a first slot 51 in the area of ​​the packaging layer 2 corresponding to the first electronic component 4, and embeds the first support member 3 in the first slot 51. Since the CTE1 of the first support member 3 is close to the thermal expansion coefficient CTE2 of the first electronic component 4, after the first support member 3 is embedded, the overall flatness of the packaging part composed of the first electronic component 4, the first support member 3 and the packaging layer 2 is improved, so that the thermal expansion coefficient of the circuit substrate 1 matches the corresponding packaging part located thereon, thereby effectively reducing the risks of warping, delamination, internal stress and solder joint separation of the packaging structure 100, facilitating the subsequent processes such as ball planting, and at the same time ensuring the coplanarity of the packaging structure 100 after singulation, thereby improving the flatness and product reliability of the packaging structure 100. In addition, the first groove 51 formed on the packaging layer 2 can further effectively release the internal stress of the packaging layer 2 .

[0088] In some embodiments, the shape, area, thickness, and CTE of the first support member 3 can be designed according to the first electronic component 4 actually mounted and the corresponding regional structure of the packaging layer 2. For example, the size of the first support member 3 can be slightly larger than the first electronic component 4, which can further improve the flatness of the packaging structure 100.

[0089] In some embodiments, the first support member 3 may be made of metal, for example, a metal block having a CTE close to that of the first electronic component 4 , specifically, copper, chromium, silver, nickel or other metals or alloys thereof.

[0090] In some embodiments, Figure 2 As shown, a through hole 31 is provided on the first support member 3. By opening the through hole 31 on the first support member 3, excess glue or solder paste or other connecting materials can enter the through hole 31, thereby further improving the mounting flatness of the first support member 3, and at the same time, improving the bonding strength between the first support member 3 and the packaging layer 2.

[0091] In some embodiments, the first support member 3 further has a barcode area 32, and a barcode (not shown) is provided on the barcode area 32. Laser forming the barcode above the first support member 3 is easier to implement than directly forming the barcode on the packaging material by laser, and the formed barcode is easier to be recognized by a barcode scanner.

[0092] Please refer again Figure 1A second electronic component 6 is also provided on the first surface 11, and the packaging layer 2 also encapsulates the second electronic component 6. A second groove 52 is provided in the area of ​​the packaging layer 2 corresponding to the second electronic component 6. A second support member 7 is provided in the second groove 52. The second support member 7 is electrically connected to the second electronic component 6, and the thermal expansion coefficient CET1 of the second support member 7 and the thermal expansion coefficient CET2 of the second electronic component 6 also have the following relationship, |CTE1-CTE2| / CTE1 or CTE2 are both less than or equal to 10%.

[0093] In some embodiments, the second support member 7 may be a functional module that does not require electromagnetic shielding, such as an antenna substrate. By providing a second slot 52 above the second electronic component 6 and embedding the second support member 7 in the second slot 52, the risks of warping, delamination, internal stress and solder joint separation of the packaging structure 100 can be effectively reduced, which is convenient for subsequent processes such as ball planting. At the same time, the coplanarity of the packaging structure 100 after singulation can be ensured, and the flatness and product reliability of the packaging structure 100 can be improved. Compared with the traditional antenna substrate layout outside the packaging structure, the second support member 7 is stacked above the second electronic component 6 in this embodiment, and the second support member 7 and the packaging structure 100 can also form a whole. The packaging structure 100 has a higher degree of integration. At the same time, the distance between the second support member 7 and the second electronic component 6 is closer, which reduces the signal transmission distance, improves the transmission efficiency, reduces the power consumption, and makes the signal transmission more stable and reliable.

[0094] The second electronic component 6 can be an active device, such as an active chip, including but not limited to a semiconductor power chip, a power chip, a digital chip, a radio frequency chip, etc. In some embodiments, the second electronic component 6 can be a large chip, such as an insulated gate bipolar transistor (IGBT), a diode, a metal oxide semiconductor field effect transistor (MOSFET) and other power chips. The back of the second electronic component 6 can be set on the first surface 11 by a mounting method, and the electrical connection between the second electronic component 6 and the first outer circuit layer 13 is achieved by gold wire. It can be understood that the second electronic component 6 can also be directly mounted on the first outer circuit layer 13 by welding.

[0095] In some embodiments, the second support member 7 includes a connection pad 71 close to the second electronic component 6, the packaging layer 2 is formed with an opening 21 corresponding to the connection pad 71, the connection end of the second electronic component 6 is exposed at the opening 21 and is electrically connected to the connection pad 71 through the conductive portion 72, and two adjacent connection pads 71 ​​are electrically isolated. Specifically, the second support member 7 can be, for example, an antenna substrate, and the second electronic component 6 can be a power chip.

[0096] In some embodiments, the second slot 52 may be an L-shaped slot located at the edge of the packaging layer 2 to facilitate mounting of the second support member 7 .

[0097] In some embodiments, a filling glue layer 8 is provided between the second support member 7 and the packaging layer 2. By adding the filling glue layer 8 between the second support member 7 and the packaging layer 2, the bonding force between the second support member 7 and the packaging layer 2 can be improved, the connection pad 71 can be encapsulated, the stability and reliability can be improved, and the overall flatness of the packaging structure 100 can be improved.

[0098] In some embodiments, a tin layer 73 may be pre-coated on the connection pad 71 by tinning or tin plating to facilitate thermocompression bonding (TCB) mounting. The tin layer 73 on the connection pad 71 is melted under high temperature and high pressure, and a eutectic is formed between the tin of the tin layer 73 and the copper of the conductive part 72 during the pressing process, thereby achieving high-density packaging. This process does not require reflow soldering, and can further reduce the warping of the packaging structure 100.

[0099] Please refer again Figure 1 The packaging structure 100 also includes a shielding layer 9 located on the surface of the packaging layer 2, and the shielding layer 9 covers the first support member 3. At the same time, the shielding layer 9 extends to the bottom surface of the second slot 52 and the inner wall of the opening 21, and there is a gap 91 in the shielding layer 9 around each of the connection pads 71, so that the surface of the packaging layer 2 is exposed in the gap 91, thereby electrically isolating different connection pads 71, and also preventing the connection pads 71 ​​from being electrically connected to the circuit substrate 1 through the shielding layer 9, causing a short circuit. By sputtering the shielding layer 9 on the surface of the packaging layer 2, the electromagnetic shielding effect can be achieved. At the same time, the shielding layer 9 extending to the inner wall of the opening 21 can increase the bonding force between the conductive part 72 and the circuit substrate 1, and the reliability is higher.

[0100] In some embodiments, Figure 3As shown, the shielding layer 9 includes a first layer 92, a second layer 93 and a third layer 94 stacked in sequence, the first layer 92 is close to the encapsulation layer 2, the third layer 94 is far away from the encapsulation layer 2, the first layer 92 and the third layer 94 can be made of Fe / Cr / Ni composite materials, etc., and the material of the second layer 93 can be copper. The shielding layer 9 uses Fe / Cr / Ni composite materials as the part that is combined with the encapsulation layer 2, and the bonding force is strong, which can improve the reliability. For example, the second support member 7 as the antenna substrate is connected to the signal of the circuit substrate 1 through the conductive part 72 combined with the shielding layer 9. Compared with the process of directly connecting with the copper layer on the EMC epoxy molding compound or the silicon layer of the chip, the process of this embodiment uses Fe / Cr / Ni composite materials to achieve connection, and the bonding force is better, and the reliability is guaranteed.

[0101] Please refer again Figure 1 The second surface 12 of the circuit substrate 1 is recessed toward the first surface 11 to form a groove 16, and the inner circuit layer 15 of the circuit substrate 1 is exposed in the groove 16. Solder balls 17 are provided on the second surface 12 and in the groove 16. At the same time, the diameter of the solder balls 17 can be adjusted so that the apex of the solder balls 17 on the second surface 12 and the apex of the solder balls 17 in the groove 16 are roughly parallel to form a stepped solder ball structure, thereby ensuring the flatness of the package structure 100. In addition, the bottom layer of the circuit substrate 1 is grooved, and the internal stress of the package structure 100 is released, which can reduce the delamination of the package layer 2 and the separation of the solder joints, and at the same time reduce the risk of warping of the package structure 100, thereby improving the flatness and reliability of the overall package structure 100. In some embodiments, the solder balls 17 can be tin balls.

[0102] The packaging structure 100 provided in the embodiment of the present application, by opening a first groove 51 in the packaging layer 2 corresponding to the first electronic component 4, and embedding the first support member 3 in the first groove 51, since the CTE of the first support member 3 is close to the thermal expansion coefficient of the first electronic component 4, and at the same time, the formation of the first groove 51 can also effectively release the internal stress of the packaging layer 2, thereby effectively reducing the risks of warping, delamination, internal stress and solder joint separation of the packaging structure 100, facilitating subsequent processes such as ball planting, and at the same time ensuring the coplanarity of the packaging structure 100 after singulation, thereby improving the flatness and product reliability of the packaging structure 100. In addition, by setting a second support member 7 in the area of ​​the packaging layer 2 corresponding to the second electronic component 6, the second support member 7 matches the thermal expansion coefficient of the second electronic component 6, which can further improve the flatness and reliability of the overall packaging structure 100. At the same time, the second support member 7 with corresponding functions is integrated above the second electronic component 6, so that the second support member 7 and the packaging structure 100 can form a whole, and the packaging structure 100 has a higher degree of integration. At the same time, the distance between the second support member 7 and the second electronic component 6 is closer, which reduces the signal transmission distance, improves the transmission efficiency, reduces the power consumption, and makes the signal transmission more stable and reliable.

[0103] Example 2

[0104] See also Figure 4 Another embodiment of the present application provides a packaging structure 200. The difference between the packaging structure 200 described in this embodiment and the aforementioned packaging structure 100 is that the packaging structure 200 contains two first electronic components 4, and a first support member 3 is embedded in the packaging layer 2 above each first electronic component 4. At the same time, the packaging structure 200 does not contain a second support member. The position and shape of the first support member 3 can be designed according to the position and shape of the first electronic components 4 actually packaged in the packaging layer 2. By adding the first support member 3 corresponding to each first electronic component 4, especially the first electronic component 4 with a large area, the risks of warping, delamination, internal stress and solder joint separation can be reduced, and the flatness and reliability of the overall packaging structure 200 can be further improved.

[0105] It is understandable that in other embodiments, the packaging structure may contain only the aforementioned first electronic component 4 and the first support 3, or may contain only the aforementioned second electronic component 6 and the second support 7, and the packaging structure can be flexibly designed and laid out according to actual needs.

[0106] See also Figure 5 The present application also provides a method for manufacturing a packaging structure, which specifically includes the following steps:

[0107] Step S10, disposing at least one electronic component on the first surface of the circuit substrate.

[0108] Step S20, forming a packaging layer on the first surface, wherein the packaging layer packages the electronic components.

[0109] Step S30, forming a groove in a region of the packaging layer corresponding to each of the electronic components.

[0110] Step S40, a support member is disposed in each of the slots, wherein the thermal expansion coefficient CTE1 of the support member and the thermal expansion coefficient CTE2 of the electronic component have the following relationship: |CTE1-CTE2| / CTE1 or CTE2 is less than or equal to 10%, thereby obtaining the packaging structure.

[0111] See also FIG. 6A to FIG. 12 , the method for manufacturing the packaging structure 100 is described in detail, and the preparation of the packaging structure 100 specifically includes the following steps:

[0112] Step S1, such as FIG. 6A to FIG. 7 As shown, at least one first electronic component 4 is disposed on the first surface 11 of the circuit substrate 1 .

[0113] Among them, FIG. 6A to FIG. 6D FIG. 1 shows a process for preparing the circuit substrate 1, which specifically includes:

[0114] Step S11, as Fig. 6A As shown, the inner circuit layer 15 of the blank board is manufactured according to the requirements, the number of layers of the circuit substrate 1 is not limited, and the type can be FPC, PCB, ICs, etc.

[0115] Step S12, as Figure 6B As shown, laser drilling is performed on the inner substrate and then filled with electroplating to electrically connect the two inner circuit layers 15 .

[0116] Step S13, as Figure 6C As shown, the inner substrate and the single-sided copper clad laminate obtained in step S12 are laminated and then the outer circuit is etched as required to form a first outer circuit layer 13 located on the first surface 11 and a second outer circuit layer 14 located on the second surface 12.

[0117] Step S14, as Fig.6D As shown, laser drilling is performed on the substrate obtained in step S13, and the holes are filled with electroplating, and then gold plating, solder mask and other processes are performed to obtain the circuit substrate 1.

[0118] After forming the circuit substrate 1, the first electronic component 4 is mounted on the first surface 11 of the circuit substrate 1 and a Wire Bond process is performed to realize functions such as operation and signal transmission. Specifically, the first electronic component 4 can be a large chip.

[0119] In some embodiments, while mounting the first electronic component 4, the second electronic component 6 may be mounted on the first surface of the circuit substrate 1, wherein the second electronic component 6 may be a large chip. It is understandable that components such as resistors may also be mounted at the same time.

[0120] Step S2, such as Figure 7 As shown, a packaging layer 2 is formed on the first surface 11 , and the packaging layer 2 encapsulates the first electronic component 4 .

[0121] The encapsulation layer 2 may be made of the material mentioned above, for example, epoxy resin.

[0122] Step S3, such as Figure 8 As shown, a first groove 51 is formed in a region of the packaging layer 2 corresponding to each of the first electronic components 4 .

[0123] Laser grooves are formed on the EMC on the surface of the first electronic component 4 (eg, a large chip), and the groove width and groove depth of the first groove 51 are slightly larger than the size of the first electronic component 4 .

[0124] In some embodiments, when the second electronic component 6 is disposed on the circuit substrate 1, when the first groove 51 is formed, it is also necessary to form a second groove 52 in the area of ​​the packaging layer 2 corresponding to the second electronic component 6. The groove depth of the second groove 52 needs to reach the surface of the second electronic component 6, so as to facilitate the subsequent electrical connection between the second support and the second electronic component 6. Furthermore, in the process of forming the second groove 52, it is also necessary to form an opening 21 at the bottom of the second groove 52, and the connection end of the second electronic component 6 is exposed in the opening 21, so as to facilitate the subsequent electrical connection between the second support and the second electronic component 6.

[0125] In some embodiments, the bottom of the circuit substrate 1 may be laser grooved to form a groove 16, wherein the groove 16 is located on the second surface 12 of the circuit substrate 1. Laser grooves are also performed on the bottom of the circuit substrate 1 to further release stress and reduce the occurrence of warping.

[0126] Step S4, such as Figures 9 to 12 As shown, a first support member 3 is disposed in the first groove 51 , and the thermal expansion coefficient of the first support member 3 is substantially consistent with the thermal expansion coefficient of the first electronic component 4 , thereby obtaining the packaging structure 100 .

[0127] The first support member 3 may be made of metal.

[0128] Wherein, step S4 specifically includes the following steps:

[0129] Step S41, referring to Figure 2 , a through hole 31 is formed on the first supporting member 3 .

[0130] Step S42, referring to Figure 2 , a barcode is formed in the barcode area 32 of the first supporting member 3.

[0131] Step S43, as Fig. 9 As shown, the first support member 3 is mounted in the first slot 51, and the first support member 3 is fixed by using a filling glue or solder paste. During the mounting process, excess filling glue or solder paste will enter the through hole 31, thereby improving the mounting flatness and providing the mounting reliability of the first support member 3. Then, balls are planted on the groove 16 and the second surface 12 to form solder balls 17. When planting balls, solder balls with different ball diameters are selected to ensure that the tops of the solder balls are on the same horizontal line.

[0132] Step S44, as Fig.10 As shown, a shielding layer 9 is formed on the surface of the packaging layer 2, the shielding layer 9 covers the first support member 3, the shielding layer 9 extends to the inner wall of the opening 21, and the shielding layer 9 around the opening 21 has a gap 91 so that the packaging layer 2 is exposed in the gap 91.

[0133] Specifically, a jig is used to shield the area around the opening 21 at the bottom of the second slot 52 to prevent metal from being sputtered around the opening 21 and causing a short circuit between PADs.

[0134] Step S45, as Fig.10 As shown, a conductive portion 72 is formed in the opening 21 , wherein the conductive portion 72 is located on the shielding layer 9 in the opening 21 .

[0135] Step S46, as Fig.11 , combined with Figure 1 As shown, a second support member 7 is disposed in the second slot 52 , the second support member 7 is electrically connected to the second electronic component 6 , and the thermal expansion coefficient of the second support member 7 is substantially consistent with the thermal expansion coefficient of the second electronic component 6 .

[0136] Among them, Fig.11 As shown, the second support member 7 is first manufactured, wherein the second support member 7 includes a plurality of connection pads 71, and a tin layer 73 can be pre-coated on the connection pads 71 ​​by tinning or tinning to facilitate thermo-compression bonding (TCB) mounting. Figure 1As shown, the second support member 7 is placed in the second slot 52, so that the connection pad 71 corresponds to the conductive part 72 one by one, and the tin layer 73 on the connection pad 71 is melted under high temperature and high pressure, and the tin of the tin layer 73 and the copper of the conductive part 72 are formed during the pressing process, thereby achieving high-density packaging. This process does not require reflow soldering, which can further reduce the warping of the packaging structure 100.

[0137] In some embodiments, the second support member 7 may be an antenna substrate.

[0138] Step S47, combine Figure 1 As shown, a filling glue layer 8 is formed between the second supporting member 7 and the shielding layer 9 .

[0139] Understandable, such as Fig.12 and Fig.13 As shown, please refer to Figure 4 The method for manufacturing the packaging structure 200 provided in the embodiment of the present application is substantially the same as the method for providing the first support member 3 in the method for manufacturing the packaging structure 100, and will not be elaborated herein.

[0140] The manufacturing method of the package structure 100 of the embodiment of the present application can effectively reduce the problems of warping, delamination, internal stress and solder joint separation of the package structure 100, and can improve the overall flatness and reliability of the package structure 100; and the mounting of the second support member 7 adopts thermocompression bonding connection, without the need for complex processes such as welding, which can further improve the flatness and reliability of the package structure 100. The manufacturing method has a simple process, convenient operation, and low cost. The first support member 3 and the second support member 7 can be set at the location where the large chip is set according to actual needs to meet a specific space layout and improve space utilization and integration.

Claims

1. A packaging structure, characterized in that: include: A circuit substrate, wherein at least one electronic component is disposed on a first surface of the circuit substrate; A packaging layer, located on the first surface and packaging the electronic components, wherein the packaging layer is provided with a groove in a region corresponding to each electronic component; A support member is located in each of the slots, and a thermal expansion coefficient CTE1 of the support member and a thermal expansion coefficient CTE2 of the electronic component have the following relationship: |CTE1-CTE2| / CTE1 or CTE2 is less than or equal to 10%.

2. The packaging structure according to claim 1, characterized in that: The support member is made of metal and is provided with a through hole.

3. The packaging structure according to claim 1, characterized in that: The supporting member is an antenna substrate.

4. The packaging structure according to claim 3, characterized in that: The antenna substrate is located on a side of the electronic component away from the circuit substrate. The antenna substrate includes a connection pad close to the electronic component. The packaging layer is formed with an opening corresponding to the connection pad. The connection end of the electronic component is exposed in the opening and is electrically connected to the connection pad through the conductive part. Two adjacent connection pads are electrically isolated.

5. The packaging structure according to claim 4, characterized in that: The packaging structure also includes a shielding layer located on the surface of the packaging layer, the shielding layer covers the support member, the shielding layer extends to the bottom surface of the groove and the inner wall of the opening, and there is a gap in the shielding layer between two adjacent connection pads.

6. The packaging structure according to claim 1, characterized in that: The circuit substrate further comprises a second surface arranged opposite to the first surface, the second surface is recessed toward the first surface to form a groove, the inner layer circuit of the circuit substrate is exposed in the groove, and solder balls are arranged on the second surface and in the groove.

7. A method for manufacturing a packaging structure, characterized in that: include: Disposing at least one electronic component on the first surface of the circuit substrate; forming a packaging layer on the first surface, wherein the packaging layer packages the electronic components; Forming a groove in the packaging layer in a region corresponding to each of the electronic components; as well as A support member is disposed in each of the slots, and the thermal expansion coefficient CTE1 of the support member and the thermal expansion coefficient CTE2 of the electronic component have the following relationship: |CTE1-CTE2| / CTE1 or CTE2 is less than or equal to 10%, thereby obtaining the packaging structure.

8. The method for manufacturing a packaging structure according to claim 7, characterized in that: The material of the support member is metal. Before the step of arranging a support member in each of the slots, the manufacturing method further includes: A through hole is formed on the support member.

9. The method for manufacturing a packaging structure according to claim 7, wherein: The support member is an antenna substrate; The step of disposing a support member in each of the slots comprises: An opening is formed at the bottom of the slot, and the connection end of the electronic component is exposed in the opening; forming a shielding layer on the surface of the packaging layer, wherein the shielding layer extends to the inner wall of the opening, and the shielding layer around the opening has a gap so that the packaging layer is exposed in the gap; forming a conductive portion in the opening; placing the support member in the slot, so that the connection pad of the support member is connected to the conductive part by thermal compression bonding; and A filling glue layer is formed between the support member and the shielding layer.

10. The method for manufacturing a packaging structure according to claim 7, characterized in that: In the step of forming a groove in the area of ​​the packaging layer corresponding to each of the electronic components, the manufacturing method further includes: A groove is formed on the second surface of the circuit substrate, the second surface is arranged opposite to the first surface, and the inner layer circuit of the circuit substrate is exposed in the groove; The production method further comprises: Solder balls are formed on the second surface and in the grooves.

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