Satellite-borne SAR load antenna architecture
By adopting standard antenna modules that work independently and in parallel, connecting with the satellite platform using power supply, clock and fiber optic interfaces, the complex problems of existing SAR antenna system architecture is solved, and large-scale production and rapid integration testing are simplified.
Patent Information
- Application Number
- CN202411966934.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-25
AI Technical Summary
The existing SAR antenna system has a complex architecture, which makes it difficult to produce large-scale and fast integration testing.
Multiple standard antenna modules that work independently and in parallel are adopted, each module is connected to the satellite platform through a power interface, a clock interface and a fiber optic interface, simplifying the interface and interconnection between modules.
It realizes that each standard antenna module works independently in parallel, without the need for interconnected cables, and the large-capacity data optical fiber is directly interconnected with the satellite computer, simplifying the software and hardware interfaces, and promoting the large-scale production and rapid integration testing of SAR antennas.
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Figure CN119890661A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of spaceborne SAR payload active phased array antennas, and in particular to a spaceborne SAR payload antenna architecture. Background Art
[0002] In spaceborne SAR radar, active antennas, as microwave signal radiation and receiving devices, play an important role in the system, mainly completing microwave signal power amplification and directional radiation, and completing directional reception and amplification filtering of echo signals. The performance of SAR payload active phased array antenna directly affects the system's key performance indicators such as sensitivity, azimuth resolution, signal-to-noise ratio, and mapping bandwidth, and also restricts the payload's weight, cost, testability, and manufacturability.
[0003] Currently, existing SAR antennas are based on analog phased array systems and are integrated through brick-type TR components.
[0004] However, since the existing SAR antennas have many interconnecting cables between the array modules and the software and hardware interfaces are complex, it is not conducive to the large-scale production and rapid integration testing of SAR antennas, so there is at least a problem of complex system architecture. Summary of the invention
[0005] 1. Technical issues to be resolved
[0006] In view of the above-mentioned shortcomings and deficiencies of the prior art, the present invention provides a space-borne SAR payload antenna architecture, which at least solves the technical problem of complex system architecture in the prior art.
[0007] (II) Technical solution
[0008] In order to achieve the above object, the main technical solutions adopted by the present invention include:
[0009] An embodiment of the present invention provides a satellite-borne SAR payload antenna architecture, including a plurality of standard antenna modules working independently and in parallel, and each of the plurality of standard antenna modules is connected to a satellite platform only through a power interface, a clock interface and an optical fiber interface.
[0010] In one possible embodiment, each standard antenna module includes a waveguide antenna, a low-power radio frequency module, and a plurality of TR components;
[0011] The low-power RF module and the multiple TR components are arranged on the radiation surface of the waveguide antenna, and the low-power RF modules are connected to the multiple TR components.
[0012] In a possible embodiment, the low-power radio frequency module includes a plurality of branch modules, a synthesizer module and a secondary delay amplification module;
[0013] The synthesizer module is connected to each branch module of the plurality of branch modules arranged in parallel, and the synthesizer module is also connected to the secondary delay amplification module.
[0014] In a possible embodiment, each branch module includes a delay amplitude and phase control module and two transceiver front-end modules;
[0015] The delay amplitude and phase control module is respectively connected to each of the two transceiver front-end modules arranged in parallel.
[0016] In a possible embodiment, each transceiver front-end module integrates a low noise amplifier LNA and a power amplifier PA.
[0017] In a possible embodiment, the low-power radio frequency module includes a radio frequency transceiver module, a digital transceiver module and a frequency synthesis module; wherein the radio frequency transceiver module and the digital transceiver module are connected.
[0018] In a possible embodiment, the radio frequency transceiver module includes a first filter module, a second filter module, a first branch module, a second branch module, a first matrix switch module, and a second matrix switch module;
[0019] Among them, the first branch module and the second branch module are arranged between the first matrix switch module and the second matrix switch module, and the first filter module and the second filter module are arranged between the second matrix switch module and the digital transceiver module, and the first branch module includes a third filter module, a first down-conversion module, a first amplification module and a second down-conversion module connected in sequence, and the third filter is connected to the first matrix switch module, and the second branch module includes a first up-conversion module, a second amplification module, a second up-conversion module and a fourth filter module connected in sequence, and the first up-conversion module is connected to the second matrix switch module.
[0020] In a possible embodiment, the digital transceiver module includes an ADC module, a DAC module, an FPGA processing module, and an optoelectronic / electro-optical conversion module;
[0021] The ADC module is connected to the first filter module and the FPGA processing module respectively, and the DAC module is connected to the second filter module and the FPGA processing module respectively, and the FPGA processing module is also connected to the photoelectric / electro-optical conversion module.
[0022] (III) Beneficial effects
[0023] The beneficial effects of the present invention are:
[0024] The embodiment of the present application provides a satellite-borne SAR payload antenna architecture, which uses multiple standard antenna modules that work independently and in parallel, and each of the multiple standard antenna modules is connected to the satellite platform only through a power interface, a clock interface and an optical fiber interface, so that each standard antenna module works independently and in parallel without any interconnecting cables. Each standard antenna module can be directly interconnected with an onboard computer through a large-capacity data optical fiber. The software and hardware interfaces are simple, which is conducive to the large-scale production and rapid integration testing of SAR antennas, thereby solving the technical problem of complex system architecture in the prior art.
[0025] In order to make the above-mentioned objectives, features and advantages to be achieved by the embodiments of the present application more obvious and understandable, the following specifically cites preferred embodiments and describes them in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0027] Figure 1 A schematic diagram of a spaceborne SAR payload antenna architecture provided in an embodiment of the present application is shown;
[0028] Figure 2 A schematic diagram of the structure of a standard antenna module provided in an embodiment of the present application is shown;
[0029] Figure 3 A schematic diagram of the structure of a TR assembly provided in an embodiment of the present application is shown;
[0030] Figure 4 A schematic diagram of the structure of a radio frequency transceiver module provided in an embodiment of the present application is shown. DETAILED DESCRIPTION
[0031] In order to better explain the present invention and facilitate understanding, the present invention is described in detail below through specific implementation modes in conjunction with the accompanying drawings.
[0032] In addition to the above-mentioned complex system architecture problem, existing SAR antennas also have the following problems:
[0033] Weak upgrade and expansion capabilities: One transmission can only meet the predetermined functional requirements, and the antenna beam cannot be reconstructed through software to achieve functional upgrade and expansion;
[0034] Low instantaneous dynamics: The synthetic gain of the analog phased array antenna is large, which is affected by the instantaneous dynamics of the receiver. In order to ensure that the radar echo is not saturated, the receiver gain needs to be reduced in strong reflection scenarios. At this time, the signal-to-noise ratio of small targets in strong reflection scenarios deteriorates, thus affecting the SAR image quality;
[0035] Poor high-resolution and wide-bandwidth capabilities: A large number of electronic systems at home and abroad use the X-band frequency band, including fire control radars and weather radars on airborne platforms, navigation radars and targeting radars on shipborne platforms, and large anti-missile radars and measurement radars on ground-based platforms. Therefore, with the large-scale application of civil remote sensing constellations, they will inevitably be unintentionally interfered by external signals in the same frequency band. Since the analog phased array has a single beam and cannot resist unintentional interference in the same frequency band, it is bound to affect the image quality or imaging timeliness;
[0036] Low integration: Traditional brick-type TR components are realized by multi-chip micro-assembly process. Generally, the components use wool buttons for RF interconnection and low-frequency connectors for power / wave control signal interconnection. The multi-chip micro-assembly process has long processing links and low yield rate; the connection of high and low frequency signals is complicated, which reduces the test efficiency of the TR component itself on the one hand, and on the other hand, it is difficult to ensure the installation error and consistency during the array integration through manual assembly, which in turn affects the SAR antenna load performance.
[0037] Based on this, the embodiment of the present application provides a satellite-borne SAR payload antenna architecture, which has the technical characteristics of digitalization, chip-based, lightweight and high reliability, and solves the problems of mutual restriction between resolution and wideband, complex integrated testing and low efficiency of mass production of traditional SAR antennas. In addition, it can improve the imaging performance of satellite-borne SAR, support the large-scale production of SAR antenna payloads, reduce the cost of satellite SAR image data services, and promote the development of civil remote sensing.
[0038] In order to better understand the above technical solution, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided to enable a clearer and more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.
[0039] See also Figure 1 , Figure 1 FIG. 1 is a schematic diagram of a satellite-borne SAR payload antenna architecture provided by an embodiment of the present application. Figure 1 As shown, the satellite-borne SAR payload antenna architecture includes multiple standard antenna modules (i.e., standard antenna module 1 to standard antenna module N) that work independently and in parallel, and each of the multiple standard antenna modules is connected to the satellite platform only through a power interface, a clock interface, and an optical fiber interface.
[0040] It should be understood that the specific number of standard antenna modules included in the spaceborne SAR payload antenna architecture can be set according to actual needs, and the embodiments of the present application are not limited thereto.
[0041] Further, see Figure 2 , Figure 2 FIG. 1 shows a schematic diagram of the structure of a standard antenna module provided in an embodiment of the present application. Figure 2 As shown, the standard antenna module includes a waveguide antenna, a low-power RF module and four TR components (i.e., TR component 1 to TR component 4); wherein, the low-power RF module and the four TR components are arranged on the radiation surface of the waveguide antenna, and the low-power RF modules are connected to the four TR components.
[0042] In addition, the waveguide antenna can be used as a mounting structure and heat dissipation cold plate for the TR component and the low-power RF module. The T / R component can be directly inserted into the waveguide antenna through the limited escapement button, which simplifies the interconnection interface and reduces the transmission loss. The TR component integrates the functions of the transceiver front end, amplitude and phase control, delay amplification, and internal calibration network. The low-power RF module integrates the RF transceiver, digital transceiver, frequency synthesis, secondary power distribution and other functional circuits. The interconnection interface between the TR component and the low-power RF module includes the echo port, calibration port, and wave control / power port. Through the internal multi-function integration of each single machine, the internal interconnection interface of the standard antenna module is simplified, which can also reduce the weight of the standard antenna module.
[0043] It should be noted here that although Figure 2 The description is based on four TR components as an example, but those skilled in the art should understand that the specific number of TR components in the present application can also be adjusted according to actual needs, and the embodiments of the present application are not limited thereto. For example, the standard antenna module may include 8 TR components.
[0044] It should also be noted here that although Figure 2 The description is made by taking one of the multiple standard antenna modules as an example, but it should be understood in the art that other standard antenna modules are similar and will not be repeated here.
[0045] Further, see Figure 3 , Figure 3 FIG. 1 shows a schematic diagram of the structure of a TR assembly provided in an embodiment of the present application. Figure 3As shown, the TR component includes 4 branch modules (i.e., branch module 1 to branch module 4), a synthesizer module (i.e., a 1:4 synthesis network) and a secondary delay amplification module; wherein the synthesizer module is connected to each of the 4 branch modules arranged in parallel, and the synthesizer module is also connected to the secondary delay amplification module. In addition, each branch module includes a delay amplitude phase control module (i.e., amplitude phase + delay chip) and two transceiver front-end modules; wherein the delay amplitude phase control module is respectively connected to each of the two transceiver front-end modules arranged in parallel.
[0046] In addition, each transceiver front-end module is integrated with a low-noise amplifier LNA and a power amplifier PA; each delay amplitude and phase control module is integrated with phase shifter, attenuator, beam controller, delay device and other chips, and a packaged chip is formed through silicon-based three-dimensional stacking to reduce the volume and weight of the TR component; the second-level delay amplification module integrates the delay device, amplifier and controller, and the traditional sub-array delay amplification module is chip-based, further improving the integration of the TR component.
[0047] It should be noted here that although Figure 3 The description is based on four branch modules as an example, but those skilled in the art should understand that the specific number of branch modules in the present application can also be adjusted according to actual needs, and the embodiments of the present application are not limited thereto. For example, the TR assembly can include 12 branch modules.
[0048] It should also be noted here that although Figure 3 The description is made by taking one TR component among multiple TR components as an example, but it should be understood in the art that other TR components are similar and will not be repeated here.
[0049] Further, see Figure 4 , Figure 4 FIG. 1 shows a schematic diagram of the structure of a radio frequency transceiver module provided in an embodiment of the present application. Figure 4 As shown, the low-power RF module includes a RF transceiver module, a digital transceiver module and a frequency synthesis module; wherein the RF transceiver module and the digital transceiver module are connected.
[0050] In addition, the RF transceiver module includes a first filter module, a second filter module, a first branch module, a second branch module, a first matrix switch module and a second matrix switch module; wherein the first branch module and the second branch module are arranged between the first matrix switch module and the second matrix switch module, and the first filter module and the second filter module are arranged between the second matrix switch module and the digital transceiver module, and the first branch module includes a third filter module, a first down-conversion module, a first amplification module and a second down-conversion module connected in sequence, and the third filter is connected to the first matrix switch module, and the second branch module includes a first up-conversion module, a second amplification module, a second up-conversion module and a fourth filter module connected in sequence, and the first up-conversion module is connected to the second matrix switch module.
[0051] In addition, the digital transceiver module includes an ADC module, a DAC module, an FPGA processing module and an optoelectronic / electro-optical conversion module; wherein the ADC module is connected to the first filtering module and the FPGA processing module respectively, and the DAC module is connected to the second filtering module and the FPGA processing module respectively, and the FPGA processing module is also connected to the optoelectronic / electro-optical conversion module.
[0052] That is to say, the low-power RF module contains an RF transceiver module (up-conversion, down-conversion, filtering and amplification), a digital transceiver module (AD sampling, DA conversion, FPGA processing, optoelectronic / electro-optical conversion) and a frequency synthesis module. In addition, the control parameters and timing signals from the satellite platform are input into the low-power RF module through optical fiber, and the control parameters and timing signals are analyzed inside the FPGA of the low-power RF module, and the RF transceiver and TR components are controlled according to the analyzed parameters and timing signals; the reference clock signal from the satellite platform is input into the low-power RF module, and the sampling clock and the frequency conversion local oscillator signal are generated in the frequency synthesis circuit inside the low-power RF module. This method can simplify the system interconnection interface on the one hand, and achieve the consistency of ADC sampling delay and DAC conversion delay of multiple standard antenna modules at the same time.
[0053] It should be noted here that the specific module of each module in the spaceborne SAR payload antenna architecture (for example, the specific model of FPGA, etc.) can be set according to actual needs, and the embodiments of the present application are not limited to this.
[0054] In summary, with the help of the above technical solution, this application has the following technical effects:
[0055] The system architecture is simple: each standard module of the array works independently and in parallel, without interconnecting cables. Each module is directly connected to the onboard computer through a large-capacity data optical fiber. The software and hardware interface is simple, which is conducive to the large-scale production and rapid integration test of SAR antennas.
[0056] Strong upgrade and expansion capabilities: New capabilities can be quickly formed by loading different application software, and can be reconstructed according to imaging requirements when necessary;
[0057] High instantaneous dynamics: Digital phased arrays have higher instantaneous dynamics than analog phased arrays. Theoretically, there are N digital channels, and their instantaneous dynamics are increased by 10×logN times. Therefore, the signal-to-noise ratio of weak targets in strong reflection scenes can be improved, thereby improving the quality of SAR images in complex environments such as cities.
[0058] High resolution and wide bandwidth: Digital phased array has multi-beam capability. Through spatial beam processing, it can suppress azimuth and elevation sidelobe interference and improve imaging resolution and imaging width.
[0059] High integration: The chip-based TR has a simple structure and interface. It adopts highly integrated chips and low-cost package shell and tube integrated design. Through SMT automated assembly, it simplifies the integration of TR components and carrier boards, which can greatly improve the processing efficiency, yield rate and performance consistency of SAR antennas.
[0060] It should be understood that the above-mentioned satellite-borne SAR payload antenna architecture is only exemplary, and those skilled in the art may make various modifications according to the above-mentioned method, and the modified scheme also falls within the protection scope of the present application.
[0061] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0062] The present invention is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present invention. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions.
[0063] It should be noted that in the claims, any reference numerals placed between brackets shall not be construed as limiting the claims. The word "comprising" does not exclude the presence of components or steps not listed in the claims. The word "a" or "an" preceding a component does not exclude the presence of a plurality of such components. The invention may be implemented by means of hardware comprising several different components and by means of a suitably programmed computer. In the claims enumerating several means, several of these means may be embodied by the same hardware. The use of the words first, second, third, etc., is for convenience of expression only and does not indicate any order. These words may be understood as part of the component name.
[0064] In addition, it should be noted that, in the description of this specification, the description of the terms "one embodiment", "some embodiments", "embodiment", "example", "specific example" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.
[0065] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments after knowing the basic creative concept. Therefore, the claims should be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present invention.
[0066] Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention should also include these modifications and variations.
Claims
1. A spaceborne SAR payload antenna architecture, characterized in that: It comprises a plurality of standard antenna modules working independently and in parallel, and each of the plurality of standard antenna modules is connected to the satellite platform only through a power interface, a clock interface and an optical fiber interface.
2. The spaceborne SAR payload antenna architecture according to claim 1, characterized in that: Each of the standard antenna modules includes a waveguide antenna, a low-power radio frequency module and a plurality of TR components; The low-power RF module and the multiple TR components are arranged on the radiation surface of the waveguide antenna, and the low-power RF modules are connected to the multiple TR components.
3. The spaceborne SAR payload antenna architecture according to claim 2, characterized in that: The low-power radio frequency module includes a plurality of branch modules, a synthesizer module and a secondary delay amplification module; The synthesizer module is connected to each branch module of a plurality of branch modules arranged in parallel, and the synthesizer module is also connected to the secondary delay amplification module.
4. The spaceborne SAR payload antenna architecture according to claim 3, characterized in that: Each branch module includes a delay amplitude and phase control module and two transceiver front-end modules; The delay amplitude and phase control module is respectively connected to each of the two transceiver front-end modules arranged in parallel.
5. The spaceborne SAR payload antenna architecture according to claim 4, characterized in that: Each of the transceiver front-end modules is integrated with a low noise amplifier LNA and a power amplifier PA.
6. The spaceborne SAR payload antenna architecture according to claim 2, characterized in that: The low-power radio frequency module includes a radio frequency transceiver module, a digital transceiver module and a frequency synthesis module; wherein the radio frequency transceiver module and the digital transceiver module are connected.
7. The spaceborne SAR payload antenna architecture according to claim 6, characterized in that: The radio frequency transceiver module includes a first filter module, a second filter module, a first branch module, a second branch module, a first matrix switch module and a second matrix switch module; Among them, the first branch module and the second branch module are arranged between the first matrix switch module and the second matrix switch module, and the first filter module and the second filter module are arranged between the second matrix switch module and the digital transceiver module, and the first branch module includes a third filter module, a first down-conversion module, a first amplification module and a second down-conversion module connected in sequence, and the third filter is connected to the first matrix switch module, and the second branch module includes a first up-conversion module, a second amplification module, a second up-conversion module and a fourth filter module connected in sequence, and the first up-conversion module is connected to the second matrix switch module.
8. The spaceborne SAR payload antenna architecture according to claim 7, characterized in that: The digital transceiver module includes an ADC module, a DAC module, an FPGA processing module and an optoelectronic / electro-optical conversion module; Among them, the ADC module is connected to the first filtering module and the FPGA processing module respectively, and the DAC module is connected to the second filtering module and the FPGA processing module respectively, and the FPGA processing module is also connected to the photoelectric / electro-optical conversion module.