Pre-demodulation circuit and signal receiving end

Abstract

The present invention discloses a pre-demodulation circuit and a signal receiving end, relating to the field of communication technologies. The pre-demodulation circuit includes at least one control unit, at least one amplification factor adjustment unit, a first impedance unit, a second impedance unit, and an amplification unit; the input end of the amplification factor adjustment unit and the input end of the control unit are connected to a differential signal input end, the output end of each amplification factor adjustment unit is connected to the positive input end or the negative input end of the amplification unit, the output end of each control unit is connected to the control end of an amplification factor adjustment unit, and the control unit is used to control the equivalent impedance of the amplification factor adjustment unit according to the differential signal provided by the differential signal input end; the first impedance unit is connected between the negative input end and the output end of the amplification unit, the input end of the second impedance unit is used to input a DC voltage, and the output end of the second impedance unit is connected to the positive input end of the amplification unit. The signal-to-noise ratio of the baseband signal is increased, and the accuracy of signal transmission is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of communication technologies, and in particular, to a predemodulation circuit and a signal receiving end. Background Art

[0002] With the development of society, electronic products are becoming more and more popular, and charging of electronic products has become an inevitable thing. Wireless charging technology has brought great convenience to the charging of electronic products, and wireless communication plays a crucial role among them. During wireless communication, the original signal often has a relatively low frequency and is not suitable for direct wireless transmission. Therefore, at the sending end, the original signal needs to be converted into a signal form suitable for channel transmission through modulation technology. At the receiving end, the received signal is restored to the original signal through demodulation technology, so as to achieve the transmission of information.

[0003] When the modulation technology at the sending end is amplitude modulation (AM), the modulated signal is an envelope signal. The depth of the envelope curve is the amplitude of the baseband signal. When the receiving end demodulates the received modulated signal, it can be amplified or reduced through a predemodulation circuit. When the amplitude of the baseband signal of the modulated signal is small, the envelope curve is relatively shallow and the modulation depth of the signal is relatively small. After passing through the predemodulation circuit, the modulation depth of the signal still remains in the previous state, that is, the modulation depth of the signal is still relatively small, resulting in a relatively low signal-to-noise ratio after demodulation and reducing the accuracy of signal transmission. Summary of the Invention

[0004] The present invention provides a predemodulation circuit and a signal receiving end to improve the signal-to-noise ratio of the demodulated signal and improve the accuracy of signal transmission.

[0005] In a first aspect, an embodiment of the present invention provides a predemodulation circuit, including at least one control unit, at least one amplification factor adjustment unit, a first impedance unit, a second impedance unit, and an amplification unit;

[0006] The input end of the amplification factor adjustment unit and the input end of the control unit are connected to a differential signal input end. The output end of each amplification factor adjustment unit is connected to the positive input end or the negative input end of the amplification unit. The output end of each control unit is connected to the control end of an amplification factor adjustment unit. The control unit is configured to control the equivalent impedance of the amplification factor adjustment unit according to the differential signal provided by the differential signal input end. The first impedance unit is connected between the negative input end and the output end of the amplification unit. The input end of the second impedance unit is used to input a DC voltage, and the output end of the second impedance unit is connected to the positive input end of the amplification unit.

[0007] Optionally, the amplification factor adjustment unit includes an adjustment transistor; a first pole of the adjustment transistor and an input end of the control unit are connected to the differential signal input end, a substrate of the adjustment transistor is connected to an output end of the control unit, and a second pole of the adjustment transistor is connected to a positive input end or a negative input end of the amplification unit; the control unit is configured to adjust an equivalent impedance of the adjustment transistor according to the differential signal.

[0008] Optionally, the differential signal input end includes a first differential signal input end and a second differential signal input end;

[0009] At least one of the amplification factor adjustment units includes a first amplification factor adjustment unit and a second amplification factor adjustment unit; at least one of the control units includes a first control unit and a second control unit; the first amplification factor adjustment unit includes a first adjustment transistor; a first pole of the first adjustment transistor and an input end of the first control unit are connected to the first differential signal input end, a substrate of the first adjustment transistor is connected to an output end of the first control unit, and a second pole of the first adjustment transistor is connected to a positive input end of the amplification unit; the first control unit is configured to adjust an equivalent impedance of the first adjustment transistor according to the first differential signal; the second amplification factor adjustment unit includes a second adjustment transistor; a first pole of the second adjustment transistor and an input end of the second control unit are connected to the second differential signal input end, a substrate of the second adjustment transistor is connected to an output end of the second control unit, and a second pole of the second adjustment transistor is connected to a negative input end of the amplification unit; the second control unit is configured to adjust an equivalent impedance of the second adjustment transistor according to the second differential signal.

[0010] Optionally, the first adjustment transistor and the second adjustment transistor are adjustment transistors of opposite types; a first pole of the first adjustment transistor and a first pole of the second adjustment transistor are both a source or a drain, or, the first adjustment transistor and the second adjustment transistor are adjustment transistors of the same type; a first pole of the first adjustment transistor is a drain or a source, and a first pole of the second adjustment transistor is a source or a drain; a gate of the adjustment transistor is connected to the drain.

[0011] Optionally, the amplification factor adjustment unit further includes a first resistor; the first resistor is connected in series between the second pole of the adjustment transistor and the positive input end of the amplification unit, or between the second pole of the adjustment transistor and the negative input end of the amplification unit.

[0012] Optionally, the amplification factor adjustment unit further includes a switch module and a second resistor. The first input terminal of the switch module and the first terminal of the second resistor are connected to the differential signal input terminal. The second input terminal of the switch module is connected to the reference signal input terminal. The enable terminal of the switch module is connected to the enable signal input terminal. The output terminal of the switch module is connected to the first pole of the adjustment transistor. The second pole of the adjustment transistor and the second terminal of the second resistor are connected to the positive input terminal or the negative input terminal of the amplification unit. The switch module is configured to connect the differential signal input terminal and the first pole of the adjustment transistor when the enable signal provided by the enable signal input terminal is valid and the differential signal and the parameter signal provided by the reference signal input terminal meet a preset condition.

[0013] Optionally, the switch module includes a comparator and a switching transistor;

[0014] The first input terminal of the comparator and the first pole of the switching transistor serve as the first input terminal of the switch module. The enable terminal of the comparator serves as the enable terminal of the switch module. The second input terminal of the comparator serves as the second input terminal of the switch module. The output terminal of the comparator is connected to the gate of the switching transistor. The second pole of the switching transistor serves as the output terminal of the switch module.

[0015] Optionally, the control unit includes an amplifier, a third resistor, and a fourth resistor;

[0016] The positive input terminal of the amplifier is connected to the differential signal input terminal. The negative input terminal of the amplifier is connected to the first terminal of the third resistor and the first terminal of the fourth resistor. The second terminal of the third resistor is grounded. The second terminal of the fourth resistor and the output terminal of the amplifier are connected to the control terminal of the amplification factor adjustment unit.

[0017] Optionally, the control unit includes a voltage follower module and a resistance adjustment module;

[0018] The input terminal of the voltage follower module and the first input terminal of the resistance adjustment module are connected to the differential signal input terminal. The output terminal of the voltage follower module is connected to the control terminal of the resistance adjustment module. The second input terminal of the resistance adjustment module is connected to the positive input terminal or the negative input terminal of the amplification unit. The output terminal of the resistance adjustment module is connected to the control terminal of the amplification factor adjustment unit. The voltage follower module is configured to adjust the equivalent impedance of the resistance adjustment module according to the differential signal.

[0019] Second aspect, an embodiment of the present invention further provides a signal receiving end, including an analog-to-digital conversion circuit, a demodulation circuit, and the pre-demodulation circuit described in the first aspect; the pre-demodulation circuit is connected to the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit is connected to the demodulation circuit; the pre-demodulation circuit is used to amplify the differential signal to form a pre-demodulated signal; the analog-to-digital conversion circuit is used to perform analog-to-digital conversion on the pre-demodulated signal to form a digital signal; the demodulation circuit is used to demodulate the digital signal.

[0020] The technical solution of the embodiment of the present invention controls the equivalent impedance of the amplification factor adjustment unit according to the differential signal through the control unit, so that the equivalent impedance of the amplification factor adjustment unit can change non-linearly according to the magnitude of the differential signal, so that the gain can be increased when the differential signal is relatively large, and the gain can be reduced when the differential signal is relatively small, increasing the amplitude of the envelope signal. Therefore, after the envelope signal is demodulated, the signal-to-noise ratio of the baseband signal is increased, thereby improving the accuracy of signal transmission. Description of the Drawings

[0021] Figure 1 A schematic structural diagram of a demodulation link provided by the related art;

[0022] Figure 2 A schematic structural diagram of a pre-demodulation circuit provided by the related art;

[0023] Figure 3 A waveform diagram of a modulated signal provided by the related art;

[0024] Figure 4 A schematic structural diagram of a pre-demodulation circuit provided by an embodiment of the present invention;

[0025] Figure 5 A schematic structural diagram of another pre-demodulation circuit provided by an embodiment of the present invention;

[0026] Figure 6 A schematic diagram of waveform comparison of amplifying a modulated signal by different pre-demodulation circuits provided by an embodiment of the present invention;

[0027] Figure 7 A schematic diagram of waveform comparison of amplifying a modulated signal by another different pre-demodulation circuit provided by an embodiment of the present invention;

[0028] Figure 8 A schematic structural diagram of another pre-demodulation circuit provided by an embodiment of the present invention;

[0029] Figure 9 A schematic structural diagram of a control unit provided by an embodiment of the present invention;

[0030] Figure 10Another structural schematic diagram of the control unit provided by the embodiment of the present invention. Detailed implementation manners

[0031] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. In addition, it should be noted that for the convenience of description, only parts related to the present invention are shown in the drawings, rather than all the structures.

[0032] Figure 1 A structural schematic diagram of a demodulation link provided by the related art. Figure 2 A structural schematic diagram of a pre-demodulation circuit provided by the related art. As Figure 1 and Figure 2 shown, in the wireless communication process, the signal receiving end may include a receiving coil 100, a frequency selection circuit 101, a pre-demodulation circuit 102, an analog-to-digital conversion circuit 103, and a demodulation circuit 104. The receiving coil 100 receives the modulated signal sent by the signal transmitting end. Among them, the modulated signal may be a modulated signal formed after AM modulation of an analog signal. The frequency selection circuit 101 performs frequency selection on the modulated signal to obtain a modulated signal with a preset frequency. Then, the pre-demodulation circuit 102 reduces and filters the modulated signal according to a certain ratio to realize the pre-demodulation of the modulated signal and outputs it to the analog-to-digital conversion circuit 103. The analog-to-digital conversion circuit 103 performs analog-to-digital conversion on the pre-demodulated signal and outputs it to the demodulation circuit 104. The demodulation circuit 104 demodulates the pre-demodulated signal to obtain a baseband signal, realizing the transmission of the signal. Among them, the demodulation circuit 104 may demodulate the pre-demodulated signal through Amplitude Shift Keying (ASK). When the pre-demodulation circuit 102 reduces and filters the modulated signal, the pre-demodulation circuit 102 has a fixed low-frequency gain, which is the ratio of the second voltage dividing resistor R2 to the first voltage dividing resistor R1, that is, r2 / r1. Wherein, r2 is the resistance value of the second voltage dividing resistor R2, and r1 is the resistance value of the first voltage dividing resistor R1. At this time, the pre-demodulation circuit 102 can perform a linear change of the same gain on the modulated signal. When the amplitude of the envelope curve is relatively shallow, the modulation depth of the signal after passing through the pre-demodulation circuit is still not obvious, and the ratio of the envelope amplitude to the carrier amplitude remains unchanged. If the input signal of the analog-to-digital conversion circuit 103 is a full swing amplitude at this time, it is equivalent to the conversion of the carrier approaching the full swing amplitude conversion, while the amplitude change of the baseband signal, that is, the amplitude of the envelope curve is small, resulting in a relatively high conversion signal-to-noise ratio of the modulated signal, but compared with the required baseband signal, the signal-to-noise ratio will be significantly lower than the signal-to-noise ratio of the overall signal, reducing the accuracy of signal transmission. Exemplarily, Figure 3 A waveform diagram of a modulated signal provided by the related art. As Figure 3As shown, the carrier frequency is 360 kHz and the baseband signal frequency is 20 kHz. The amplitude of the envelope curve of the modulated signal is relatively shallow.

[0033] To solve the above technical problems, an embodiment of the present invention provides a pre-demodulation circuit. Figure 4 It is a schematic structural diagram of a pre-demodulation circuit provided by an embodiment of the present invention. As Figure 4 shown, the pre-demodulation circuit includes at least one control unit 110, at least one amplification factor adjustment unit 120, a first impedance unit 130, a second impedance unit 140, and an amplification unit 150; the input end of the amplification factor adjustment unit 120 and the input end of the control unit 110 are connected to the differential signal input terminal Vi, the output end of each amplification factor adjustment unit 120 is connected to the positive input terminal V+ or the negative input terminal V- of the amplification unit 150, the output end of each control unit 110 is connected to the control terminal Vb of an amplification factor adjustment unit 120, and the control unit 110 is used to control the equivalent impedance of the amplification factor adjustment unit 120 according to the differential signal provided by the differential signal input terminal Vi; the first impedance unit 130 is connected between the negative input terminal V- and the output terminal VOUT of the amplification unit 150, the input end of the second impedance unit 140 is used to input a DC voltage Vc, and the output end of the second impedance unit 140 is connected to the positive input terminal V+ of the amplification unit 150.

[0034] Specifically, the differential signal input terminal Vi may include a first differential signal input terminal Vip and a second differential signal input terminal Vin. The first differential signal input terminal Vip is used to input a first differential signal, for example, it may be a positive voltage signal, and the second differential signal input terminal Vin is used to input a second differential signal, for example, it may be a negative voltage signal. The first differential signal and the second differential signal are voltage signals with equal amplitudes and opposite signs. The differential signal input by the differential signal input terminal Vi is a modulated signal, for example, a modulated signal formed by AM modulation. Figure 4Exemplarily, it is shown that there are two amplification factor adjustment units 120, namely a first amplification factor adjustment unit 121 and a second amplification factor adjustment unit 122. The first amplification factor adjustment unit 121 is connected between the first differential signal input terminal Vip and the positive input terminal V+ of the amplification unit 150, and the second amplification factor adjustment unit 122 is connected between the second differential signal input terminal Vin and the negative input terminal V- of the amplification unit 150. The control unit 110 includes a first control unit 111 and a second control unit 112. The input terminal of the first control unit 111 is connected to the first differential signal input terminal Vip, and the output terminal is connected to the control terminal Vb1 of the first amplification factor adjustment unit 121, for controlling the equivalent impedance of the first amplification factor adjustment unit 121. The input terminal of the second control unit 112 is connected to the second differential signal input terminal Vin, and the output terminal is connected to the control terminal Vb2 of the second amplification factor adjustment unit 122, for controlling the equivalent impedance of the second amplification factor adjustment unit 122. When a differential signal is input to the control unit 110, the control unit 110 can control the equivalent impedance of the amplification factor adjustment unit 120 according to the magnitude of the differential signal. Exemplarily, when the input differential signal increases, the control unit 110 can control the equivalent impedance of the amplification factor adjustment unit 120 to decrease. When the input differential signal decreases, the control unit 110 can control the equivalent impedance of the amplification factor adjustment unit 120 to increase.

[0035] The amplification unit 150 has an amplification function. Exemplarily, the amplification unit 150 may include an amplifier. The first impedance unit 130 is connected between the negative input terminal V- of the amplification unit 150 and the output terminal VOUT. The input terminal of the second impedance unit 140 is used to input a DC voltage Vc, and the output terminal of the second impedance unit 140 is connected to the positive input terminal V+ of the amplification unit 150. The bandwidth of the predemodulation circuit can be adjusted through the first impedance unit 130 and the second impedance unit 140, and the DC component output from the output terminal VOUT of the predemodulation circuit can be adjusted through the DC voltage Vc. Exemplarily, the first impedance unit 130 may include a first filter resistor R31 and a first capacitor C1 connected in parallel, and the second impedance unit 140 may include a second filter resistor R32 and a second capacitor C2 connected in parallel. That is, the first end of the first filter resistor R31 and the first end of the first capacitor C1 are connected to the negative input terminal V- of the amplification unit 150, and the second end of the first filter resistor R31 and the second end of the first capacitor C1 are connected to the output terminal VOUT of the amplification unit 150. The first end of the second filter resistor R32 and the first end of the second capacitor C2 are used to input the DC voltage Vc, and the second end of the second filter resistor R32 and the second end of the second capacitor C2 are connected to the positive input terminal V+ of the amplification unit 150. At this time, according to the "virtual short" and "virtual open" principles of the amplifier, Equation (1) can be determined:

[0036]

[0037] Among them, Vn is the voltage of the negative input terminal V- of the amplification unit 150, and Vp is the voltage of the positive input terminal V+ of the amplification unit 150. When the capacitance values of the first capacitor C1 and the second capacitor C2 are equal, and the resistance values of the first filter resistor R31 and the second filter resistor R32 are equal, according to the KCL and KVL principles of the circuit, equations (2) and (3) can be determined:

[0038]

[0039] Among them, vip is the first differential signal provided by the first differential signal input terminal Vip, Vc is the DC voltage, r3 is the resistance value of the first filter resistor R31, 1 / sc1 is the equivalent impedance of the first capacitor C1, and rc is the equivalent impedance of the amplification factor adjustment unit 120;

[0040]

[0041] Among them, vin is the second differential signal provided by the second differential signal input terminal Vin, vout is the pre-demodulation voltage output by the output terminal VOUT of the amplification unit 150, r3 is the resistance value of the first filter resistor R31, 1 / sc1 is the equivalent impedance of the first capacitor C1, and rc is the equivalent impedance of the amplification factor adjustment unit 120;

[0042] Thus, equation (4) is determined according to equations (1), (2), and (3):

[0043]

[0044] It can be seen from this that the bandwidth of the pre-demodulation circuit is 1 / 2πr3c1, which has nothing to do with the equivalent resistance of the amplification factor adjustment unit 120, and the low-frequency gain of the pre-demodulation circuit is r3 / rc. When the input differential signal increases, the control unit 110 controls the equivalent impedance rc of the amplification factor adjustment unit 120 to decrease, so that the low-frequency gain r3 / rc of the pre-demodulation circuit increases. When the input differential signal decreases, the control unit 110 controls the equivalent impedance rc of the amplification factor adjustment unit 120 to increase, so that the low-frequency gain r3 / rc of the pre-demodulation circuit decreases. Thus, it can perform non-linear amplification adjustment according to the magnitude of the differential signal. After the envelope signal passes through the pre-demodulation circuit, the amplitude of the envelope signal increases. Thus, after the envelope signal is demodulated, the signal-to-noise ratio of the baseband signal is increased, and thus the accuracy of signal transmission can be improved.

[0045] In the technical solution of this embodiment, the control unit controls the equivalent impedance of the amplification factor adjustment unit according to the differential signal, so that the equivalent impedance of the amplification factor adjustment unit can vary non-linearly according to the magnitude of the differential signal. Thus, the gain can be increased when the differential signal is relatively large, and the gain can be decreased when the differential signal is relatively small, increasing the amplitude of the envelope signal. Therefore, after the envelope signal is demodulated, the signal-to-noise ratio of the baseband signal is increased, and thus the accuracy of signal transmission can be improved.

[0046] Figure 5 FIG. 4 is a schematic structural diagram of another pre-demodulation circuit provided by an embodiment of the present invention. As Figure 5 shown, the amplification factor adjustment unit 120 includes an adjustment transistor M; a first pole of the adjustment transistor M and an input end of the control unit 110 are connected to the differential signal input end Vi, a substrate of the adjustment transistor M is connected to an output end of the control unit 110, and a second pole of the adjustment transistor M is connected to a positive input end V+ or a negative input end V− of the amplification unit 150; the control unit 110 is configured to adjust the equivalent impedance of the adjustment transistor M according to the differential signal.

[0047] Specifically, Figure 5 exemplarily shows that the adjustment transistor M is an N-type transistor in FIG. 4. The substrate of the adjustment transistor M serves as a control terminal Vb of the amplification factor adjustment unit 120 and is connected to the output end of the control unit 110. When the differential signal increases, the control unit 110 can control the substrate potential of the adjustment transistor M to increase. According to equations (5) and (6), when the substrate potential of the adjustment transistor M increases, the threshold voltage of the adjustment transistor M decreases, and the on-resistance of the adjustment transistor M decreases. The equivalent impedance rc of the amplification factor adjustment unit 120 includes the on-resistance of the adjustment transistor M. When the on-resistance of the adjustment transistor M decreases, the equivalent impedance rc of the amplification factor adjustment unit 120 decreases, and the low-frequency gain of the pre-demodulation circuit increases. On the contrary, when the differential signal decreases, the control unit 110 can control the substrate potential of the adjustment transistor M to decrease. According to equations (5) and (6), when the substrate potential of the adjustment transistor M decreases, the threshold voltage of the adjustment transistor M increases, the on-resistance of the adjustment transistor M increases, so that the equivalent impedance rc of the amplification factor adjustment unit 120 increases, and the low-frequency gain of the pre-demodulation circuit decreases. Thus, non-linear amplification adjustment can be performed according to the magnitude of the differential signal. After the envelope signal passes through the pre-demodulation circuit, the amplitude of the envelope signal increases. Therefore, after the envelope signal is demodulated, the signal-to-noise ratio of the baseband signal is increased, and thus the accuracy of signal transmission can be improved.

[0048]

[0049] Among them, Vth is the threshold voltage of the adjustment transistor M, Vth0 is the threshold voltage when the voltage difference between the source and the substrate of the adjustment transistor M is 0, VSB is the voltage difference between the source and the substrate of the adjustment transistor M, γ is the substrate bias coefficient of the adjustment transistor M, is the built-in potential of the adjustment transistor M, rm is the equivalent resistance of the adjustment transistor M, Vgs is the gate-source voltage difference of the adjustment transistor M, W / L is the channel width-to-length ratio of the adjustment transistor M, Cox is the equivalent capacitance of the gate oxide layer of the adjustment transistor M, and μ is the electron mobility of the adjustment transistor M.

[0050] Exemplarily, Figure 6 is a schematic waveform comparison diagram for amplifying a modulated signal by different predemodulation circuits provided by an embodiment of the present invention. Figure 7 is another schematic waveform comparison diagram for amplifying a modulated signal by different predemodulation circuits provided by an embodiment of the present invention. Among them, Figure 6 the original modulated signal in Figure 7 and the predemodulation signal corresponding to the linear change in Figure 2 are the waveforms after the modulated signal is predemodulated by the provided predemodulation circuit. Figure 6 the non-linear amplified signal in Figure 7 and the predemodulation signal corresponding to the non-linear change in Figure 5 are the waveforms after the modulated signal is predemodulated by the provided predemodulation circuit. As Figure 6 and Figure 7 shown, after the modulated signal is predemodulated by the predemodulation circuit provided by the embodiment of the present invention, the amplitude of the envelope signal increases, so that after the envelope signal is demodulated, the signal-to-noise ratio of the baseband signal increases, thereby improving the accuracy of signal transmission.

[0051] Exemplarily, continue to refer to Figure 5, the differential signal input terminal Vi includes a first differential signal input terminal Vip and a second differential signal input terminal Vin. At least one amplification factor adjustment unit 120 includes a first amplification factor adjustment unit 121 and a second amplification factor adjustment unit 122; at least one control unit 110 includes a first control unit 111 and a second control unit 112; the first amplification factor adjustment unit 121 includes a first adjustment transistor NM1; a first pole of the first adjustment transistor NM1 and an input terminal of the first control unit 111 are connected to the first differential signal input terminal Vip, a substrate Vb1 of the first adjustment transistor NM1 is connected to an output terminal of the first control unit 111, and a second pole of the first adjustment transistor NM1 is connected to a positive input terminal V+ of the amplification unit 150; the first control unit 111 is configured to adjust an equivalent impedance of the first adjustment transistor V+ according to the first differential signal; the second amplification factor adjustment unit 122 includes a second adjustment transistor NM2; a first pole of the second adjustment transistor NM2 and an input terminal of the second control unit 112 are connected to the second differential signal input terminal Vin, a substrate Vb2 of the second adjustment transistor NM2 is connected to an output terminal of the second control unit 112, and a second pole of the second adjustment transistor NM2 is connected to a negative input terminal V- of the amplification unit 150; the second control unit 112 is configured to adjust an equivalent impedance of the second adjustment transistor NM2 according to the second differential signal.

[0052] Specifically, the number of control units 110 is equal to the number of amplification factor adjustment units 120. When there are two amplification factor adjustment units 120, there are also two control units 110, respectively controlling the equivalent impedance of one amplification factor adjustment unit 120. When the control unit 110 controls the equivalent impedance of the amplification factor adjustment unit 120, it can control the equivalent impedances of the first adjustment transistor NM1 and the second adjustment transistor NM2 to be equal, so that the equivalent impedances of the first amplification factor adjustment unit 121 and the second amplification factor adjustment unit are equal, thereby simplifying the calculation process of the low-frequency gain of the pre-demodulation circuit and simplifying the adjustment process of the low-frequency gain of the pre-demodulation circuit.

[0053] It should be noted that in other embodiments, the equivalent impedances of the first amplification factor adjustment unit 121 and the second amplification factor adjustment unit can also be set to be unequal, and the low-frequency gain of the pre-demodulation circuit can also be adjusted by changing the equivalent impedances of the first amplification factor adjustment unit 121 and the second amplification factor adjustment unit, which will not be elaborated here.

[0054] Continue to refer to Figure 5 , the first adjustment transistor NM1 and the second adjustment transistor NM2 are transistors of the same type, a first pole of the first adjustment transistor NM1 is a drain or a source, and a first pole of the second adjustment transistor NM2 is a source or a drain; a gate of the adjustment transistor M is connected to the drain.

[0055] Specifically, Figure 5 exemplarily shown in Figure 5 is that both the first regulating transistor NM1 and the second regulating transistor NM2 are N-type transistors. At this time, the first pole of the first regulating transistor NM1 can be set as the drain and connected to the gate of the first regulating transistor NM1. When the first regulating transistor NM1 is not conducting, there is no current between the first differential signal input terminal Vip and the positive input terminal V+ of the amplification unit 150, and between the DC voltage input terminal and the positive input terminal V+ of the amplification unit 150, so that the potential of the second pole of the first regulating transistor NM1 is equal to the DC voltage Vc. When the first differential signal is greater than the second differential signal, the first pole of the first regulating transistor NM1 can be set as the drain, and at this time, the first pole of the second regulating transistor NM2 is the source. When the voltage of the first differential signal is greater than the DC voltage Vc and the threshold voltage of the first regulating transistor NM1, the first regulating transistor NM1 conducts, and the first regulating transistor NM1 is in the saturation state. As the gate-source voltage increases, the current of the first regulating transistor NM1 increases exponentially, and the equivalent resistance of the first regulating transistor NM1 decreases non-linearly. At this time, the substrate potential of the first regulating transistor NM1 can be adjusted by the first control unit 111, and then the equivalent impedance of the first regulating transistor NM1 can be adjusted according to equations (5) and (6), thereby realizing the non-linear gain of the pre-demodulation circuit, increasing the signal-to-noise ratio of the baseband signal, and thus improving the accuracy of signal transmission. When the voltage of the second differential signal is less than the difference between the output voltage provided by the output terminal VOUT of the amplification unit 150 and the threshold voltage of the second regulating transistor NM2, the second regulating transistor NM2 conducts, and the second regulating transistor NM2 is in the saturation state. At this time, the substrate potential of the second regulating transistor NM2 can be adjusted by the second control unit 112, and then the equivalent impedance of the second regulating transistor NM2 can be adjusted according to equations (5) and (6), thereby realizing the non-linear gain of the pre-demodulation circuit, increasing the signal-to-noise ratio of the baseband signal, and thus improving the accuracy of signal transmission.

[0056] In some embodiments, when the first differential signal is less than the second differential signal, the first pole of the first regulating transistor NM1 can also be set as the source, and at this time, the first pole of the second regulating transistor NM2 is the drain. The equivalent impedances of the first regulating transistor NM1 and the second regulating transistor NM2 can be adjusted in the same way as the above process, which will not be elaborated here.

[0057] In some embodiments, the first regulating transistor and the second regulating transistor are regulating transistors of opposite types; the first poles of the first regulating transistor and the second regulating transistor are both the source or the drain.

[0058] Specifically, when the types of the first regulating transistor and the second regulating transistor are opposite, for example, the first regulating transistor is an N-type transistor and the second regulating transistor is a P-type transistor, the first poles of both the first regulating transistor and the second regulating transistor are drain electrodes. Alternatively, the first regulating transistor is a P-type transistor and the second regulating transistor is an N-type transistor, and the first poles of both the first regulating transistor and the second regulating transistor are source electrodes. At this time, the conduction states of the first regulating transistor and the second regulating transistor can also be controlled by the first differential signal and the second differential signal, so that the equivalent impedances of the first regulating transistor and the second regulating transistor can be controlled, and further the low-frequency gain of the pre-demodulation circuit can be adjusted.

[0059] Continue to refer to Figure 5 , the amplification factor adjustment unit 120 further includes a first resistor R4; the first resistor R4 is connected in series between the second pole of the regulating transistor M and the positive input terminal V+ of the amplification unit 150, or between the second pole of the regulating transistor M and the negative input terminal V− of the amplification unit 150.

[0060] Specifically, the first resistor R4 can be a resistor with a fixed resistance value. By connecting the first resistor R4 in series between the regulating transistor M and the amplification unit 150, the resistance reliability of the amplification factor adjustment unit 120 can be ensured, and the order of magnitude of the low-frequency gain of the pre-demodulation circuit is limited. Exemplarily, when the amplification factor adjustment unit 120 includes a first amplification factor adjustment unit 121 and a second amplification factor adjustment unit 122, both the first amplification factor adjustment unit 121 and the second amplification factor adjustment unit 122 include the first resistor R4. The first resistor R4 in the first amplification factor adjustment unit 121 is connected between the second pole of the first regulating transistor NM1 and the positive input terminal V+ of the amplification unit 150 for adjusting the equivalent impedance of the first amplification factor adjustment unit 121, and the first resistor R4 in the second amplification factor adjustment unit 122 is connected between the second pole of the second regulating transistor NM2 and the negative input terminal V− of the amplification unit 150 for adjusting the equivalent impedance of the second amplification factor adjustment unit 122.

[0061] Figure 8 is a schematic structural diagram of another pre-demodulation circuit provided by an embodiment of the present invention. As Figure 8As shown, the amplification factor adjustment unit 120 further includes a switch module 123 and a second resistor R5. The first input terminal of the switch module 123 and the first terminal of the second resistor R5 are connected to the differential signal input terminal Vi. The second input terminal of the switch module 123 is connected to the reference signal input terminal VREF. The enable terminal of the switch module 123 is connected to the enable signal input terminal EN. The output terminal of the switch module 123 is connected to the first pole of the adjustment transistor M. The second pole of the adjustment transistor M and the second terminal of the second resistor R5 are connected to the positive input terminal V+ or the negative input terminal V- of the amplification unit 150. The switch module 123 is configured to connect the differential signal input terminal Vi and the first pole of the adjustment transistor M when the enable signal provided by the enable signal input terminal EN is valid and the differential signal and the parameter signal provided by the reference signal input terminal VREF satisfy a preset condition.

[0062] Specifically, the enable signal provided by the enable signal input terminal EN can be set according to the envelope amplitude of the modulated signal. When the envelope amplitude of the modulated signal is obvious, the enable signal can be made invalid, and the switch module 123 does not work, and it is impossible to connect the differential signal input terminal Vi and the first pole of the adjustment transistor M. The differential signal is directly output to the positive input terminal V+ or the negative input terminal V- of the amplification unit 150 through the second resistor R5. At this time, the pre-demodulation circuit has a fixed gain. When the envelope amplitude of the modulated signal is not obvious, the enable signal can be made valid, and the switch module 123 works. When the amplitude of the differential signal is greater than the amplitude of the reference signal, the switch module 123 connects the differential signal input terminal Vi and the first pole of the adjustment transistor M. The differential signal can be output to the positive input terminal V+ or the negative input terminal V- of the amplification unit 150 through the adjustment transistor M and the first resistor R4 at the same time. That is, after the adjustment transistor M and the first resistor R4 are connected in series, they are connected in parallel with the second resistor R5. Then, the equivalent impedance of the amplification factor adjustment unit 120 is the equivalent impedance obtained by connecting the equivalent impedance of the adjustment transistor M and the first resistor R4 in series and then connecting them in parallel with the second resistor R5. By controlling the substrate potential of the adjustment transistor M through the control unit 110, the equivalent impedance of the adjustment transistor M can be controlled, and thus the equivalent impedance of the amplification factor adjustment unit 120 can be adjusted. In the above process, when the amplitude of the differential signal is greater than the amplitude of the reference voltage, the pre-demodulation circuit adjusts the gain according to the amplitude of the differential signal, which can further distinguish the baseband signal and the carrier signal, increase the signal-to-noise ratio of the baseband signal, and improve the accuracy of signal transmission.

[0063] Continue to refer to Figure 8, the switch module 123 includes a comparator COM and a switching transistor SW; the first input terminal of the comparator COM and the first pole of the switching transistor SW serve as the first input terminal of the switch module 123, the enable terminal of the comparator COM serves as the enable terminal EN of the switch module 123, the second input terminal of the comparator COM serves as the second input terminal of the switch module 123, the output terminal of the comparator COM is connected to the gate of the switching transistor SW, and the second pole of the switching transistor SW serves as the output terminal of the switch module 123.

[0064] Specifically, when the amplification factor adjustment unit 120 includes a first amplification factor adjustment unit 121 and a second amplification factor adjustment unit 122, the switch module 123 may include a first switch module 1231 and a second switch module 1232. The first switch module 1231 includes a first comparator COM1 and a first switching transistor SW1, the second switch module 1232 includes a second comparator COM2 and a second switching transistor SW2, and the reference signal input terminal VREF includes a first reference signal input terminal VREFP and a second reference signal input terminal VREFN. When the first differential signal is greater than the second differential signal, the first input terminal of the first comparator COM1 is the positive terminal + and is connected to the first differential signal input terminal Vip. The second input terminal of the first comparator COM1 is the negative terminal - and is connected to the first reference signal input terminal VREFP. The first reference signal provided by the first reference signal input terminal VREFP is a positive voltage signal. When the first differential signal is greater than the first reference signal, the first comparator COM1 outputs a high-level comparison signal to control the first switching transistor SW1 to conduct. At this time, the substrate potential of the first adjustment transistor NM1 can be adjusted through the first control unit 111, and then the equivalent impedance of the first adjustment transistor NM1 can be adjusted, so that the gain of the pre-demodulation circuit can be adjusted. The first input terminal of the second comparator COM2 is the negative terminal - and is connected to the second differential signal input terminal Vin. The second input terminal of the second comparator COM2 is the positive terminal + and is connected to the second reference signal input terminal VREFN. The second reference signal provided by the second reference signal input terminal VREFN is a negative voltage signal. When the second differential signal is less than the second reference signal, the second comparator COM2 outputs a high-level comparison signal to control the second switching transistor SW2 to conduct. At this time, the substrate potential of the second adjustment transistor NM2 can be adjusted through the second control unit 112, and then the equivalent impedance of the second adjustment transistor NM2 can be adjusted, so that the gain of the pre-demodulation circuit can be adjusted. When the equivalent impedances of the first adjustment transistor NM1 and the second adjustment transistor NM2 are equal, the relationship between the output signal and the differential signal is as follows:

[0065]

[0066] where r5 is the resistance value of the second resistor R5, and r4 is the resistance value of the first resistor R4.

[0067] Figure 9 This is a schematic structural diagram of a control unit provided by an embodiment of the present invention. As Figure 9 shown, the control unit 110 includes an amplifier F1, a third resistor R6, and a fourth resistor R7; the positive input terminal F+ of the amplifier F1 is connected to the differential signal input terminal Vi, the negative input terminal F- of the amplifier F1 is connected to the first ends of the third resistor R6 and the fourth resistor R7, the second end of the third resistor R6 is grounded to GND, and the second end of the fourth resistor R7 and the output terminal of the amplifier F1 are connected to the control terminal Vb of the amplification factor adjustment unit 120.

[0068] Specifically, the third resistor R6 and the fourth resistor R7 determine the amplification factor of the amplifier F1, so that the control signal output by the amplifier F1 is linearly related to the differential signal. When the differential signal provided by the differential signal input terminal Vi increases, the voltage of the control signal output by the differential signal through the amplifier F1 increases, so that the potential of the control terminal Vb of the amplification factor adjustment unit 120 increases, thereby increasing the gain of the predemodulation circuit. When the differential signal provided by the differential signal input terminal Vi decreases, the voltage of the control signal output by the differential signal through the amplifier F1 decreases, so that the potential of the control terminal Vb of the amplification factor adjustment unit 120 decreases, thereby decreasing the gain of the predemodulation circuit. The nonlinear gain of the predemodulation circuit is realized.

[0069] Figure 10 This is another schematic structural diagram of a control unit provided by an embodiment of the present invention. As Figure 10 shown, the control unit 110 includes a voltage follower module 113 and a resistor adjustment module 114; the input terminal of the voltage follower module 113 and the first input terminal of the resistor adjustment module 114 are connected to the differential signal input terminal Vi, the output terminal of the voltage follower module 113 is connected to the control terminal of the resistor adjustment module 114, the second input terminal of the resistor adjustment module 114 is connected to the positive input terminal V+ or the negative input terminal V- of the amplification unit 150, and the output terminal of the resistor adjustment module 114 is connected to the control terminal Vb of the amplification factor adjustment unit 120; the voltage follower module 113 is used to adjust the equivalent impedance of the resistor adjustment module 114 according to the differential signal.

[0070] Specifically, Figure 10Exemplarily shown in [the figure], the input terminal of the voltage following module 113 and the first input terminal of the resistance adjustment module 114 are connected to the first differential signal input terminal Vip, and the second input terminal of the resistance adjustment module 114 is connected to the positive input terminal V+ of the amplification unit 150. When the first differential signal is greater than the second differential signal, the first differential signal increases, and the control signal output by the voltage following module 113 increases, causing the potential of the control terminal of the resistance adjustment module 114 to increase. When the potential of the control terminal of the resistance adjustment module 114 increases, the equivalent impedance of the resistance adjustment module 114 decreases, and at the same time, the voltage output by the resistance adjustment module 114 increases, causing the potential of the control terminal Vb of the amplification factor adjustment unit 120 to increase, reducing the equivalent impedance of the amplification factor adjustment unit 120. At the same time, the resistance adjustment module 114 and the amplification factor adjustment unit 120 are equivalently connected in parallel. When the equivalent impedances of both the resistance adjustment module 114 and the amplification factor adjustment unit 120 decrease, the degree of decrease in the equivalent impedance of the amplification factor adjustment unit 120 can be increased, increasing the degree of non-linear change in the gain of the pre-demodulation circuit, which is beneficial for further improving the accuracy of signal transmission.

[0071] Continuing to refer to Figure 10 , the voltage following module 113 includes a plurality of transistors connected in a diode manner in series. Each transistor can be equivalent to a diode to divide the voltage of the differential signal; one end of the plurality of transistors connected in series is connected to the differential signal input terminal Vi, and the other end is grounded to GND. At the same time, one connection point of the plurality of transistors connected in series is used as the output terminal of the voltage following module 113 and is connected to the control terminal of the resistance adjustment module 114. When the differential signal increases, the divided voltage of one connection point of the plurality of transistors connected in series increases, causing the potential of the control terminal of the resistance adjustment module 114 to increase. Exemplarily, Figure 10 Exemplarily shown in [the figure], the voltage following module 113 includes 3 transistors connected in series, namely the first transistor NM3, the second transistor NM4, and the third transistor NM5. The connection point between the second transistor NM4 and the third transistor NM5 is used as the output terminal of the voltage following module 113 and is connected to the control terminal of the resistance adjustment module 114. When the differential signal increases, the potential of the connection point between the second transistor NM4 and the third transistor NM5 increases, causing the potential of the control terminal of the resistance adjustment module 114 to increase. The equivalent impedance of the resistance adjustment module 114 decreases, and at the same time, the voltage output by the resistance adjustment module 114 increases, causing the potential of the control terminal Vb of the amplification factor adjustment unit 120 to increase, reducing the equivalent impedance of the amplification factor adjustment unit 120. Exemplarily, in Figure 10In [the circuit], the resistance adjustment module 114 includes a fourth transistor NM6 and a fifth resistor R8. The gate of the fourth transistor NM6 serves as the control terminal of the resistance adjustment module 114. The first pole of the fourth transistor NM6 is connected to the first differential signal input terminal Vip. The second pole of the fourth transistor NM6 serves as the output terminal of the resistance adjustment module 114 and is connected to the control terminal Vb of the amplification factor adjustment unit 120, and is connected to the positive input terminal V+ of the amplification unit 150 through the fifth resistor R8. When the differential signal increases and the gate potential of the fourth transistor NM6 increases, the equivalent impedance of the fourth transistor NM6 decreases, the potential of the second pole of the fourth transistor NM6 increases, the equivalent impedance of the control amplification factor adjustment unit 120 decreases, and at the same time, the sum of the equivalent impedance of the fourth transistor NM6 and the resistance value of the fifth resistor R8 decreases. This increases the degree of decrease in the resistance value after the equivalent impedance of the amplification factor adjustment unit 120 and the equivalent impedance of the resistance adjustment module 114 are connected in parallel, so that the degree of gain non-linear change of the pre-demodulation circuit can be increased, which is beneficial to further improving the accuracy of signal transmission.

[0072] It should be noted that Figure 10 The structural schematic diagram of the first control unit when the first differential signal is greater than the second differential signal is exemplarily shown in [the circuit]. In other embodiments, the pre-demodulation circuit further includes a second control unit for adjusting the equivalent impedance of the second amplification factor adjustment unit 122 between the second differential signal input terminal Vin and the negative input terminal V- of the amplification unit 150. At this time, the connection mode or the type of the transistor in the voltage follower module 113 can be adjusted so that the voltage follower module 113 can control the equivalent impedance of the resistance adjustment module 114 according to the second differential signal. The connection mode or the type of the transistor in the resistance adjustment module 114 can also be adjusted so that the resistance adjustment module 114 can adjust the equivalent impedance of the second amplification factor adjustment unit 122 according to the differential signal, which will not be elaborated here.

[0073] The embodiment of the present invention also provides a signal receiving end. The signal receiving end includes an analog-to-digital conversion circuit, a demodulation circuit, and the pre-demodulation circuit provided in any embodiment of the present invention; the pre-demodulation circuit is connected to the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit is connected to the demodulation circuit; the pre-demodulation circuit is used to perform gain on the differential signal to form a pre-demodulated signal; the analog-to-digital conversion circuit is used to perform analog-to-digital conversion on the pre-demodulated signal to form a digital signal; the demodulation circuit is used to demodulate the digital signal. Since the signal receiving end includes the pre-demodulation circuit provided in any embodiment of the present invention, it has the same beneficial effects as the pre-demodulation circuit provided in any embodiment of the present invention, which will not be elaborated here.

[0074] Note that the above is only the preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein. Various obvious changes, re-adjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A pre-demodulation circuit, characterized in that, Comprising at least one control unit, at least one amplification factor adjustment unit, a first impedance unit, a second impedance unit, and an amplification unit; The input end of the amplification factor adjustment unit and the input end of the control unit are connected to a differential signal input end. The output end of each amplification factor adjustment unit is connected to the positive input end or the negative input end of the amplification unit. The output end of each control unit is connected to the control end of an amplification factor adjustment unit. The control unit is configured to control the equivalent impedance of the amplification factor adjustment unit according to the differential signal provided by the differential signal input end. Wherein, the equivalent impedance of the amplification factor adjustment unit is negatively correlated with the differential signal. The first impedance unit is connected between the negative input end and the output end of the amplification unit. The input end of the second impedance unit is used to input a DC voltage, and the output end of the second impedance unit is connected to the positive input end of the amplification unit.

2. The pre-demodulation circuit according to claim 1, wherein The amplification factor adjustment unit includes an adjustment transistor. The first pole of the adjustment transistor and the input end of the control unit are connected to the differential signal input end. The substrate of the adjustment transistor is connected to the output end of the control unit. The second pole of the adjustment transistor is connected to the positive input end or the negative input end of the amplification unit. The control unit is configured to adjust the equivalent impedance of the adjustment transistor according to the differential signal.

3. The pre-demodulation circuit according to claim 2, wherein The differential signal input end includes a first differential signal input end and a second differential signal input end; At least one of the amplification factor adjustment units includes a first amplification factor adjustment unit and a second amplification factor adjustment unit; at least one of the control units includes a first control unit and a second control unit. The first amplification factor adjustment unit includes a first adjustment transistor. The first pole of the first adjustment transistor and the input end of the first control unit are connected to the first differential signal input end. The substrate of the first adjustment transistor is connected to the output end of the first control unit. The second pole of the first adjustment transistor is connected to the positive input end of the amplification unit. The first control unit is configured to adjust the equivalent impedance of the first adjustment transistor according to the first differential signal. The second amplification factor adjustment unit includes a second adjustment transistor. The first pole of the second adjustment transistor and the input end of the second control unit are connected to the second differential signal input end. The substrate of the second adjustment transistor is connected to the output end of the second control unit. The second pole of the second adjustment transistor is connected to the negative input end of the amplification unit. The second control unit is configured to adjust the equivalent impedance of the second adjustment transistor according to the second differential signal.

4. The pre-demodulation circuit according to claim 3, wherein The first adjustment transistor and the second adjustment transistor are adjustment transistors of opposite types. The first poles of the first adjustment transistor and the second adjustment transistor are both source poles or drain poles. Or, the first adjustment transistor and the second adjustment transistor are adjustment transistors of the same type; The first pole of the first adjustment transistor is a drain pole or a source pole, and the first pole of the second adjustment transistor is a source pole or a drain pole. The gate of the adjustment transistor is connected to the drain pole.

5. The pre-demodulation circuit according to claim 2, wherein The amplification factor adjustment unit further includes a first resistor; the first resistor is serially connected between the second pole of the adjustment transistor and the positive input terminal of the amplification unit, or between the second pole of the adjustment transistor and the negative input terminal of the amplification unit.

6. The pre-demodulation circuit according to claim 2, wherein The amplification factor adjustment unit further includes a switch module and a second resistor. The first input terminal of the switch module and the first end of the second resistor are connected to the differential signal input terminal. The second input terminal of the switch module is connected to the reference signal input terminal. The enable terminal of the switch module is connected to the enable signal input terminal. The output terminal of the switch module is connected to the first pole of the adjustment transistor. The second pole of the adjustment transistor and the second end of the second resistor are connected to the positive input terminal or the negative input terminal of the amplification unit. The switch module is configured to connect the differential signal input terminal and the first pole of the adjustment transistor when the enable signal provided at the enable signal input terminal is valid and the differential signal and the parameter signal provided at the reference signal input terminal satisfy a preset condition.

7. The pre-demodulation circuit according to claim 6, characterized in that, The switch module includes a comparator and a switch transistor. The first input terminal of the comparator and the first pole of the switch transistor serve as the first input terminal of the switch module. The enable terminal of the comparator serves as the enable terminal of the switch module. The second input terminal of the comparator serves as the second input terminal of the switch module. The output terminal of the comparator is connected to the gate of the switch transistor. The second pole of the switch transistor serves as the output terminal of the switch module.

8. The pre-demodulation circuit according to claim 1, wherein The control unit includes an amplifier, a third resistor, and a fourth resistor. The positive input terminal of the amplifier is connected to the differential signal input terminal. The negative input terminal of the amplifier is connected to the first end of the third resistor and the first end of the fourth resistor. The second end of the third resistor is grounded. The second end of the fourth resistor and the output terminal of the amplifier are connected to the control terminal of the amplification factor adjustment unit.

9. The pre-demodulation circuit according to claim 1, wherein The control unit includes a voltage follower module and a resistance adjustment module. The input terminal of the voltage follower module and the first input terminal of the resistance adjustment module are connected to the differential signal input terminal. The output terminal of the voltage follower module is connected to the control terminal of the resistance adjustment module. The second input terminal of the resistance adjustment module is connected to the positive input terminal or the negative input terminal of the amplification unit. The output terminal of the resistance adjustment module is connected to the control terminal of the amplification factor adjustment unit. The voltage follower module is configured to adjust the equivalent impedance of the resistance adjustment module according to the differential signal.

10. A signal receiving end, characterized in that, It includes an analog-to-digital conversion circuit, a demodulation circuit, and the pre-demodulation circuit according to any one of claims 1-9. The pre-demodulation circuit is connected to the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit is connected to the demodulation circuit. The pre-demodulation circuit is configured to perform gain on the differential signal to form a pre-demodulated signal. The analog-to-digital conversion circuit is configured to perform analog-to-digital conversion on the pre-demodulated signal to form a digital signal. The demodulation circuit is configured to demodulate the digital signal.

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