A pulse sequence type image sensor and an electronic device

Abstract

The application provides a pulse sequence image sensor, comprising a pixel module and a readout module; the pixel module comprises two or more pixels, which are divided into a first group and a second group; the readout module comprises a first comparator, a second comparator and a mode switching submodule, which are configured to: when the mode switching submodule works in a first state, the pixels in the pixel module are connected with the first comparator and the second comparator respectively, and the reference signal of the first comparator is greater than that of the second comparator, and the reference signal of the second comparator is equal to the threshold value of an electrical signal; when the mode switching submodule works in a second state, the pixels in the first group are connected with the first comparator, and the pixels in the second group are connected with the second comparator, and the reference signals of the first comparator and the second comparator are both equal to the threshold value of the electrical signal. The application also provides an electronic device. The pulse sequence image sensor provided by the application has a better signal-to-noise ratio.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of image sensors, and in particular to a pulse sequence image sensor and an electronic device. BACKGROUND

[0002] In the working process of an image sensor, random reset noise is caused by each reset of a pixel, and noise is also introduced into the transmission path of a pixel signal (i.e. an electrical signal formed by photoelectric conversion) from the pixel to a column-level circuit. The existence of these noises directly affects the image quality of the image sensor.

[0003] In order to suppress these noises, a conventional 4T pixel (i.e. a four-transistor pixel) first retains photo-generated charges generated by exposure of a photodiode in the photodiode, resets a floating diffusion region, and samples and reads out a reset signal on the floating diffusion region to a column-level circuit after exposure of the photodiode is completed; then the photo-generated charges on the photodiode are transferred to the floating diffusion region by controlling the conduction of a transfer transistor, and the photosensitive signal on the floating diffusion region is sampled to the column-level circuit; finally, the two signals sampled to the column-level circuit are differentiated. Differentiating the above two signals can effectively eliminate the noise introduced in the pixel reset process and the pixel signal transmission path, so that subsequent processing of the signal obtained by differentiation can form a good quality image.

[0004] Compared with the conventional 4T pixel, the conventional pulse sequence pixel lacks a floating diffusion region and a transfer transistor, so it cannot well suppress the noise introduced in the pixel reset process and the pixel signal transmission path, thereby resulting in poor image quality of the pulse sequence image sensor formed based on the conventional pulse sequence pixel. SUMMARY

[0005] In order to overcome the above-mentioned defects in the prior art, the present application provides a pulse sequence image sensor, which comprises:

[0006] a pixel module and a readout module connected to the pixel module;

[0007] The pixel module comprises two or more pixels, which are divided into a first group and a second group, and the pixels are used to convert a light signal into an electrical signal and output the electrical signal.

[0008] The readout module comprises a first comparator, a second comparator, and a mode switching submodule, wherein the first comparator, the second comparator, and the mode switching submodule are configured to:

[0009] When the mode switching sub-module works in the first state, each pixel in the pixel module is connected with the first comparator and the second comparator respectively, and the first reference signal of the first comparator is greater than the second reference signal of the second comparator, and the second reference signal of the second comparator is equal to the threshold value of the electric signal.

[0010] When the mode switching sub-module works in the second state, each pixel in the first group is connected with the first comparator, each pixel in the second group is connected with the second comparator, and the first reference signal of the first comparator and the second reference signal of the second comparator are both equal to the threshold value of the electric signal.

[0011] According to one aspect of the present application, in the pulse sequence image sensor, the pulse sequence image sensor comprises a pixel array and a readout circuit; each column of pixels in the pixel array constitutes a pixel module; the readout circuit comprises a same number of readout modules as the pixel modules, and each readout module is connected with the pixel module corresponding thereto.

[0012] According to another aspect of the present application, in the pulse sequence image sensor, the pixels located at odd-numbered rows in each column of the pixels are divided into one of the first group and the second group, and the pixels located at even-numbered rows are divided into the other of the first group and the second group.

[0013] According to still another aspect of the present application, in the pulse sequence image sensor, each pixel comprises an input end for receiving a reset signal and an output end for outputting the electric signal; the connection of each pixel in the pixel module with the first comparator and the second comparator respectively comprises that the output end of each pixel in the pixel module is connected with the negative input end of the first comparator and the negative input end of the second comparator respectively, and the input end of each pixel in the pixel module is connected with the output end of the second comparator; the connection of each pixel in the first group with the first comparator and the connection of each pixel in the second group with the second comparator comprise that the output end of each pixel in the first group is connected with the negative input end of the first comparator, the input end of each pixel in the first group is connected with the output end of the first comparator, the output end of each pixel in the second group is connected with the negative input end of the second comparator, and the input end of each pixel in the second group is connected with the output end of the second comparator.

[0014] According to another aspect of the present application, in the pulse sequence image sensor, each of the pixels comprises a photoelectric conversion unit, a signal output unit and a reset unit; the photoelectric conversion unit is configured to convert a light signal into an electrical signal; the signal output unit is configured to output the electrical signal, wherein a first end of the signal output unit is connected with the photoelectric conversion unit, and a second end of the signal output unit serves as an output end of the pixel; the reset unit is configured to reset the photoelectric conversion unit according to the reset signal, wherein a first end of the reset unit is connected with the photoelectric conversion unit, and a second end of the reset unit serves as an input end of the pixel.

[0015] According to another aspect of the present application, in the pulse sequence image sensor, the photoelectric conversion unit comprises a photodiode, wherein a positive electrode of the photodiode is grounded, a negative electrode of the photodiode is connected with the first end of the signal output unit and the first end of the reset unit; the electrical signal is a negative electrode voltage signal of the photodiode.

[0016] According to another aspect of the present application, in the pulse sequence image sensor, the signal output unit comprises a source follower transistor and a pixel selection transistor; a first end of the source follower transistor is connected with a power supply, a second end of the source follower transistor is connected with a first end of the pixel selection transistor, a third end of the source follower transistor serves as the first end of the signal output unit and is connected with the negative electrode of the photodiode; a second end of the pixel selection transistor serves as the second end of the signal output unit and is connected with the corresponding readout module, and a third end of the pixel selection transistor is configured to receive a first control signal for controlling the conduction or disconnection of the pixel selection transistor; when the pixel selection transistor is turned on, the source follower transistor outputs the negative electrode voltage signal of the photodiode read by the source follower transistor to the corresponding readout module through the pixel selection transistor.

[0017] According to another aspect of the present application, in the pulse sequence image sensor, the reset unit comprises a reset transistor and a reset selection transistor; a first end of the reset transistor is connected with a power supply, a second end of the reset transistor serves as the first end of the reset unit and is connected with the negative electrode of the photodiode, and a third end of the reset transistor is connected with a second end of the reset selection transistor; a first end of the reset selection transistor serves as the second end of the reset unit and is connected with the corresponding readout module, and a third end of the reset selection transistor is configured to receive a second control signal for controlling the conduction or disconnection of the reset selection transistor; when the first end of the reset selection transistor receives the reset signal and the reset transistor is turned on, the reset transistor resets the photodiode according to the reset signal.

[0018] According to another aspect of the present application, in the pulse sequence image sensor, the mode switching submodule comprises a first electrical signal output line, a second electrical signal output line, a first reset signal input line, a second reset signal input line, a first switch, a second switch and a third switch; the output end of the pixel in the first group is connected to the negative input end of the first comparator through the first electrical signal output line, the output end of the pixel in the second group is connected to the negative input end of the second comparator through the second electrical signal output line, and the first switch is arranged across the first electrical signal output line and the second electrical signal output line; the input end of the pixel in the first group is connected to the output end of the first comparator through the first reset signal input line, the input end of the pixel in the second group is connected to the output end of the second comparator through the second reset signal input line, the second switch is arranged across the first reset signal input line and the second reset signal input line, and the third switch is arranged on the first reset signal input line and located between the second switch and the first comparator; when the first switch and the second switch are both turned on and the third switch is turned off, the mode switching submodule works in the first state; when the first switch and the second switch are both turned off and the third switch is turned on, the mode switching submodule works in the second state.

[0019] The present application also provides a pulse sequence image sensor, which comprises:

[0020] A pixel module and a readout module connected to the pixel module.

[0021] The pixel module comprises two or more pixels, and the pixels are used to convert a light signal into an electrical signal and output the electrical signal.

[0022] The readout module comprises a first comparator, a second comparator and a signal line submodule, wherein each pixel in the pixel module is connected to the first comparator and the second comparator through the signal line submodule, and a first reference signal of the first comparator is greater than a second reference signal of the second comparator, and the second reference signal of the second comparator is equal to a threshold value of the electrical signal.

[0023] The present application also provides an electronic device comprising the aforementioned pulse sequence image sensor.

[0024] The pulse sequence image sensor provided by the present application comprises a pixel module and a readout module connected with the pixel module, the pixel module comprises two groups of pixels, and the readout module comprises two comparators and a mode switching submodule, wherein the readout module is configured to enable the pulse sequence image sensor provided by the present application to work in a first pulse sequence output mode and a second pulse sequence output mode. When the pulse sequence image sensor provided by the present application works in the first pulse sequence output mode, the pixel signals of each pixel in the pixel module are respectively transmitted to the two comparators, and the reference signals of the two comparators are set to be unequal, and subsequently, only the pulse sequences output by the two comparators need to be differentially operated to eliminate the pixel reset noise and the noise introduced in the pixel signal transmission path, thereby effectively improving the signal-to-noise ratio performance of the image sensor and further improving the image quality of the image sensor. When the pulse sequence image sensor provided by the present application works in the second pulse sequence output mode, the pixel signals of the first group of pixels in the pixel module are transmitted to the first comparator, and the pixel signals of the second group of pixels are transmitted to the second comparator, and the first comparator and the second comparator work in parallel to enable the pixel signals of the two groups of pixels to be read out in parallel. Compared with the prior art in which the pixel signals of each pixel in the pixel module can only be read out one by one, the implementation of the present application is beneficial to improving the readout efficiency of the pixel signals, thereby improving the frame rate of the pulse sequence image sensor. That is, in the application scenario with higher requirements for signal-to-noise ratio, the pulse sequence image sensor provided by the present application can be enabled to work in the first pulse sequence output mode, and in the application scenario with higher requirements for frame rate, the pulse sequence image sensor provided by the present application can be enabled to work in the second pulse sequence output mode. The electronic device formed based on the pulse sequence image sensor provided by the present application also has better performance accordingly. BRIEF DESCRIPTION OF DRAWINGS

[0025] Other features, objects, and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments made with reference to the accompanying drawings:

[0026] Figure 1 is a circuit structure diagram of a column of pixels in a pulse sequence image sensor according to one specific embodiment of the present application and a readout module corresponding thereto;

[0027] Figure 2 is a circuit structure diagram of a column of pixels in a pulse sequence image sensor according to another specific embodiment of the present application and a readout module corresponding thereto;

[0028] Figure 3 is Figure 2 an equivalent circuit diagram of the structure shown in FIG. 8 working in the first pulse sequence output mode;

[0029] Figure 4is Figure 2 An equivalent circuit diagram of the structure shown in FIG. 1 working in the second pulse sequence output mode;

[0030] Figure 5 is Figure 2 A working timing diagram of the structure shown in FIG. 1 working in the first pulse sequence output mode;

[0031] Figure 6 is Figure 2 A working timing diagram of the structure shown in FIG. 1 working in the second pulse sequence output mode.

[0032] The same or similar reference signs in the drawings represent the same or similar components. DETAILED DESCRIPTION

[0033] In order to better understand and illustrate the present application, the present application will be further described in detail below with reference to the accompanying drawings.

[0034] The present application provides a pulse sequence image sensor, which comprises:

[0035] a pixel module and a readout module connected with the pixel module;

[0036] The pixel module comprises two or more pixels, which are divided into a first group and a second group, and the pixels are used for converting a light signal into an electrical signal and outputting the electrical signal;

[0037] The readout module comprises a first comparator, a second comparator and a mode switching sub-module, wherein the first comparator, the second comparator and the mode switching sub-module are configured to:

[0038] When the mode switching sub-module works in a first state, each pixel in the pixel module is connected with the first comparator and the second comparator respectively, and a first reference signal of the first comparator is greater than a second reference signal of the second comparator, and the second reference signal of the second comparator is equal to a threshold value of the electrical signal;

[0039] When the mode switching sub-module works in a second state, each pixel in the first group is connected with the first comparator, each pixel in the second group is connected with the second comparator, and the first reference signal of the first comparator and the second reference signal of the second comparator are both equal to the threshold value of the electrical signal.

[0040] The various components of the pulse sequence image sensor described above will be described in detail below.

[0041] Specifically, the pulse sequence image sensor provided by the present application comprises a pixel module and a readout module connected with the pixel module. The pixel module comprises two or more pixels, wherein the pixels are used to convert a light signal into a pixel signal (i.e. an electric signal) and output the pixel signal. The readout module is used to read out the pixel signal of the pixels in the pixel module connected with the readout module.

[0042] In the present embodiment, the number of the pixel modules and the number of the readout modules in the pulse sequence image sensor provided by the present application are both N, wherein N is an integer and N≥1. The N pixel modules constitute a pixel array of the pulse sequence image sensor, and the N readout modules constitute a readout circuit of the pulse sequence image sensor. In the present embodiment, the N pixel modules in the pixel array and the N readout modules in the readout circuit are in one-to-one correspondence, and a connection is formed between the corresponding pixel module and the readout module. In addition, in the present embodiment, each pixel comprises an input end and an output end, wherein the input end is used to receive a reset signal of the pixel, and the output end is used to output a pixel signal of the pixel. It should be noted that (1) the present application does not make any limitation on how to divide the pixel array to obtain the pixel module. In a preferred embodiment, the pixel array is divided in column units, and each column is taken as a pixel module. In other embodiments, the pixel array can also be divided in other ways. For example, when the pixel array comprises 4 rows × 4 columns of pixels, the pixel array can be divided into 4 pixel modules, and each pixel module comprises 2 rows × 2 columns of pixels. For the sake of simplicity, all the division ways of the pixel module are not listed here. (2) When the number of the pixel modules is two or more, the number of the pixels in each pixel module is preferably the same, but can also be different, and the present application does not make any limitation thereon. (3) The present application does not make any limitation on the specific structure of the pixel. Any photoelectric conversion structure having the above-mentioned input end and output end and being applicable to an image sensor is applicable to the pixel in the present application. For the sake of simplicity, all the possible structures of the pixel are not listed here. All the pixels in the pixel array preferably have the same structure, but can also have different structures, and the present application does not make any limitation thereon. Hereinafter, the case that all the pixels in the pixel array have the same structure will be taken as an example for description.

[0043] In the embodiment, the pixels in each pixel module are further divided into two groups, which are denoted as the first group and the second group hereinafter. Preferably, the number of pixels in the first group and the second group is equal or as close as possible. Specifically, when the pixel module includes an even number of pixels, the number of pixels in the first group and the second group is the same; when the pixel module includes an odd number of pixels, the number of pixels in the first group and the second group differs by one. Those skilled in the art can understand that the number of pixels in the first group and the second group can also be different according to actual design requirements, and the present application does not make any limitation in this regard. In addition, the present application does not make any limitation on which pixels are included in the first group and the second group. Taking the case where each column of pixels is taken as a pixel module and the number of pixels in the first group and the second group is equal or as close as possible as an example for illustration. In one specific embodiment, the pixels located at odd-numbered rows in each column of pixels are divided into the first group, and the pixels located at even-numbered rows in each column of pixels are divided into the second group; or the pixels located at even-numbered rows in each column of pixels are divided into the first group, and the pixels located at odd-numbered rows in each column of pixels are divided into the second group. In another specific embodiment, the pixels located in the first half of each column are divided into the first group, and the pixels located in the second half of each column are divided into the second group. For the sake of simplicity, all possible combinations of the first group and the second group are not listed one by one here.

[0044] In the embodiment, each readout module reads the pixel signals of the pixels in the pixel module corresponding thereto and outputs the signals in the form of a pulse sequence. The readout module includes a first comparator, a second comparator and a mode switching submodule, and the first comparator, the second comparator and the mode switching submodule are configured to:

[0045] When the mode switching submodule works in the first state, each pixel in the pixel module corresponding to the readout module is connected to the first comparator and the second comparator respectively, and the reference signal (denoted as the first reference signal hereinafter) of the first comparator is set to be greater than the reference signal (denoted as the second reference signal hereinafter) of the second comparator, and the second reference signal of the second comparator is set to be equal to the threshold value of the pixel signal. In one specific embodiment, each pixel in the pixel module corresponding to the readout module is connected to the first comparator and the second comparator respectively, which includes that the output end of each pixel in the pixel module is connected to the negative input end of the first comparator and the negative input end of the second comparator respectively, the input end of each pixel in the pixel module is connected to the output end of the second comparator, the positive input end of the first comparator inputs the first reference signal, and the positive input end of the second comparator inputs the second reference signal.

[0046] When the mode switching sub-module works in the second state, the first group of pixels in the pixel module corresponding to the readout module is connected with the first comparator, the second group of pixels in the pixel module corresponding to the readout module is connected with the second comparator, and the first reference signal of the first comparator and the second reference signal of the second comparator are both set to be equal to the threshold value of the pixel signal. In a specific embodiment, the connection of the first group of pixels in the pixel module corresponding to the readout module with the first comparator and the connection of the second group of pixels in the pixel module corresponding to the readout module with the second comparator include: the output end of each pixel in the first group is connected with the negative input end of the first comparator, the input end of each pixel in the first group is connected with the output end of the first comparator, the output end of each pixel in the second group is connected with the negative input end of the second comparator, the input end of each pixel in the second group is connected with the output end of the second comparator, the positive input end of the first comparator inputs the first reference signal, and the positive input end of the second comparator inputs the second reference signal.

[0047] It should be noted that (1) the present application does not make any limitation on the specific structure of the first comparator and the second comparator, and any device or circuit that can realize the comparison function is applicable to the present application, and for the sake of simplicity, they will not be listed one by one here. (2) In a specific embodiment, the mode switching sub-module includes a signal line sub-module and a switch sub-module, wherein the signal line sub-module includes signal lines for connecting each pixel in the pixel module with the comparator, and the switch sub-module includes switch elements for controlling the on / off / short-circuit state of the signal lines in the signal sub-module. Those skilled in the art can understand that the above is only one preferred embodiment of the mode switching sub-module, which should not be a limitation on the structure of the mode switching sub-module. Any structure that can switch the pixels in the pixel module with the corresponding comparator between the above two connection modes is applicable to the mode switching sub-module in the present application, and for the sake of simplicity, all possible structures of the mode switching sub-module will not be listed one by one here. (3) When the pixel signal of a pixel reaches a certain value, the pixel needs to be reset, and this value is the threshold value of the pixel signal. Typically, the pixel signal of a pixel is a voltage signal formed by photoelectric conversion, and accordingly the threshold value of the pixel signal is a threshold voltage. For a pixel, as the exposure time increases, the voltage signal formed by photoelectric conversion of the pixel gradually decreases, and the pixel is reset when the voltage signal drops to the threshold voltage. The following document will take the pixel signal of a pixel as an example for illustration.

[0048] The pulse sequence image sensor provided by the application, when all the mode switching sub-modules in the readout modules work in the first state, the working mode of the pulse sequence image sensor is denoted as the first pulse sequence output mode; when all the mode switching sub-modules in the readout modules work in the second state, the working mode of the pulse sequence image sensor is denoted as the second pulse sequence output mode.

[0049] When the pulse sequence image sensor works in the first pulse sequence output mode, the readout module reads the pixel signals of the pixels in the pixel module corresponding to the readout module one by one in each frame. For each pixel, after reset, the pixel signal is usually close to the power supply voltage, and as the exposure time increases, the pixel signal gradually decreases due to the accumulation of photo-generated charges. Since the first reference signal of the first comparator is greater than the second reference signal of the second comparator, the pixel signal of the pixel first decreases to the first reference signal and triggers the first comparator to output a high-level pulse signal, and the pixel signal of the pixel continues to decrease to the second reference signal (i.e. the threshold of the pixel signal) and triggers the second comparator to output a high-level pulse signal, which can be used to trigger the pixel to reset. After reset, the pixel continues to expose, and the cycle continues. When processing the pulse sequence output by the first comparator and the second comparator, for each pixel, the time difference between the time when the pixel signal triggers the first comparator to output a high-level pulse signal and the time when the pixel signal triggers the second comparator to output a high-level pulse signal is calculated (the length of the time difference can represent the intensity of the light, wherein the shorter the time difference, the stronger the light intensity, and the longer the time difference, the weaker the light intensity), and an image is formed according to the time difference. Since the voltage difference between the first reference signal and the second reference signal is fixed, even if noise is introduced in the pixel reset and the pixel signal transmission path, it will not affect the time when the pixel signal of the pixel decreases from the first reference signal to the second reference signal. In this way, the noise introduced in the pixel reset and the pixel signal transmission path can be effectively eliminated, which is beneficial to improve the signal-to-noise ratio performance of the pulse sequence image sensor.

[0050] When the pulse sequence image sensor works in the second pulse sequence output mode, the first comparator reads out the pixel signals of the pixels in the first group one by one and the second comparator reads out the pixel signals of the pixels in the second group one by one in each frame. For each pixel in the first group, when the pixel signal of the pixel decreases to the first reference signal (i.e. the threshold value of the pixel signal) with the increase of the exposure time, the first comparator outputs a high level pulse which can be used to trigger the pixel to reset, and the pixel continues to expose after being reset, and so on. Similarly, for each pixel in the second group, when the pixel signal of the pixel decreases to the second reference signal (i.e. the threshold value of the pixel signal) with the increase of the exposure time, the second comparator outputs a high level pulse which can be used to trigger the pixel to reset, and the pixel continues to expose after being reset, and so on. Since the readout module can read the pixel signals of the pixels in the first group and the second group in parallel, the readout efficiency of the pixel signals can be effectively improved, thereby improving the frame rate of the pulse sequence image sensor.

[0051] As can be seen from the above description, the pulse sequence image sensor provided by the application can improve the signal-to-noise ratio performance when working in the first pulse sequence output mode and can improve the frame rate when working in the second pulse sequence output mode. In this way, the working mode of the pulse sequence image sensor can be selected according to actual needs to meet different application scenarios.

[0052] In addition, it should be further pointed out that, in addition to the pixel array and the readout circuit, the pulse sequence image sensor usually also includes conventional components such as peripheral circuits, and for the sake of simplicity, these conventional components will not be listed one by one here.

[0053] The pulse sequence image sensor provided by the application will be described below in combination with Figure 1 The pulse sequence image sensor provided by the application will be described below in combination with Figure 1 The entire pixel array and readout circuit in the pulse sequence image sensor are not shown, but only a pixel module (specifically, a column of pixels in the pixel array) and the readout module corresponding thereto are schematically drawn.

[0054] Specifically, as shown in the figure, the pixel module includes pixel 1, pixel 2, pixel 3, pixel 4, …, wherein each pixel includes a photoelectric conversion unit, a signal output unit 110, and a reset unit 120. In the embodiment, the photoelectric conversion unit is configured to convert a light signal into an electrical signal; the signal output unit 110 is configured to output the electrical signal formed by the photoelectric conversion of the photoelectric conversion unit, wherein a first end of the signal output unit 110 is connected to the photoelectric conversion unit, and a second end of the signal output unit 110 is connected to the readout module as an output end of the pixel; the reset unit 120 is configured to reset the photoelectric conversion unit according to a reset signal, wherein a first end of the reset unit 120 is connected to the photoelectric conversion unit, and a second end of the reset unit 120 is connected to the readout module as an input end of the pixel. In addition, in the embodiment, the pixels located in the odd-numbered rows in the pixel module (i.e., pixel 1, pixel 3, …) are divided into a first group, and the pixels located in the even-numbered rows (i.e., pixel 2, pixel 4, …) are divided into a second group.

[0055] The readout module 200 includes a first comparator 2001, a second comparator 2002, and a mode switching submodule. A positive input end of the first comparator 2001 is connected to a first reference signal Vref_1, and a positive input end of the second comparator 2002 is connected to a second reference signal Vref_2; the mode switching submodule includes a first electrical signal output line 2010, a second electrical signal output line 2011, a first reset signal input line 2012, a second reset signal input line 2013, a first switch S1, a second switch S2, and a third switch S3. Wherein the output end of the first group of pixels (i.e., the second end of the signal output unit 110 in the first group of pixels) is connected to a negative input end of the first comparator 2001 through the first electrical signal output line 2010; the output end of the second group of pixels (i.e., the second end of the signal output unit 110 in the second group of pixels) is connected to a negative input end of the second comparator 2002 through the second electrical signal output line 2011; the first switch S1 is arranged between the first electrical signal output line 2010 and the second electrical signal output line 2011; the input end of the first group of pixels is connected to an output end of the first comparator 2001 through the first reset signal input line 2012; the input end of the second group of pixels is connected to the second comparator 2002 through the second reset signal input line 2013; the second switch S2 is arranged between the first reset signal input line 2012 and the second reset signal input line 2013; the third switch S3 is arranged on the first reset signal input line 2012, wherein one end of the third switch S3 is connected to the input end of the first group of pixels and the second switch S2, and the other end of the third switch S3 is connected to the output end of the first comparator 2001.

[0056] When the first switch S1 and the second switch S2 are both turned on and the third switch S3 is turned off, the mode switching sub-module works in the first state. Correspondingly, the first electric signal output line 2010 and the second electric signal output line 2011 are both short-circuited, so that the output end of each pixel in the first group and the second group is simultaneously connected to the negative input end of the first comparator 2001 and the negative input end of the second comparator 2002; the first reset signal input line 2012 and the second reset signal input line 2013 are both short-circuited, and at the same time, the first reset signal input line 2012 is disconnected from the output end of the first comparator 2001, so that the input end of each pixel in the first group and the second group is connected to the output end of the second comparator 2002.

[0057] When the first switch S1 and the second switch S2 are both turned off and the third switch S3 is turned on, the mode switching sub-module works in the second mode. Correspondingly, the output end of the first group of pixels is connected to the negative input end of the first comparator 2001, the input end of the first group of pixels is connected to the output end of the first comparator 2001, the output end of the second group of pixels is connected to the negative input end of the second comparator 2002, and the input end of the second group of pixels is connected to the output end of the second comparator 2002.

[0058] It should be noted that the first switch S1, the second switch S2 and the third switch S3 are preferably implemented by CMOS transistors, but those skilled in the art can understand that any other type of switch suitable for an image sensor also falls within the protection scope of the present application, and for the sake of simplicity, all possible switch types are not listed one by one.

[0059] There are various implementation manners for the photoelectric conversion part, the signal output part and the reset part in the pixel. In one preferred embodiment, as shown in FIG. 2, the photoelectric conversion part is implemented by a photodiode 2004, the signal output part is implemented by a transistor 2005, and the reset part is implemented by a transistor 2006. Figure 2As shown, the photoelectric conversion part is implemented by a light emitting diode 100, the positive electrode of which is grounded, and the negative electrode is connected with the signal output part and the reset part respectively. The pixel signal of the pixel is the negative electrode voltage signal of the light emitting diode. The signal output part includes a source follower transistor 1101 and a pixel selection transistor 1102, wherein the first end of the source follower transistor 1101 is connected with a power supply, the second end of the source follower transistor 1101 is connected with the first end of the pixel selection transistor 1102, the third end of the source follower transistor 1101 is connected with the negative electrode of the photoelectric diode as the first end of the signal output part, the second end of the pixel selection transistor 1102 is connected with the corresponding readout module 200 as the second end of the signal output part, and the third end of the pixel selection transistor 1102 is used for receiving a first control signal for controlling the conduction or disconnection of the pixel selection transistor 1102, wherein when the pixel selection transistor 1102 is turned on, the source follower transistor 1101 transmits the negative electrode voltage signal of the photoelectric diode read by it to the readout module 200 through the pixel selection transistor 1102. The reset part 120 includes a reset transistor 1201 and a reset selection transistor 1202, the first end of the reset transistor 1201 is connected with a power supply, the second end of the reset transistor 1201 is connected with the negative electrode of the photoelectric diode as the first end of the reset part, the third end of the reset transistor 1201 is connected with the second end of the reset selection transistor 1202, the first end of the reset selection transistor 1202 is connected with the corresponding readout module 200 as the second end of the reset part, and the third end of the reset selection transistor 1202 is used for receiving a second control signal for controlling the conduction or disconnection of the reset selection transistor 1202, wherein when the first end of the reset selection transistor 1202 receives a reset signal and the reset transistor 1202 is turned on, the reset transistor 1201 resets the photoelectric diode according to the reset signal. It should be noted that the specific type of the source follower transistor 1101, the pixel selection transistor 1102, the reset transistor 1201 and the reset selection transistor 1202 is not limited in the present application, for example, it can be a common PMOS transistor or an NMOS transistor. If the source follower transistor 1101, the pixel selection transistor 1102, the reset transistor 1201 and the reset selection transistor 1202 are all implemented by PMOS transistors, then the first end of the source follower transistor 1101, the pixel selection transistor 1102, the reset transistor 1201 and the reset selection transistor 1202 is the drain, the second end is the source, and the third end is the gate. If the source follower transistor 1101, the pixel selection transistor 1102, the reset transistor 1201 and the reset selection transistor 1202 are all implemented by NMOS transistors, then the first end of the source follower transistor 1101, the pixel selection transistor 1102, the reset transistor 1201 and the reset selection transistor 1202 is the source, the second end is the drain, and the third end is the gate. Figure 3 is Figure 2An equivalent circuit diagram of the structure shown in FIG. 1 working in the first pulse sequence output mode, Figure 4 is Figure 2 An equivalent circuit diagram of the structure shown in FIG. 1 working in the second pulse sequence output mode.

[0060] The working timing of the structure shown in FIG. 1 in the first pulse sequence output mode and the second pulse sequence output mode will be described below. Figure 2 The structure shown in FIG. 1 is taken as an example, wherein, Figure 5 is a working timing diagram of the structure shown in FIG. 2 in the first pulse sequence output mode, Figure 6 is Figure 2 a working timing diagram of the structure shown in FIG. 2 in the second pulse sequence output mode. It should be noted that, (1) Figure 2 The source follower transistor 1101, the pixel selection transistor 1102, the reset transistor 1201 and the reset selection transistor 1202 in FIG. 1 are all implemented by PMOS transistors; (2) only four frames are drawn in the working timing diagram for illustrative purposes.

[0061] As Figure 5As shown, the readout module reads out the pixel signals of the pixels in the pixel module in sequence in each frame. Taking the first frame as an example, first, the first control signal Row_sel_1 applied to the gate of the pixel selection transistor 1102 in the pixel 1 and the second control signal Rst_sel_1 applied to the gate of the reset selection transistor 1202 are high-level pulses in sequence. When the first control signal Row_sel_1 is a high-level pulse, the pixel selection transistor 1102 in the pixel 1 is turned on, and the negative voltage signal of the light-emitting diode 100 in the pixel 1 is read out to the negative input end of the first comparator and the negative input end of the second comparator via the source follower transistor 1101 and the pixel selection transistor 1102, and based on the comparison result of the negative voltage signal of the light-emitting diode 100 with the first reference signal and the second reference signal, the output end of the first comparator and the output end of the second comparator output corresponding level signals. When the second control signal Rst_sel_1 is a high-level pulse, the reset selection transistor 1202 in the pixel 1 is turned on, and during the conduction of the reset selection transistor 1202, if the output end of the second comparator outputs a high-level signal, the reset transistor 1201 is triggered to reset the light-emitting diode 100, and if the output end of the second comparator outputs a low-level signal, the light-emitting diode 100 continues to be exposed. Then, the first control signal Row_sel_2 applied to the gate of the pixel selection transistor 1102 in the pixel 2 and the second control signal Rst_sel_2 applied to the gate of the reset selection transistor 1202 are high-level pulses in sequence. When the first control signal Row_sel_2 is a high-level pulse, the pixel selection transistor 1102 in the pixel 2 is turned on, and the negative voltage signal of the light-emitting diode 100 in the pixel 2 is read out to the negative input end of the first comparator and the negative input end of the second comparator via the source follower transistor 1101 and the pixel selection transistor 1102, and based on the comparison result of the negative voltage signal of the light-emitting diode 100 with the first reference signal and the second reference signal, the output end of the first comparator and the output end of the second comparator output corresponding level signals. When the second control signal Rst_sel_2 is a high-level pulse, the reset selection transistor 1202 in the pixel 2 is turned on, and during the conduction of the reset selection transistor 1202, if the output end of the second comparator outputs a high-level signal, the reset transistor 1201 is triggered to reset the light-emitting diode 100, and if the output end of the second comparator outputs a low-level signal, the light-emitting diode 100 continues to be exposed. The following is sequentially similar to the pixel 3, the pixel 4, and the like, until the pixel signals of all the pixels are read out, and the first frame ends. Next, the images of the subsequent frames are read in the same way. Accordingly, the level signals output by the first comparator constitute a first pulse sequence Output_1, and the level signals output by the second comparator constitute a second pulse sequence Output_2. According to Figure 5As can be seen from the first pulse sequence Output_1 and the second pulse sequence Output_2, the negative electrode voltage signal of the light-emitting diode 100 in the pixel 1, the pixel 2 and the pixel 4 does not drop to the first reference signal before the end of the fourth frame, so when the pixel signals of the pixel 1, the pixel 2 and the pixel 4 are read, the first comparator and the second comparator both output low-level signals. The negative electrode voltage signal of the light-emitting diode 100 in the pixel 3 drops to the first reference signal in the second frame, which triggers the first comparator to output a high-level signal. As the exposure time increases, the negative electrode voltage signal of the light-emitting diode 100 in the pixel 3 drops to the second reference signal in the fourth frame, which triggers the second comparator to output a high-level signal. The high-level signal reaches the reset transistor 1201 through the conducting reset selection transistor 1202, and triggers the reset transistor 1201 to reset the light-emitting diode 100 in the pixel 3. When the first pulse sequence Output_1 and the second pulse sequence Output_2 are processed subsequently, the time difference between the two high-level signals corresponding to the pixel 3 in the first pulse sequence Output_1 and the second pulse sequence Output_2 is obtained through differential operation, and the image of the pixel 3 is formed according to the time difference. Since the time (i.e. the time difference between the two high-level signals corresponding to the pixel 3 in the first pulse sequence Output_1 and the second pulse sequence Output_2) during which the negative electrode voltage signal of the light-emitting diode 100 in the pixel 3 drops from the first reference signal to the second reference signal is not affected by the noise introduced by the pixel reset and the pixel signal transmission path, the noise introduced by the pixel reset and the pixel signal transmission path is suppressed, thereby effectively improving the signal-to-noise ratio performance of the image sensor, and further improving the image quality of the image sensor.

[0062] As Figure 6As shown, the readout module reads out the pixel signals of the pixels in the first group and the second group in the pixel module in parallel in each frame. In this embodiment, the timing of pixel 1 and pixel 2 is the same, and the timing of pixel 3 and pixel 4 is the same, so that the pixel signals of the pixels in the first group and the second group can be read out at the same time. Taking the first frame as an example, first, the first control signal Row_sel_1 applied to the gate of the pixel selection transistor 1102 in pixel 1 and the second control signal Rst_sel_1 applied to the gate of the reset selection transistor 1202 are high-level pulses in turn. When the first control signal Row_sel_1 is a high-level pulse, the pixel selection transistor 1102 in pixel 1 is turned on, and the negative voltage signal of the light-emitting diode 100 in pixel 1 is read out to the negative input end of the first comparator via the source follower transistor 1101 and the pixel selection transistor 1102, and based on the comparison result of the negative voltage signal of the light-emitting diode 100 and the first reference signal, the output end of the first comparator outputs the corresponding level signal. When the second control signal Rst_sel_1 is a high-level pulse, the reset selection transistor 1202 in pixel 1 is turned on, and during the conduction of the reset selection transistor 1202, if the output end of the first comparator outputs a high-level signal, the reset transistor 1201 resets the light-emitting diode 100, and if the output end of the first comparator outputs a low-level signal, the light-emitting diode 100 continues to expose. Pixel 2 has the same timing as pixel 1, wherein when the first control signal Row_sel_2 applied to the gate of the pixel selection transistor 1102 in pixel 2 is a high-level pulse, the pixel selection transistor 1102 in pixel 2 is turned on, and the negative voltage signal of the light-emitting diode 100 in pixel 2 is read out to the negative input end of the second comparator via the source follower transistor 1101 and the pixel selection transistor 1102, and based on the comparison result of the negative voltage signal of the light-emitting diode 100 and the second reference signal, the output end of the second comparator outputs the corresponding level signal. When the second control signal Rst_sel_2 applied to the gate of the reset selection transistor 1202 in pixel 2 is a high-level pulse, the reset selection transistor 1202 in pixel 2 is turned on, and during the conduction of the reset selection transistor 1202, if the output end of the second comparator outputs a high-level signal, the reset transistor 1201 resets the light-emitting diode 100, and if the output end of the second comparator outputs a low-level signal, the light-emitting diode 100 continues to expose. The following is sequentially similar to pixel 3, pixel 4, etc., until the pixel signals of all pixels are read out, and the first frame ends. The subsequent frames are read in the same way. Accordingly, the level signal output by the first comparator constitutes the first pulse sequence Output_1, and the level signal output by the second comparator constitutes the second pulse sequence Output_2. According to Figure 6As can be seen from the first pulse sequence Output_1 and the second pulse sequence Output_2, before the end of the fourth frame, the negative electrode voltage signal of the light-emitting diode 100 in the pixel 2, the pixel 3 and the pixel 4 has not dropped to the first reference signal, so when the pixel signals of the pixel 2, the pixel 3 and the pixel 4 are read, the first comparator and the second comparator both output low-level signals. The negative electrode voltage signal of the light-emitting diode 100 in the pixel 1 drops to the first reference signal in the first frame, which triggers the first comparator to output a high-level signal and reset the light-emitting diode 100 in the pixel 1 based on the high-level signal. After the reset, the light-emitting diode 100 continues to be exposed, and with the increase of the exposure time, the negative electrode voltage signal of the light-emitting diode 100 in the pixel 1 drops to the first reference signal in the third frame, which again triggers the first comparator to output a high-level signal and reset the light-emitting diode 100 in the pixel 1 based on the high-level signal. When the first pulse sequence Output_1 is processed subsequently, the image of the pixel 1 is formed according to the time difference between the two high-level signals corresponding to the pixel 1 in the first pulse sequence Output_1. Since the readout module can read the pixel signals in the first group and the second group of pixels in parallel, the time required for each frame can be effectively reduced, thereby improving the frame rate of the pulse sequence image sensor. In particular, when the number of pixels in the first group and the second group is the same, the time required for each frame can be halved, and the frame rate can be doubled.

[0063] The present application also provides a pulse sequence image sensor, which comprises:

[0064] a pixel module and a readout module connected to the pixel module;

[0065] The pixel module comprises two or more pixels, which are used to convert light signals into electrical signals and output the electrical signals.

[0066] The readout module comprises a first comparator, a second comparator and a signal line sub-module, wherein each pixel in the pixel module is connected to the first comparator and the second comparator through the signal line sub-module, and the first reference signal of the first comparator is greater than the second reference signal of the second comparator, and the second reference signal of the second comparator is equal to the threshold value of the electrical signal.

[0067] The various components of the pulse sequence image sensor will be described in detail below.

[0068] Specifically, the pulse sequence image sensor provided by the present application comprises pixel modules and readout modules connected with the pixel modules. The structure of the pixel modules can refer to the content of the related part of the pulse sequence image sensor described above, and will not be described here again for the sake of simplicity. The readout modules comprise first comparators, second comparators and signal line sub-modules. The structure of the first comparators and the second comparators can refer to the content of the related part of the pulse sequence image sensor described above, and will not be described here again for the sake of simplicity. The signal line sub-modules comprise signal lines for connecting each pixel in the pixel modules with the comparators, and the present application does not make any limitation on the specific number and layout of the signal lines, as long as the output end of each pixel in the pixel modules can be connected to the negative input end of the first comparator and the negative input end of the second comparator, and the input end of each pixel in the pixel modules can be connected to the output end of the second comparator. When the pulse sequence image sensor provided by the present application works, the second reference signal of the second comparator is set to be equal to the threshold value of the pixel signal, and the first reference signal is set to be greater than the second reference signal. In addition, the working timing of the pulse sequence image sensor provided by the present application can refer to the working timing when the pulse sequence image sensor works in the first pulse sequence output mode, and will not be described here again for the sake of simplicity.

[0069] Correspondingly, the present application also provides an electronic device comprising the pulse sequence image sensor described above. The electronic device provided by the present application can be a pulse camera, a high-speed camera, an audio / video player, a navigation device, a fixed position terminal, an entertainment unit, a smart phone, a communication device, a device in a motor vehicle, a camera, a sports or wearable camera, a detection device, a flight device, a medical device, a security device, etc. For the sake of simplicity, all possible types of the electronic device provided by the present application will not be listed here one by one. Since the pulse sequence image sensor described above is adopted, the electronic device provided by the present application has better performance accordingly.

[0070] It is apparent for those skilled in the art that the present application is not limited to the details of the above-described exemplary embodiments, but can be implemented in other concrete forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered in all respects as illustrative and not restrictive, the scope of the present application being defined by the appended claims rather than the above description, and it is intended to embrace all changes and modifications that fall within the meaning and scope of equivalents of the claims. Any reference signs in the claims should not be construed as limiting the claims to which they belong. Furthermore, it is obvious that the word "comprise" does not exclude other parts, units or steps, and the singular does not exclude the plural. The plurality of components, units or devices stated in the system claims can also be implemented by one component, unit or device through software or hardware.

[0071] The above disclosure only represents some preferred embodiments of the present application, and of course cannot limit the scope of the present application, thus equivalent changes made according to the claims of the present application are still within the scope of the present application.

Claims

1. A pulse sequence image sensor, characterized in that, This pulse sequence image sensor includes: A pixel module and a readout module connected to the pixel module; The pixel module includes two or more pixels, which are divided into a first group and a second group. The pixels are used to convert optical signals into electrical signals and output them. Each pixel includes an input terminal for receiving a reset signal and an output terminal for outputting the electrical signal. The readout module includes a first comparator, a second comparator, and a mode switching submodule, wherein the first comparator, the second comparator, and the mode switching submodule are configured as follows: When the mode switching submodule is working in the first state, the output terminal of each pixel in the pixel module is connected to the negative input terminal of the first comparator and the negative input terminal of the second comparator, respectively, and the input terminal of each pixel in the pixel module is connected to the output terminal of the second comparator. The positive input terminal of the first comparator receives a first reference signal, and the positive input terminal of the second comparator receives a second reference signal. The first reference signal of the first comparator is greater than the second reference signal of the second comparator, and the second reference signal of the second comparator is equal to the threshold of the electrical signal. When the mode switching submodule is operating in the second state, the output terminal of each pixel in the first group is connected to the negative input terminal of the first comparator, the input terminal of each pixel in the first group is connected to the output terminal of the first comparator, the output terminal of each pixel in the second group is connected to the negative input terminal of the second comparator, the input terminal of each pixel in the second group is connected to the output terminal of the second comparator, and the first reference signal input to the positive input terminal of the first comparator and the second reference signal input to the positive input terminal of the second comparator are both equal to the threshold of the electrical signal.

2. The pulse sequence image sensor according to claim 1, characterized in that, in: The pulse sequence image sensor includes a pixel array and a readout circuit. Each column of pixels in the pixel array constitutes a pixel module; The readout circuit includes readout modules that are the same number as the number of pixel modules and are one-to-one with each of the pixel modules, and each readout module is connected to its corresponding pixel module.

3. The pulse sequence image sensor according to claim 2, characterized in that, in: In each column of pixels, pixels located in odd-numbered rows are divided into one group of the first group and the second group, and pixels located in even-numbered rows are divided into the other group of the first group and the second group.

4. The pulse sequence image sensor according to claim 3, characterized in that, in: Each pixel includes a photoelectric conversion unit, a signal output unit, and a reset unit; The photoelectric conversion unit is used to convert optical signals into electrical signals; The signal output section is used to output the electrical signal, wherein the first end of the signal output section is connected to the photoelectric conversion section, and the second end of the signal output section serves as the output end of the pixel; The reset unit is used to reset the photoelectric conversion unit according to the reset signal, wherein the first end of the reset unit is connected to the photoelectric conversion unit, and the second end of the reset unit serves as the input end of the pixel.

5. The pulse sequence image sensor according to claim 4, characterized in that, in: The photoelectric conversion unit includes a photodiode, wherein the positive terminal of the photodiode is grounded, and the negative terminal of the photodiode is connected to the first terminal of the signal output unit and the first terminal of the reset unit; The electrical signal is the negative voltage signal of the photodiode.

6. The pulse sequence image sensor according to claim 5, characterized in that, in: The signal output section includes a source follower transistor and a pixel selection transistor; The first terminal of the source follower transistor is connected to the power supply, the second terminal of the source follower transistor is connected to the first terminal of the pixel selection transistor, and the third terminal of the source follower transistor serves as the first terminal of the signal output section and is connected to the negative terminal of the photodiode. The second terminal of the pixel selection transistor is connected to the corresponding readout module as the second terminal of the signal output section, and the third terminal of the pixel selection transistor is used to receive a first control signal that controls its conduction or disconnection. When the pixel selection transistor is turned on, the source follower transistor outputs the negative voltage signal of the photodiode it reads to the corresponding readout module through the pixel selection transistor.

7. The pulse sequence image sensor according to claim 6, characterized in that, in: The reset section includes a reset transistor and a reset selection transistor; The first terminal of the reset transistor is connected to the power supply, the second terminal of the reset transistor serves as the first terminal of the reset section and is connected to the negative terminal of the photodiode, and the third terminal of the reset transistor is connected to the second terminal of the reset selection transistor. The first terminal of the reset selection transistor serves as the second terminal of the reset section and is connected to the corresponding readout module. The third terminal of the reset selection transistor is used to receive a second control signal that controls its on or off state. Specifically, when the first terminal of the reset selection transistor receives the reset signal and the reset transistor is turned on, the reset transistor resets the photodiode according to the reset signal.

8. The pulse sequence image sensor according to claim 1 or 4, characterized in that, in: The mode switching submodule includes a first electrical signal output line, a second electrical signal output line, a first reset signal input line, a second reset signal input line, a first switch, a second switch, and a third switch; The output terminal of the pixel in the first group is connected to the negative input terminal of the first comparator through the first electrical signal output line, and the output terminal of the pixel in the second group is connected to the negative input terminal of the second comparator through the second electrical signal output line. The first switch is disposed between the first electrical signal output line and the second electrical signal output line. The input terminals of the pixels in the first group are connected to the output terminal of the first comparator through the first reset signal input line, the input terminals of the pixels in the second group are connected to the output terminal of the second comparator through the second reset signal input line, the second switch is disposed between the first reset signal input line and the second reset signal input line, and the third switch is disposed on the first reset signal input line and located between the second switch and the first comparator; Specifically, when both the first switch and the second switch are on and the third switch is off, the mode switching submodule operates in the first state; when both the first switch and the second switch are off and the third switch is on, the mode switching submodule operates in the second state.

9. A pulse sequence image sensor, characterized in that, This pulse sequence image sensor includes: A pixel module and a readout module connected to the pixel module; The pixel module includes two or more pixels, which are used to convert optical signals into electrical signals and output them. Each pixel includes an input terminal for receiving a reset signal and an output terminal for outputting the electrical signal. The readout module includes a first comparator, a second comparator, and a signal line submodule. The output terminal of each pixel in the pixel module is connected to the negative input terminal of the first comparator and the negative input terminal of the second comparator through the signal line submodule. The input terminal of each pixel in the pixel module is connected to the output terminal of the second comparator. The positive input terminal of the first comparator receives a first reference signal, and the positive input terminal of the second comparator receives a second reference signal. The first reference signal of the first comparator is greater than the second reference signal of the second comparator, and the second reference signal of the second comparator is equal to the threshold of the electrical signal.

10. An electronic device, characterized in that, The electronic device includes a pulse sequence image sensor as claimed in any one of claims 1 to 9.

Images