Heterojunction cell, photovoltaic module and photovoltaic system

Abstract

The invention relates to a heterojunction cell and a manufacturing method thereof, a photovoltaic module and a photovoltaic system. The heterojunction cell comprises a substrate, a first intrinsic amorphous silicon layer, a first silicon material layer and a first transparent conductive oxide layer, the heterojunction cell further comprises a transparent conductive oxide pattern, an antireflection layer and a first metal electrode, the transparent conductive oxide pattern and the antireflection layer are arranged in different areas on the surface, away from the substrate, of the first transparent conductive oxide layer, and the first metal electrode layer is stacked on the surface, away from the substrate, of the transparent conductive oxide pattern. According to the heterojunction cell, the manufacturing method thereof, the photovoltaic module and the photovoltaic system, the optical absorption loss of the heterojunction cell is small, and the efficiency is high.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a heterojunction cell, a photovoltaic module and a photovoltaic system. Background Art

[0002] In recent years, with the rapid development of the photovoltaic industry, domestic and foreign markets have put forward higher and higher requirements for the conversion efficiency and product performance of solar cells and photovoltaic modules, which has also prompted industry manufacturers to actively conduct research on new battery, module structure and related processes. Heterojunction (HJT) cells have the advantages of low light decay and low temperature coefficient, which can reduce energy consumption while reducing thermal damage to the silicon substrate. It has become an important direction for the development of high-efficiency batteries in the future. Heterojunction cells mainly deposit intrinsic amorphous silicon films on both sides of the silicon substrate, and then deposit P-type and N-type amorphous or microcrystalline silicon films respectively to form a heterojunction; and prepare the corresponding transparent conductive oxide layer TCO on the surface of the amorphous silicon or microcrystalline silicon film on both sides of the silicon substrate, and then use low-temperature silver paste for screen printing and curing to form a surface metal electrode. The transparent conductive oxide layer TCO plays a vital role in the heterojunction battery structure, and plays a dual role of excellent optical and electrical properties. However, the TCO material itself has a certain parasitic absorption, which will cause optical absorption loss of heterojunction batteries and affect the efficiency of heterojunction batteries. Summary of the invention

[0003] Based on this, it is necessary to provide a heterojunction cell, photovoltaic module and photovoltaic system with higher efficiency to address the problems of large optical absorption loss and low efficiency of heterojunction cells in related technologies.

[0004] A first aspect of an embodiment of the present application provides a heterojunction battery, comprising a substrate, a first intrinsic amorphous silicon layer, a first silicon material layer, and a first transparent conductive oxide layer stacked in sequence on a first side surface of the substrate;

[0005] The heterojunction cell also includes a transparent conductive oxide pattern, an anti-reflection layer and a first metal electrode. The transparent conductive oxide pattern and the anti-reflection layer are arranged in different areas on the surface of the first transparent conductive oxide layer away from the substrate. The first metal electrode layer is stacked on the surface of the transparent conductive oxide pattern away from the substrate.

[0006] In one embodiment, the transparent conductive oxide pattern and the anti-reflection layer are disposed in complementary regions.

[0007] In one embodiment, a projection of the transparent conductive oxide pattern on the first transparent conductive oxide layer covers a projection of the first metal electrode on the first transparent conductive oxide layer.

[0008] In one embodiment, the first metal electrode includes at least two main grids that are parallel to each other and spaced apart, and each main grid is electrically connected to at least two sub-grids;

[0009] The number of the transparent conductive oxide patterns is at least two, the transparent conductive oxide patterns are arranged at intervals from each other, and the transparent conductive oxide patterns are arranged in one-to-one correspondence with the main grids.

[0010] In one embodiment, the anti-reflection layer is constructed as a single-layer structure, and the anti-reflection layer includes one of a SiNx layer, a SiOx layer, a SiNxOy layer, and an AlOx layer; or

[0011] The anti-reflection layer is configured as a composite structure layer including at least two of a SiNx layer, a SiOx layer, a SiNxOy layer, and an AlOx layer.

[0012] In one embodiment, the thickness of the first transparent conductive oxide layer is 20 nm-60 nm, and the thickness of the transparent conductive oxide pattern is 40 nm-100 nm.

[0013] A second aspect of an embodiment of the present application provides a method for manufacturing a heterojunction battery, the method comprising:

[0014] A substrate is provided, the substrate comprising a base, a first intrinsic amorphous silicon layer, a first silicon material layer and a first transparent conductive oxide layer stacked in sequence on a first side surface of the base, and a second intrinsic amorphous silicon layer, a second silicon material layer and a second transparent conductive oxide layer stacked in sequence on a second side surface of the base, the first silicon material layer and the second silicon material layer have opposite doping types, and the first side surface and the second side surface are arranged oppositely;

[0015] forming a transparent conductive oxide pattern and an anti-reflection layer on different regions of the surface of the first transparent conductive oxide layer facing away from the substrate;

[0016] A first metal electrode is formed on a surface of the transparent conductive oxide pattern facing away from the substrate.

[0017] In one embodiment, the step of forming a transparent conductive oxide pattern and an anti-reflection layer on different regions of the surface of the first transparent conductive oxide layer facing away from the substrate specifically includes:

[0018] forming a transparent conductive oxide pattern on a surface of the first transparent conductive oxide layer facing away from the substrate by using a mask method;

[0019] An anti-reflection layer is formed on a surface of the first transparent conductive oxide layer facing away from the substrate and in an area not covered by the transparent conductive oxide pattern.

[0020] In one embodiment, the step of providing a substrate specifically includes:

[0021] Forming a first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer on a first side surface and a second side surface of the substrate respectively, wherein the first side surface and the second side surface are arranged opposite to each other;

[0022] Forming a first silicon material layer on a surface of the first intrinsic amorphous silicon layer away from the substrate, and forming a second silicon material layer on a surface of the second intrinsic amorphous silicon layer away from the substrate;

[0023] A second transparent conductive oxide layer is formed on a surface of the second silicon material layer facing away from the substrate, and a first transparent conductive oxide layer is formed on a surface of the first silicon material layer facing away from the substrate.

[0024] In one embodiment, after the step of forming a first metal electrode on the surface of the transparent conductive oxide pattern facing away from the substrate, the method further comprises:

[0025] A second metal electrode is formed on a surface of the second transparent conductive oxide layer facing away from the substrate.

[0026] A third aspect of an embodiment of the present application provides a photovoltaic module, comprising at least one battery string, wherein the battery string comprises at least two of the above-mentioned heterojunction batteries.

[0027] A fourth aspect of an embodiment of the present application provides a photovoltaic system, comprising the aforementioned photovoltaic component.

[0028] Beneficial effects of the above-mentioned heterojunction battery and its manufacturing method, photovoltaic module and photovoltaic system:

[0029] By arranging the transparent conductive oxide pattern and the anti-reflection layer in different areas on the surface of the first transparent conductive oxide layer away from the substrate, the transparent conductive oxide pattern and the first transparent conductive oxide layer form a transparent conductive oxide layer on the light-receiving side of the heterojunction battery. In this way, a part of the light-receiving side of the heterojunction battery is arranged as an anti-reflection layer. When the transparent conductive oxide layer has the same thickness, compared with the related art in which the transparent conductive oxide layer is arranged on the entire light-receiving side, the parasitic absorption of the transparent conductive oxide layer on the light-receiving side of the heterojunction battery can be reduced due to the reduction of the arrangement area of ​​the transparent conductive oxide layer on the light-receiving side of the heterojunction battery. In addition, the anti-reflection layer can also reduce the reflectivity of the absorbed light, increase the short-circuit current, and optimize the optical performance of the heterojunction battery. In addition, the first transparent conductive oxide layer is arranged below the transparent conductive oxide pattern, which takes into account the improvement of the carrier transmission performance and the reduction of the contact resistance, and can ensure that the electrical performance of the heterojunction battery does not decrease. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of the structure of a heterojunction battery provided in an embodiment of the present application;

[0031] Figure 2A schematic diagram of a process for manufacturing a heterojunction battery provided in an embodiment of the present application;

[0032] Figure 3 A schematic diagram of the structure of a substrate in a method for manufacturing a heterojunction battery provided in an embodiment of the present application;

[0033] Figure 4 A schematic diagram of a structure in which a transparent conductive oxide pattern and an anti-reflection layer are formed on a first transparent conductive oxide layer in a method for manufacturing a heterojunction battery provided in an embodiment of the present application;

[0034] Figure 5 A schematic diagram of the structure of manufacturing a first metal electrode and a second metal electrode in the method for manufacturing a heterojunction battery provided in an embodiment of the present application.

[0035] Description of Figure Numbers:

[0036] 100. Heterojunction battery; 101. Substrate;

[0037] 10. substrate; 20. first intrinsic amorphous silicon layer; 30. first silicon material layer; 40. first transparent conductive oxide layer; 50. transparent conductive oxide pattern; 60. anti-reflection layer; 70. second intrinsic amorphous silicon layer; 80. second silicon material layer; 90. second transparent conductive oxide layer; 91. first metal electrode; 92. second metal electrode;

[0038] C1, first side surface; C2, second side surface. DETAILED DESCRIPTION

[0039] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0040] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0041] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0042] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0043] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0044] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used herein are for illustrative purposes only and are not intended to be the only implementation method.

[0045] The heterojunction battery and its manufacturing method, photovoltaic module and photovoltaic system of the embodiments of the present application are described below with reference to the accompanying drawings.

[0046] Figure 1 A schematic diagram of the structure of a heterojunction battery 100 provided in an embodiment of the present application.

[0047] Reference Figure 1In a first aspect, an embodiment of the present application provides a heterojunction battery 100, which includes a substrate 10, a first intrinsic amorphous silicon layer 20, a first silicon material layer 30 and a first transparent conductive oxide layer 40 stacked in sequence on a first side surface C1 of the substrate 10.

[0048] The heterojunction cell 100 further includes a transparent conductive oxide pattern 50, an anti-reflection layer 60 and a first metal electrode 91. The transparent conductive oxide pattern 50 and the anti-reflection layer 60 are arranged in different areas on the surface of the first transparent conductive oxide layer 40 facing away from the substrate 10. The first metal electrode 91 is stacked on the surface of the transparent conductive oxide pattern 50 facing away from the substrate 10.

[0049] Here, the first side may be, for example, the light-receiving side of the heterojunction cell 100, and the second side is disposed opposite to the first side, for example, may be the backlight side. The transparent conductive oxide pattern 50 and the anti-reflection layer 60 are disposed in different regions on the surface of the first transparent conductive oxide layer 40 away from the substrate 10, which means that when viewed from above, the transparent conductive oxide pattern 50 and the anti-reflection layer 60 do not overlap each other and are located in different regions. The transparent conductive oxide pattern 50 and the anti-reflection layer 60 may be located in the same layer.

[0050] By arranging the transparent conductive oxide pattern 50 and the anti-reflection layer 60 in different areas on the surface of the first transparent conductive oxide layer 40 away from the substrate 10, the transparent conductive oxide pattern 50 and the first transparent conductive oxide layer 40 form a transparent conductive oxide layer on the light-receiving side of the heterojunction battery 100. In this way, a part of the light-receiving side of the heterojunction battery 100 is arranged as the anti-reflection layer 60. Under the condition of the same thickness of the transparent conductive oxide layer, compared with the related art in which the transparent conductive oxide layer is arranged on the entire light-receiving side, the parasitic absorption of the transparent conductive oxide layer can be reduced due to the reduction of the arrangement area of ​​the transparent conductive oxide layer on the light-receiving side of the heterojunction battery 100. In addition, the anti-reflection layer 60 can also reduce the reflectivity of the absorbed light, increase the short-circuit current, and optimize the optical performance of the heterojunction battery 100. In addition, the first transparent conductive oxide layer 40 is arranged below the transparent conductive oxide pattern 50, which takes into account the improvement of the carrier transmission performance and the reduction of the contact resistance, and can ensure that the electrical performance of the heterojunction battery 100 is not reduced.

[0051] In other words, the metal contact area below the first metal electrode 91 layer is a transparent conductive oxide pattern 50, and the non-gridline area (non-metal electrode area) is an anti-reflection layer 60. Compared with the design of the entire transparent conductive oxide layer, the design of the patterned transparent conductive oxide pattern 50 in this application is conducive to reducing parasitic absorption, and the anti-reflection layer 60 has an excellent anti-reflection effect, which further improves the spectral absorption capacity of the battery. The patterned transparent conductive oxide pattern 50 and the anti-reflection layer 60 and other film layers are arranged below the substrate 10, which is conducive to the longitudinal transmission and collection of carriers in the doping layer, and can improve the electrical performance of the heterojunction battery 100.

[0052] In the embodiment of the present application, the first transparent conductive oxide layer 40 can be disposed on the entire first side (light receiving side) of the heterojunction cell 100 to improve carrier transport performance. The anti-reflection layer 60 is disposed in the non-metal electrode region.

[0053] Further, the thickness of the first transparent conductive oxide layer 40 is 20 nm-60 nm, and the thickness of the transparent conductive oxide pattern 50 is 40 nm-100 nm. Further, the thickness of the anti-reflection layer 60 may be, for example, 60 nm-140 nm.

[0054] In the embodiment of the present application, the transparent conductive oxide pattern 50 and the anti-reflection layer 60 are disposed in complementary areas. This means that the outer contours of the transparent conductive oxide pattern 50 and the anti-reflection layer 60 correspond to each other, match each other, and complement each other. For example, the transparent conductive oxide pattern 50 and the anti-reflection layer 60 are both disposed on the first transparent conductive oxide layer 40, and the areas on the surface of the first transparent conductive oxide layer 40 that are not covered by the transparent conductive oxide pattern 50 are all covered by the anti-reflection layer 60.

[0055] Further, the first metal electrode 91 includes at least two main grids (not shown) that are parallel to each other and spaced apart, each main grid is electrically connected to at least two sub-grids (not shown), the number of transparent conductive oxide patterns 50 is at least two, each transparent conductive oxide pattern 50 is spaced apart from each other, and each transparent conductive oxide pattern 50 is arranged one-to-one with each main grid. In other words, one transparent conductive oxide pattern 50 corresponds to one main grid and the sub-grid connected to the main grid, so that on the light-receiving side of the heterojunction battery 100, the patterned transparent conductive oxide patterns 50 and the anti-reflection layer 60 are alternately arranged at intervals.

[0056] In the embodiment of the present application, the projection of the transparent conductive oxide pattern 50 on the first transparent conductive oxide layer 40 covers the projection of the first metal electrode 91 on the first transparent conductive oxide layer 40. Here, the projection of the transparent conductive oxide pattern 50 on the first transparent conductive oxide layer 40 may completely overlap with the projection of the first metal electrode 91 on the first transparent conductive oxide layer 40, that is, the outer contours of the transparent conductive oxide pattern 50 and the first metal electrode 91 are the same when viewed from above. Alternatively, the edge of the projection of the transparent conductive oxide pattern 50 on the first transparent conductive oxide layer 40 may be located outside the edge of the projection of the first metal electrode 91 on the first transparent conductive oxide layer 40, that is, the outer contour range of the transparent conductive oxide pattern 50 is larger than the outer contour range of the first metal electrode 91 when viewed from above.

[0057] In the present application, continue to refer to Figure 1 The heterojunction cell 100 further includes a second intrinsic amorphous silicon layer 70, a second silicon material layer 80, and a second transparent conductive oxide layer 90 which are sequentially stacked on the second side surface C2 of the substrate 10. The doping types of the first silicon material layer 30 and the second silicon material layer 80 are opposite, and the first side surface C1 and the second side surface C2 are arranged oppositely. Exemplarily, the substrate 10 may be an N-type or a P-type. When the substrate 10 is an N-type, the first silicon material layer 30 may be an N-type material layer, and the second silicon material layer 80 may be a P-type material layer.

[0058] Here, the first silicon material layer 30 may be, for example, N-type doped amorphous silicon or N-type doped microcrystalline silicon, and the second silicon material layer 80 may be, for example, P-type doped amorphous silicon or P-type doped microcrystalline silicon.

[0059] The material of the first transparent conductive oxide layer 40 , the second transparent conductive oxide layer 90 and the transparent conductive oxide pattern 50 may be, for example, indium oxide (ITO), indium oxide (IWO), indium oxide (ICO), or zinc oxide (AZO).

[0060] Further, the anti-reflection layer 60 is configured as a single-layer structure, and the anti-reflection layer 60 includes one of a SiNx layer, a SiOx layer, a SiNxOy layer, and an AlOx layer.

[0061] Alternatively, the anti-reflection layer 60 is constructed as a composite structure layer including at least two of a SiNx layer, a SiOx layer, a SiNxOy layer, and an AlOx layer.

[0062] In the embodiment of the present application, the thickness of the first intrinsic amorphous silicon layer 20 and the second intrinsic amorphous silicon layer 70 may be, for example, 4 nm to 25 nm, and the thickness of the first silicon material layer 30 and the second silicon material layer 80 may be, for example, 8 nm to 35 nm.

[0063] The thickness of the second transparent conductive oxide layer 90 is 60 nm-150 nm.

[0064] Figure 2 A schematic diagram of a process for manufacturing a heterojunction battery provided in an embodiment of the present application; Figure 3 A schematic diagram of the structure of a substrate in a method for manufacturing a heterojunction battery provided in an embodiment of the present application; Figure 4 A schematic diagram of a structure in which a transparent conductive oxide pattern 50 and an anti-reflection layer 60 are formed on a first transparent conductive oxide layer 40 in a method for manufacturing a heterojunction battery provided in an embodiment of the present application; Figure 5 This is a schematic diagram of the structure of manufacturing a first metal electrode 91 and a second metal electrode 92 in the manufacturing method of a heterojunction battery provided in an embodiment of the present application.

[0065] Combination Figure 2-Figure 5 The second aspect of the embodiment of the present application further provides a method for manufacturing a heterojunction battery, the method comprising:

[0066] S10. Provide a substrate, comprising a base 10, a first intrinsic amorphous silicon layer 20, a first silicon material layer 30 and a first transparent conductive oxide layer 40 stacked in sequence on a first side surface C1 of the base 10, and a second intrinsic amorphous silicon layer 70, a second silicon material layer 80 and a second transparent conductive oxide layer 90 stacked in sequence on a second side surface C2 of the base 10, wherein the doping types of the first silicon material layer 30 and the second silicon material layer 80 are opposite, and the first side surface C1 and the second side surface C2 are arranged opposite to each other.

[0067] S20 , forming a transparent conductive oxide pattern 50 and an anti-reflection layer 60 on different regions of the surface of the first transparent conductive oxide layer 40 facing away from the substrate 10 .

[0068] S30 , forming a first metal electrode 91 on a surface of the transparent conductive oxide pattern 50 facing away from the substrate 10 .

[0069] By forming a transparent conductive oxide pattern 50 and an anti-reflection layer 60 on different regions of the surface of the first transparent conductive oxide layer 40 away from the substrate 10, and forming a first metal electrode 91 on the surface of the transparent conductive oxide pattern 50 away from the substrate 10, the transparent conductive oxide pattern 50 and the first transparent conductive oxide layer 40 form a transparent conductive oxide layer on the light-receiving side of the heterojunction battery 100. In other words, by setting a part of the light-receiving side of the heterojunction battery 100 as the anti-reflection layer 60, when the transparent conductive oxide layer has the same thickness, compared with setting the transparent conductive oxide layer on the entire light-receiving side in the related art, the parasitic absorption of the transparent conductive oxide layer on the light-receiving side of the heterojunction battery 100 can be reduced due to the reduction of the setting area of ​​the transparent conductive oxide layer on the light-receiving side. In addition, the anti-reflection layer 60 can also reduce the reflectivity of the absorbed light, increase the short-circuit current, and optimize the optical performance of the heterojunction battery 100. In addition, the first transparent conductive oxide layer 40 is disposed under the transparent conductive oxide pattern 50 , which takes into account both the improvement of carrier transport performance and the reduction of contact resistance, and can ensure that the electrical performance of the heterojunction battery 100 is not reduced.

[0070] Furthermore, in step S20, the step of forming a transparent conductive oxide pattern 50 and an anti-reflection layer 60 on different regions of the surface of the first transparent conductive oxide layer 40 away from the substrate 10 specifically includes:

[0071] A transparent conductive oxide pattern 50 is formed on a surface of the first transparent conductive oxide layer 40 facing away from the substrate 10 by using a mask method.

[0072] The anti-reflection layer 60 is formed on a region of the first transparent conductive oxide layer 40 that is not covered by the transparent conductive oxide pattern 50 on the surface facing away from the substrate 10 .

[0073] In this way, the transparent conductive oxide pattern 50 and the anti-reflection layer 60 may be formed to have complementary patterns.

[0074] Reference Figure 3 In the embodiment of the present application, in step S10, the step of providing a substrate 101 specifically includes:

[0075] A first intrinsic amorphous silicon layer 20 and a second intrinsic amorphous silicon layer 70 are respectively formed on a first side surface C1 and a second side surface C2 of the substrate 10, and the first side surface C1 and the second side surface C2 are arranged opposite to each other;

[0076] A first silicon material layer 30 is formed on a surface of the first intrinsic amorphous silicon layer 20 away from the substrate 10, and a second silicon material layer 80 is formed on a surface of the second intrinsic amorphous silicon layer 70 away from the substrate 10;

[0077] The second transparent conductive oxide layer 90 is formed on the surface of the second silicon material layer 80 facing away from the substrate 10 , and the first transparent conductive oxide layer 40 is formed on the surface of the first silicon material layer 30 facing away from the substrate 10 .

[0078] Furthermore, in step S30, after the step of forming the first metal electrode 91 on the surface of the transparent conductive oxide pattern 50 facing away from the substrate 10, the method further includes:

[0079] A second metal electrode 92 is formed on a surface of the second transparent conductive oxide layer 90 facing away from the substrate 10 .

[0080] A specific example is given below to illustrate the method for manufacturing a heterojunction battery according to an embodiment of the present application. The method includes:

[0081] Step 1: Reference Figure 3 , using a silicon wafer as the substrate 10, and texturing the silicon wafer on both sides, the obtained textured morphology includes positive and inverted pyramid geometric figures. The pyramid size is 0.5μm-10μm, and the reflectivity of the first side surface C1 of the substrate 10, i.e., the light-receiving side surface, is 6%-16%. In addition, the texturing process is a chemical wet process, and the texturing is easy to perform using an alkaline solution or an acid.

[0082] Step 2: Reference Figure 3 , intrinsic amorphous silicon is formed on the first side surface C1 and the second side surface C2 of the substrate 10 as a first intrinsic amorphous silicon layer 20 and a second intrinsic amorphous silicon layer 70, respectively. N-type doped amorphous silicon or microcrystalline silicon is formed on the surface of the first intrinsic amorphous silicon layer 20 away from the substrate 10 as the first silicon material layer 30, and P-type doped amorphous silicon or microcrystalline silicon is formed on the surface of the second intrinsic amorphous silicon layer 70 away from the substrate 10 as the second silicon material layer 80. The equipment used in step 2 is a plasma enhanced chemical vapor deposition PECVD equipment or a hot wire chemical vapor deposition HWCVD equipment. The thickness of the first intrinsic amorphous silicon layer 20 and the second intrinsic amorphous silicon layer 70 can be, for example, 4nm-25nm, and the thickness of the first silicon material layer 30 and the second silicon material layer 80 can be, for example, 8nm-35nm.

[0083] Step 3: Reference Figure 3 A second transparent conductive oxide layer 90 is formed on the surface of the second silicon material layer 80 away from the substrate 10, the equipment used is a physical vapor deposition equipment PVD equipment or a reactive plasma deposition RPD equipment, and the thickness of the second transparent conductive oxide layer 90 is 60-150nm. A first transparent conductive oxide layer 40 is formed on the surface of the first silicon material layer 30 away from the substrate 10, the equipment used is a physical vapor deposition PVD equipment or a ROD equipment, and the thickness of the first transparent conductive oxide layer 40 is 20-60nm.

[0084] Step 4: Reference Figure 4A transparent conductive oxide pattern 50 and an anti-reflection layer 60 are formed in different areas of the surface of the first transparent conductive oxide layer 40 away from the substrate 10 by a mask method, wherein the thickness of the transparent conductive oxide pattern 50 is 40nm-100nm, and the deposition equipment is a PVD equipment or an RPD equipment. The anti-reflection layer 60 is deposited by a mask method, and the anti-reflection layer 60 includes but is not limited to a SiNx single layer or a stacked layer, a SiNx and SiOx stacked layer, a SiNxOy and SiNx stacked layer, or an AlOx and SiNx stacked layer, wherein the anti-reflection layer 60 and the transparent conductive oxide pattern 50 are complementary, and the equipment used to form the anti-reflection layer 60 is a low-temperature PECVD equipment or a low-temperature APCVD equipment, etc., and the total film thickness of the anti-reflection layer 60 is 60n-140nm.

[0085] Step 5: Reference Figure 5 A first metal electrode 91 is formed on the surface of the transparent conductive oxide pattern 50 facing away from the substrate 10 . A second metal electrode 92 is formed on the surface of the second transparent conductive oxide layer 90 facing away from the substrate 10 .

[0086] The third aspect of the present application also provides a photovoltaic module, which includes at least one battery string, and the battery string includes at least two heterojunction batteries 100 as described above, and the heterojunction batteries 100 can be connected together by string welding, so as to collect the electric energy generated by the single heterojunction battery 100 for subsequent transmission. Of course, the heterojunction batteries 100 can be arranged at intervals or stacked together in a shingled form.

[0087] For example, the photovoltaic module further includes an encapsulation layer and a cover plate, wherein the encapsulation layer is used to cover the surface of the battery string, and the cover plate is used to cover the surface of the encapsulation layer away from the battery string.

[0088] A fourth aspect of the present application also provides a photovoltaic system, comprising the above-mentioned photovoltaic module.

[0089] Photovoltaic systems can be used in photovoltaic power stations, such as ground power stations, rooftop power stations, water power stations, etc., and can also be used in equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it is understandable that the application scenarios of photovoltaic systems are not limited to this, that is to say, photovoltaic systems can be used in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic components. For example, multiple photovoltaic components can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to realize solar power supply.

[0090] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0091] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A heterojunction battery, characterized in that: It comprises a substrate, a first intrinsic amorphous silicon layer, a first silicon material layer and a first transparent conductive oxide layer which are sequentially stacked and arranged on a first side surface of the substrate; The heterojunction cell further comprises a transparent conductive oxide pattern, an anti-reflection layer and a first metal electrode, wherein the transparent conductive oxide pattern and the anti-reflection layer are arranged at different regions on a surface of the first transparent conductive oxide layer away from the substrate, and the first metal electrode layer is stacked on a surface of the transparent conductive oxide pattern away from the substrate; The transparent conductive oxide pattern and the anti-reflection layer are disposed in complementary areas; The transparent conductive oxide patterns and the anti-reflection layers are arranged alternately, and the transparent conductive oxide patterns are disposed under the first metal electrode.

2. The heterojunction battery according to claim 1, characterized in that: The anti-reflection layer is arranged in the area of ​​the non-metal electrode.

3. The heterojunction battery according to claim 1, characterized in that: A projection of the transparent conductive oxide pattern on the first transparent conductive oxide layer covers a projection of the first metal electrode on the first transparent conductive oxide layer.

4. The heterojunction battery according to claim 1, characterized in that: The first metal electrode comprises at least two main grids which are parallel to each other and spaced apart, and each of the main grids is electrically connected to at least two sub-grids; The number of the transparent conductive oxide patterns is at least two, the transparent conductive oxide patterns are arranged at intervals from each other, and the transparent conductive oxide patterns are arranged in one-to-one correspondence with the main grids.

5. The heterojunction battery according to claim 1, characterized in that: The anti-reflection layer is constructed as a single-layer structure, and the anti-reflection layer includes one of a SiNx layer, a SiOx layer, a SiNxOy layer, and an AlOx layer; or The anti-reflection layer is configured as a composite structure layer including at least two of a SiNx layer, a SiOx layer, a SiNxOy layer, and an AlOx layer.

6. The heterojunction battery according to any one of claims 1 to 5, characterized in that: The thickness of the first transparent conductive oxide layer is 20nm-60nm, and the thickness of the transparent conductive oxide pattern is 40nm-100nm.

7. The heterojunction battery according to any one of claims 1 to 5, characterized in that: The transparent conductive oxide pattern and the anti-reflection layer have the same thickness.

8. The heterojunction battery according to any one of claims 1 to 5, characterized in that: The first side surface is a light-receiving side surface.

9. The heterojunction battery according to any one of claims 1 to 5, characterized in that: The first transparent conductive oxide layer is disposed entirely on the first side of the heterojunction cell.

10. A photovoltaic module, characterized in that: The method comprises at least one battery string, wherein the battery string comprises at least two heterojunction batteries according to any one of claims 1 to 9.

11. A photovoltaic system, characterized in that: The invention comprises the photovoltaic module as claimed in claim 10.

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