System and method for data regulators for inverter for electric vehicles

Abstract

A system includes an inverter configured to convert DC power from a battery to AC power to drive a motor, where the inverter includes: an upper phase controller configured to store upper phase data; a lower phase controller configured to store lower phase data, and an upper phase controller configured to store lower phase data; and a data coherence interface providing a communication interface between the upper phase controller and the lower phase controller for data coherence between the stored upper phase data and the stored lower phase data.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. non-provisional patent application No. 18 / 065,729 filed on December 14, 2022, which claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 377,486 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,501 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,512 filed on September 28, 2022, and U.S. Provisional Patent Application No. 63 / 378,601 filed on October 6, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of the present disclosure relate generally to systems and methods for data logging for inverters for electric vehicles, and more particularly to techniques for maintaining coherence between data saved in integrated circuits in the event of a failure. Background Art

[0004] Inverters, such as those used to drive motors in electric vehicles, are responsible for converting high voltage direct current (HVDC) to alternating current (AC) to drive the motor. For example, in an inverter, such as a three-phase motor controller, determining the cause of a problem can be difficult if a fault occurs in the system that prevents correct operation.

[0005] The present disclosure is directed to overcoming one or more of these aforementioned challenges. Summary of the invention

[0006] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: an upper phase controller configured to store upper phase data; a lower phase controller configured to store lower phase data; and a data coherence interface providing a communication interface between the upper phase controller and the lower phase controller for data coherence between the stored upper phase data and the stored lower phase data.

[0007] In some aspects, the technology described herein relates to a system further comprising: an electrical isolator that separates a high voltage region from a low voltage region, wherein the upper phase controller includes a low voltage upper phase controller in the low voltage region and a high voltage upper phase controller in the high voltage region, and wherein the lower phase controller includes a low voltage lower phase controller in the low voltage region and a high voltage lower phase controller in the high voltage region.

[0008] In some aspects, the technology described herein relates to a system wherein a low voltage upper phase controller is configured to store upper phase data; a low voltage lower phase controller is configured to store stored lower phase data; and a data coherence interface provides a communication interface between the low voltage upper phase controller and the low voltage lower phase controller for data coherence between the stored upper phase data and the stored lower phase data.

[0009] In some aspects, the technology described herein relates to a system, the system further comprising: a point-of-use upper phase controller, which is configured to communicate with a high voltage upper phase controller, wherein the point-of-use upper phase controller is configured to provide the high voltage upper phase controller with one or more of a temperature of an upper phase power switching device of an inverter or a current level in the upper phase power switching device of the inverter for upper phase data; and a point-of-use lower phase controller, which is configured to communicate with the high voltage lower phase controller, wherein the point-of-use lower phase controller is configured to provide the high voltage lower phase controller with one or more of a temperature of a lower phase power switching device of an inverter or a current level in the lower phase power switching device of the inverter for lower phase data.

[0010] In some aspects, the technology described herein relates to a system further comprising: an inverter controller, wherein the data coherence interface further provides a communication interface between the upper phase controller, the lower phase controller, and the inverter controller.

[0011] In some aspects, the technology described herein relates to a system further comprising: an upper serial peripheral interface (SPI); and a lower serial peripheral interface (SPI), wherein the upper SPI and the lower SPI provide communication interfaces from the inverter controller to the upper phase controller and the lower phase controller, respectively.

[0012] In some aspects, the technology described herein relates to a system in which an upper phase controller and a lower phase controller are configured to use a data coherency interface to signal an inverter controller to read stored upper phase data and stored lower phase data using an upper SPI and a lower SPI, respectively.

[0013] In some aspects, the technology described herein relates to a system in which an upper phase controller and a lower phase controller are configured to periodically update stored upper phase data and stored lower phase data.

[0014] In some aspects, the technology described herein relates to a system in which each of an upper phase controller and a lower phase controller is configured to use a data coherence interface to signal the other of the upper phase controller and the lower phase controller to freeze stored upper phase data and stored lower phase data such that periodic updates are stopped.

[0015] In some aspects, the technology described herein relates to a system in which an upper phase controller and a lower phase controller are configured to use a data coherence interface to signal an inverter controller to read stored upper phase data and stored lower phase data when periodic updates are stopped.

[0016] In some aspects, the technology described herein relates to a system in which an upper phase controller and a lower phase controller are configured to use a data coherence interface to signal the other of the upper phase controller and the lower phase controller to freeze stored upper phase data and stored lower phase data when a fault is detected by the corresponding upper phase controller or the lower phase controller.

[0017] In some aspects, the technology described herein relates to a system wherein one or more of the upper phase data or the lower phase data includes one or more of a commanded pulse width modulation (PWM) on-time, a commanded PWM duty cycle, a temperature of a power switching element of an inverter, a current level in a power switching element of the inverter, a type of fault, or a diagnostic associated with the fault.

[0018] In some aspects, the technology described herein relates to a system wherein an upper phase controller and a lower phase controller are configured to store one or more of a commanded PWM on-time or a commanded PWM duty cycle at a certain PWM rate, and wherein the upper phase controller and the lower phase controller are configured to align corresponding stored upper phase data and stored lower phase data in time with one or more of the commanded PWM on-time or the commanded PWM duty cycle.

[0019] In some aspects, the technology described herein relates to a system that further includes a battery configured to supply DC power to the inverter and a motor configured to receive AC power from the inverter to drive the motor.

[0020] In some aspects, the technology described herein relates to a first phase controller for an inverter for an electric vehicle, the first phase controller being configured to: store data related to the first phase controller and periodically update the stored data; and one or more of the following: detect a fault and, when the fault is detected, provide a signal to a second phase controller for the inverter to freeze the stored data in the second phase controller; or receive a signal from the second phase controller to freeze the stored data in the first phase controller so that periodic updates are stopped.

[0021] In some aspects, the techniques described herein relate to a first phase controller, wherein the first phase controller is further configured to provide a signal to an inverter controller for an inverter to read stored data in the first phase controller and stored data in a second phase controller.

[0022] In some aspects, the technology described herein relates to a method comprising: storing, by a first phase controller for an inverter for an electric vehicle, data related to the first phase controller and periodically updating the stored data; detecting a fault by the first phase controller; and providing, by the first phase controller, a signal to a second phase controller for the inverter when the fault is detected to freeze the stored data in the second phase controller.

[0023] In some aspects, the technology described herein relates to a method, further comprising providing, by a first phase controller, a signal to an inverter controller for an inverter to read stored data in the first phase controller and stored data in a second phase controller.

[0024] In some aspects, the technology described herein relates to a method further comprising: receiving, by the first phase controller, a signal from the second phase controller to freeze stored data in the first phase controller such that periodic updates are stopped.

[0025] In some aspects, the technology described herein relates to a method, which further includes: receiving, by a first phase controller, data related to a power switching device for an inverter from a point-of-use phase controller for the inverter; and updating stored data in the first phase controller with the received data related to the power switching device for the inverter.

[0026] Other objects and advantages of the disclosed embodiments will be described in part in the following description, and in part will be obvious from the description, or can be understood by practicing the disclosed embodiments. The objects and advantages of the disclosed embodiments will be realized and achieved by means of the elements and combinations particularly pointed out in the appended claims.

[0027] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various exemplary embodiments and, together with the description, serve to explain the principles of the disclosed embodiments.

[0029] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter is depicted according to one or more embodiments.

[0030] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 An exemplary system infrastructure of a combined inverter and converter.

[0031] Figure 3 Describes a method for Figure 2 An exemplary system infrastructure for a controller of FIG.

[0032] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure for a point-of-use switching controller.

[0033] Figure 5 Describes a method for Figure 4 An exemplary system infrastructure of an upper power module.

[0034] Figure 6 An exemplary system infrastructure for an inverter with a data coherence interface according to one or more embodiments is depicted.

[0035] Figure 7 Depicted are exemplary methods for recording data using a data coherence interface in accordance with one or more embodiments. DETAILED DESCRIPTION

[0036] Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not constrain the claimed features. As used herein, the terms "comprises," "comprising," "has," "having," "includes," "including," or other variations thereof are intended to encompass non-exclusive inclusions such that a process, method, article, or device that includes a series of elements includes not only those elements, but may also include other elements that are not explicitly listed or inherent to such process, method, article, or device. In the present disclosure, unless otherwise stated, relative terms (such as, for example, "about," "substantially," and "approximately") are used to indicate possible ±10% variations in the stated values. In the present disclosure, unless otherwise stated, any numerical value may include possible ±10% variations in the stated values.

[0037] The terms used below may be interpreted in their broadest reasonable manner, although they are being used in conjunction with a detailed description of certain specific examples of the present disclosure. Indeed, certain terms may even be emphasized below; however, any term intended to be interpreted in any constrained manner will be explicitly and specifically defined as such in this detailed description. For example, in the context of the present disclosure, a switching device may be described as a switching element or device, but may refer to any device for controlling power flow in a circuit. For example, a switching element may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT) or a relay, or any combination thereof, but is not limited thereto.

[0038] Various embodiments of the present disclosure relate generally to systems and methods for data logging for inverters for electric vehicles, and more particularly to techniques for maintaining coherence between data saved in integrated circuits in the event of a failure.

[0039] Inverters (such as those used to drive motors in electric vehicles) are responsible for converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. A three-phase inverter may include a bridge having six power device switches (e.g., power transistors such as IGBTs or MOSFETs) that are controlled by pulse width modulation (PWM) signals generated by a controller. The inverter may include three half-H-bridge switches to control phase voltages, upper and lower gate drivers to control the switches, a PWM controller, and glue logic between the PWM controller and the gate driver. The PWM controller may generate signals to define the expected state of the system. The gate driver may send signals from the PWM controller to the half-H-bridge switches. The half-H-bridge switches may drive the phase voltages. The inverter may include an isolation barrier between a low voltage plane and a high voltage plane. The signal may be passed from the PWM controller to the half-H-bridge switch by passing through the isolation barrier, which may employ optical, converter-based, or capacitor-based isolation. The PWM signal may be distorted when passing through the glue logic, which may include resistive, capacitive, or other types of filtering. Due to the electrical isolation barrier and other delays within the gate driver, the PWM signal may be distorted when passing through the gate driver. The PWM signal may be distorted when the signal is processed by the half-H switching element via the gate driver output.

[0040] Gate drivers withstand common-mode transients that occur during field effect transistor (FET) switching and when one side of a floating high voltage terminal is shorted to ground or subjected to electrostatic discharge. These voltage transients can cause fast edges that can form common-mode current bursts through electrical isolation. Gate drivers may need to demonstrate common-mode transient immunity (CMTI) in order to be effective and safe.

[0041] The gate driver may have a high voltage domain in common with the voltage plane of the associated FET. Further, the high voltage plane may be supplied by a flyback converter, which may be isolated from the low voltage plane by a transformer. The high voltage domain power supply may be used to provide power to such a circuit that sources and sinks gate current to drive the FET and can detect FET faults, thereby acting on the faults and / or transmitting the faults to the low voltage domain. The gate driver may include an electrical channel dedicated to FET commands, and one or more bidirectional or unidirectional electrical channels dedicated to FET communications.

[0042] High current switching transients can form strong electromagnetic (EM) fields that can couple into nearby metal traces. The magnitude and frequency of the coupled current can depend on the layout of the FET packaging solution and the direction and length of the metal traces between the FET and the control integrated circuit (IC). For example, a typical value for the coupled current can be up to 1A at an AC frequency of up to 100MHz. Typically, within the circuit, the gate driver IC can be placed far enough away from the FET so that the high EM field is not directly coupled into the internal metal traces within the gate driver IC. The gate driver is placed at a distance from the EM field so that the induced current within the circuit is below the level that will cause the gate driver to malfunction, or a metal shield is placed between the gate driver and the source of the EM field to protect the gate driver circuit. The output terminals of the gate driver connected to the FET are exposed to the EM field at a point where the output terminals are no longer covered by the shield. The gate driver switches large currents (e.g., such as 5A to 15A) through these exposed terminals. The large currents switched are usually larger in magnitude than the EM induced current. The gate driver can overdrive the induced current to maintain control of the FET. The gate driver and the high side of the FET may share a common ground and gate control signal trace, both of which may be susceptible to coupled currents.

[0043] The gate driver can turn on low resistance switches to source and sink gate current. Sometimes a series resistor can be added to limit the gate current. The switched gate current can be greater than the coupling current in order to maintain control of their respective FETs.

[0044] The gate driver may be able to sense the FET operating voltage or current in order to provide feedback and react to faults. An overcurrent fault may typically be detected by sensing the FET drain to source voltage and comparing the sensed voltage to a reference value. The sensed voltage may be heavily filtered to reject coupled currents. Filtering may slow the response to a fault condition, causing a delay in response. For example, the rate of current increase due to a low resistance short may reach damaging levels before being detected by a heavily filtered drain to source voltage detection strategy. The resulting short may damage the FET or the vehicle before being detected and cut off.

[0045] According to one or more embodiments, a FET driver circuit may provide fast overcurrent detection by shunt current sensing, or by diverting a portion of the load current through a parallel FET that may have a current sensing circuit. Utilizing either strategy may require a "point of use IC" in which the sensing circuit is very close to the FET. Even if the point of use IC and the remote controller are resistant to EM fields, the communication between the point of use IC and the remote controller is still susceptible to induced currents. Point of use ICs have been implemented in low EM field applications, such as smart FETs for automotive applications. However, point of use ICs have not yet been used in high EM field applications. High EM fields can be fields that (i) induce a current within the IC that exceeds the operating current of the IC and causes a malfunction, or (ii) induce a differential voltage within the IC that exceeds the operating differential voltage and causes a malfunction. High EM fields can be, for example, fields greater than about 10A or about 100V.

[0046] For example, in a motor controller such as a three-phase inverter, it may be difficult to determine the cause of a problem in the event of a fault in the system that prevents proper operation. This difficulty may be due to a lack of time-aligned parameter data between the upper phase switching element and the lower phase switching element for a sufficient period of time. Therefore, there may not be enough parameter data to understand and re-form the parameter data that caused the improper operation. In addition, some severe faults may cause damage to the gate driver of the motor controller and any information that may have been stored in the gate driver.

[0047] One or more embodiments may store data related to the power switching element in a low voltage region of the controller that is less likely to be affected by a catastrophic failure of the power switching element. One or more embodiments of the present disclosure may store parameter data for debugging improper operation of the motor controller. The parameter data may be stored at a certain periodic rate with a depth of data sufficient to re-form a faulty condition. The stored parameter data may include, for example, one or more of the commanded PWM on time, the commanded PWM duty cycle, the temperature of the power switching element of the controller, the current level in the power switching element, or the type of fault or diagnosis occurring in the controller. The commanded PWM on time and duty cycle calculation may be performed by a controller physically away from the power switching element (such as in a low voltage region of the controller that is less likely to be affected by a catastrophic failure of the power switching element). The commanded PWM on time and duty cycle calculation may be calculated and stored at a certain PWM rate. The controller for a three-phase motor will control both the PWM frequency and the duty cycle. For example, the PWM frequency may be fixed or may be adjusted by the controller based on the RPM of the motor. For example, the PWM rate may range from about 6KHz to about 25KHz. The duty cycle of the PWM pulses can range from 0% duty cycle to 100% duty cycle. For example, the commanded duty cycle can be a function of the motor control algorithm and the desired torque and can be based on a user request. In order to increase the torque output, for the forward direction of the motor, the upper phase switching element duty cycle can be increased to greater than 50% and the lower phase switching element duty cycle can be reduced to less than 50%. For the reverse direction of the motor, the lower phase switching element duty cycle can be increased to greater than 50% and the upper phase duty cycle can be reduced to less than 50%. The current waveform can be managed by the phases of the motor to produce the desired torque. The control methodology may include, for example, space vector modulation or six-step control.

[0048] The temperature and current level of the power switch can be measured locally in the power switch (such as in a power module including both the switch controller and the power switch). Data can be sent periodically from the power module switch controller to the remote controller. For example, data can be sent from the power module switch controller to the remote controller at a rate of approximately 200μs to 300μs. Data can be sent based on a request from the remote controller. Data can be interspersed between other messages being transmitted between the power module switch controller and the remote controller. The periodic data required by the remote controller can be the temperature of the power switch and the measured current level. The 200μs to 300μs rate can provide the remote controller with enough readings to average at least two to three readings to increase noise immunity. When a fault occurs on the high voltage side of the power switch, the data sent from the power module switch controller can be protected by electrical isolation. The data sent from the power module switch controller can be aligned in time with the PWM on-time and PWM period measured in the remote controller. Ideally, data will be returned from the power module switch controller for each PWM cycle. However, for example, for a PWM rate of 25KHz, this would require data to be saved and sent to the remote controller every 40μs. Therefore, since data may not be sent for every PWM cycle, the timestamp of each of the readings received from the power module switching device controller can be used to align the data in time in the upper and lower remote controllers. This allows the data in equivalent register positions in the upper and lower remote controllers to be aligned in time. Each remote controller may be responsible for keeping track of the cumulative PWM on-time and the number of PWM edges that have been observed within the power module switching device controller data reporting cycle. The cumulative on-time and the number of edges between the power module switching device controller data reports can be stored in the upper and lower remote controllers, where the data is aligned in time with the upper and lower parts. This enables post-failure reconstruction and understanding of the conditions before the potential failure. In addition, data alignment occurs in the low voltage domain via independent timestamps within each of the upper and lower remote controllers. For example, if a fault has been detected on an upper or lower phase of a controller, the communication interface between the phases may signal the corresponding remote controller to freeze the saved data so that periodic updates are stopped and alert a higher level controller to read the frozen data, such as via a serial peripheral interface (SPI). This data freeze may keep the data in the upper and lower phases coherent with each other. The upper and lower remote controllers may not allow new data to be accepted until after the higher level controller has read the frozen data. This data freeze may allow the data of interest to be saved and not overwritten by data after the fault.

[0049] An integrated circuit of an inverter of an electric vehicle may store parameter data during operation of the electric vehicle. The integrated circuit may implement a memory management technique for storing parameter data. For example, the integrated circuit may implement a first-in-first-out (FIFO) memory management, in which older data is replaced by newer data. For example, each data register of the FIFO may include a timestamp from a remote controller, an on-time from the remote controller, a PWM edge count from the remote controller, a fault group from the remote controller, a temperature from a power module switching device controller, and other selected data from a power module switching device controller. For example, the FIFO may include five or more data registers. In the event of a fault in one of the integrated circuits, another integrated circuit may remove the parameter data that is time-aligned with the parameter data of the integrated circuit associated with the fault. Therefore, as described above, there may not be enough time-aligned parameter data between the integrated circuits to diagnose the fault. One or more embodiments may provide a technique for recording parameter data in the event of a fault. In this way, one or more embodiments may improve data retention and accuracy and improve fault diagnosis.

[0050] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter according to one or more embodiments is depicted. In the context of the present disclosure, the combined inverter and converter may be referred to as an inverter. Figure 1 As shown, the electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include a component for receiving electric power from an external source and outputting electric power to charge the battery 195 of the electric vehicle 100. For example, the inverter 110 may convert DC power from the battery 195 in the electric vehicle 100 into AC power to drive the motor 190 of the electric vehicle 100, but the embodiment is not limited thereto. For example, the inverter 110 may be bidirectional and may convert DC power into AC power, or convert AC power into DC power, such as during regenerative braking. The inverter 110 may be a three-phase inverter, a single-phase inverter, or a multi-phase inverter.

[0051] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 The electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include an inverter controller 300 ( Figure 314). The inverter 110 may include a low voltage upper phase controller 120 separated from a high voltage upper phase controller 130 by an electrical isolator 150, and an upper phase power module 140. The upper phase power module 140 may include a point-of-use upper phase controller 142 and an upper phase switch 144. The inverter 110 may include a low voltage lower phase controller 125 separated from a high voltage lower phase controller 135 by an electrical isolator 150, and a lower phase power module 145. The lower phase power module 145 may include a point-of-use lower phase controller 146 and a lower phase switch 148. The upper phase switch 144 and the lower phase switch 148 may be connected to a motor 190 and a battery 195. The electrical isolator 150 may be one or more of optical, converter-based, or capacitor-based isolation. For example, the electrical isolator 150 may be one or more capacitors having a value from about 20 fF to about 100 fF, having a breakdown voltage from about 6 kV to about 12 kV. The electrical isolator 150 may include a pair of capacitors, wherein one capacitor in the pair carries an inverted data signal from the other capacitor in the pair to form a differential signal that is rejected for common mode noise. The electrical isolator 150 may include more than one capacitor in series. The electrical isolator 150 may include one capacitor located on a first IC, or may include a first capacitor located on a first IC and a second capacitor located on a second IC that communicates with the first IC.

[0052] The inverter 110 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 150. The inverter controller 300 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the low voltage upper phase controller 120. The low voltage upper phase controller 120 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the high voltage upper phase controller 130. The low voltage upper phase controller 120 may send a signal to and receive a signal from the low voltage lower phase controller 125. The high voltage upper phase controller 130 may be in the high voltage region of the inverter 110. Therefore, the signal between the low voltage upper phase controller 120 and the high voltage upper phase controller 130 passes through the electrical isolator 150. The high voltage upper phase controller 130 may send signals to and receive signals from a point-of-use upper phase controller 142 in the upper phase power module 140. The point-of-use upper phase controller 142 may send signals to and receive signals from an upper phase switch 144. The upper phase switch 144 may be connected to a motor 190 and a battery 195. For example, the upper phase switch 144 and the lower phase switch 148 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 110 may be similar to the upper phase system described above.

[0053] Figure 3 Describes a method for Figure 2 FIG. 3 is an exemplary system infrastructure of an inverter controller 300 . The inverter controller 300 may include one or more controllers.

[0054] The inverter controller 300 may include a set of instructions that can be executed to cause the inverter controller 300 to perform any one or more of the methods or computer-based functions disclosed herein. The inverter controller 300 may operate as a standalone device, or may be connected to other computer systems or peripheral devices, for example using a network.

[0055] In a networked deployment, the inverter controller 300 can operate in the capacity of a server, or as a client in a server-client user network environment, or as a peer computer system in a peer (or distributed) network environment. The inverter controller 300 can also be implemented as or incorporated into various devices, such as a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile device, a palmtop computer, a laptop computer, a desktop computer, a communication device, a wireless phone, a landline phone, a control system, a camera, a scanner, a fax machine, a printer, a pager, a personal trusted device, a network device, a network router, a switch or bridge, or any other machine capable of executing a set of instructions (sequentially or otherwise) (the set of instructions specifies the actions to be taken by the machine). In a specific implementation, the inverter controller 300 can be implemented using an electronic device that provides voice, video or data communication. Further, although the inverter controller 300 is illustrated as a single system, the term “system” should also be understood to include any collection of systems or subsystems that individually or jointly execute one or more sets of instructions to perform one or more computer functions.

[0056] like Figure 3 As shown, the inverter controller 300 may include a processor 302, such as a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor 302 may be a component in a variety of systems. For example, the processor 302 may be part of a standard inverter. The processor 302 may be one or more general-purpose processors, digital signal processors, application-specific integrated circuits, field programmable gate arrays, servers, networks, digital circuits, analog circuits, combinations thereof, or other devices now known or later developed for analyzing and processing data. The processor 302 may implement a software program, such as a manually generated (i.e., programmed) code.

[0057] The inverter controller 300 may include a memory 304 that can communicate via a bus 308. The memory 304 may be a main memory, a static memory, or a dynamic memory. The memory 304 may include, but is not limited to, computer-readable storage media, such as various types of volatile and non-volatile storage media, including but not limited to random access memory, read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable read-only memory, flash memory, tape or disk, optical media, etc. In one specific implementation, the memory 304 includes a cache or random access memory for the processor 302. In an alternative specific implementation, the memory 304 is separated from the processor 302, such as a cache memory, system memory, or other memory of the processor. The memory 304 may be an external storage device or database for storing data. Examples include a hard drive, a compact disk ("CD"), a digital video disk ("DVD"), a memory card, a memory stick, a floppy disk, a universal serial bus ("USB") storage device, or any other device operable to store data. The memory 304 is operable to store instructions that can be executed by the processor 302. The functions, actions, or tasks illustrated in the figures or described herein may be performed by the processor 302 executing instructions stored in the memory 304. The functions, actions, or tasks are not related to a particular type of instruction set, storage medium, processor, or processing strategy, and may be performed by software, hardware, integrated circuits, firmware, microcode, etc. operating alone or in combination. Likewise, processing strategies may include multi-processing, multi-tasking, parallel processing, etc.

[0058] As shown, the inverter controller 300 may further include a display 310, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a flat panel display, a solid state display, a cathode ray tube (CRT), a projector, a printer, or other display devices known now or later developed for outputting the determined information. The display 310 may serve as an interface for a user to view the operation of the processor 302, or specifically serve as an interface with the software stored in the memory 304 or in the drive unit 306.

[0059] Additionally or alternatively, the inverter controller 300 may include an input device 312 configured to allow a user to interact with any of the components of the inverter controller 300. The input device 312 may be a numeric keypad, a keyboard or a cursor control device (such as a mouse or a joystick), a touch screen display, a remote control, or any other device operable to interact with the inverter controller 300.

[0060] The inverter controller 300 may also or alternatively include a drive unit 306 implemented as a disk or optical drive. The drive unit 306 may include a computer-readable medium 322 in which one or more sets of instructions 324 (e.g., software) may be embedded. Further, the instructions 324 may embody one or more of the methods or logics described herein. The instructions 324 may reside completely or partially within the memory 304 and / or within the processor 302 during execution by the inverter controller 300. The memory 304 and the processor 302 may also include computer-readable media as described above.

[0061] In some systems, the computer-readable medium 322 includes instructions 324 or receives and executes instructions 324 in response to a propagated signal, so that a device connected to the network 370 can transmit voice, video, audio, images, or any other data through the network 370. Further, the instructions 324 can be transmitted or received through the network 370 and / or using the bus 308 via the communication port or interface 320. The communication port or interface 320 can be part of the processor 302 or can be an independent component. The communication port or interface 320 can be formed in software or can be a physical connector in hardware. The communication port or interface 320 can be configured to connect to the network 370, external media, display 310, or any other component in the inverter controller 300, or a combination thereof. The connection to the network 370 can be a physical connection (such as a wired Ethernet connection) or can be established wirelessly, as described below. Similarly, additional connections to other components of the inverter controller 300 can be physical connections or can be established wirelessly. The network 370 can alternatively be directly connected to the bus 308.

[0062] Although the computer-readable medium 322 is shown as a single medium, the term "computer-readable medium" may include a single medium or multiple media (such as a centralized or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" may also include any medium capable of storing, encoding, or carrying a set of instructions for execution by a processor or causing a computer system to perform any one or more of the methods or operations disclosed herein. The computer-readable medium 322 may be non-transitory and may be tangible.

[0063] Computer readable medium 322 may include solid-state memory, such as a memory card or other package that accommodates one or more non-volatile read-only memories. Computer readable medium 322 may be random access memory or other volatile rewritable memory. Additionally or alternatively, computer readable medium 322 may include magneto-optical or optical media, such as a disk or tape or other storage device for capturing carrier signals (such as signals transmitted through a transmission medium). Digital file attachments to emails or other self-contained information archives or archive sets may be considered distribution media as tangible storage media. Therefore, the present disclosure is considered to include any one or more of computer-readable media or distribution media and other equivalents and successor media in which data or instructions may be stored.

[0064] In alternative implementations, dedicated hardware implementations (such as application specific integrated circuits, programmable logic arrays, and other hardware devices) may be constructed to implement one or more of the methods described herein. Applications that may include the apparatus and systems of various implementations may broadly include a variety of electronic and computer systems. One or more implementations described herein may use two or more specific interconnected hardware modules or devices with associated control and data signals that may be transmitted between and through the modules or as part of an application specific integrated circuit to implement functionality. Thus, the present system encompasses software, firmware, and hardware implementations.

[0065] The inverter controller 300 may be connected to a network 370. The network 370 may define one or more networks, including wired or wireless networks. The wireless network may be a cellular telephone network, an 802.11, 802.16, 802.20, or WiMAX network. Further, such networks may include public networks (such as the Internet), private networks (such as intranets), or combinations thereof and may utilize a variety of networking protocols that are now available or later developed, including but not limited to TCP / IP-based networking protocols. The network 370 may include a wide area network (WAN) (such as the Internet), a local area network (LAN), a campus area network, a metropolitan area network, a direct connection (such as through a universal serial bus (USB) port), or any other network that allows data communication. The network 370 may be configured to couple one computing device to another computing device to enable data communication between devices. The network 370 may generally be enabled to use any form of machine-readable media to transmit information from one device to another. The network 370 may include a communication method by which information can travel between computing devices. The network 370 may be divided into subnetworks. A subnetwork may allow access to all other components connected to it, or a subnetwork may restrict access between components. Network 370 may be considered a public or private network connection and may include, for example, a virtual private network or encryption or other security mechanisms employed over the public Internet.

[0066] According to various implementations of the present disclosure, the methods described herein may be implemented by a software program that can be executed by a computer system. Further, in an exemplary non-limiting implementation, the implementation may include distributed processing, component or object distributed processing, and parallel processing. Alternatively, a virtual computer system process may be constructed to implement one or more of the methods or functionalities described herein.

[0067] Although this specification describes components and functions that can be implemented in a specific implementation with reference to specific standards and protocols, the present disclosure is not limited to such standards and protocols. For example, standards for Internet and other packet-switched network transmissions (e.g., TCP / IP, UDP / IP, HTML, HTTP) represent examples of the prior art. Such standards are periodically replaced by faster or more efficient equivalents having substantially the same functionality. Therefore, alternative standards and protocols having the same or similar functionality as those disclosed herein are considered equivalents thereof.

[0068] It will be appreciated that, in one embodiment, the operations of the methods discussed are performed by an appropriate processor (or processors) of a processing (i.e., computer) system executing instructions (computer readable code) stored in a storage device. It will also be appreciated that the present disclosure is not limited to any particular implementation or programming technique, and that the present disclosure may be implemented using any suitable technique for implementing the functionality described herein. The present disclosure is not limited to any particular programming language or operating system.

[0069] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure of a point-of-use switching controller. For a three-phase inverter, each of the upper phase and the lower phase may include three phases related to phases A, B, and C. For example, the upper phase power module 140 may include an upper phase power module 140A for upper phase A, an upper phase power module 140B for upper phase B, and an upper phase power module 140C for upper phase C. The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switching element 144A. The upper phase power module 140B may include a point-of-use upper phase B controller 142B and an upper phase B switching element 144B. The upper phase power module 140C may include a point-of-use upper phase C controller 142C and an upper phase C switching element 144C. Each of the upper phase A switching member 144A, the upper phase B switching member 144B, and the upper phase C switching member 144C may be connected to the motor 190 and the battery 195 . Figure 4 Details of the upper phase power module 140 are depicted. Although not shown, the lower phase power module 145 may include a similar structure as the upper phase power module 140 for the lower phases A, B, and C.

[0070] Figure 5 Describes a method for Figure 4 Example system infrastructure for the upper power module. For example, Figure 5 Additional details of upper phase power module 140A are provided. Although not shown, upper phase power module 140B, upper phase power module 140C, and respective lower phase power modules of lower phase power module 145 may include components related to Figure 5 The upper phase power module 140A shown in FIG. 1 is similar in structure to the upper phase power module 140A shown in FIG. 1. In addition, the terms "upper", "lower", "northern", and "southern" as used in this disclosure are used for reference only, do not limit the elements to a particular orientation, and are generally interchangeable throughout the text. For example, the upper phase power module 140 may be referred to as a lower phase power module, a northern phase power module, a southern phase power module, a first phase power module, or a second phase power module.

[0071] The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switch 144A. The upper phase A switch 144A may include one or more sets of switches. Figure 5 As shown, the upper phase A switch 144A may include an upper phase A north switch 144A-N and an upper phase A south switch 144A-S. The point-of-use upper phase A controller 142A may include one or more memories, controllers, or sensors. For example, the point-of-use upper phase A controller 142A may include a communication manager 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. The point-of-use upper phase A controller 142A may include a controller 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. Figure 5 More or fewer components than those shown. For example, the point-of-use upper phase A controller 142A may include more or less than two switch controls and diagnostic controllers, and may include more than two thermal sensors.

[0072] The communication manager 405 may control inter-controller communications to and from the point-of-use upper phase A controller 142A and / or may control intra-controller communications between components of the point-of-use upper phase A controller 142A. The functional safety controller 410 may control safety functions of the point-of-use upper phase A controller 142A. For example, the test interface and controller 415 may control test functions of the point-of-use upper phase A controller 142A, such as end-of-line testing in manufacturing. The north thermal sensor 420A may sense the temperature at a first location in the point-of-use upper phase A controller 142A, and the south thermal sensor 420B may sense the temperature at a second location in the point-of-use upper phase A controller 142A. For example, the self-test controller 425 may control self-test functions of the point-of-use upper phase A controller 142A, such as during initialization of the point-of-use upper phase A controller 142A after an inverter 110 power-on event. The command manager 430 may control commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The waveform adjuster 435 may control the waveform timing and shape of the commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The memory 440 may include one or more volatile and non-volatile storage media for the operation of the point-of-use upper phase A controller 142A. The north switch control and diagnostic controller 450N may send one or more signals to the north switch 144A-N to control the operation of the north switch 144A-N, and may receive one or more signals from the north switch 144A-N that provide information about the north switch 144A-N. The south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-S to control the operation of the south switches 144A-S, and may receive one or more signals from the south switches 144A-S providing information about the south switches 144A-S. As described above, the terms "north" and "south" are used for reference only, and the north switch control and diagnostic controller 450N may send one or more signals to the south switches 144A-S, and the south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-N.

[0073] Figure 6 An exemplary system infrastructure for an inverter with a data coherence interface according to one or more embodiments is depicted. Figure 1 As shown, the electric vehicle 100 may include a motor 190 and a battery 195 as well as Figure 6 The inverter 610 shown in FIG. 6A may be similar to the inverter 110 described above and may include an inverter controller 603 (similar to the inverter controller 603 described above) for controlling the inverter 610. Figure 3Inverter 610 may include: a low voltage upper phase controller 620 (similar to low voltage upper phase controller 120) separated from a high voltage upper phase controller 630 (similar to high voltage upper phase controller 130) by an electrical isolator 650 (similar to electrical isolator 150); a point-of-use upper phase controller 642 (similar to point-of-use upper phase controller 142); and an upper phase switch 644 (similar to upper phase switch 144).

[0074] Inverter 610 may include: a low voltage lower phase controller 625 (similar to low voltage lower phase controller 125) separated from a high voltage lower phase controller 635 (similar to high voltage lower phase controller 135) by an electrical isolator 650; a point-of-use lower phase controller 646 (similar to point-of-use lower phase controller 146); and a lower phase switch 648 (similar to lower phase switch 148). Upper phase switch 644 and lower phase switch 648 may be connected to motor 190 via motor phase connection 613.

[0075] The inverter 610 may include an upper supervisory controller 611 that communicates with the inverter controller 603 and the low voltage upper phase controller 620, and a lower supervisory controller 612 that communicates with the inverter controller 603 and the low voltage lower phase controller 625. The inverter 610 may include an upper SPI 615 and a lower SPI 616 that provide communication interfaces from the inverter controller 603 to the low voltage upper phase controller 620 and to the low voltage lower phase controller 625, respectively. The inverter 610 may include a data coherence interface 617 that provides communication interfaces from the low voltage upper phase controller 620 to the inverter controller 603, from the low voltage lower phase controller 625 to the inverter controller 603, from the low voltage upper phase controller 620 to the low voltage lower phase controller 625, and from the low voltage lower phase controller 625 to the low voltage upper phase controller 620.

[0076] Inverter 610 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 650. Inverter controller 603 may be in the low voltage region of inverter 610, and may send signals to and receive signals from a low voltage upper phase controller 620. Low voltage upper phase controller 620 may be in the low voltage region of inverter 610, and may send signals to and receive signals from a high voltage upper phase controller 630. Low voltage upper phase controller 620 may send signals to and receive signals from a low voltage lower phase controller 625.

[0077] The high voltage upper phase controller 630 may be in the high voltage region of the inverter 610. Therefore, signals between the low voltage upper phase controller 620 and the high voltage upper phase controller 630 pass through the electrical isolator 650. The high voltage upper phase controller 630 may send signals to and receive signals from the point-of-use upper phase controller 642.

[0078] The point-of-use upper phase controller 642 may send and receive signals to and from the upper phase switch 644. The upper phase switch 644 may be connected to the motor 190 and the battery 195. For example, the upper phase switch 644 and the lower phase switch 648 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 610 may be similar to the upper phase system described above.

[0079] One or more embodiments of the present disclosure may store parameter data for debugging improper operation of the inverter 610. The parameter data may be stored at a periodic rate with a depth of data sufficient to recreate a faulty condition. The stored parameter data may include one or more of the commanded PWM on-time, the commanded PWM duty cycle, the temperature of the power switching element (e.g., the upper phase switching element 644), the current level in the power switching element, or the type of fault or diagnosis that occurred in the point-of-use phase controller (e.g., the point-of-use upper phase controller 642).

[0080] The commanded PWM on-time and duty cycle calculations may be performed by a controller (e.g., low voltage upper phase controller 620) physically remote from the power switch, such as in a low voltage region of the inverter 610 that is less likely to be affected by a catastrophic failure of the power switch. The commanded PWM on-time and duty cycle calculations may be calculated and stored at a certain PWM rate.

[0081] The temperature and current level of the power switch can be measured locally at the power switch, such as in a power module including a switch controller (e.g., point-of-use upper phase controller 642) and a power switch (e.g., upper phase switch 644). Data can be periodically sent from the switch controller (e.g., point-of-use upper phase controller 642) to a remote controller (e.g., to a high voltage upper phase controller 630 and on to a low voltage upper phase controller 620). When a fault occurs on the high voltage side of the power switch, the data sent from the power switch can be protected by electrical isolation (e.g., electrical isolator 650).

[0082] The data sent from the power switch can be aligned in time with the PWM on-time and PWM period measured in the remote controller (e.g., the low voltage upper phase controller 620). For example, if a fault has been detected on the upper phase controller (e.g., the low voltage upper phase controller 620) or the lower phase controller (e.g., the low voltage lower phase controller 625), the data coherence interface 617 between phases can send a signal to the corresponding remote controller (e.g., the low voltage upper phase controller 620 and the low voltage lower phase controller 625) to freeze the saved data and remind the inverter controller 603 to read the frozen data using SPI 615 and SPI 616. This data freezing can keep the data in the upper and lower phases coherent with each other.

[0083] Figure 7 A method for recording data using a data coherence interface according to one or more embodiments is depicted. The method 700 may include: storing data related to the first phase controller (e.g., the low voltage upper phase controller 620) for the inverter 610 for the electric vehicle 100, and periodically updating the stored data (operation 710). The stored parameter data may include one or more of the commanded PWM on-time, the commanded PWM duty cycle, the temperature of the power switch (e.g., the upper phase switch 644), the current level in the power switch, or the type of fault or diagnosis that occurred in the point-of-use phase controller (e.g., the point-of-use upper phase controller 642).

[0084] The method 700 may include detecting a fault by the first phase controller (operation 720). The method 700 may include providing a signal by the first phase controller to a second phase controller (e.g., the low voltage lower phase controller 625) for the inverter 110 to freeze the stored data in the second phase controller (operation 730). The signal to the second phase controller may be provided using the data coherence interface 617. The method 700 may include providing a signal by the first phase controller to an inverter controller 603 for the inverter 610 to read the stored data in the first phase controller (e.g., the low voltage upper phase controller 620) and the stored data in the second phase controller (e.g., the low voltage lower phase controller 625) (operation 740). The signal to the inverter controller 603 may be provided using the data coherence interface 617, and the inverter controller 603 may read the data using the SPI 615 and the SPI 616.

[0085] The method 700 may include: receiving, by the first phase controller, a signal from the second phase controller to freeze the stored data in the first phase controller so that periodic updates are stopped (operation 750). The signal from the second phase controller may be received using the data coherence interface 617. The method 700 may include: receiving, by the first phase controller, data related to a power switch (e.g., an upper phase switch 644) for the inverter 610 from a point-of-use phase controller (e.g., a point-of-use upper phase controller 642) for the inverter 610 (operation 760). The method 700 may include: updating the stored data in the first phase controller with the received data related to the power switch for the inverter 610 (operation 770). The data related to the power switch may include the temperature and current level of the power switch, which may be measured locally at the power switch (e.g., by the point-of-use upper phase controller 642 for the upper phase switch 644). Data related to the power switches may be sent from the point-of-use upper phase controller 642 to the first phase controller (eg, to the high voltage upper phase controller 630 and on to the low voltage upper phase controller 620 ).

[0086] One or more embodiments may store data related to a power switch in a low voltage region of the controller that is less likely to be affected by a catastrophic failure of the power switch. One or more embodiments of the present disclosure may store parameter data for debugging improper operation of a motor controller. The parameter data may be stored at a periodic rate at a depth sufficient to recreate a faulty condition. One or more embodiments may provide a technique for data logging for an inverter for an electric vehicle. One or more embodiments may provide a technique for maintaining coherence between stored data in an integrated circuit in the event of a fault. In this way, one or more embodiments may improve data retention and accuracy and improve fault diagnosis.

[0087] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

Claims

1. A system comprising: An inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: an upper phase controller configured to store upper phase data; a lower phase controller configured to store lower phase data; and A data coherence interface provides a communication interface between the upper phase controller and the lower phase controller for data coherence between stored upper phase data and stored lower phase data.

2. The system according to claim 1, further comprising: a galvanic isolator that separates a high voltage area from a low voltage area, wherein the upper phase controller comprises a low voltage upper phase controller in the low voltage region and a high voltage upper phase controller in the high voltage region, and The lower phase controller includes a low voltage lower phase controller in the low voltage region and a high voltage lower phase controller in the high voltage region.

3. The system according to claim 2, wherein The low voltage upper phase controller is configured to store the upper phase data; The low voltage lower phase controller is configured to store the stored lower phase data; and The data coherency interface provides a communication interface between the low voltage upper phase controller and the low voltage lower phase controller for data coherency between stored upper phase data and stored lower phase data.

4. The system according to claim 3, further comprising: a point-of-use upper phase controller configured to communicate with the high voltage upper phase controller, wherein the point-of-use upper phase controller is configured to provide one or more of a temperature of an upper phase power switch of the inverter or a current level in an upper phase power switch of the inverter to the high voltage upper phase controller for the upper phase data; as well as A point-of-use lower phase controller is configured to communicate with the high-voltage lower phase controller, wherein the point-of-use lower phase controller is configured to provide the high-voltage lower phase controller with one or more of the temperature of the lower phase power switching device of the inverter or the current level in the lower phase power switching device of the inverter for the lower phase data.

5. The system of claim 1, further comprising: Inverter controller, The data coherence interface further provides a communication interface between the upper phase controller, the lower phase controller and the inverter controller.

6. The system according to claim 5, further comprising: Upper Serial Peripheral Interface (SPI); as well as The lower serial peripheral interface (SPI), The upper SPI and the lower SPI provide communication interfaces from the inverter controller to the upper phase controller and the lower phase controller, respectively.

7. The system of claim 6, wherein the upper phase controller and the lower phase controller are configured to use the data coherence interface to signal an inverter controller to read the stored upper phase data and the stored lower phase data using the upper SPI and the lower SPI, respectively. 8 . The system of claim 1 , wherein the upper phase controller and the lower phase controller are configured to periodically update the stored upper phase data and the stored lower phase data.

9. The system of claim 8, wherein each of the upper phase controller and the lower phase controller is configured to use the data coherence interface to signal the other of the upper phase controller and the lower phase controller to freeze the stored upper phase data and the stored lower phase data so that periodic updates are stopped.

10. The system of claim 9, wherein the upper phase controller and the lower phase controller are configured to use the data coherence interface to signal an inverter controller to read the stored upper phase data and the stored lower phase data when the periodic updating is stopped.

11. The system of claim 10, wherein the upper phase controller and the lower phase controller are configured to use the data coherence interface to signal the other of the upper phase controller and the lower phase controller to freeze the stored upper phase data and the stored lower phase data when a fault is detected by the corresponding upper phase controller or the lower phase controller.

12. A system according to claim 1, wherein one or more of the upper phase data or the lower phase data includes one or more of a commanded pulse width modulation (PWM) on-time, a commanded PWM duty cycle, a temperature of a power switching element of the inverter, a current level in the power switching element of the inverter, a type of fault, or a diagnosis associated with the fault.

13. The system of claim 12, wherein the upper phase controller and the lower phase controller are configured to store one or more of the commanded PWM on-time or the commanded PWM duty cycle at a certain PWM rate, and Wherein the upper phase controller and the lower phase controller are configured to align the corresponding stored upper phase data and the stored lower phase data in time with one or more of the commanded PWM on-time or the commanded PWM duty cycle.

14. The system of claim 1, further comprising: the battery, the battery being configured to supply the DC power to the inverter; as well as The motor is configured to receive the AC power from the inverter to drive the motor.

15. A first phase controller for an inverter for an electric vehicle, the first phase controller being configured to: storing data associated with the first phase controller and periodically updating the stored data; as well as One or more of the following: detecting a fault and providing a signal to a second phase controller for the inverter to freeze stored data in the second phase controller upon detecting the fault; or A signal is received from the second phase controller to freeze the stored data in the first phase controller such that periodic updates are stopped.

16. The first phase controller according to claim 15, wherein the first phase controller is further configured to: A signal is provided to an inverter controller for the inverter to read the stored data in the first phase controller and the stored data in the second phase controller.

17. A method comprising: storing, by a first phase controller for an inverter for an electric vehicle, data associated with the first phase controller and periodically updating the stored data; detecting a fault by the first phase controller; as well as A signal is provided by the first phase controller to a second phase controller for the inverter upon detection of the fault to freeze stored data in the second phase controller.

18. The method according to claim 17, further comprising: A signal is provided by the first phase controller to an inverter controller for the inverter to read the stored data in the first phase controller and the stored data in the second phase controller.

19. The method of claim 17, further comprising: A signal from the second phase controller is received by the first phase controller to freeze the stored data in the first phase controller such that periodic updating is stopped.

20. The method of claim 17, further comprising: receiving, by the first phase controller, data related to a power switch for the inverter from a point-of-use phase controller for the inverter; as well as The stored data in the first phase controller is updated with the received data related to the power switches for the inverter.

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