Generating DC offsets in flux tunable transmitters with sustained current loops

Abstract

A quantum circuit arrangement (200) includes a qubit chip including a plurality of qubits (220) and a plurality of flux tunable couplers (225). A plurality of fixed frequency qubits are arranged in a lattice structure, wherein each pair of the plurality of fixed frequency qubits is coupled to a flux tunable coupler. The wiring layer is coupled to the qubit chip, and the wiring layer includes a loop (210) of superconducting material that is inductively coupled to the flux tunable coupler. A flux bias line (205) is comprised of a superconducting material different from the superconducting material of the loop, wherein the flux bias line is inductively coupled to both the loop and the flux tunable coupler.

Description

Background Art Technical Field

[0001] The present disclosure relates generally to superconducting quantum computing, and more particularly to generating a constant flux offset in a tunable Transmon qubit having a persistent current loop or having a continuous flux bias line coupled to multiple qubits.

[0002] Description of Related Technology

[0003] A flux-tunable qubit (also called a "flux-tunable bus") uses a DC current that generates a flux Φ_0 to adjust the frequency of an object, such as a flux-tunable transporter bus. The DC current flows through a superconducting wire adjacent to the flux-tunable transporter to generate an evanescent magnetic field of flux. However, the DC current can adversely affect the operation of the cryostat by producing undesirable heating. In the bus-below qubit (BBQ) structure, the DC current is adjusted until a minimum ZZ exchange occurs between fixed-frequency qubits (e.g., Q0 and Q1) coupled between flux-tunable transporters. The DC current of the flux-tunable transporter is adjusted to be close to its minimum value, corresponding to the flux Φ_DC. The bias current can range from approximately 100 μA to 1 mA, depending on the device parameters. Due to disorder in device fabrication, each flux-tunable qubit requires a unique magnetic field. These DC currents cause steady-state heating, ground loops, and on-chip crosstalk. Summary of the invention

[0004] According to one embodiment, a quantum circuit device includes a qubit chip, the qubit chip including a plurality of qubits and a plurality of flux-tunable transport sub-couplers. A plurality of fixed frequency transport sub-qubits are arranged in a lattice structure, wherein each pair of the plurality of fixed frequency transport sub-qubits is coupled to a flux-tunable transport coupler. A wiring layer is coupled to the qubit chip, wherein the wiring layer includes a loop composed of a superconducting material, which is inductively coupled to the flux-tunable transport coupler. A flux bias line composed of a superconducting material different from the superconducting material of the loop, wherein the flux bias line is inductively coupled to both the loop and the flux-tunable transport sub-coupler. This configuration provides advantages by reducing the current entering the cryostat, and reduces or eliminates adverse effects on superconducting conduction components due to increased heat.

[0005] In an embodiment, the wiring layer further includes a first flux bias line composed of a first superconducting material and configured to receive a DC current inductively coupled to the first flux tunable transmitter and at least one current pulse (i pulseThe first loop is formed of the second superconducting material and is inductively coupled to the first flux bias line and inductively coupled to the first flux tunable transport. The magnetic field generated from the first flux bias line is configured to induce a persistent current in the first loop formed of the second superconducting material and induce a static flux shift (Φ) through the first flux tunable transport. offset ). This structure provides a compensating flux to reduce the persistent current in the superconducting loop, thereby keeping the temperature within the operable range.

[0006] In an embodiment that may be combined with the preceding embodiment, the signal generation module is configured to provide a DC current to induce a persistent current in the first loop, the signal generation module is configured to adjust the DC current to reduce the always-on entanglement (ZZ) between the pair of fixed-frequency qubits coupled to the first flux-tunable coupler to a minimum value. Advantageously, there is a minimum amount of entanglement ZZ between the fixed-frequency qubits of the flux-tunable transporter to provide a less complex and more efficient structure.

[0007] In an embodiment which may be combined with the preceding embodiment, the signal generation module is configured to provide at least one current pulse (i pulse ), and the value of each current pulse is based on Φ offset The current pulses can provide fine tuning of the current entering the cryostat through the flux lines.

[0008] In an embodiment that may be combined with the previous embodiment, the first superconducting material is niobium and the second conductive material is aluminum. Niobium has a higher T C , while aluminum has a lower T C , and the two metals can be used in corresponding parts. The lower T C Allows continuous current to reset at lower temperatures.

[0009] In an embodiment that may be combined with the previous embodiments, the flux bias line comprises one or more gradient loops. The gradient loops have a structure that reduces crosstalk issues with other loops on the interposer and provides a more efficient operation of the flux tunable transmission.

[0010] In an embodiment that may be combined with the previous embodiment, the first flux tunable transporter and the fixed frequency qubit are arranged in a lattice structure to form a multi-qubit device. The lattice structure can be more efficient, especially in the presence of components of additional size, such as multiple stacks.

[0011] In an embodiment, the flux bias line is a meandering bias line connected to a plurality of flux tunable couplers and is configured to bias the plurality of flux tunable couplers substantially simultaneously.Using a meandering bias line can reduce the amount of crosstalk.

[0012] In an embodiment that may be combined with the previous embodiment, each flux-tunable transporter is capacitively coupled to two fixed-frequency qubits, and each fixed-frequency qubit is capacitively coupled to two flux-tunable transporters. This alternative structure provides greater flexibility in structure and operation.

[0013] In an embodiment that may be combined with the preceding embodiment, global flux lines are arranged on a wiring layer, close to the persistent current loop, configured to receive an input of a DC current and generate a magnetic field within the persistent current loop. Induction from the global flux lines reduces inductive coupling in flux-adjustable transmission. The global flux lines reduce or eliminate parasitic effects of having loops SC1 and SC2 on the same chip.

[0014] In an embodiment which may be combined with the preceding embodiment, the second superconducting material is shorted between two sections of the continuous flux bias line, wherein a loop is formed on each flux bias line. The second superconducting material has a critical temperature (T C ), and is configured to generate a persistent current (i p The continuous current loop is configured to generate a calibrated flux offset (Φ) based on a temperature change applied to the superconducting material in the flux-tunable transporter. offset ). Shorting a first material with a second material allows current to be captured in a less complex manner.

[0015] According to one embodiment, a quantum circuit device includes a qubit chip having a plurality of qubits, and a wiring layer coupled to the qubit chip. The qubit chip includes a plurality of flux adjustable elements, wherein each flux adjustable element includes a corresponding flux adjustable superconducting quantum interference (SQUID) loop, and each flux adjustable element is connected between corresponding pairs of fixed frequency qubits. The wiring layer includes a continuous flux bias line composed of a first superconducting material, the continuous flux bias line is arranged adjacent to the flux adjustable element, and is configured to output a DC current to simultaneously provide an offset to the flux adjustable element. A plurality of flux bias lines are disposed discontinuously with the flux adjustable element, wherein each of the flux bias lines is configured to output a flux pulse and independently offset the current using mutual inductance with the flux adjustable element. This configuration provides advantages by reducing the current entering the cryostat, and reduces or eliminates the adverse effects on superconducting conduction components due to increased heat.

[0016] In one embodiment, a continuous flux bias line is located on a first side of the flux adjustable element and a plurality of non-continuously disposed flux bias lines are adjacent to a second side of the flux adjustable element.

[0017] In an embodiment which may be combined with the preceding embodiments, the plurality of flux bias lines are gradient flux coils.This configuration reduces / eliminates crosstalk due to mutual inductance between the common DC line and the pulse line.

[0018] In one embodiment, the flux couplers on the qubit chip each have two spatially separated pick-up coils that are separately coupled to the adjacent bias line and the independent flux bias lines.

[0019] According to one embodiment, a method of generating a DC offset in a flux tunable element comprises: when the temperature of a first superconducting material is above a critical temperature (T C ), a DC current is input to a flux bias line near the flux adjustable element to inductively couple the flux bias line to the flux adjustable element and a loop around the flux adjustable element composed of a first superconducting material. The flux bias line is composed of a second superconducting material different from the first superconducting material. When the first superconducting material is cooled to a T of the first superconducting material, the flux bias line is inductively coupled to the flux adjustable element and to a loop composed of a first superconducting material surrounding the flux adjustable element. C The method provides a quantum circuit with reduced current flow into the cryostat and reduces or eliminates adverse effects on superconducting conduction components due to increased heat.

[0020] In one embodiment, the DC current is continuously input until the continuous current produces a minimum ZZ exchange rate between a first fixed frequency qubit and a second fixed frequency qubit. The minimum ZZ exchange rate has a minimum amount of entanglement between the fixed frequency qubits to provide a less complex and more efficient structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings are illustrative embodiments. They do not show all embodiments. In addition or as an alternative, other embodiments may be used. Details that may be obvious or unnecessary may be omitted to save space or for more effective description. Some embodiments may be implemented with additional parts or steps and / or without all parts or steps shown. When the same number appears in different drawings, it refers to the same or similar parts or steps.

[0022] Figure 1A and 1B A flux tunable transmitter consistent with an illustrative embodiment and a graph showing an example of a range calculation are shown, respectively.

[0023] Figure 2 A structure for generating a DC offset using a persistent current loop for a flux offset is shown consistent with an exemplary embodiment.

[0024] Figure 3 A structure for generating a continuous current using a continuous flux bias line is shown consistent with an exemplary embodiment.

[0025] Figure 4 Structures for generating a persistent current captured in a short circuit loop for flux excursion are shown consistent with exemplary embodiments.

[0026] Figure 5 A structure including a continuous flux bias line adjacent to a flux tunable transmitter is shown consistent with an exemplary embodiment.

[0027] Figure 6 A structure including a continuous flux bias line with a gradient flux coupler to a flux tunable transmitter is shown consistent with an illustrative embodiment.

[0028] Figure 7 The T of a superconductor including a specific flux bias line consistent with an exemplary embodiment is shown. C Low T C Metal structure.

[0029] Figure 8 shows a lower T consistent with the exemplary embodiment C Short circuit structure.

[0030] Fig. 9 shows a lower T consistent with the exemplary embodiment C Another structure of short circuit.

[0031] Fig.10 A lower T including a current flow path is shown consistent with an exemplary embodiment. C Another short circuit structure.

[0032] Fig.11 A structure using mutual inductance consistent with an exemplary embodiment is shown.

[0033] Fig.12 A structure having magnetic flux lines inductively coupled to a loop that can accommodate a persistent current is shown consistent with an exemplary embodiment.

[0034] Fig.13 A structure including multiple qubits and multiple flux-adjustable buses consistent with the illustrated embodiments is illustrated.

[0035] Fig.14 is a flow chart illustrating a method of generating a DC offset in magnetic flux switching consistent with various exemplary embodiments.

[0036] Fig.15A functional block diagram illustration of a computer hardware platform that can be used to implement a specially configured computing device that can generate a DC offset in a flux tunable plasmon is provided. DETAILED DESCRIPTION

[0037] Overview

[0038] In the following detailed description, many specific details are set forth by way of example to provide a thorough understanding of the relevant teachings. However, it should be understood that the present teachings can be practiced without these details. In other examples, well-known methods, procedures, components and / or circuits have been described at a relatively high level without details to avoid unnecessarily obscuring aspects of the present teachings. It should be understood that the present disclosure is not limited to the depictions in the accompanying drawings, as there may be fewer or more elements than shown and described.

[0039] When discussing the present technology, it may be helpful to describe various significant terms. In one aspect, spatially related terms, such as "front", "rear", "top", "bottom", "below", "lower", "above", "upper", "side", "left", "right", etc., are used with reference to the direction of the accompanying drawings described. Since the components of the embodiments of the present disclosure can be positioned in multiple different directions, the directional terms are used for the purpose of illustration and are by no means limiting. Therefore, it should be understood that the spatially relative terms are intended to include different directions of the device in use or operation except the direction depicted in the figure. For example, if the device in the figure is turned over, the elements described as "below" or "below" other elements or features will be oriented to be "above" other elements or features. Therefore, for example, the term "below" can include the orientation of above as well as below. The device can be oriented in other ways (rotated 90 degrees or observed or referenced in other directions), and the spatially relative descriptors used herein should be interpreted accordingly.

[0040] As used herein, the terms "coupled" and / or "electrically coupled" do not mean that elements must be directly coupled together - intermediate elements may be provided between the "coupled" or "electrically coupled" elements. In contrast, if an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intermediate elements. The term "electrically connected" refers to a low-ohmic electrical connection between elements that are electrically connected together. As used herein, the term "mechanical tolerance" relates to electrical properties that are not significantly affected by mechanical alignment between object components.

[0041] As used herein, certain terms are used to indicate what may be considered idealized behavior, such as "lossless," "superconductor," "superconducting," "absolute zero," which are intended to cover functionality that may not be completely ideal but is within acceptable tolerances for a given application. For example, a certain level of loss or tolerance is acceptable so that the resulting materials and structures may still be referred to by these "idealized" terms.

[0042] Although the terms first, second, third, etc. can be used to describe various elements here, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the exemplary embodiment, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element. As used herein, the term "and / or" includes any and all combinations of one or more associated listed items.

[0043] Exemplary embodiments are described herein with reference to schematic diagrams of idealized or simplified embodiments (and intermediate structures). Thus, variations from the shapes illustrated due to, for example, manufacturing techniques and / or tolerances are to be expected. Thus, the regions shown in the figures are schematic in nature, and their shapes do not necessarily illustrate the actual shape of a region of a device and are not intended to limit the scope.

[0044] It should be understood that other embodiments may be used and structural or logical changes may be made without departing from the spirit and scope defined by the claims. The description of the embodiments is not restrictive. In particular, the elements of the embodiments described below may be combined with elements of different embodiments.

[0045] Superconducting quantum computing is an implementation of a quantum computer in superconducting electronic circuits. Quantum computing studies the application of quantum phenomena in information processing and communication. There are various models of quantum computing, and the most popular models include the concepts of qubits and quantum gates. A qubit is a generalization of a bit that has two possible states, but can be in a quantum superposition of the two states. A quantum gate is a generalization of a logic gate, however, a quantum gate describes the transformation that one or more qubits will undergo after a gate is applied to them, given the initial state of the qubits.

[0046] The ability to include more superconducting qubits is significant for the potential of enabling quantum computers. However, it is challenging to produce a quantum processor on a monolithic qubit chip with desired qubit properties, such as frequency, fidelity, etc. A modular structure consisting of smaller modular units of interconnected devices can make it more feasible to realize a large-scale quantum processor. However, this modular architecture may involve connections between qubits on separate physical chips and / or supporting circuits for the qubit chip. Various quantum phenomena such as superposition and entanglement have no analogs in the classical computing world, and therefore may involve special structures, techniques, and materials in order to assemble electronic devices that can operate in cryogenic environments.

[0047] As used herein, the term "critical temperature" (Tc) is defined as a superconductor having a characteristic temperature below which the electrical resistance suddenly drops to zero. In addition, the term "ZZ" is understood herein to refer to the entanglement ratio between two bits.

[0048] In one aspect, the teachings herein are based on the inventor's insight that, due to the unique challenges presented by quantum circuits that are not presented in classical computing architectures, it may not be effective to directly apply conventional integrated circuit technology for interacting with computing elements to superconducting quantum circuits. In fact, many systems and architectures discussed herein operate in cryogenic environments and may involve superconductivity. Therefore, multiple embodiments of the present disclosure are further based on the following recognition that problems unique to quantum circuits have been considered when assessing the applicability of conventional integrated circuit technology for building superconducting quantum circuits, and specifically, to methods and architectures for selecting multiple components for connecting quantum computers. The technology described herein can be implemented in a variety of ways. Example implementations are provided below with reference to the following drawings.

[0049] According to some embodiments of the present disclosure, by using a continuous current, there is a minimized / reduced current dumped into the cryostat, and the problem of transferring heat to the cryostat is overcome. A large amount of current can be supplemented with a continuous current, and the flux bias of each individual transmission bus can be fine-tuned, because the flux bias of each transmission bus may vary, making it impossible to use a global flux bias. A shared flux bias line is provided for operating a multi-qubit device, and in some embodiments, a gradient flux coupler is present. Embodiments of the present disclosure result in a reduction in on-chip current for each flux line, resulting in a reduction in power consumption for each flux line. The impact of crosstalk between adjacent couplers is reduced as power usage is reduced and heat is reduced, which reduces the problem that current may heat the cryostat.

[0050] Example Architecture

[0051] Figure 1A and 1BA flux tunable transport 100A consistent with an illustrative embodiment is illustrated, and graph 100B shows an example of a range calculation. The present disclosure proposes a number of ways in which a DC offset can be generated to limit the current supplied to the cryostat, which can adversely affect superconductivity. A flux tunable transport 110 is coupled to a first fixed frequency qubit 120 and a second fixed frequency qubit 130. A DC current (iDC) 140 passes through a line representing a cryogenic refrigerator through an inductor 145, and a magnetic field change corresponding to Figure 1B The flux is shown on the x-axis. The minimum value ZZ 150 corresponds to Figure 1A The amount of entanglement between the two qubits 120, 130 shown in is minimal. As a result, the current entering the cryostat will be reduced so that heat does not adversely affect superconducting operation. Additional features of the present disclosure are disclosed herein.

[0052] Example Embodiments

[0053] Figure 2 A structure for generating a DC offset using a continuous current loop for flux offset is shown consistent with an exemplary embodiment. A DC current 203 (iDC) is passed through a superconductor SC 1 The flux bias line 205 is provided by the superconductor SC 2 The loop 210 generates a flux Φ P The opposite current i P Φ P The value of is: Φ P =i DC M 1 , where M 1 is the inductance between the flux bias line 205 and the loop 210. If flux is present during the transition from the normal state to the SC state, the current i P The continuous current i of the loop P Produces a flux through the loop of the flux tunable transmitter; resulting in a flux shift: Φ offset =i p M 3 , where M 3 is the inductance between the flux transporter 220 and the loop 210. Φ is calibrated by thermally cycling the device and repeating the trapping experiment. offset , until ZZ between fixed frequency qubits approaches a minimum. The current pulse i pulse It is also provided through the flux bias line to generate a 2Q gate. The pulse is only offset occurs after, and the device is cold. It should be understood that although Figure 2In FIG. 2 , the wiring layer 201 above the qubit chip 250 on which the persistent current loop is shown is not limited to the interposer. For example, other types of structures may be used as long as there is one mutual inductance for one superconducting quantum interference (SQUID) loop of the qubit chip 250.

[0054] Figure 3 300 is shown for generating a continuous current using a continuous flux bias line consistent with an exemplary embodiment. It should be understood that although for illustrative purposes Figure 3 Transmitters are discussed in, but the present disclosure is not limited to transmitter couplers. Other types of flux tunable elements may be provided. For example, any superconducting qubit that is made tunable by a flux loop (or SQUID) will have potential application for the flux tunable coupler disclosed herein. Flux tunable transmission sub-qubits, face qubits (facemon), and even X-type qubits (X-mon) can benefit from the application of the apparatus and methods disclosed herein. If the qubit has a SQUID loop, an adjustable DC offset can be provided to bias the qubit to a desired frequency.

[0055] Loop 305 is inductively coupled to transmission sub 320 and loop 310 by current iDC input to global flux line 330. Current pulses applied to flux lines that are inductively coupled to a continuous current loop may have unintended consequences and may affect the signal integrity of the flux pulses. Figure 3 In the embodiment shown, with the inductive coupling M 1 Some adverse effects associated with the use of inductive coupling M are reduced, such as crosstalk. 4 The loop 310 adjacent to the global bias line 330 generates a continuous current. The transmitter 320 is coupled to the M 3 The inductive coupling is shown to loop 310. It should be understood that the fixed frequency qubit at the edge of the wiring layer (e.g., interposer) can be coupled to a single flux tunable transporter. This transporter can work without two coupled flux tunable transporters for easier construction.

[0056] Figure 4 A structure 400 for generating a persistent current captured in a short circuit loop for a flux excursion is shown according to an exemplary embodiment. A DC current (iDC) is passed through a superconductor SC 1 The flux bias line 405 is provided by a second superconducting material SC having a lower critical temperature than the second superconducting material SC. 2 410 short circuit. At the critical temperature SC 2 A DC current is applied before and maintained as the device cools. At the critical temperature SC 2DC current is applied before and kept on until the device cools down; in the case of a mutual inductance M 1 The continuous current i is captured in the short-circuit loop P Additional DC current and flux pulses are used to further bias the second mutual inductance M 2 coupler.

[0057] Figure 5 A structure 500 including a continuous flux bias line adjacent to a flux tunable transmitter is illustrated in accordance with an illustrative embodiment. A long continuous flux bias line 530 is adjacent to a flux tunable transmitter having a mutual inductance M 1 The flux tunable transmitter 520 of FIG. 5 is shown in FIG. 5 . A DC current (iDC) applied to the continuous line 530 provides an offset to all the flux tunable transmitters simultaneously. The flux pulse 540 and the small DC compensation current 550 can be generated by a transistor with mutual inductance M 2 The standard flux bias line is applied.

[0058] Figure 6 A structure 600 is illustrated including a continuous flux bias line 630 with a gradient flux coupler 605 to a flux tunable transmitter 620 in accordance with an illustrative embodiment. The gradient flux bias line reduces the effects of stray magnetic fields, which are substantially eliminated due to the structure of such gradient coils.

[0059] Figure 7 The T of a superconductor including a specific flux bias line consistent with an exemplary embodiment is shown. C Low T C Metal structure 700. The flux bias line 730 is made of a superconductor that has a higher Tc than the low-Tc metal surrounding the qubit.

[0060] Figure 8 shows a lower T consistent with the exemplary embodiment C Shorted structure 800. Flux line 830 is made of SC metal with high Tc, while shorting metal 810 is made of metal with low Tc.

[0061] Fig. 9 shows a lower T consistent with the exemplary embodiment C The current in the short-circuited structure 900. Figure 8 Similarly, the high Tc flux line 930 and the short line 910 are composed of a lower T C A current is applied at a temperature above the low Tc.

[0062] Fig.10 A lower T including current routing is shown consistent with an exemplary embodiment. CA short circuit structure 1000. A current is applied to the flux line 1030 at a temperature above the low Tc of the short circuit material 1010. The temperature is then lowered to below the Tc to short the material 1010. The external current is then removed. The flux in the small loop is constant, so the current is continuous.

[0063] Fig.11 A structure 1100 using mutual inductance consistent with an exemplary embodiment is shown. There is a high Tc flux line 1130 and a low Tc short line 1110. Current is applied when the temperature is above the low Tc. In operation, after the current is applied, the temperature drops below the Tc of the shorted material 1110. The external current is then removed from the flux line 1130. The flux in the small ring 1140 is constant, so the current in the small ring 1140 is continuous. Then, a DC or AC additional current is applied, which also biases the qubit without changing the value of the continuous current.

[0064] Fig.12 A structure 1200 having flux lines inductively coupled to a loop that can accommodate a persistent current is shown consistent with an exemplary embodiment. As shown, loop 1240 spans interposer 1260 and qubit chip 1270. The use of aluminum strips enables the persistent current to be reset to a value that operates at a lower temperature. It should be understood that the present disclosure is not limited to the use of interposer 1260, and other structures including but not limited to wiring layers may be used.

[0065] Fig.13 A structure including multiple qubits and multiple flux tunable buses consistent with an exemplary embodiment is shown. A single meandering line 1330 biases all flux tunable buses simultaneously. The unit cell 1350 shown has five qubits (e.g., Q1 to Q5) and six flux tunable buses (F1 to F5), resulting in 1.2 flux lines per qubit. The meandering flux line 1330 can have a length sufficient to flux bias many qubits with a single current. The meandering flux line 1330 can be in a gradient relationship with other flux lines rather than with the qubits. The meandering flux line 1330 can have an RF choke (not shown) to reduce crosstalk.

[0066] Example Method

[0067] With the preceding overview of the example architecture in mind, it may be helpful to now consider a high-level discussion of the example process. Fig.14 is a flow chart illustrating a method of generating a DC offset in flux conversion consistent with various exemplary embodiments.

[0068] Fig.14A collection of blocks shown as a logical sequence represents a sequence of operations that can be implemented in hardware, software, or a combination thereof. In each process, the order in which the operations are described is not intended to be construed as a limitation, and any number of the described blocks can be combined in any order and / or executed in parallel to implement the process.

[0069] At operation 1402, the critical temperature (Tc) of the superconducting metal is determined. For example, there may be two different superconducting materials for respective purposes. In one embodiment, the flux bias line includes a first superconducting material configured to receive a DC current to be inductively coupled to a flux adjustable element. The first superconducting material may have a higher Tc than a second superconducting material (which is not limited to an interposer), wherein a current loop has been formed on a wiring layer by the second superconducting material.

[0070] At operation 1404, when the temperature of the first superconducting material is above Tc, a DC current is input to the flux bias line (e.g., see Figure 3 , line 330) to inductively couple the flux bias line to both the loop 310 and the flux tunable transmitter 320.

[0071] At operation 1408, when the first superconducting material cools below the Tc of the first superconducting material, the current source (eg, DAC) continues to input a DC current into the flux bias line 330 to capture a persistent current (ip) within the superconducting loop.

[0072] At operation 1410, when the temperature of the first superconducting material is cooled below Tc, the persistent current causes the applied DC current to be applied. These operations can be repeated until the persistent current causes an applied DC current that produces a minimum ZZ exchange rate between the first fixed frequency qubit and the second fixed frequency qubit.

[0073] about Fig.14 The above method in the flowchart of the embodiment is not an exhaustive list of the scope of the present disclosure. For example, in addition to other operations, or instead of other operations, the method may include one or more operations.

[0074] Example Computer Platforms

[0075] Fig.15 A functional block diagram illustration of a computer hardware platform 1500 that can be used to implement a particular configuration of a computing device that can produce a DC offset in a flux tunable plasma according to an embodiment of the present invention is provided. In particular, Fig.15 A network or host computer platform 1500 is shown which may be used to implement a suitably configured server.

[0076] Computer platform 1500 may include a central processing unit (CPU) 1504 , a hard disk drive (HDD) 1506 , random access memory (RAM) and / or read only memory (ROM) 1508 , a keyboard 1510 , a mouse 1512 , a display 1514 , and a communication interface 1516 , which are connected to system bus 1502 .

[0077] In one embodiment, the HDD 1506 has the capability to include stored programs that can perform various processes in the manner described herein, such as a quantum operation engine 1540. The quantum operation engine 1540 can have various modules configured to perform different functions, such as those discussed in the context of the figures discussed herein. For example, 1540 can include modules such as a cryostat control module 1572 that controls the temperature of the cryostat and adjusts accordingly as needed, a signal generation module 1576 that can use DC current and pulsed current as a process and fine tuning of the current entering the cryostat to ensure quantum operation of the components, and a machine learning module 1578. The signal generation module 1576 can be configured to provide a DC current to induce a persistent current in the first loop, the signal generation module is configured to adjust the DC current) to reduce the constant entanglement (ZZ) between the pairs of fixed frequency qubits coupled to the first flux tunable coupler to a substantially minimum value. The signal generation module 1576 can also be configured to provide at least one current pulse (i) through a flux bias line. pulse ); and based on Φ offset The value provided for each current pulse.

[0078] The machine learning module 1578 may be trained through supervised learning using samples of how the operation of device parameters may need to be adjusted. Fig.15 The modules shown may be combined into fewer modules, and these modules are not exhaustive or required to perform any particular operation.

[0079] Although modules 1572, 1576, and 1578 are Fig.15 1506, but in some embodiments, one or more of these modules may be implemented in the hardware of the computing device 1500. For example, the modules discussed herein may be implemented in the form of part hardware and part software. That is, Fig.15One or more of the components of the quantum operation engine 1540 shown in the figure may be implemented in the form of an electronic circuit having (one or more) transistors, (one or more) diodes, (one or more) capacitors, (one or more) resistors, (one or more) inductors, (one or more) varactors, and / or (one or more) memristors. In other words, the quantum operation engine 1540 may be implemented using one or more specially designed electronic circuits that perform the specific tasks and functions described herein.

[0080] in conclusion

[0081] The description of various embodiments of the present teachings has been presented for illustrative purposes, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein are selected to best explain the principles of the embodiments, practical applications, or technical improvements existing in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

[0082] Although what is considered to be the best state and / or other examples have been described above, it should be understood that various modifications may be made therein, and the subject matter disclosed herein may be implemented in various forms and examples, and the teachings may be applied to many applications, only some of which are described herein. The appended claims are intended to claim any and all applications, modifications and variations that fall within the true scope of the present teachings.

[0083] The components, operations, steps, features, objects, benefits, and advantages discussed herein are merely illustrative. None of them, or the discussion related to them, is intended to limit the scope of protection. Although various advantages have been discussed herein, it will be understood that not all embodiments necessarily include all advantages. Unless otherwise indicated, all measurements, values, ratings, positions, sizes, dimensions, and other specifications in this specification, including those set forth in the appended claims, are approximate and not exact. They are intended to have a reasonable range consistent with the functions to which they are related and the customary practices of the field to which they belong.

[0084] Many other embodiments are also contemplated. These include embodiments with fewer, additional and / or different components, steps, features, objects, benefits and advantages. These also include embodiments in which components and / or steps are arranged and / or ordered in different ways.

[0085] The flowcharts and diagrams in the figures herein illustrate the architecture, functionality, and operations of possible implementations according to various embodiments of the present disclosure.

[0086] Although the foregoing has been described in conjunction with exemplary embodiments, it should be understood that the term "exemplary" is meant only as an example, rather than the best or optimal. Except as immediately stated above, nothing stated or illustrated is intended or should be construed to cause any component, step, feature, object, benefit, advantage, or equivalent to be dedicated to the public, whether or not stated in the claims.

[0087] It should be understood that, unless a specific meaning is elaborated in addition herein, the terms and expressions used herein have the common meaning consistent with these terms and expressions about their corresponding respective investigation and research fields. Relational terms such as the first and second etc. can be used only to distinguish one entity or action from another, without requiring or implying any such actual relationship or order between these entities or actions. The term "includes", "comprising" or any other variation thereof is intended to cover non-exclusive inclusions, so that the process, method, article or device comprising a series of elements not only include those elements, but also may include other elements that are not clearly listed or are inherent to such a process, method, article or device. In the absence of further constraints, the element with "one" or "an" in front does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0088] The abstract of the present disclosure is provided to allow the reader to quickly determine the nature of the present technical disclosure. It should be understood that it is not used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing detailed description, it can be seen that in order to make the present disclosure smooth, various features are grouped together in various embodiments. This method of disclosure should not be interpreted as reflecting the intention that the claimed embodiments have more features than the features explicitly recited in each claim. On the contrary, as reflected in the attached claims, the subject matter of the present invention lies in less than all the features of a single disclosed embodiment. Therefore, the following claims are hereby incorporated into the specific implementation mode, wherein each claim is independently a subject matter claimed separately.

Claims

1. A quantum circuit device, comprising: A qubit chip, the qubit chip comprising a plurality of qubits and a plurality of flux tunable couplers; a plurality of fixed frequency qubits in a lattice structure, wherein each pair of the plurality of fixed frequency qubits is coupled to a flux tunable coupler; as well as A wiring layer coupled to the quantum bit chip, wherein the wiring layer comprises: a loop comprising a superconducting material inductively coupled to the flux tunable coupler; as well as A flux bias line comprises a superconducting material different from the superconducting material of the loop, wherein the flux bias line is inductively coupled to both the loop and the flux tunable coupler.

2. The quantum circuit device according to claim 1, wherein the wiring layer further comprises: A first flux bias line comprising a first superconducting material and configured to receive a DC current inductively coupled to the first flux tunable coupler and at least one current pulse (i pulse ); as well as a first loop formed of a second superconducting material, the first loop inductively coupled to the first flux bias line and inductively coupled to the first flux tunable coupler; wherein the magnetic field generated from the first flux bias line is configured to induce a persistent current in the first loop formed by the second superconducting material and to induce a static flux offset Φ through the first flux tunable coupler offset .

3. The quantum circuit device according to claim 2, wherein the plurality of fixed frequency qubits include fixed frequency transmission sub-qubits; and The plurality of flux tunable couplers include flux tunable transmission subcouplers.

4. The quantum circuit device of claim 2 , further comprising a signal generation module configured to provide the DC current to induce the persistent current in the first loop, the signal generation module configured to adjust the DC current to reduce the always-on entanglement (ZZ) between the pairs of fixed-frequency qubits coupled to the first flux tunable coupler to a substantially minimum value.

5. The quantum circuit device according to claim 2, further comprising: A signal generating module, the signal generating module being configured to provide the at least one current pulse (i pulse ), where the value of each current pulse is based on the Φ offset The value of .

6. The quantum circuit device according to claim 2, wherein: The first superconducting material comprises niobium; and The second superconducting material includes aluminum.

7. The quantum circuit device according to claim 2, further comprising a global flux line arranged on the wiring layer close to the persistent current loop, the persistent current loop being configured to receive an input of a DC current and generate a magnetic field within the persistent current loop.

8. The quantum circuit device according to claim 2, wherein: The second superconducting material is shorted between two sections of consecutive flux bias lines, wherein a loop is formed on each flux bias line; The second superconducting material has a critical temperature (T C ), and is configured to generate a persistent current (i ) trapped in a loop formed by the overlapping superconductors p ); as well as The loop of the persistent current is configured to generate a calibrated flux shift (Φ) based on a temperature change applied to the superconducting material in the flux tunable transport. offset ).

9. The quantum circuit device of claim 2, wherein the flux bias line comprises one or more gradiometer loops.

10. The quantum circuit device of claim 9, wherein a flux tunable transport on a qubit chip is coupled to pairs of the fixed frequency qubits on the qubit chip, and the qubit chip is coupled to the wiring layer, the wiring layer generating a flux offset from the flux bias line and the persistent current loop.

11. The quantum circuit device of claim 9, wherein a first flux-tunable transporter is capacitively coupled to a first fixed-frequency qubit and is capacitively coupled to a second fixed-frequency qubit in a pair of the fixed-frequency qubits.

12. The quantum circuit device of claim 11, wherein the first flux tunable transporter and the fixed frequency qubit are arranged in a lattice structure to form a multi-qubit device.

13. A quantum circuit device according to any one of the preceding claims, wherein the flux bias line comprises a meandering bias line which continues to the plurality of flux tunable couplers and is configured to bias the plurality of flux tunable couplers substantially simultaneously.

14. A quantum circuit device, comprising: A qubit chip including a plurality of qubits; as well as a plurality of flux-tunable elements, wherein each flux-tunable element comprises a corresponding flux-tunable superconducting quantum interference (SQUID) loop, and each flux-tunable element is coupled between a corresponding pair of fixed-frequency qubits; A wiring layer coupled to the qubit chip, wherein the wiring layer comprises: a continuous flux bias line comprising a first superconducting material disposed adjacent the flux adjustable element and configured to output a DC current to simultaneously provide a bias to the flux adjustable element; and A plurality of flux bias lines are disposed discontinuously from the flux adjustable element, wherein each of the flux bias lines is configured to output a flux pulse and independently bias a current using a mutual inductance with the flux adjustable element.

15. The quantum circuit device of claim 14, wherein the continuous flux bias line is arranged on a first side of the flux tunable element, and the plurality of flux bias lines disposed discontinuously are adjacent to a second side of the flux tunable element.

16. A quantum circuit device according to any preceding claim 14 to 15, wherein the plurality of flux bias lines comprises gradient flux coils.

17. A quantum circuit device according to any one of the preceding claims 14 to 16, wherein the flux couplers on the qubit chip each have two spatially separated pick-up coils, which are separately coupled to the continuous bias line and the independent flux bias line.

18. A method of generating a DC offset in a flux adjustable element, the method comprising: When the temperature of the first superconducting material is higher than the critical temperature T C inputting a DC current into a flux bias line near a flux tunable element to inductively couple the flux bias line to both the flux tunable element and a loop including a first superconducting material surrounding the flux tunable element, wherein the flux bias line includes a second superconducting material different from the first superconducting material; and After cooling the first superconducting material to the T C The DC current continues to be input into the flux bias line while a persistent current is captured within the loop of superconductivity.

19. The method according to claim 18, wherein: The input of the DC current is continued until the persistent current produces a minimum ZZ exchange rate between the first fixed-frequency qubit and the second fixed-frequency qubit.

20. The method according to any one of the preceding claims 18 to 19, further comprising: biasing the flux adjustable element to a zero ZZ state; as well as The flux bias line of each adjustable element is pulsed to pulse them into a conducting state.

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