Test mechanism for detecting chip colloid damage and pressure resistance

Abstract

The invention, which relates to the technical field of chip testing, discloses a pressure resistance testing mechanism for detecting chip colloid damage, comprising a base, a seat plate, an electrode mounting plate, an electrode, a tester and the like. A chip is automatically taken and placed through a chip taking and placing piece connected with an external mechanical arm, and first to fourth electrodes are arranged on the electrode mounting plate and are in corresponding conductive contact with pins of a tested chip. And the tester is connected with the electrode through a high-voltage-resistant wire and is used for carrying out a voltage-resistant test on the chip. The mechanism is simple in structure, easy to maintain, high in test precision, wide in application range and high in safety. In the testing process, the tester monitors the current in real time, and the accuracy of the testing result is ensured. The testing process is controlled through the PLC, the automation degree is high, and the testing efficiency is greatly improved. According to the invention, an efficient, accurate and safe chip colloid damage pressure resistance test solution is provided for the chip manufacturing and testing industry, and the chip quality and reliability can be improved.

Description

Technical Field

[0001] The invention relates to the technical field of chip testing, in particular to a chip colloid damage withstand voltage testing mechanism. Background Art

[0002] In the semiconductor industry, the quality and reliability of chips are crucial as they are the core components of electronic devices. The chip encapsulation colloid not only protects the internal structure of the chip, but also affects the electrical performance and voltage resistance of the chip. However, during the manufacturing and transportation of the chip, the encapsulation colloid may be damaged for various reasons, resulting in the performance degradation or even failure of the chip. Therefore, voltage resistance testing of chip encapsulation colloid damage is an important step to ensure chip quality.

[0003] Traditional chip withstand voltage test methods are mostly manual operations, which are not only inefficient, but also difficult to guarantee test accuracy and reliability. At the same time, since the chip needs to be manually touched during the test, there are certain safety hazards. In addition, existing test equipment is often complex in structure, cumbersome to operate, and inconvenient to maintain and upgrade. Therefore, it is of great significance to develop an efficient, accurate and safe chip colloid damage withstand voltage test mechanism. Summary of the invention

[0004] In view of the deficiencies of the prior art, the present invention provides a chip colloid damage withstand voltage testing mechanism, which solves the problems raised by the above-mentioned background technology.

[0005] To achieve the above objectives, the present invention is implemented through the following technical solutions: a chip colloid damage withstand voltage testing mechanism, comprising: A base, with a seat plate fixedly mounted on the top; An electrode mounting plate is fixedly mounted on the upper portion of the seat plate, and a No. 1 electrode is fixedly mounted inside the seat plate and the electrode mounting plate; Electrode No. 2, electrode No. 3, and electrode No. 4 are fixedly connected on the electrode mounting plate; and a tester connected to the contact ends of the first electrode, the second electrode, the third electrode and the fourth electrode through a plurality of high voltage resistant wires.

[0006] Furthermore, the No. 1 electrode includes an electrode rod inserted and fixed inside the seat plate and the electrode mounting plate, the bottom end of the electrode rod is connected and fixed with a terminal, and the outside is fixedly connected with an insulating sleeve.

[0007] Furthermore, the chip colloid damage withstand voltage testing mechanism also includes a chip pick-up and placement component, the bottom end of which is overlapped between the second electrode and the chip packaging colloid, and is used to pick up and place the chip under test.

[0008] Furthermore, the chip placement component includes a robot connecting component and a rotating seat, the robot connecting component is connected to an external robot, and a conductive touch plate is rotatably connected inside the rotating seat.

[0009] Furthermore, the electrode mounting plate is configured as an insulating structure, a mounting hole No. 1 is provided through the inside, and a chip testing position is provided in the middle corresponding to the mounting hole No. 1.

[0010] Furthermore, the upper portion of the electrode mounting plate is also provided with a second mounting position, a third mounting position and a fourth mounting position, and the second electrode, the third electrode and the fourth electrode are respectively installed and fixed at corresponding positions.

[0011] Furthermore, the power connection terminal of the tester is connected to the power connection terminals of the first electrode, the second electrode, the third electrode, and the fourth electrode through the first high-voltage resistant wire, the second high-voltage resistant wire, the third high-voltage resistant wire, and the fourth high-voltage resistant wire.

[0012] Furthermore, the chip includes a No. 1 pin, a chip packaging colloid, a No. 3 pin, and a No. 4 pin, which are in conductive contact with a No. 1 electrode, a No. 2 electrode, a No. 3 electrode, and a No. 4 electrode, respectively.

[0013] Furthermore, the manipulator connector and the rotating seat are both configured as ceramic insulating structures.

[0014] In a second aspect, the present invention further provides a test method for detecting chip colloid damage and withstand voltage test mechanism, comprising the following steps: S1, placing the chip in the chip test position through a chip pick-and-place unit connected to an external manipulator; S2, keep the robot and the chip pick-and-place unit stationary, make the pins of the chip contact with the corresponding electrodes, and send instructions to the PLC; S3, PLC sends a test command to the tester, and the tester transmits current to the electrode through the high-voltage wire to trigger the chip test; S4. During the test, the tester diagnoses whether the current is within the set range; S5. Determine whether the chip is good or bad according to the current range, and feed back the signal to the PLC; S6, PLC performs signal processing and judgment. After the test is completed, the chips are dropped into the corresponding material tray for collection through the external manipulator and chip pick-and-place device.

[0015] The present invention provides a device for testing chip colloid damage and withstand voltage. Compared with the prior art, it has the following beneficial effects: 1. High degree of automation: The chip pick-and-place unit connected to the external manipulator realizes automatic pick-and-place and testing of the chip, which greatly improves the test efficiency. At the same time, the automated operation also reduces the impact of human factors on the test results and improves the accuracy and reliability of the test.

[0016] 2. Simple structure and easy maintenance: The structural design of the test mechanism is concise and clear, and the connections between the components are tight and reliable, which is convenient for daily maintenance and troubleshooting. In addition, key components such as electrodes and wires are made of high-voltage resistant materials to ensure safety and stability during the test.

[0017] 3. High test accuracy: Through the precise control of the tester and the high-voltage wire, the pressure resistance of the chip packaging colloid can be accurately tested. At the same time, the tester can also monitor and diagnose the current in the test process in real time to ensure the accuracy and reliability of the test results.

[0018] 4. Wide range of applications: This test mechanism is suitable for testing chips of various types and specifications. You only need to replace the corresponding electrodes and chip pick-and-place parts. In addition, the test mechanism can also be customized and upgraded according to actual needs to meet the testing needs of different customers.

[0019] 5. High safety: The test mechanism fully considers safety factors during the design and manufacturing process, and adopts safety measures such as ceramic insulation structure to effectively prevent current leakage and electric shock risks during the test. At the same time, the test mechanism is also equipped with an emergency stop device and a fault alarm system to ensure safe handling in emergency situations.

[0020] To sum up, the chip colloid damage withstand voltage test mechanism provided by this technical solution has significant advantages such as high degree of automation, simple structure and easy maintenance, high test accuracy, wide range of applications and high safety, providing an efficient, accurate and safe testing solution for the chip manufacturing and testing industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the split structure of the present invention; Figure 2 It is a schematic diagram of the structure of the No. 1 electrode in the present invention; Figure 3 It is a schematic diagram of the structure of the chip pick-and-place component in the present invention; Figure 4 It is a structural schematic diagram of the electrode mounting plate in the present invention; Figure 5 It is a schematic diagram of the assembly structure of the present invention; Figure 6 A half-section view of the present invention after assembly; Figure 7It is a schematic diagram of the structure in which the tester of the present invention is connected to the corresponding electrodes through a high-voltage-resistant wire; Figure 8 This is a schematic diagram of the pin structure of the chip in the present invention; Fig. 9 It is a side view flow chart of the present invention.

[0022] In the figure: 1. base; 2. seat plate; 3. electrode mounting plate; 31. mounting hole No. 1; 32. mounting position No. 2; 33. mounting position No. 3; 34. mounting position No. 4; 35. chip testing position; 4. electrode No. 1; 41. electrode rod; 42. terminal; 43. insulating sleeve; 5. electrode No. 2; 6. electrode No. 3; 7. electrode No. 4; 8. chip pick-and-place component; 81. manipulator connector; 82. rotating seat; 83. conductive touch pad; 9. chip; 91. pin No. 1; 92. chip packaging colloid; 93. pin No. 3; 94. pin No. 4; 10. tester; 101. high-voltage resistant wire No. 1; 102. high-voltage resistant wire No. 2; 103. high-voltage resistant wire No. 3; 104. high-voltage resistant wire No. 4. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] See also Figure 1-8 The present invention provides a technical solution: a chip colloid damage withstand voltage test mechanism, comprising a base 1, a seat plate 2 is fixedly mounted on the top of the base 1, an electrode mounting plate 3 is fixedly mounted on the upper part of the seat plate 2, a No. 1 electrode 4 is fixed inside the seat plate 2 and the electrode mounting plate 3, a No. 2 electrode 5, a No. 3 electrode 6, and a No. 4 electrode 7 are fixedly connected to the upper part of the electrode mounting plate 3, a chip 9 to be tested is placed in the middle of the upper surface of the electrode mounting plate 3, the chip 9 has a packaging colloid and a plurality of pins, a chip pick-up and placement member 8 is also arranged on the upper part of the chip 9, the bottom end of the chip pick-up and placement member 8 is overlapped between the No. 2 electrode 5 and the packaging colloid, and a plurality of pins of the chip 9 are in conductive contact with the No. 1 electrode 4, the No. 3 electrode 6, and the No. 4 electrode 7, and the mechanism also comprises a tester 10, and the tester 10 is connected to the contact ends of the No. 1 electrode 4, the No. 2 electrode 5, the No. 3 electrode 6, and the No. 4 electrode 7 through a plurality of high-voltage-resistant wires; The first electrode 4 includes an electrode rod 41 inserted and fixed inside the base plate 2 and the electrode mounting plate 3. The bottom end of the electrode rod 41 is connected and fixed to a terminal 42. The outside of the electrode rod 41 is fixedly connected to an insulating sleeve 43. The insulating sleeve 43 is located between the electrode rod 41 and the base plate 2 to play an insulating role. The chip pick-and-place member 8 includes a manipulator connector 81, which is connected to an external manipulator. The bottom end of the manipulator connector 81 is connected to a rotating seat 82. Both the manipulator connector 81 and the rotating seat 82 are configured as ceramic insulating structures, which can effectively prevent the current from flowing into the external manipulator along the manipulator connector 81 and the rotating seat 82 during the power-on test of the chip 9. The internal rotation of the rotating seat 82 is connected to a conductive touch pad 83. The chip pick-and-place member 8 adsorbs and fixes the chip 9 at its bottom through negative pressure adsorption, and the chip 9 is picked up and placed by the external manipulator. The electrode mounting plate 3 is set as an insulating structure, which can be placed in the process of testing the chip 9. The current is transmitted to the base 1 through the No. 1 electrode 4, the No. 2 electrode 5, the No. 3 electrode 6, and the No. 4 electrode 7, so as to prevent the base 1 from being charged during the test process. The interior of the electrode mounting plate 3 is provided with a No. 1 mounting hole 31, and a chip testing position 35 is set in the middle of the electrode mounting plate 3 corresponding to the position of the No. 1 mounting hole 31. The chip 9 is placed in the chip testing position 35 during the test, and the electrode rod 41 can be inserted from the bottom of the chip 9 to the pin through the No. 1 mounting hole 31 to conduct the circuit. The upper part of the electrode mounting plate 3 is also provided with a No. 2 mounting position 32, a No. 3 mounting position 33, and a No. 4 mounting position 34, respectively. The No. 2 electrode 5, the No. 3 electrode 6, and the No. 4 electrode 7 are respectively installed and fixed at the No. 2 mounting position 32, the No. 3 mounting position 33, and the No. 4 mounting position 34; The power connection end of the tester 10 is connected to the power connection end of the No. 1 electrode 4, the No. 2 electrode 5, the No. 3 electrode 6, and the No. 4 electrode 7 through the No. 1 high-voltage resistant wire 101, the No. 2 high-voltage resistant wire 102, the No. 3 high-voltage resistant wire 103, and the No. 4 high-voltage resistant wire 104. The chip 9 includes a No. 1 pin 91, a chip packaging colloid 92, a No. 3 pin 93, and a No. 4 pin 94. The electrode rod 41 of the No. 1 electrode 4 is in contact with the No. 1 pin 91. The No. 2 electrode 5 and the chip packaging colloid 92 are overlapped together through the conductive touch plate 83. The end of the No. 3 electrode 6 is in contact with the No. 3 pin 93, and the end of the No. 4 electrode 7 is in contact with the No. 4 pin 94. The test process steps of the above-mentioned chip colloid damage withstand voltage test mechanism include the following: S1, placing the chip 9 in the chip testing position 35 by means of adsorption through the chip pick-and-place unit 8 connected to the external manipulator; S2, after placement, the robot arm and the chip pick-and-place unit 8 remain motionless, the No. 1 pin 91 contacts the top of the electrode rod 41, the chip encapsulation colloid 92 and the end of the No. 2 electrode 5 are overlapped through the conductive touch pad 83, the No. 3 pin 93 contacts the end of the No. 3 electrode 6, and the No. 4 pin 94 contacts the end of the No. 4 electrode 7. After they are in place, a command is sent to the PLC; S3, PLC sends a test command to the tester 10, and the tester 10 then transmits current to the first electrode 4, the second electrode 5, the third electrode 6, and the fourth electrode 7 through the first high-voltage wire 101, the second high-voltage wire 102, the third high-voltage wire 103, and the fourth high-voltage wire 104, and triggers the chip 9 through the set voltage. S4. During the test, the tester diagnoses whether the current is within the set range; S5. If it is within the range, the chip 9 is determined to be a good product; if it is not within the range, the chip 9 is determined to be a defective product, and this signal is fed back to the PLC; S6, PLC performs signal processing and judgment. After the test is completed, the good or bad chips 9 are thrown into the corresponding material tray through the external manipulator and the chip pick-and-place unit 8 for collection.

Claims

1. A chip colloid damage withstand voltage test mechanism, characterized in that: include: A base (1) having a seat plate (2) fixedly mounted on the top thereof; An electrode mounting plate (3) is fixedly mounted on the upper part of the seat plate (2), and a No. 1 electrode (4) is fixedly mounted inside the seat plate (2) and the electrode mounting plate (3); The second electrode (5), the third electrode (6), and the fourth electrode (7) are respectively fixedly connected to the upper part of the electrode mounting plate (3); And a tester (10) is connected to the contact ends of the first electrode (4), the second electrode (5), the third electrode (6), and the fourth electrode (7) through a plurality of high-voltage-resistant wires.

2. A chip colloid damage withstand voltage testing mechanism according to claim 1, characterized in that: The first electrode (4) comprises an electrode rod (41) inserted and fixed inside the base plate (2) and the electrode mounting plate (3); the bottom end of the electrode rod (41) is connected and fixed with a terminal post (42), and the outside is fixedly connected with an insulating sleeve (43).

3. A chip colloid damage withstand voltage testing mechanism according to claim 1, characterized in that: It also includes a chip pick-up and placement component (8), the bottom end of which is overlapped between the second electrode (5) and the packaging colloid of the chip (9) and is used to pick up and place the chip (9) to be tested.

4. A chip colloid damage withstand voltage testing mechanism according to claim 3, characterized in that: The chip pick-and-place component (8) comprises a robot connecting component (81) and a rotating seat (82), wherein the robot connecting component (81) is connected to an external robot, and a conductive touch plate (83) is rotatably connected inside the rotating seat (82).

5. The chip colloid damage withstand voltage testing mechanism according to claim 1, characterized in that: The electrode mounting plate (3) is provided as an insulating structure, a first mounting hole (31) is provided through the inside, and a chip testing position (35) is provided at a position in the middle corresponding to the first mounting hole (31).

6. A chip colloid damage withstand voltage testing mechanism according to claim 5, characterized in that: The upper portion of the electrode mounting plate (3) is also provided with a second mounting position (32), a third mounting position (33) and a fourth mounting position (34), and the second electrode (5), the third electrode (6) and the fourth electrode (7) are respectively mounted and fixed at corresponding positions.

7. A chip colloid damage withstand voltage testing mechanism according to claim 1, characterized in that: The power connection end of the tester (10) is connected to the power connection ends of the first electrode (4), the second electrode (5), the third electrode (6), and the fourth electrode (7) via a first high-voltage resistant wire (101), a second high-voltage resistant wire (102), a third high-voltage resistant wire (103), and a fourth high-voltage resistant wire (104).

8. The chip colloid damage withstand voltage testing mechanism according to claim 1, characterized in that: The chip (9) comprises a first pin (91), a chip packaging colloid (92), a third pin (93), and a fourth pin (94), which are in conductive contact with a first electrode (4), a second electrode (5), a third electrode (6), and a fourth electrode (7), respectively.

9. A chip colloid damage withstand voltage testing mechanism according to claim 3, characterized in that: The manipulator connecting piece (81) and the rotating seat (82) are both configured as ceramic insulating structures.

10. A testing method using the detection chip colloid damage withstand voltage testing mechanism according to any one of claims 1 to 9, characterized in that: The following steps are involved: S1, placing a chip (9) in a chip testing position (35) by means of a chip pick-and-place unit (8) connected to an external manipulator; S2, keep the robot and the chip pick-and-place unit (8) stationary, make the pins of the chip contact with the corresponding electrodes, and send instructions to the PLC; S3, the PLC sends a test instruction to the tester (10), and the tester (10) transmits current to the electrode through the high-voltage wire to trigger the chip (9); S4. During the test, the tester diagnoses whether the current is within the set range; S5, judging whether the chip (9) is a good product or a bad product according to the current range, and feeding back the signal to the PLC; S6, PLC performs signal processing and judgment. After the test is completed, the chip (9) is dropped into the corresponding material tray for collection through the external manipulator and the chip pick-up and placement component (8).

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