Server starting operation method
Through the first processor, the substrate management controller and the second processor that process the power-up signal in parallel in the server, the problem of lengthening due to the activation of the substrate management controller during the server startup is solved, and a more efficient server startup is achieved.
Patent Information
- Application Number
- CN202510378486.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2045-03-28
AI Technical Summary
During the startup process of the existing server, the processor power-on timing depends on the activation of the substrate management controller, resulting in a long server opening time, which affects the timely execution of related services.
The power-up signal is sent through the power module to the first processor, the substrate management controller, and the second processor, and they are allowed to process the power-up signal simultaneously, avoiding relying on the startup sequence of the fixed device. The first processor, the substrate management controller, and the second processor perform initialization and startup operations in parallel, generating an indication signal to control the server to start the operating system.
It shortens the overall time of server startup, improves the efficiency of server startup, and solves the problem of startup extension caused by waiting timing.
Smart Images

Figure CN119902812A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of servers, and in particular to a server startup operation method. Background Art
[0002] Currently, servers are used in various fields, but the various management firmware in the server are interdependent. Specifically, during the server startup process, the processor power-on sequence must wait until the baseboard management controller in the server motherboard is activated before it can be executed. This execution method will cause the server to be turned on for a long time, which in turn causes related services associated with the server to fail to execute in time.
[0003] Therefore, there is an urgent need for a server startup operation method that can eliminate the need to rely on a fixed device startup execution sequence during the server startup process, thereby shortening the overall server startup time and improving the server startup efficiency. Summary of the invention
[0004] The present application provides a server startup operation method, which can eliminate the need to rely on the startup execution sequence of fixed components during the server startup process, thereby shortening the overall server startup time and improving the efficiency of server startup.
[0005] The present application provides a server startup operation method, wherein the server includes a power module, a first processor, a baseboard management controller, and a second processor, and the method includes: Sending a power-on signal to the first processor, the baseboard management controller and the second processor through the power module; wherein the power-on signal is used to indicate that the power module of the server is powered on; performing, by the first processor, an initialization operation on the first processor according to the power-on signal; Performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller; Generate an indication signal in parallel by the second processor according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is complete; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor controls the server to start an operating system according to the indication signal.
[0006] The present application also provides a server startup operation device, which includes a power module, a first processor, a baseboard management controller, and a second processor. The device includes: The power module is used to send a power-on signal to the first processor, the baseboard management controller and the second processor; wherein the power-on signal is used to indicate that the power module of the server is powered on; The first processor is used to perform an initialization operation on the first processor according to the power-on signal; The baseboard management controller is used to perform a startup operation on the baseboard management controller in parallel according to the power-on signal; The second processor is used to generate an indication signal in parallel according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is complete; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor is used for controlling the server to start an operating system according to the indication signal.
[0007] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned server startup operation methods when executing the computer program.
[0008] The present application also provides a computer-readable storage medium, in which a computer program is stored, wherein when the computer program is executed by a processor, the steps of any of the above-mentioned server startup operation methods are implemented.
[0009] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned server startup operation methods when the computer program is executed by a processor.
[0010] The present application sends a power-on signal to the first processor, the baseboard management controller and the second processor through the power module, and then the first processor performs an initialization operation on the first processor according to the power-on signal, and at the same time, the baseboard management controller performs a startup operation on the baseboard management controller in parallel according to the power-on signal, and at the same time, the second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time. Since the first processor, the baseboard management controller and the second processor process the power-on signal at the same time, there is no strong correlation. Finally, the first processor controls the server to start the operating system according to the indication signal, thereby shortening the overall startup time of the server and improving the startup efficiency of the server. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0012] Figure 1 is a schematic diagram of a circuit structure for executing a server startup operation provided by an embodiment of the present disclosure; Figure 2 It is a flow chart of a server startup operation method provided by an embodiment of the present disclosure; Figure 3 It is a flow chart of a server startup operation method provided by an embodiment of the present disclosure; Figure 4 is a signaling interaction diagram of a server startup operation provided by an embodiment of the present disclosure; Figure 5 It is a flow chart of a server startup operation method provided by an embodiment of the present disclosure; Figure 6 is a signaling interaction diagram of a server startup operation provided by an embodiment of the present disclosure; Figure 7 It is a structural diagram of a server startup operation device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION
[0013] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0014] It should be noted that, in the description of this application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects, and are not used to describe a specific order or sequence.
[0015] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0016] In the related art, after the server is powered off and restarted, the complex programmable logic device can only be powered on after the baseboard management controller is activated, which results in a long waiting time for the server to start up, which cannot meet the needs of actual scenarios. Especially in the scenario where tens of thousands of servers are deployed in the data center, it is impossible for the operation and maintenance personnel to wait for the baseboard management controller to be initialized before starting up. In the actual operation process, the complex programmable logic device starts immediately after detecting the indication signal, which causes the server to crash when starting up. Therefore, this embodiment solves the above problem through a server startup operation method.
[0017] In conjunction with a specific hardware architecture that a server startup operation method relies on, a specific hardware architecture is described here. For details, see Figure 1 A schematic diagram of a circuit structure for executing a server startup operation is shown.
[0018] The embodiment of the present application provides a server startup operation method, and the method is described in detail in combination with an execution flow of a server startup operation method. Figure 2 A flow chart of a server startup operation method is shown. The server includes a power module, a first processor, a baseboard management controller and a second processor, and the method includes: S201. Send a power-on signal to a first processor, a baseboard management controller, and a second processor through a power module; wherein the power-on signal is used to indicate that the power module of the server is powered on.
[0019] This embodiment is applied in a scenario where the server is suddenly powered off and then powered on again. Specifically, before sending a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module, the method further includes: The power module was powered off abnormally and then powered on again.
[0020] In one example, a power module of a server is abnormally powered off, causing the server to fail to work properly. Then, the power is turned on again to restore the server to work properly.
[0021] In one example, the power module is electrically connected to the first processor; the power module is electrically connected to the baseboard management controller; the power module is electrically connected to the second processor; and the first processor is electrically connected to the second processor.
[0022] In one example, after the power module is abnormally powered off, the method further includes: If it is detected that the power module is powered on, a power-on signal is generated through the power module.
[0023] In one example, a power-on signal is generated by the power module after the power module is powered on again.
[0024] In this embodiment, the power-on signal may be a HPM_STBY_EN signal. The power module simultaneously sends the power-on signal to the first processor, the baseboard management controller, and the second processor. In this embodiment, the first processor may be a complex programmable logic device (Complex Programmable Logic Device, referred to as CPLD). Among them, the CPLD is composed of a programmable interconnect matrix unit surrounded by a programmable logic macro unit. It realizes flexible configuration of logic functions through programmable logic units and interconnection resources. The baseboard management controller (Baseboard Management Controller, referred to as BMC) is used to be integrated in servers, network devices, and other computer systems to monitor the hardware status of the device, perform remote management operations, and provide monitoring and control functions.
[0025] In one example, the second processor (Central Processing Unit, CPU for short) may be a core component of the system, responsible for executing program instructions, processing data, and controlling the operation of the entire system.
[0026] In the related art, the power-on sequence of the CPLD that controls the startup of the server must wait until the BMC management firmware of the server motherboard is activated before the CPLD boot sequence can be executed. This will cause the server restart time to be longer. In this embodiment, by sending a power-on signal to the CPLD, BMC and CPU at the same time, the CPLD, BMC and CPU work at the same time, thereby eliminating the timing problem of the CPLD and BMC.
[0027] S202: Initialize the first processor according to a power-on signal.
[0028] In one example, performing an initialization operation on the first processor according to a power-on signal by the first processor includes: The firmware in the first processor is initialized by the first processor according to the power-on signal.
[0029] In one example, after receiving the power-on signal, the first processor performs an initialization operation on the firmware in the first processor.
[0030] S203 , executing a startup operation on the baseboard management controller in parallel according to the power-on signal through the baseboard management controller.
[0031] In one example, after receiving the power-on signal, the baseboard management controller starts the baseboard management controller in parallel. In this embodiment, the startup operation of the baseboard management controller after receiving the power-on signal and the initialization operation of the first processor after receiving the power-on signal are performed simultaneously.
[0032] S204, generating an indication signal in parallel according to the power-on signal by the second processor, and controlling the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is complete; and the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation.
[0033] In one example, the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation, including: The first preset time is a time value obtained by adding the time when the first processor receives the power-on signal to the time length when the first processor completes the initialization operation.
[0034] In one example, after receiving the power-on signal, the second processor generates an indication signal in parallel. The indication signal is used to indicate that the configuration of the second processor is complete. Specifically, the indication signal may be an FPGA_Ready signal. In this embodiment, the moment when the second processor sends the indication signal is the same as the moment when the first processor receives the indication signal. In this embodiment, for the sake of convenience, the moment when the first processor receives the power-on signal is T0, the time for the first processor to complete the initialization operation is F0, and the first preset moment is T1, then T1=T0+F0. Generally, F0 is 6S.
[0035] S205: Control the server to start the operating system according to the instruction signal through the first processor.
[0036] In one example, after receiving the indication signal, the first processor controls the server to start the operating system.
[0037] The present application provides a server startup operation method, wherein a power-on signal is sent to a first processor, a baseboard management controller, and a second processor through a power module, and then the first processor performs an initialization operation on the first processor according to the power-on signal, and at the same time, the baseboard management controller performs a startup operation on the baseboard management controller in parallel according to the power-on signal, and at the same time, the second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time. Since the first processor, the baseboard management controller, and the second processor process the power-on signal at the same time, there is no strong correlation, and finally the first processor controls the server to start the operating system according to the indication signal, thereby shortening the overall duration of server startup and improving the efficiency of server startup.
[0038] Figure 3A flow chart of a server startup operation method is shown. The server includes a power module, a first processor, a baseboard management controller, and a second processor. This embodiment is completed on the basis of the above embodiment, and this embodiment can be combined with various optional solutions in one or more of the above embodiments. Specifically, refer to the following steps: S301. Send a power-on signal to a first processor, a baseboard management controller, and a second processor through a power module; wherein the power-on signal is used to indicate that the power module of the server is powered on.
[0039] In one example, the number of servers is multiple.
[0040] This embodiment can be used in a system composed of multiple servers, that is, this embodiment can be used in a scenario where multiple servers are powered off and then powered on again.
[0041] In one example, the method further includes: The power-on signal is monitored in real time by the first processor.
[0042] In one example, the first processor monitors the power-on signal in real time after the server is powered on, and then performs subsequent operations according to the power-on signal.
[0043] S302: Initialize the first processor according to a power-on signal.
[0044] In one example, initializing the firmware in the first processor according to the power-on signal by the first processor includes: Initializing the memory according to the power-on signal by the first processor, and reading the characteristic control bit; Determining, by the first processor, a configuration mode according to the feature control bit; The first processor loads the bit stream according to the configuration mode and detects that the preset signal bit is the preset signal, thus completing the initialization operation of the first processor.
[0045] In one example, after the first processor is powered on, it will automatically perform a reset operation to reset the internal memory, registers, and logic units to the initial state to prepare for subsequent initialization. Then the firmware program is downloaded to the first processor through the configuration interface. This step usually requires the use of a dedicated programmer or the configuration circuit on the development board. During the configuration process, the first processor will configure the internal logic according to the downloaded firmware program, including setting the function of the I / O pin, the clock frequency, etc. After the configuration is completed, the first processor starts to execute the initialization program in the firmware. The main tasks of the initialization program include: configuring the communication interface with external devices (such as sensors, memory, etc.) to ensure that data can be transmitted correctly. Setting the configuration mode: according to specific application requirements, set the configuration mode of the first processor, such as the configuration of modules such as timers and counters. Loading default parameters: Loading some default operating parameters into the corresponding registers to provide a basis for subsequent normal operation. During the initialization process, the first processor may execute some self-test programs to check whether the hardware is working properly and whether the firmware is loaded correctly. If a problem is found, an error handling mechanism may be triggered, such as reconfiguration, sending an error signal, etc.
[0046] S303 , executing a startup operation on the baseboard management controller in parallel according to the power-on signal through the baseboard management controller.
[0047] In one example, this step is executed in parallel with step S302, and there is no order of precedence. That is, the power-on signal is sent to the first processor and the baseboard management controller respectively, and then the first processor performs corresponding actions, and the baseboard management controller also performs corresponding actions.
[0048] In one example, performing a startup operation on the baseboard management controller in parallel according to a power-on signal by the baseboard management controller includes: Initialize the built-in hardware devices in parallel according to the power-on signal through the baseboard management controller; The baseboard management controller initializes the external hardware device according to the power-on signal to complete the startup operation of the baseboard management controller.
[0049] In one example, the baseboard management controller performs the startup operation as the uboot stage of the BMC firmware. Specifically, in the uboot stage of the BMC firmware startup, the hardware initialization operation is first performed, including the configuration of key hardware such as the CPU and memory controller to ensure that the system has a basic operating environment. For example, the CPU operating frequency, memory access parameters, etc. are set to prepare for the subsequent system startup. Then the operating system kernel and the root file system are loaded. After the hardware initialization is completed, the uboot stage will load the operating system kernel and the initial root file system into the memory. Then the network-related parameters need to be set. Specifically, it includes configuring the network interface, setting the IP address, etc., so that the BMC can communicate with external devices. In some application scenarios with high security requirements, the BMC firmware will also perform trust measurement in the uboot stage. Specifically, it includes integrity checks on key components such as the file system, boot program, and kernel. After confirming the credibility of these components, the baseboard management controller is started.
[0050] S304, generating an indication signal in parallel according to the power-on signal by the second processor, and controlling the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is complete; and the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation.
[0051] In an example, this step can refer to the content of step S204, which will not be repeated here.
[0052] S305. Send a power-on signal to the second processor via the first processor at a second preset time after receiving the indication signal, and control the server to start the operating system via the second processor; wherein the second preset time is determined by the time when the first processor receives the indication signal and the time taken by the baseboard management controller to complete the startup operation.
[0053] In one example, the second preset time is determined by the time when the first processor receives the indication signal and the duration of the baseboard management controller completing the startup operation, including: The second preset time is a time value of the time when the first processor receives the indication signal plus the time length when the baseboard management controller completes the startup operation.
[0054] In one example, the time when the first processor receives the indication signal may be the first preset time, namely T1. The second preset time is T2, and the time length for the baseboard management controller to complete the startup operation is F1, then T2=T1+F1. Generally, F1 is 10S.
[0055] In one example, the time length for the baseboard management controller to complete the startup operation is determined according to the historical usage record of the current server.
[0056] Specifically, it may be determined by an average value of the time taken by the baseboard management controller to complete the startup operation in the historical usage records, or it may be predicted by a preset model, which is not limited here.
[0057] The advantage of such a setting is that the duration can be determined in real time according to different usage scenarios, and can also be determined according to the model of the current server, which is highly flexible and will not cause the present embodiment to fail to be implemented when the scenario is changed because the user sets a fixed value.
[0058] It is worth noting that if a delay function is set in the first processor, but the delay time point is not the second preset moment, that is, the delay is not set at this time point, then even if the delay is set, the decoupling function of the first processor and the baseboard management controller cannot be achieved. This is because the signal time point of the first processor has clear timing requirements for the signal timing.
[0059] In one example, the power-on signal may be a RUN_POWER_EN signal. The first processor sends a RUN_POWER_EN signal to the second processor after the F1 duration after receiving the indication signal, and controls the server to start the operating system through the second processor. The reason for this setting is that after the server is powered on again after power failure, there is no need to wait for the BMC to be activated, and the CPLD directly executes the power-on sequence to ensure the decoupling function of the server. However, in the actual process, the BMC may fail to display the storage information of the device last time during the startup process, which may cause the basic input and output system to crash under this condition. Therefore, the time it takes for the BMC to complete the startup operation must be guaranteed. Therefore, the CPLD is set to send a RUN_POWER_EN signal to the second processor after the F1 duration after receiving the indication signal to ensure the time it takes for the BMC to complete the startup operation.
[0060] In one example, controlling the server to start an operating system through the second processor includes: The second processor controls the basic input and output system to start up, so as to complete the server starting up the operating system; wherein the server includes the basic input and output system.
[0061] In one example, the second processor controls the server to start the operating system, specifically, it can control the Basic Input Output System (BIOS) to start. Since the BMC has already performed the startup operation in parallel according to the power-on signal, it is only necessary to control the BIOS to start to complete the server startup. For a clearer explanation, please refer to Figure 4 The signaling interaction diagram of a server startup operation is shown in FIG. The specific steps are as follows: S401. Send a power-on signal to a first processor.
[0062] In one example, this step is performed by a power module.
[0063] S402: Perform initialization operation.
[0064] In one example, this step is performed by the first processor and is performed after step S401.
[0065] S403: Send a power-on signal to a baseboard management controller.
[0066] In one example, this step is performed by a power module and is performed simultaneously with step S401.
[0067] S404: Execute a startup operation.
[0068] In one example, this step is performed by a baseboard management controller, and is performed in parallel with step S402 and after step S403 .
[0069] S405: Send a power-on signal to the second processor.
[0070] In one example, this step is performed by a power module and is performed simultaneously with step S401.
[0071] S406: Generate an indication signal, and control the indication signal to be sent to the first processor at a first preset time.
[0072] In one example, this step is performed by the second processor and is performed after step S405.
[0073] S407 , sending a power-on signal to the second processor at a second preset time after receiving the indication signal.
[0074] In one example, this step is performed by the first processor and is performed after step S406.
[0075] S408: Control the server to start the operating system.
[0076] In one example, this step is performed by the second processor and is performed after step S407.
[0077] The present application provides a server startup operation method, which sends a power-on signal to a first processor, a baseboard management controller, and a second processor through a power module; wherein the power-on signal is used to indicate that the power module of the server is powered on. The first processor is initialized according to the power-on signal. The baseboard management controller is used to perform startup operations on the baseboard management controller in parallel according to the power-on signal. The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time; finally, the first processor sends a power-on signal to the second processor at a second preset time after receiving the indication signal, and controls the server to start the operating system through the second processor. By adopting this technical solution, the power-on timing signal is monitored in real time through the CPLD, and the minimum time interval is set, so that the decoupling function of the BMC and the CPLD is realized when the server is powered on again, thereby shortening the server startup time.
[0078] Figure 5 A flow chart of a server startup operation method is shown. The server includes a power module, a first processor, a baseboard management controller, and a second processor. This embodiment is completed on the basis of the above embodiment, and this embodiment can be combined with various optional solutions in one or more of the above embodiments. Specifically, refer to the following steps: S501. Send a power-on signal to a first processor, a baseboard management controller, and a second processor through a power module; wherein the power-on signal is used to indicate that the power module of the server is powered on.
[0079] In an example, this step can refer to the content of step S301, which will not be repeated here.
[0080] S502: Initialize the first processor according to a power-on signal.
[0081] In an example, this step can refer to the content of step S302, which will not be repeated here.
[0082] S503 , executing a startup operation on the baseboard management controller in parallel according to the power-on signal through the baseboard management controller.
[0083] In an example, this step can refer to the content of step S303, which will not be repeated here.
[0084] S504, generate an indication signal in parallel according to the power-on signal by the second processor, and control the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is complete; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation.
[0085] In an example, this step can refer to the content of step S304, which will not be repeated here.
[0086] S505: After receiving the indication signal, the first processor sends a power-on signal to the second processor, and controls the server to start the operating system through the second processor.
[0087] In one example, the time when the first processor receives the indication signal may be a first preset time, namely T1. In this embodiment, the first processor sends a RUN_POWER_EN signal to the second processor at time T3, and controls the server to start the operating system through the second processor. In this embodiment, T3 is a time slightly later than T1.
[0088] In one example, controlling the server to start an operating system through the second processor includes: The basic input-output system is started up by the second processor, and the basic input-output system is controlled to perform an initialization operation at a third preset time to complete the server starting up the operating system; wherein the third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation; wherein the server includes a basic input-output system.
[0089] In one example, the third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation, including: The third preset time is a time value obtained by adding the time when the second processor receives the power-on signal to the time length when the baseboard management controller completes the startup operation.
[0090] In one example, the moment when the second processor receives the power-on signal is recorded as the moment when the first processor sends the power-on signal, that is, T3. In this embodiment, the moment when the second processor controls the basic input and output system to start is also T3, that is, the moment the second processor receives the power-on signal, it immediately controls the basic input and output system to start. The time length for the baseboard management controller to complete the startup operation is F1, and the third preset time is recorded as T4, then T4=T3+F1. It is worth noting that if a delay function is set in the basic input and output system, but it is not the third preset time, that is, the delay is not set at this time point, even if the delay is set, the decoupling function of the first processor and the baseboard management controller cannot be realized.
[0091] The reason for this setting is that the BMC will restart immediately when it is powered on again after a power outage, but the startup function of the BMC is not completed at this time, causing the BIOS to return an error state when starting to initialize the PCI device, causing the server BIOS startup program to crash, which directly causes the server to crash. In this embodiment, by setting the F1 delay, it can be ensured that the baseboard management controller completes the startup operation, and then during the startup process of the BIOS, the F1 delay before the initialization operation can solve the crash problem. For a clearer explanation, please refer to Figure 6 The signaling interaction diagram of a server startup operation is shown in FIG. The specific steps are as follows: S601. Send a power-on signal to a first processor.
[0092] In one example, this step is performed by a power module.
[0093] S602: Perform initialization operation.
[0094] In one example, this step is performed by the first processor and is performed after step S601.
[0095] S603: Send a power-on signal to the baseboard management controller.
[0096] In one example, this step is performed by a power module and is performed simultaneously with step S601.
[0097] S604: Execute a startup operation.
[0098] In one example, this step is performed by a baseboard management controller, and is performed after step S603 and in parallel with step S602 .
[0099] S605: Send a power-on signal to the second processor.
[0100] In one example, this step is performed by a power module and is performed simultaneously with step S601.
[0101] S606: Generate an indication signal, and control the indication signal to be sent to the first processor at a first preset time.
[0102] In one example, this step is performed by the second processor and is performed after step S605.
[0103] S607: After receiving the indication signal, send a power-on signal to the second processor.
[0104] In one example, this step is performed by the first processor and is performed after step S606.
[0105] S608: Control the basic input and output system to start.
[0106] In one example, this step is performed by the second processor and is performed after step S607.
[0107] S609: Perform an initialization operation at a third preset time to complete the server booting the operating system.
[0108] In one example, this step is performed by a basic input and output system and is performed after step S608 .
[0109] In one example, controlling the basic input and output system to perform an initialization operation at a third preset time includes: Controlling the basic input and output system to scan the bus, the bridge and the device step by step at a third preset time; Read the information in the configuration space and allocate resources to the device.
[0110] The present application provides a server startup operation method, which sends a power-on signal to a first processor, a baseboard management controller, and a second processor through a power module; wherein the power-on signal is used to indicate that the power module of the server is powered on. The first processor is initialized according to the power-on signal. The baseboard management controller is used to perform startup operations on the baseboard management controller in parallel according to the power-on signal. The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time. Finally, after the first processor receives the indication signal, it sends a power-on signal to the second processor, and controls the server to start the operating system through the second processor. By adopting this technical solution, the BIOS is started immediately after the CPLD is powered off and powered on again, and a delay is performed before the PCI enumeration of the BIOS to ensure that the basic functions of the BMC in the Uboot stage can be completed, solving the problem of waiting too long after the server is powered off.
[0111] Figure 7 1 is a schematic diagram of the structure of a server startup operation device provided by an embodiment of the present disclosure. The server startup operation device can be understood as the above electronic device or a part of the functional modules in the above electronic device. Figure 7 As shown, the server startup operation device 70 includes a power module 701, a first processor 702, a baseboard management controller 703 and a second processor 704. The device 70 includes: The power module 701 is used to send a power-on signal to the first processor, the baseboard management controller, and the second processor; wherein the power-on signal is used to indicate that the power module of the server is powered on; The first processor 702 is used to initialize the first processor according to the power-on signal; The baseboard management controller 703 is used to perform a startup operation on the baseboard management controller in parallel according to the power-on signal; The second processor 704 is used to generate an indication signal in parallel according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is completed; the first preset time is determined by the time when the first processor receives the power-on signal and the time length of the first processor completing the initialization operation; The first processor 702 is used to control the server to start the operating system according to the instruction signal.
[0112] In an example, the first processor 702 is specifically configured to: At a second preset time after receiving the indication signal, a power-on signal is sent to the second processor, and the server is controlled by the second processor to start the operating system; wherein the second preset time is determined by the time when the first processor receives the indication signal and the time it takes for the baseboard management controller to complete the startup operation.
[0113] In one example, the second preset time is determined by the time when the first processor receives the indication signal and the duration of the baseboard management controller completing the startup operation, including: The second preset time is a time value of the time when the first processor receives the indication signal plus the time length when the baseboard management controller completes the startup operation.
[0114] In an example, the first processor 702 is specifically configured to: The second processor controls the basic input and output system to start up, so as to complete the server starting up the operating system; wherein the server includes the basic input and output system.
[0115] In an example, the first processor 702 is specifically configured to: After receiving the indication signal, the first processor sends a power-on signal to the second processor, and controls the server to start the operating system through the second processor.
[0116] In an example, the first processor 702 is specifically configured to: The basic input-output system is started up by the second processor, and the basic input-output system is controlled to perform an initialization operation at a third preset time to complete the server starting up the operating system; wherein the third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation; wherein the server includes a basic input-output system.
[0117] In one example, the third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation, including: The third preset time is a time value obtained by adding the time when the second processor receives the power-on signal to the time length when the baseboard management controller completes the startup operation.
[0118] In an example, the first processor 702 is specifically configured to: Controlling the basic input and output system to scan the bus, the bridge and the device step by step at a third preset time; Read the information in the configuration space and allocate resources to the device.
[0119] In one example, the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation, including: The first preset time is a time value obtained by adding the time when the first processor receives the power-on signal to the time length when the first processor completes the initialization operation.
[0120] In one example, before sending the power-on signal to the first processor, the baseboard management controller, and the second processor through the power module, the apparatus 70 further includes: The power module 701 is used to abnormally cut off power and to restore power.
[0121] In one example, after the power module is abnormally powered off, the device 70 further includes: The power module 701 is used to detect that the power module is powered on, and then generate a power-on signal through the power module.
[0122] In one example, the apparatus 70 further includes: The first processor 702 is used to monitor the power-on signal in real time.
[0123] In an example, the first processor 702 is specifically configured to perform an initialization operation on the firmware in the first processor according to a power-on signal.
[0124] In one example, the first processor 702 is specifically configured to: initialize the memory according to the power-on signal, and read the feature control bit; Determine the configuration mode according to the feature control bit; The bit stream is loaded according to the configuration mode, and if the preset signal bit is detected to be the preset signal, the initialization operation on the first processor is completed.
[0125] In one example, the baseboard management controller 703 is used to initialize the built-in hardware devices in parallel according to the power-on signal; The external hardware device is initialized according to the power-on signal to complete the startup operation of the baseboard management controller.
[0126] In one example, the power module 701 is electrically connected to the first processor 702 ; the power module 701 is electrically connected to the baseboard management controller 703 ; the power module 701 is electrically connected to the second processor 704 ; the first processor 702 is electrically connected to the second processor 704 .
[0127] In one example, the number of servers is multiple.
[0128] For the description of the features in the embodiment corresponding to the server startup operation device, reference can be made to the relevant description of the embodiment corresponding to the server startup operation method, which will not be repeated here.
[0129] The embodiment of the present application also provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned server startup operation method embodiments. The specific steps are as follows: Sending a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein the power-on signal is used to indicate that the power module of the server is powered on; performing an initialization operation on the first processor according to a power-on signal by the first processor; Performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller; The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is completed; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor controls the server to start the operating system according to the instruction signal.
[0130] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps in any of the above-mentioned server startup operation method embodiments when running, and the specific steps are as follows: Sending a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein the power-on signal is used to indicate that the power module of the server is powered on; performing an initialization operation on the first processor according to a power-on signal by the first processor; Performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller; The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is completed; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor controls the server to start the operating system according to the instruction signal.
[0131] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.
[0132] The embodiment of the present application further provides a computer program product, the computer program product comprising a computer program, and when the computer program is executed by a processor, the steps in any of the above server startup operation method embodiments are implemented. The specific steps are as follows: Sending a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein the power-on signal is used to indicate that the power module of the server is powered on; performing an initialization operation on the first processor according to a power-on signal by the first processor; Performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller; The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is completed; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor controls the server to start the operating system according to the instruction signal.
[0133] The embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, the non-volatile computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned server startup operation method embodiments are implemented. The specific steps are as follows: Sending a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein the power-on signal is used to indicate that the power module of the server is powered on; performing an initialization operation on the first processor according to a power-on signal by the first processor; Performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller; The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is completed; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor controls the server to start the operating system according to the instruction signal.
[0134] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.
[0135] The above is a detailed introduction to a server startup operation method provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core ideas of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.
Claims
1. A server startup operation method, characterized in that: The server includes a power module, a first processor, a baseboard management controller and a second processor, and the method includes: Sending a power-on signal to the first processor, the baseboard management controller and the second processor through the power module; wherein the power-on signal is used to indicate that the power module of the server is powered on; performing, by the first processor, an initialization operation on the first processor according to the power-on signal; Performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller; Generate an indication signal in parallel by the second processor according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is complete; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor controls the server to start an operating system according to the indication signal.
2. The server startup operation method according to claim 1, characterized in that: The controlling the server to start the operating system according to the indication signal by the first processor includes: The first processor sends a power-on signal to the second processor at a second preset time after receiving the indication signal, and the second processor controls the server to start the operating system; wherein the second preset time is determined by the time when the first processor receives the indication signal and the time length for the baseboard management controller to complete the startup operation.
3. The server startup operation method according to claim 2, characterized in that: The second preset time is determined by the time when the first processor receives the indication signal and the time length when the baseboard management controller completes the startup operation, including: The second preset time is a time value obtained by adding the time when the first processor receives the indication signal to the time length when the baseboard management controller completes the startup operation.
4. The server startup operation method according to claim 2, characterized in that: The controlling the server to start the operating system through the second processor includes: The second processor controls the basic input and output system to start up, so as to complete the server starting up the operating system; wherein, the server includes the basic input and output system.
5. The server startup operation method according to claim 1, characterized in that: The controlling the server to start the operating system according to the indication signal by the first processor includes: After receiving the indication signal, the first processor sends a power-on signal to the second processor, and controls the server to start the operating system through the second processor.
6. The server startup operation method according to claim 5, characterized in that: The controlling the server to start the operating system through the second processor includes: The basic input-output system is started up by controlling the second processor, and the basic input-output system is controlled to perform an initialization operation at a third preset time to complete starting up the operating system of the server; wherein the third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation; wherein the server includes the basic input-output system.
7. The server startup operation method according to claim 6, characterized in that: The third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation, including: The third preset time is a time value obtained by adding the time when the second processor receives the power-on signal to the time length when the baseboard management controller completes the startup operation.
8. The server startup operation method according to claim 6, characterized in that: The controlling the basic input and output system to perform an initialization operation at a third preset time includes: Controlling the basic input and output system to scan buses, bridges and devices step by step at a third preset time; The information in the configuration space is read and resources are allocated to the device.
9. The server startup operation method according to claim 1, characterized in that: The first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation, including: The first preset time is a time value obtained by adding the time when the first processor receives the power-on signal to the time length for the first processor to complete the initialization operation.
10. The server startup operation method according to claim 1, characterized in that: Before sending the power-on signal to the first processor, the baseboard management controller and the second processor through the power module, the method further includes: The power module is abnormally powered off and then powered on again.
11. The server startup operation method according to claim 10, characterized in that: After the power module is abnormally powered off, the method further includes: When it is detected that the power module is powered on, a power-on signal is generated by the power module.
12. The server startup operation method according to claim 11, characterized in that: The method further comprises: The power-on signal is monitored in real time by the first processor.
13. The server startup operation method according to claim 1, characterized in that: The initializing operation of the first processor according to the power-on signal by the first processor includes: The firmware in the first processor is initialized by the first processor according to the power-on signal.
14. The server startup operation method according to claim 13, characterized in that: The initializing operation of the firmware in the first processor according to the power-on signal by the first processor includes: Initializing the memory according to the power-on signal and reading the feature control bit by the first processor; determining, by the first processor, a configuration mode according to the feature control bit; The first processor loads the bit stream according to the configuration mode and detects that the preset signal bit is a preset signal, thereby completing the initialization operation of the first processor.
15. The server startup operation method according to claim 1, characterized in that: The performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller includes: Initializing the built-in hardware devices in parallel according to the power-on signal by the baseboard management controller; The baseboard management controller initializes the external hardware device according to the power-on signal to complete the startup operation of the baseboard management controller.
16. The server startup operation method according to claim 1, characterized in that: The power module is electrically connected to the first processor; the power module is electrically connected to the baseboard management controller; the power module is electrically connected to the second processor; the first processor is electrically connected to the second processor.
17. The server startup operation method according to any one of claims 1 to 16, characterized in that: The number of the servers is multiple.
18. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the server startup operation method as claimed in any one of claims 1 to 17 when executing the computer program.
19. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the server startup operation method according to any one of claims 1 to 17.
20. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the server startup operation method according to any one of claims 1 to 17 are implemented.
Citation Information
Patent Citations
Initialization method of multi-core processor and related device
CN111857844A
Device and starting method of device
CN113094111A
Processing method, apparatus and device for starting apparatus, and storage medium
CN113545093A
Multi-processing-unit system starting method and device, storage medium and electronic equipment
CN114510287A
Server quick starting system, method and equipment, medium and program product
CN118567732A