Server startup operation method

Abstract

The present application provides a server startup operation method, which relates to the technical field of servers. In this method, a power-on signal is sent to a first processor, a baseboard management controller, and a second processor through a power supply module. Then, the first processor initializes itself according to the power-on signal, and at the same time, the baseboard management controller performs a startup operation on itself in parallel according to the power-on signal. Also at the same time, the second processor generates an indication signal in parallel according to the power-on signal and controls the indication signal to be sent to the first processor at a first preset moment. Finally, the first processor controls the server to start the operating system according to the indication signal. By adopting this technical solution, the purpose of shortening the overall startup duration of the server and improving the server startup efficiency can be achieved.

Description

Technical Field

[0001] This application relates to the technical field of servers, and particularly to a method for server startup operation. Background Art

[0002] Currently, servers are applied in various fields, but there are mutual dependencies among various management firmware in current servers. Specifically, during the server startup process, the power-on sequence of the processor must wait until the baseboard management controller in the server motherboard is activated before it can be executed. This execution method will lead to a longer startup time of the server, and as a result, the related services associated with the server cannot be executed in a timely manner.

[0003] Therefore, there is an urgent need for a method for server startup operation that can enable the server to start without relying on the startup execution sequence of fixed devices during the startup process, thereby shortening the overall startup time of the server and improving the startup efficiency of the server. Summary of the Invention

[0004] This application provides a method for server startup operation, which can enable the server to start without relying on the startup execution sequence of fixed devices during the startup process, thereby shortening the overall startup time of the server and improving the startup efficiency of the server.

[0005] This application provides a method for server startup operation. The server includes a power module, a first processor, a baseboard management controller, and a second processor. The method includes:

[0006] Sending a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein, the power-on signal is used to indicate that the power module of the server is powered on;

[0007] Initializing the first processor by the first processor according to the power-on signal;

[0008] Performing a startup operation on the baseboard management controller in parallel by the baseboard management controller according to the power-on signal;

[0009] Generating an indication signal in parallel by the second processor according to the power-on signal, and controlling the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to indicate that the second processor is configured; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation;

[0010] Controlling the server to start the operating system by the first processor according to the indication signal.

[0011] The present application also provides a server startup operation device, which includes a power supply module, a first processor, a baseboard management controller, and a second processor. The device includes:

[0012] The power supply module is configured to send a power-on signal to the first processor, the baseboard management controller, and the second processor; wherein, the power-on signal is used to indicate that the power supply module of the server is powered on;

[0013] The first processor is configured to perform an initialization operation on the first processor according to the power-on signal;

[0014] The baseboard management controller is configured to perform a startup operation on the baseboard management controller in parallel according to the power-on signal;

[0015] The second processor is configured to generate an indication signal in parallel according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to indicate that the configuration of the second processor is completed; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation;

[0016] The first processor is configured to control the server to start the operating system according to the indication signal.

[0017] The present application also provides an electronic device, including: a memory for storing a computer program; a processor for implementing the steps of any of the above server startup operation methods when executing the computer program.

[0018] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above server startup operation methods are implemented.

[0019] The present application also provides a computer program product, including a computer program. When the computer program is executed by a processor, the steps of any of the above server startup operation methods are implemented.

[0020] In this application, the power supply module sends a power-on signal to the first processor, the baseboard management controller, and the second processor. Then, the first processor initializes itself according to the power-on signal, and at the same time, the baseboard management controller performs a startup operation in parallel according to the power-on signal, and at the same time, the second processor generates an indication signal in parallel according to the power-on signal and controls the indication signal to be sent to the first processor at a first preset moment. Since the first processor, the baseboard management controller, and the second processor process the power-on signal simultaneously, there is no strongly correlated situation. Finally, the first processor controls the server to start the operating system according to the indication signal, thereby shortening the overall startup duration of the server and improving the startup efficiency of the server. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] To more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings required for the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0022] Figure 1 FIG. is a schematic circuit structure diagram for performing a server startup operation provided by an embodiment of the present disclosure;

[0023] Figure 2 FIG. is a schematic flowchart of a server startup operation method provided by an embodiment of the present disclosure;

[0024] Figure 3 FIG. is a schematic flowchart of a server startup operation method provided by an embodiment of the present disclosure;

[0025] Figure 4 FIG. is a signaling interaction diagram of a server startup operation provided by an embodiment of the present disclosure;

[0026] Figure 5 FIG. is a schematic flowchart of a server startup operation method provided by an embodiment of the present disclosure;

[0027] Figure 6 FIG. is a signaling interaction diagram of a server startup operation provided by an embodiment of the present disclosure;

[0028] Figure 7 FIG. is a schematic structural diagram of a server startup operation device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present application.

[0030] It should be noted that in the description of the present application, the terms "include", "comprise" or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects and not to describe a specific order or sequence.

[0031] In order to enable those skilled in the art of the present technology to better understand the solution of the present application, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0032] In the related art, after the server is powered off and restarted, the complex programmable logic device cannot be powered on until the baseboard management controller is activated, which results in too long a startup waiting time for the server and cannot meet the requirements of the actual scenario. Especially in the scenario where tens of thousands of servers are deployed in the data center, it is impossible for the operation and maintenance personnel to wait for the baseboard management controller to complete initialization one by one before starting up. In the actual operation process, the complex programmable logic device starts immediately after detecting the indication signal, which also causes the server to crash during startup. Therefore, in this embodiment, a server startup operation method is adopted to solve the above problems.

[0033] Combined with the specific hardware architecture on which a server startup operation method depends, the specific hardware architecture will be described herein. Specifically, reference can be made to Figure 1 A schematic circuit structure diagram showing the execution of the server startup operation.

[0034] The embodiments of the present application provide a server startup operation method. In combination with the execution process of a server startup operation method, the method will be described in detail. Specifically, reference can be made to Figure 2 A schematic flowchart of a server startup operation method is shown. The server includes a power module, a first processor, a baseboard management controller, and a second processor. The method includes:

[0035] S201: Send a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein, the power-on signal is used to indicate that the power module of the server is powered on.

[0036] This embodiment is applied to the scenario where the server suddenly loses power and then powers on again. Specifically, before the power supply module sends the power-on signal to the first processor, the baseboard management controller, and the second processor, the method further includes:

[0037] The power supply module loses power abnormally and then powers on again.

[0038] In one example, the power supply module of the server loses power abnormally, causing the server to fail to work properly, and then powers on again to make the server resume operation.

[0039] In one example, the power supply module is electrically connected to the first processor; the power supply module is electrically connected to the baseboard management controller; the power supply module is electrically connected to the second processor; the first processor is electrically connected to the second processor.

[0040] In one example, after the power supply module loses power abnormally, the method further includes:

[0041] When it is detected that the power supply module is powered on, a power-on signal is generated by the power supply module.

[0042] In one example, after the power supply module powers on again, a power-on signal is generated by the power supply module.

[0043] In this embodiment, the power-on signal can be the HPM_STBY_EN signal. The power supply module simultaneously sends the power-on signal to the first processor, the baseboard management controller, and the second processor. In this embodiment, the first processor can be a Complex Programmable Logic Device (CPLD for short). Among them, the CPLD consists of programmable logic macro cells surrounding a central programmable interconnect matrix unit. It realizes flexible configuration of logic functions through programmable logic units and interconnect resources. The Baseboard Management Controller (BMC for short) is used to be integrated in servers, network devices, and other computer systems, for monitoring the hardware status of the device, performing remote management operations, and providing monitoring and control functions.

[0044] In one example, the second processor (Central Processing Unit, CPU for short) can be the core component of the system, responsible for executing program instructions, processing data, and controlling the operation of the entire system.

[0045] In the related art, the power-on timing of the CPLD that controls the server startup must wait until the BMC management firmware of the server motherboard is activated before the power-on timing of the CPLD can be executed. This will cause the duration of the server restart to become longer. In this embodiment, by simultaneously sending a power-on signal to the CPLD, BMC, and CPU, the CPLD, BMC, and CPU work simultaneously, thereby eliminating the timing problem between the CPLD and BMC.

[0046] S202. Initialize the first processor by the first processor according to the power-on signal.

[0047] In one example, initializing the first processor by the first processor according to the power-on signal includes:

[0048] Initialize the firmware in the first processor by the first processor according to the power-on signal.

[0049] In one example, after receiving the power-on signal, the first processor initializes the firmware in the first processor.

[0050] S203. Parallelly execute a startup operation on the baseboard management controller by the baseboard management controller according to the power-on signal.

[0051] In one example, after receiving the power-on signal, the baseboard management controller is started in parallel. In this embodiment, the startup operation of the baseboard management controller after receiving the power-on signal and the initialization operation of the first processor after receiving the power-on signal are performed simultaneously.

[0052] S204. Parallelly generate an indication signal by the second processor according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to represent that the second processor configuration is completed; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration of the first processor to complete the initialization operation.

[0053] In one example, the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration of the first processor to complete the initialization operation, including:

[0054] The first preset moment is the moment value obtained by adding the moment when the first processor receives the power-on signal and the duration of the first processor to complete the initialization operation.

[0055] In one example, after receiving the power-on signal, the second processor generates an indication signal in parallel. This indication signal is used to indicate that the configuration of the second processor is complete. Specifically, this indication signal can be the FPGA_Ready signal. In this embodiment, the time when the second processor sends the indication signal is the same as the time when the first processor receives the indication signal. In this embodiment, for the sake of convenience of expression, denote the time when the first processor receives the power-on signal as T0, the duration for the first processor to complete the initialization operation as F0, and the first preset time as T1, then T1 = T0 + F0. Generally, F0 is 6S.

[0056] S205. The first processor controls the server to start the operating system according to the indication signal.

[0057] In one example, after receiving the indication signal, the first processor controls the server to start the operating system.

[0058] This application provides a method for operating a server to start. The power supply module sends a power-on signal to the first processor, the baseboard management controller, and the second processor. Then, the first processor performs an initialization operation on itself according to the power-on signal, and at the same time, the baseboard management controller performs a startup operation on itself in parallel according to the power-on signal, and at the same time, the second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at the first preset time. Since the first processor, the baseboard management controller, and the second processor process the power-on signal simultaneously, there is no strongly associated situation. Finally, the first processor controls the server to start the operating system according to the indication signal, thereby shortening the overall duration of the server startup and improving the efficiency of the server startup.

[0059] Figure 3 The flowchart shows a method for operating a server to start. The server includes a power supply module, a first processor, a baseboard management controller, and a second processor. This embodiment is completed based on the above embodiment, and this embodiment can be combined with each optional solution in one or more of the above embodiments. Specifically, the following steps can be referred to:

[0060] S301. The power supply module sends a power-on signal to the first processor, the baseboard management controller, and the second processor; wherein, the power-on signal is used to indicate that the power supply module of the server is powered on.

[0061] In one example, the number of servers is multiple.

[0062] In this embodiment, it can be used in a system composed of multiple servers. That is, this embodiment can be used in the scenario where multiple servers are powered off and then powered on again.

[0063] In one example, the method further includes:

[0064] Real - time monitoring of the power - on signal by the first processor.

[0065] In one example, after the server is powered on, the first processor continuously monitors the power - on signal in real - time, and then performs subsequent operations according to the power - on signal.

[0066] S302. Initialize the first processor according to the power - on signal by the first processor.

[0067] In one example, initializing the firmware in the first processor according to the power - on signal by the first processor includes:

[0068] Initialize the memory according to the power - on signal by the first processor and read the feature control bits;

[0069] Determine the configuration mode according to the feature control bits by the first processor;

[0070] Load the bitstream according to the configuration mode by the first processor, and if the preset signal bit is the preset signal, complete the initialization operation of the first processor.

[0071] In one example, after the first processor is powered on, it will automatically perform a reset operation, resetting the internal memory, registers, and logic units to the initial state to prepare for subsequent initialization. Then, download the firmware program into the first processor through the configuration interface. This step usually requires using a dedicated programmer or through the configuration circuit on the development board. During the configuration process, the first processor will configure the internal logic according to the downloaded firmware program, including setting the functions of I / O pins, clock frequencies, etc. After the configuration is completed, the first processor starts to execute the initialization program in the firmware. The main tasks of the initialization program include: configuring the communication interfaces with external devices (such as sensors, memories, etc.) to ensure correct data transmission. Setting the configuration mode: setting the configuration mode of the first processor according to specific application requirements, such as the configuration of modules like timers and counters. Loading default parameters: loading some default operating parameters into the corresponding registers to provide a basis for subsequent normal operation. During the initialization process, the first processor may execute some self - test programs to check whether the hardware is working properly and whether the firmware is correctly loaded, etc. If problems are found, it may trigger an error - handling mechanism, such as re - configuration, sending error signals, etc.

[0072] S303. Parallelly perform a startup operation on the baseboard management controller according to the power - on signal by the baseboard management controller.

[0073] In one example, this step is executed in parallel with step S302, without a sequential order. That is, the power-on signal is sent to the first processor and the baseboard management controller respectively, and then the first processor performs corresponding actions, and the baseboard management controller also performs corresponding actions.

[0074] In one example, the baseboard management controller performs a startup operation on itself in parallel according to the power-on signal, including:

[0075] The baseboard management controller initializes the built-in hardware devices in parallel according to the power-on signal;

[0076] The baseboard management controller initializes the external hardware devices according to the power-on signal to complete the startup operation of the baseboard management controller.

[0077] In one example, the startup operation performed by the baseboard management controller is the uboot stage of the BMC firmware. Specifically, in the uboot stage of the BMC firmware startup, the first thing to do is the initialization operation of the hardware, including the configuration of key hardware such as the CPU and memory controller to ensure that the system has a basic operating environment. For example, set the working frequency of the CPU, the access parameters of the memory, etc., to prepare for the subsequent system startup. Then the operating system kernel and root file system are loaded. After the hardware initialization is completed, the uboot stage will load the operating system kernel and the initial root file system into the memory. Then the network-related parameters need to be set. Specifically, it includes configuring the network interface, setting the IP address, etc., so that the BMC can communicate with external devices. In some application scenarios with high security requirements, the BMC firmware will also perform trusted measurement in the uboot stage. Specifically, it includes the integrity check of key components such as the file system, bootloader, and kernel. After confirming the trustworthiness of these components, the startup operation of the baseboard management controller is performed.

[0078] S304. The second processor generates an indication signal in parallel according to the power-on signal and controls the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to indicate that the second processor has completed the configuration; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration of the first processor to complete the initialization operation.

[0079] In one example, the content of this step can refer to the content of step S204 and will not be elaborated here.

[0080] S305. The first processor sends a power-on signal to the second processor at a second preset moment after receiving the indication signal, and controls the second processor to start the operating system; wherein, the second preset moment is determined by the moment when the first processor receives the indication signal and the duration of the baseboard management controller to complete the startup operation.

[0081] In one example, the second preset moment is determined by the moment when the first processor receives the indication signal and the duration for the baseboard management controller to complete the startup operation, including:

[0082] The second preset moment is the moment value obtained by adding the duration for the baseboard management controller to complete the startup operation to the moment when the first processor receives the indication signal.

[0083] In one example, the moment when the first processor receives the indication signal can be the first preset moment, i.e., T1. Denote the second preset moment as T2, and the duration for the baseboard management controller to complete the startup operation as F1, then T2 = T1 + F1. Generally, F1 is 10S.

[0084] In one example, the duration for the baseboard management controller to complete the startup operation is determined according to the historical usage record of the current server.

[0085] Specifically, it can be determined by the average value of the duration for the baseboard management controller to complete the startup operation in the historical usage record, or it can be predicted through a preset model, which is not limited herein.

[0086] The advantage of such a setting is that this duration can be determined in real time according to different usage scenarios, or can be determined according to the model of the current server, with high flexibility, and it will not be unable to implement this embodiment when the scenario is changed because the user sets a fixed value.

[0087] It should be noted that if a delay function is set in the first processor, but the delay time point is not the second preset moment, that is, the delay is not set at this time point, then even if the delay is set, the decoupling function of the first processor and the baseboard management controller cannot be realized, because there are clear timing requirements for the signal timing of the first processor.

[0088] In one example, the power-on signal can be the RUN_POWER_EN signal. The first processor sends the RUN_POWER_EN signal to the second processor after a duration of F1 after receiving the indication signal, and controls the server to start the operating system through the second processor. The reason for such a setting is that after the server is powered off and then powered on again, there is no need to wait for the BMC to be activated, and the CPLD directly executes the power-on timing to ensure the decoupling function of the server. However, in the actual process, the BMC may probabilistically fail to display the storage information of the device last time during the startup process, which may cause the basic input / output system to crash under this condition. Therefore, it is necessary to ensure the duration for the BMC to complete the startup operation. Therefore, the CPLD is set to send the RUN_POWER_EN signal to the second processor after a duration of F1 after receiving the indication signal to ensure the duration for the BMC to complete the startup operation.

[0089] In one example, controlling the server to start the operating system by the second processor includes:

[0090] Controlling the basic input / output system to start by the second processor to complete the server's startup of the operating system; wherein, the server includes a basic input / output system.

[0091] In one example, the second processor controls the server to start the operating system. Specifically, it can be to control the basic input / output system (Basic Input Output System, abbreviated as BIOS) to start. Since the BMC has already performed startup operations in parallel according to the power-on signal. Therefore, currently, only controlling the basic input / output system to start can complete the startup of the server. For a clearer illustration, reference can be made to Figure 4 The signaling interaction diagram of a server startup operation shown. The specific steps are as follows:

[0092] S401. Send a power-on signal to the first processor.

[0093] In one example, this step is performed by the power supply module.

[0094] S402. Perform initialization operations.

[0095] In one example, this step is performed by the first processor and is executed after step S401.

[0096] S403. Send a power-on signal to the baseboard management controller.

[0097] In one example, this step is performed by the power supply module and is executed simultaneously with step S401.

[0098] S404. Perform startup operations.

[0099] In one example, this step is performed by the baseboard management controller, is executed in parallel with step S402, and is executed after step S403.

[0100] S405. Send a power-on signal to the second processor.

[0101] In one example, this step is performed by the power supply module and is executed simultaneously with step S401.

[0102] S406. Generate an indication signal and control the indication signal to be sent to the first processor at a first preset moment.

[0103] In one example, this step is performed by the second processor and is executed after step S405.

[0104] S407. Send a power-on signal to the second processor at a second preset moment after receiving the indication signal.

[0105] In one example, this step is executed by the first processor and is executed after step S406.

[0106] S408. Control the server to start the operating system.

[0107] In one example, this step is executed by the second processor and is executed after step S407.

[0108] This application provides a server startup operation method. In this method, a power-on signal is sent to the first processor, the baseboard management controller, and the second processor through a power module; wherein, the power-on signal is used to indicate that the power module of the server is powered on. The first processor initializes itself according to the power-on signal. The baseboard management controller performs a startup operation on itself in parallel according to the power-on signal. The second processor generates an indication signal in parallel according to the power-on signal and controls the indication signal to be sent to the first processor at a first preset moment; finally, the first processor sends a power-on signal to the second processor at a second preset moment after receiving the indication signal, and the second processor controls the server to start the operating system. By adopting this technical solution, the signals of the power-on timing are monitored in real time by the CPLD, and the minimum time interval is set to achieve the decoupling function of the BMC and the CPLD when the server is powered on again, thereby shortening the server startup duration.

[0109] Figure 5 The flowchart shows a server startup operation method. The server includes a power module, a first processor, a baseboard management controller, and a second processor. This embodiment is completed on the basis of the above embodiment, and this embodiment can be combined with each optional solution in one or more of the above embodiments. Specifically, the following steps can be referred to:

[0110] S501. Send a power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein, the power-on signal is used to indicate that the power module of the server is powered on.

[0111] In one example, the content of this step can refer to step S301 and will not be elaborated here.

[0112] S502. The first processor initializes itself according to the power-on signal.

[0113] In one example, the content of this step can refer to step S302 and will not be elaborated here.

[0114] S503. The baseboard management controller performs a startup operation on the baseboard management controller in parallel according to the power-on signal.

[0115] In one example, the content of this step can refer to the content of step S303 and will not be elaborated here.

[0116] S504. The second processor generates an indication signal in parallel according to the power-on signal and controls the indication signal to be sent to the first processor at a first preset time; wherein, the indication signal is used to indicate that the second processor configuration is completed; the first preset time is determined by the time when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation.

[0117] In one example, the content of this step can refer to the content of step S304 and will not be elaborated here.

[0118] S505. After the first processor receives the indication signal, it sends a power-on signal to the second processor, and the second processor controls the server to start the operating system.

[0119] In one example, the time when the first processor receives the indication signal can be the first preset time, that is, T1. In this embodiment, the first processor sends the RUN_POWER_EN signal to the second processor at time T3, and the second processor controls the server to start the operating system. In this embodiment, T3 is a time slightly later than T1.

[0120] In one example, controlling the server to start the operating system by the second processor includes:

[0121] The second processor controls the basic input / output system to start and controls the basic input / output system to perform an initialization operation at a third preset time to complete the server starting the operating system; wherein, the third preset time is determined by the time when the second processor receives the power-on signal and the duration for the baseboard management controller to complete the startup operation; wherein, the server includes a basic input / output system.

[0122] In one example, the third preset time is determined by the time when the second processor receives the power-on signal and the duration for the baseboard management controller to complete the startup operation, including:

[0123] The third preset time is the time value obtained by adding the time when the second processor receives the power-on signal and the duration for the baseboard management controller to complete the startup operation.

[0124] In one example, the moment when the second processor receives the power-on signal is the same as the moment when the first processor sends the power-on signal, i.e., T3. In this embodiment, the moment when the basic input / output system is started under the control of the second processor is also T3, that is, the second processor immediately controls the basic input / output system to start when it receives the power-on signal. The duration for the baseboard management controller to complete the startup operation is F1, and the third preset moment is denoted as T4, then T4 = T3 + F1. It should be noted that if a delay function is set in the basic input / output system, but not at the third preset moment, that is, no delay is set at this time point, even if a delay is set, the decoupling function between the first processor and the baseboard management controller cannot be achieved.

[0125] The reason for such a setting is that the BMC will restart immediately when powered on again after a power outage. At this time, the startup function of the BMC is not completed, resulting in an error status being returned when the BIOS initializes the PCI device during startup, causing the server BIOS startup program to crash and directly leading to the server crashing. In this embodiment, by setting the delay of F1, it can ensure that the baseboard management controller completes the startup operation. Then, during the startup process of the BIOS, a delay of F1 can be performed before the initialization operation to solve the problem of crashing. For a clearer illustration, reference can be made to Figure 6 the signaling interaction diagram of a server startup operation shown in

[0126] S601. Send a power-on signal to the first processor.

[0127] In one example, this step is performed by the power supply module.

[0128] S602. Perform initialization operations.

[0129] In one example, this step is performed by the first processor and is executed after step S601.

[0130] S603. Send a power-on signal to the baseboard management controller.

[0131] In one example, this step is performed by the power supply module and is executed simultaneously with step S601.

[0132] S604. Perform startup operations.

[0133] In one example, this step is performed by the baseboard management controller, is executed after step S603, and is executed in parallel with step S602.

[0134] S605. Send a power-on signal to the second processor.

[0135] In one example, this step is performed by the power supply module and is executed simultaneously with step S601.

[0136] S606. Generate an indication signal and control the indication signal to be sent to the first processor at a first preset moment.

[0137] In one example, this step is executed by the second processor and is executed after step S605.

[0138] S607. After receiving the indication signal, send a power-on signal to the second processor.

[0139] In one example, this step is executed by the first processor and is executed after step S606.

[0140] S608. Control the basic input / output system to start.

[0141] In one example, this step is executed by the second processor and is executed after step S607.

[0142] S609. Perform an initialization operation at a third preset moment to complete the server's startup of the operating system.

[0143] In one example, this step is executed by the basic input / output system and is executed after step S608.

[0144] In one example, controlling the basic input / output system to perform an initialization operation at a third preset moment includes:

[0145] Controlling the basic input / output system to scan the bus, bridge, and devices level by level at the third preset moment;

[0146] Read the information in the configuration space and allocate resources for the devices.

[0147] This application provides a method for server startup operation. In this method, a power-on signal is sent to the first processor, the baseboard management controller, and the second processor through the power module; wherein, the power-on signal is used to represent that the power module of the server is powered on. The first processor initializes itself according to the power-on signal. The baseboard management controller performs a startup operation in parallel according to the power-on signal. The second processor generates an indication signal in parallel according to the power-on signal and controls the indication signal to be sent to the first processor at a first preset moment. Finally, after the first processor receives the indication signal, it sends a power-on signal to the second processor, and the second processor controls the server to start the operating system. By adopting this technical solution, after the CPLD is powered off and then powered on again, the BIOS is immediately started, and a delay is performed before the PCI enumeration of the BIOS to ensure that the basic functions of the BMC can be completed in the Uboot stage, solving the problem of excessive waiting time after the server is powered off.

[0148] Figure 7It is a schematic structural diagram of a server startup operation device provided by an embodiment of the present disclosure. This server startup operation device can be understood as the above-mentioned electronic device or some functional modules in the above-mentioned electronic device. As Figure 7 shown, the server startup operation device 70 includes a power module 701, a first processor 702, a baseboard management controller 703, and a second processor 704. The device 70 includes:

[0149] The power module 701 is configured to send a power-on signal to the first processor, the baseboard management controller, and the second processor; wherein, the power-on signal is used to indicate that the power module of the server is powered on;

[0150] The first processor 702 is configured to perform an initialization operation on the first processor according to the power-on signal;

[0151] The baseboard management controller 703 is configured to perform a startup operation on the baseboard management controller in parallel according to the power-on signal;

[0152] The second processor 704 is configured to generate an indication signal in parallel according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to indicate that the second processor configuration is completed; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation;

[0153] The first processor 702 is configured to control the server to start the operating system according to the indication signal.

[0154] In one example, the first processor 702 is specifically configured to:

[0155] Send a power-on signal to the second processor at a second preset moment after receiving the indication signal, and control the server to start the operating system through the second processor; wherein, the second preset moment is determined by the moment when the first processor receives the indication signal and the duration for the baseboard management controller to complete the startup operation.

[0156] In one example, the second preset moment is determined by the moment when the first processor receives the indication signal and the duration for the baseboard management controller to complete the startup operation, including:

[0157] The second preset moment is the moment value obtained by adding the moment when the first processor receives the indication signal and the duration for the baseboard management controller to complete the startup operation.

[0158] In one example, the first processor 702 is specifically configured to:

[0159] Control the basic input / output system to start through the second processor to complete the server starting the operating system; wherein, the server includes a basic input / output system.

[0160] In one example, the first processor 702 is specifically configured to:

[0161] After receiving an indication signal through the first processor, send a power-on signal to the second processor, and control the server to start the operating system through the second processor.

[0162] In one example, the first processor 702 is specifically configured to:

[0163] Control the basic input / output system to start through the second processor, and control the basic input / output system to perform an initialization operation at a third preset time to complete the server's startup of the operating system; wherein, the third preset time is determined by the time when the second processor receives the power-on signal and the duration for the baseboard management controller to complete the startup operation; wherein, the server includes a basic input / output system.

[0164] In one example, the third preset time is determined by the time when the second processor receives the power-on signal and the duration for the baseboard management controller to complete the startup operation, including:

[0165] The third preset time is the time value obtained by adding the time when the second processor receives the power-on signal and the duration for the baseboard management controller to complete the startup operation.

[0166] In one example, the first processor 702 is specifically configured to:

[0167] Control the basic input / output system to sequentially scan the bus, bridge, and devices at the third preset time;

[0168] Read the information in the configuration space and allocate resources for the devices.

[0169] In one example, the first preset time is determined by the time when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation, including:

[0170] The first preset time is the time value obtained by adding the time when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation.

[0171] In one example, before the power supply module sends the power-on signal to the first processor, the baseboard management controller, and the second processor, the device 70 further includes:

[0172] The power supply module 701 is used for abnormal power-off and then re-power-on.

[0173] In one example, after the power supply module has an abnormal power-off, the device 70 further includes:

[0174] The power supply module 701 is used to detect that the power supply module is powered on, and then generate a power-on signal through the power supply module.

[0175] In one example, the device 70 further includes:

[0176] The first processor 702 is used to monitor the power-on signal in real time.

[0177] In one example, the first processor 702 is specifically used to initialize the firmware in the first processor according to the power-on signal.

[0178] In one example, the first processor 702 is specifically used to: initialize the memory according to the power-on signal and read the feature control bits;

[0179] Determine the configuration mode according to the feature control bits;

[0180] Load the bitstream according to the configuration mode, and if the preset signal bit is detected as the preset signal, the initialization operation of the first processor is completed.

[0181] In one example, the baseboard management controller 703 is used to initialize the built-in hardware devices in parallel according to the power-on signal;

[0182] Initialize the external hardware devices according to the power-on signal to complete the startup operation of the baseboard management controller.

[0183] In one example, the power module 701 is electrically connected to the first processor 702; the power module 701 is electrically connected to the baseboard management controller 703; the power module 701 is electrically connected to the second processor 704; the first processor 702 is electrically connected to the second processor 704.

[0184] In one example, the number of servers is multiple.

[0185] For the description of the features in the corresponding embodiments of the server startup operation device, reference can be made to the relevant descriptions in the corresponding embodiments of the server startup operation method, which will not be elaborated here one by one.

[0186] An embodiment of the present application further provides an electronic device, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above-mentioned embodiments of the server startup operation method. The specific steps are as follows:

[0187] Send the power-on signal to the first processor, the baseboard management controller, and the second processor through the power module; wherein, the power-on signal is used to indicate that the power module of the server is powered on;

[0188] Initialize the first processor by the first processor according to the power-on signal;

[0189] Execute the startup operation of the baseboard management controller in parallel by the baseboard management controller according to the power-on signal;

[0190] The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to represent that the configuration of the second processor is completed; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation;

[0191] The first processor controls the server to start the operating system according to the indication signal.

[0192] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. Wherein, the computer program is set to execute the steps in any of the above-mentioned server startup operation method embodiments when running, and the specific steps are as follows:

[0193] The power supply module sends a power-on signal to the first processor, the baseboard management controller and the second processor; wherein, the power-on signal is used to represent that the power supply module of the server is powered on;

[0194] The first processor initializes itself according to the power-on signal;

[0195] The baseboard management controller executes a startup operation on itself in parallel according to the power-on signal;

[0196] The second processor generates an indication signal in parallel according to the power-on signal, and controls the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to represent that the configuration of the second processor is completed; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation;

[0197] The first processor controls the server to start the operating system according to the indication signal.

[0198] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: various media such as USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), mobile hard disks, magnetic disks or optical discs that can store computer programs.

[0199] An embodiment of the present application further provides a computer program product. The above computer program product includes a computer program, and when the computer program is executed by a processor, it implements the steps in any of the above-mentioned server startup operation method embodiments. The specific steps are as follows:

[0200] Send a power-on signal to the first processor, the baseboard management controller, and the second processor through the power supply module; wherein, the power-on signal is used to indicate that the power supply module of the server is powered on;

[0201] Initialize the first processor by the first processor according to the power-on signal;

[0202] Execute a startup operation on the baseboard management controller in parallel by the baseboard management controller according to the power-on signal;

[0203] Generate an indication signal in parallel by the second processor according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to indicate that the configuration of the second processor is completed; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation;

[0204] Control the server to start the operating system by the first processor according to the indication signal.

[0205] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned server startup operation method embodiments are implemented. The specific steps are as follows:

[0206] Send a power-on signal to the first processor, the baseboard management controller, and the second processor through the power supply module; wherein, the power-on signal is used to indicate that the power supply module of the server is powered on;

[0207] Initialize the first processor by the first processor according to the power-on signal;

[0208] Execute a startup operation on the baseboard management controller in parallel by the baseboard management controller according to the power-on signal;

[0209] Generate an indication signal in parallel by the second processor according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset moment; wherein, the indication signal is used to indicate that the configuration of the second processor is completed; the first preset moment is determined by the moment when the first processor receives the power-on signal and the duration for the first processor to complete the initialization operation;

[0210] Control the server to start the operating system by the first processor according to the indication signal.

[0211] Those skilled in the art may further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0212] The above has introduced in detail a server startup operation method provided by this application. Specific examples are used herein to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A server startup operation method, characterized in that: The server includes a power module, a first processor, a baseboard management controller and a second processor, and the method includes: Sending a power-on signal to the first processor, the baseboard management controller and the second processor through the power module; wherein the power-on signal is used to indicate that the power module of the server is powered on; performing, by the first processor, an initialization operation on the first processor according to the power-on signal; Performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller; Generate an indication signal in parallel by the second processor according to the power-on signal, and control the indication signal to be sent to the first processor at a first preset time; wherein the indication signal is used to indicate that the configuration of the second processor is complete; the first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation; The first processor controls the server to start an operating system according to the indication signal.

2. The server startup operation method according to claim 1, characterized in that: The controlling the server to start the operating system according to the indication signal by the first processor includes: The first processor sends a power-on signal to the second processor at a second preset time after receiving the indication signal, and the second processor controls the server to start the operating system; wherein the second preset time is determined by the time when the first processor receives the indication signal and the time length for the baseboard management controller to complete the startup operation.

3. The server startup operation method according to claim 2, characterized in that: The second preset time is determined by the time when the first processor receives the indication signal and the time length when the baseboard management controller completes the startup operation, including: The second preset time is a time value obtained by adding the time when the first processor receives the indication signal to the time length when the baseboard management controller completes the startup operation.

4. The server startup operation method according to claim 2, characterized in that: The controlling the server to start the operating system through the second processor includes: The second processor controls the basic input and output system to start up, so as to complete the server starting up the operating system; wherein, the server includes the basic input and output system.

5. The server startup operation method according to claim 1, characterized in that: The controlling the server to start the operating system according to the indication signal by the first processor includes: After receiving the indication signal, the first processor sends a power-on signal to the second processor, and controls the server to start the operating system through the second processor.

6. The server startup operation method according to claim 5, characterized in that: The controlling the server to start the operating system through the second processor includes: The basic input-output system is started up by controlling the second processor, and the basic input-output system is controlled to perform an initialization operation at a third preset time to complete starting up the operating system of the server; wherein the third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation; wherein the server includes the basic input-output system.

7. The server startup operation method according to claim 6, characterized in that: The third preset time is determined by the time when the second processor receives the power-on signal and the time length for the baseboard management controller to complete the startup operation, including: The third preset time is a time value obtained by adding the time when the second processor receives the power-on signal to the time length when the baseboard management controller completes the startup operation.

8. The server startup operation method according to claim 6, characterized in that: The controlling the basic input and output system to perform an initialization operation at a third preset time includes: Controlling the basic input and output system to scan buses, bridges and devices step by step at a third preset time; The information in the configuration space is read and resources are allocated to the device.

9. The server startup operation method according to claim 1, characterized in that: The first preset time is determined by the time when the first processor receives the power-on signal and the time length for the first processor to complete the initialization operation, including: The first preset time is a time value obtained by adding the time when the first processor receives the power-on signal to the time length for the first processor to complete the initialization operation.

10. The server startup operation method according to claim 1, characterized in that: Before sending the power-on signal to the first processor, the baseboard management controller and the second processor through the power module, the method further includes: The power module is abnormally powered off and then powered on again.

11. The server startup operation method according to claim 10, characterized in that: After the power module is abnormally powered off, the method further includes: When it is detected that the power module is powered on, a power-on signal is generated by the power module.

12. The server startup operation method according to claim 11, characterized in that: The method further comprises: The power-on signal is monitored in real time by the first processor.

13. The server startup operation method according to claim 1, characterized in that: The initializing operation of the first processor according to the power-on signal by the first processor includes: The firmware in the first processor is initialized by the first processor according to the power-on signal.

14. The server startup operation method according to claim 13, characterized in that: The initializing operation of the firmware in the first processor according to the power-on signal by the first processor includes: Initializing the memory according to the power-on signal and reading the feature control bit by the first processor; determining, by the first processor, a configuration mode according to the feature control bit; The first processor loads the bit stream according to the configuration mode and detects that the preset signal bit is a preset signal, thereby completing the initialization operation of the first processor.

15. The server startup operation method according to claim 1, characterized in that: The performing a startup operation on the baseboard management controller in parallel according to the power-on signal by the baseboard management controller includes: Initializing the built-in hardware devices in parallel according to the power-on signal by the baseboard management controller; The baseboard management controller initializes the external hardware device according to the power-on signal to complete the startup operation of the baseboard management controller.

16. The server startup operation method according to claim 1, characterized in that: The power module is electrically connected to the first processor; the power module is electrically connected to the baseboard management controller; the power module is electrically connected to the second processor; the first processor is electrically connected to the second processor.

17. The server startup operation method according to any one of claims 1 to 16, characterized in that: The number of the servers is multiple.

18. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the server startup operation method as claimed in any one of claims 1 to 17 when executing the computer program.

19. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the server startup operation method according to any one of claims 1 to 17.

20. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the server startup operation method according to any one of claims 1 to 17 are implemented.

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