Storage device and storage adapter including the same

By introducing a mode signal generation circuit and data dump mechanism into the storage adapter, the data loss problem of storage devices in the event of sudden power outage or hot plugging is solved, and stable data storage and high reliability are achieved.

CN119905126APending Publication Date: 2025-04-29SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202411483550.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-10-26
Filing Date
2024-10-23
Publication Date
2025-04-29

AI Technical Summary

Technical Problem

Storage devices used in data centers or servers may result in data loss due to sudden physical removal or power interruption.

Method used

A memory adapter is designed, including buffer memory, nonvolatile memory and mode signal generation circuit. By detecting the connection state of the carrier and the storage device, a mode signal is generated, and a data dump operation is selectively performed according to the level of the mode signal, transferring from the volatile memory to the nonvolatile memory.

Benefits of technology

It effectively prevents data loss in the event of sudden power outage or hot plugging, ensures data stability and reliability, and is suitable for storage devices that require high reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The storage adapter includes a carrier and a storage device. The storage device stores data, and includes a buffer memory including a volatile memory, a non-volatile memory, a memory controller controlling the buffer memory and the non-volatile memory, and a mode signal generation circuit generating a mode signal based on a connection state of the storage device and a carrier. The carrier removably receives the memory device, and the memory controller selectively performs a data dump operation based on a level of the mode signal such that the data stored in the buffer memory is stored in the non-volatile memory.
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Description

[0001] This application claims the priority of Korean Patent Application No. 10-2023-0145041 filed on October 26, 2023 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] Apparatus, devices, and methods consistent with the present disclosure relate to a storage device, a storage adapter including the storage device, and an operating method of the storage device. Background Art

[0003] Solid-state drives (hereinafter, referred to as "SSDs") store user data in non-volatile storage media such as flash memory devices. As the demand for SSDs continues to grow, SSDs are now being used in various fields for various purposes. For example, SSDs can be used by end users as well as in servers and data centers.

[0004] A plurality of SSDs may be installed in a storage device used in a data center or a server. In some cases, contrary to the user's intention, the SSD may be suddenly physically removed or separated from the storage device, or the power supplied to the SSD may be suddenly blocked (or shut down). That is, a sudden power outage may occur. Summary of the invention

[0005] In one aspect, a storage device capable of preventing data loss in the event of a sudden power failure and a storage adapter including the storage device are provided.

[0006] According to one aspect of one or more embodiments, there is provided a storage adapter, comprising a carrier and a storage device configured to store data. The storage device comprises: a buffer memory, comprising a volatile memory; at least one non-volatile memory; a memory controller, configured to control the buffer memory and the at least one non-volatile memory; and a mode signal generating circuit, configured to generate a mode signal based on a connection state between the storage device and the carrier, wherein the carrier is configured to detachably receive the storage device. Based on the level of the mode signal, the memory controller selectively performs a data dump operation so that the data stored in the buffer memory is stored in the at least one non-volatile memory.

[0007] According to another aspect of one or more embodiments, there is provided a storage device detachably mounted in a carrier, the storage device comprising: a buffer memory including a volatile memory; at least one nonvolatile memory; a memory controller configured to control the buffer memory and the at least one nonvolatile memory; and a mode signal generating circuit configured to generate a mode signal based on a connection state of the storage device and the carrier, wherein, based on a level of the mode signal, the memory controller selectively performs a data dump operation so that data stored in the buffer memory is stored in the at least one nonvolatile memory.

[0008] According to yet another aspect of one or more embodiments, there is provided an operating method of a storage device detachably received in a carrier, the operating method comprising: setting a usage mode of the storage device to a first mode; detecting a level of a mode signal generated based on a connection state of the storage device and the carrier; and selectively performing a data dump operation based on the level of the mode signal, so that data stored in a buffer memory of the storage device is stored in a non-volatile memory of the storage device. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other aspects will become apparent by describing in detail embodiments thereof with reference to the accompanying drawings, in which:

[0010] Figure 1 is a block diagram of a storage system according to an embodiment;

[0011] Figure 2A is a diagram showing a method according to an embodiment of the present invention. Figure 1 A flowchart of an example of operation of a storage system;

[0012] Figure 2B is a diagram showing a method according to an embodiment of the present invention. Figure 1 A flowchart of an example of operation of a storage system;

[0013] Figure 3A is a diagram showing a method according to an embodiment of the present invention. Figure 1 An example diagram of a host of a storage system;

[0014] Figure 3B is a diagram showing a method according to an embodiment of the present invention. Figure 1 An example diagram of a host of a storage system;

[0015] Figure 4 is a diagram showing a method according to an embodiment of the present invention. Figure 1 A block diagram of an example of a storage device of a storage system;

[0016] Figure 5 is a diagram showing a method according to an embodiment of the present invention. Figure 4 A block diagram of an example of a memory controller of a storage device;

[0017] Figure 6 is a diagram showing a method according to an embodiment of the present invention. Figure 1 A block diagram of an example of a storage adapter for a storage system;

[0018] Figure 7 The embodiment of the present invention is shown in detail Figure 6 Figure 1 shows an example of a physical connection between an opening and closing lever of a storage adapter and a storage device;

[0019] FIG. 8A to FIG. 8E FIG. 1 is a diagram showing a storage device according to various embodiments installed in Figure 6 Figure 1 shows an example of a storage adapter being inserted into and removed from a carrier;

[0020] Fig. 9 is a diagram showing a method according to an embodiment of the present invention. Figure 1 Figure 1 is an example of a storage adapter for a storage system;

[0021] Fig.10 is a diagram showing a method according to an embodiment of the present invention. Figure 1 Figure 1 is an example of a storage adapter for a storage system;

[0022] Fig.11A and Fig. 11B is a diagram showing various embodiments Figure 1 Figure 1 is an example of a storage adapter for a storage system;

[0023] Fig.12 is a block diagram of a storage system according to an embodiment;

[0024] Fig.13 is a block diagram of a storage system according to an embodiment; and

[0025] Fig.14 is a diagram showing an example of a data center to which a storage system according to various embodiments can be applied. DETAILED DESCRIPTION

[0026] In order to prevent the loss of data stored in the volatile memory in the event of a sudden power outage (SPO), the storage device may perform a data refresh operation so that the data stored in the volatile memory is dumped to the non-volatile memory. However, in the event of a hot-plugging in which the SSD is suddenly physically separated, the storage device cannot ensure the minimum time required to dump the data of the volatile memory, resulting in data loss.

[0027] Various embodiments will be described below in detail and clearly to the extent that a person skilled in the art can easily implement the various embodiments.

[0028] Figure 1 is a block diagram of a storage system according to an embodiment.

[0029] refer to Figure 1 , the storage system 10A may include a host 100 and a plurality of storage adapters 210_1 to 210_M.

[0030] The storage system 10A may be an electronic device or an electronic system. For example, the storage system 10A may be implemented with a server, a data center, a personal computer (PC), a network attached storage, an Internet of Things (IoT) device, or a portable electronic device. The portable electronic device may include a laptop computer, a mobile phone, a smart phone, a tablet PC, a personal digital assistant (PDA), an enterprise digital assistant (EDA), a digital camera, a digital video camera, an audio device, a portable multimedia player (PMP), a personal navigation device (PND), an MP3 player, a handheld game console, an e-book, a wearable device, etc.

[0031] The host 100 may communicate with the storage adapters 210_1 to 210_M through various interfaces. For example, in an embodiment, the host 100 may be implemented with an application processor (AP) or a system on chip (SoC). In some embodiments, for example, the host 100 may be implemented with an integrated circuit or a mainboard, but the embodiment is not limited thereto.

[0032] The host 100 may send a write request and a read request to the storage adapters 210_1 to 210_M. Each of the storage adapters 210_1 to 210_M may include a storage device. In an embodiment, the storage adapters 210_1 to 210_M may store data received from the host 100 in response to a write request. In an embodiment, in response to a read request, the storage adapters 210_1 to 210_M may read the stored data and may send the read data to the host 100.

[0033] The host 100 may manage the power of the storage adapters 210_1 to 210_M. For example, in an embodiment, the host 100 may include a power supply and may supply power to each of the storage adapters 210_1 to 210_M. In an embodiment, for example, the host 100 may include an auxiliary power supply and may supply power to each of the storage adapters 210_1 to 210_M. In a power abnormality situation (e.g., an SPO situation), the host 100 may supply auxiliary power to each of the storage adapters 210_1 to 210_M.

[0034] In an embodiment, the host 100 may determine a usage mode of each of the storage adapters 210_1 to 210_M based on a mode signal of each of the storage adapters 210_1 to 210_M.

[0035] For example, in an embodiment, when the mode signal of the storage adapter is at a low level, the host 100 may set the use mode of the storage adapter to the first mode. In an embodiment, for example, the first mode may refer to a mode in which the storage adapter is used as an SSD for a server. In other words, for example, the first mode may be a mode in which the storage device 230 is physically inserted into the storage adapter 210 for use by the server.

[0036] As another example, in an embodiment, when the mode signal of the storage adapter is at a high level, the host 100 may set the usage mode of the storage adapter to the second mode. In an embodiment, for example, the second mode may refer to a mode in which the storage adapter is used as an SSD for a user. In other words, for example, the second mode may be a mode in which the storage device 230 is physically removed from the storage adapter 210 for use by an end user.

[0037] However, the embodiment is not limited thereto. For example, according to the embodiment, various settings may be made for the level of the mode signal and its corresponding use mode. In some embodiments, more than two use modes may be set.

[0038] Each of the plurality of storage adapters 210_1 to 210_M may communicate with the host 100. According to an embodiment, the network interface between each of the plurality of storage adapters 210_1 to 210_M and the host 100 may include one of the following interfaces: CLX (Compute Express Link), USB (Universal Serial Bus), SCSI (Small Computer System Interface), PCI Express, ATA, PATA (Parallel ATA), SATA (Serial ATA), SAS (Serial Attached SCSI), UFS (Universal Flash), NVMeoF (Fibre Channel (FC)-based interface), Ethernet, Infiniband, RoCE, iWARF, and CXL-based interfaces (i.e., CXL.mem, CXL.io, and CXL.cashe). However, the embodiment is not limited thereto.

[0039] Each of the plurality of storage adapters 210_1 to 210_M may include a carrier and a storage device. For example, in an embodiment, the plurality of storage adapters 210_1 to 210_M may include a first storage adapter 210_1, a second storage adapter 210_2, ... and an Mth storage adapter 210_M. The first storage adapter 210_1 may include a first carrier 211_1 and a first storage device 230_1, the second storage adapter 210_2 may include a second carrier 211_2 and a second storage device 230_2, and the Mth storage adapter 210_M may include an Mth carrier 211_M and an Mth storage device 230_M.

[0040] The carrier may form at least a portion of the housing of the storage adapter. In this case, the storage device may be installed inside the carrier. For example, the carrier may be implemented to protect the storage device from external impacts. In this case, when the storage device is installed inside the carrier, the storage device will not be exposed to the outside.

[0041] However, the embodiment is not limited thereto. For example, the carrier may be implemented in various forms. For example, in an embodiment, the carrier may be implemented to include a minimum component capable of fixing the storage device therein. In this case, in some embodiments, when the storage device is installed inside the carrier, at least a portion of the storage device may be exposed to the outside.

[0042] The storage device may be implemented to store data. For example, in some embodiments, the storage device may include a solid-state drive (SSD), an embedded UFS (Universal Flash Memory), or an eMMC (Embedded Multimedia Card). In some embodiments, the storage device may be an external memory that can be connected to or removed from an electronic device. For example, in some embodiments, the storage device may include a UFS memory card, a CF (Compact Flash) card, an SD (Secure Digital) card, a Micro-SD (Micro Secure Digital) card, a Mini-SD (Mini Secure Digital) card, an xD (Extreme Digital) card, a memory stick, but the embodiment is not limited thereto.

[0043] For the convenience of the following description, it is assumed that the storage device is an SSD.

[0044] In an embodiment, each of the plurality of storage adapters 210_1 to 210_M may generate a high level or low level mode signal according to the connection state between the carrier and the storage device. According to an embodiment, each of the plurality of storage adapters 210_1 to 210_M may provide the generated mode signal to the host 100. In some embodiments, the host 100 may monitor the mode signal of each of the plurality of storage adapters 210_1 to 210_M and may detect a change in the mode signal.

[0045] In an embodiment, the connection state between the carrier and the storage device may be defined differently according to implementations of the carrier and / or the storage device.

[0046] In an embodiment, the connection state between the carrier and the storage device may be defined as whether physical contact is made. In an embodiment, the connection state between the carrier and the storage device may be defined as whether electrical contact is made. For example, in an embodiment, the carrier may include an opening and closing module, and the storage device may be inserted into the interior of the carrier through the opening and closing module of the carrier, thereby being installed in the carrier. In this case, the connection state between the carrier and the storage device may be defined as whether physical or electrical contact is made between the opening and closing module of the carrier and the storage device.

[0047] For example, in an embodiment, when the opening and closing module of the carrier is in a closed state, the storage adapter may generate a low-level mode signal. In this case, the host 100 may determine that the storage device is stably installed in the carrier. In an embodiment, the host 100 may set the use mode of the storage adapter to the first mode (i.e., the SSD mode for the server) based on the low-level mode signal.

[0048] In an embodiment, when the opening and closing module of the carrier is in an open state, the storage adapter may generate a high-level mode signal. In this case, the host 100 may determine that the storage device is in an unstable state of being installed in the carrier or that a hot-swap situation occurs in the storage device. In an embodiment, the host 100 may set the use mode of the storage adapter to a second mode (i.e., an SSD mode for a user) based on the high-level mode signal. In this case, a data dump operation is performed, in which data stored in a volatile memory of the storage device is quickly moved to a non-volatile memory of the storage device, and therefore, data loss may be prevented even if a hot-swap occurs.

[0049] Specifically, in a hot-plug situation where the storage device is physically suddenly separated from the host, the storage device of the prior art cannot ensure the time required to perform the data dump operation, resulting in the loss of data stored in the volatile memory of the storage device. In particular, in a case where a separate auxiliary power supply is not included in the storage device of the prior art, the data stored in the volatile memory is inevitably lost in the hot-plug situation. Therefore, in the case of the prior art, the storage device that does not include a separate auxiliary power supply has the disadvantage that it is difficult to use the storage device as an SSD for a server that requires high reliability.

[0050] On the contrary, each of the plurality of storage adapters 210_1 to 210_M according to the embodiment may include a carrier on which the storage device is mounted and which includes an opening and closing module in addition to the storage device. In this case, in order to physically separate the storage device, an operation of opening the opening and closing module of the carrier must first be performed, which may result in a given time delay. In other words, when the storage device is physically separated from the carrier, the time point at which the storage device is physically separated may be delayed by a given time due to the operation of opening the opening and closing module of the carrier. This configuration may also be applied to hot-plug situations, and the delay time may be a time sufficient to perform a data dump operation.

[0051] The storage system 10A according to the embodiment can perform a data dump operation by using a delay time. In other words, the storage system 10A can perform a data dump operation during the delay time. That is, the mode signal of each of the plurality of storage adapters 210_1 to 210_M can change according to the physical connection state of the carrier of the storage adapter and the storage device. Based on whether the mode signal changes, the host 100 can allow each storage device to perform a data dump operation. Therefore, even in a hot-swap situation, important data stored in the storage device can be safely backed up.

[0052] Since the data dump operation is performed within the delay time before the hot plug event occurs, the storage device according to the embodiment does not need to have an auxiliary power supply. That is, the storage device can perform the data dump operation regardless of whether an auxiliary power supply is provided internally.

[0053] Therefore, when the mode signal is at a low level, the storage device according to the embodiment can be used as an SSD for a server requiring high reliability. The storage device according to the embodiment can perform a data dump operation when the mode signal changes from a low level to a high level, and can then be used as an SSD for an end user. That is, regardless of whether an auxiliary power supply is provided internally, the storage device according to the embodiment can be used as an SSD for a server or as an SSD for a user.

[0054] Figure 2A is a diagram showing a method according to an embodiment of the present invention. Figure 1 For the convenience of description, the operations of the host 100 and the M-th storage adapter 210_M will be mainly described below.

[0055] In operation S110 , a use mode of the storage device 230_M may be set to a first mode.

[0056] For example, the storage device 230_M and the carrier 211_M of the storage adapter 210_M may be in a state of physical connection or electrical connection. In this case, the storage adapter 210_M may generate a low-level mode signal. The host 100 may determine that the storage device 230_M is stably installed in the carrier 211_M based on the low-level mode signal, and may set the use mode of the storage adapter 210_M to the first mode (i.e., the SSD mode for the server).

[0057] In operation S120, a change of the mode signal may be detected. In operation S130, whether a level of the mode signal is a high level may be checked.

[0058] For example, the physical connection or electrical connection between the storage device 230_M of the storage adapter 210_M and the carrier 211_M may be released. In this case, the mode signal of the storage adapter 210_M may be changed from a low level to a high level. The host 100 may detect the change of the mode signal. When it is determined that the mode signal is at a high level (operation S130, yes), the host 100 may determine that the storage device 230_M is in a state of being unstably installed in the carrier 211_M or can be hot-swapped.

[0059] When the mode signal is at a high level (operation S130 , YES), a data dump operation may be performed in operation S140 .

[0060] For example, the storage device 230_M of the storage adapter 210_M may perform a data dump operation so that data stored in the volatile memory of the storage device 230_M is stored in the non-volatile memory of the storage device 230_M. The data dump operation may be performed by a delay time based on the physical or electrical connection between the storage device 230_M and the carrier 211_M. Since the data dump operation can be completed in a very short time, the data dump operation may be fully performed within the delay time.

[0061] In operation S150, the use mode of the storage device 230_M may be set to the second mode.

[0062] For example, the host 100 may set the use mode of the storage adapter 210_M to the second mode (i.e., the SSD mode for the user) based on the high-level mode signal. Therefore, when the storage device 230_M is in a state of being unstable installed in the carrier 211_M or in a state where hot plugging can occur, the storage device 230_M can be used in the SSD mode for the user.

[0063] As described above, according to the level of the mode signal, the use mode of the storage device 230_M according to the embodiment may be changed from the first mode (eg, SSD mode for server) to the second mode (eg, SSD mode for user).

[0064] When the mode signal is not at a high level (operation S130 , No), the process may end.

[0065] Figure 2B is a diagram showing a method according to an embodiment of the present invention. Figure 1 For the convenience of description, the operations of the host 100 and the M-th storage adapter 210_M will be mainly described below.

[0066] In operation S210 , the use mode of the storage device 230_M may be set to the second mode.

[0067] For example, the storage device 230_M and the carrier 211_M of the storage adapter 210_M may be physically or electrically separated from each other. In this case, the storage adapter 210_M may generate a high-level mode signal. The host 100 may determine that the storage device 230_M is in a state of being unstably installed in the carrier 211_M based on the high-level mode signal, and may set the use mode of the storage adapter 210_M to a second mode (e.g., an SSD mode for a user).

[0068] In operation S220, a change of the mode signal may be detected. In operation S230, whether a level of the mode signal is a low level may be checked.

[0069] For example, when the storage device 230_M of the storage adapter 210_M is stably physically or electrically connected to the carrier 211_M, the mode signal of the storage adapter 210_M may be switched from a high level to a low level. The host 100 may detect the change in the mode signal. When it is determined that the mode signal is at a low level (operation S230, yes), the host 100 may determine that the storage device 230_M is in a state of being stably installed in the carrier 211_M.

[0070] In operation S240 , the use mode of the storage device 230_M may be set to the second mode.

[0071] For example, the host 100 may set the use mode of the storage adapter 210_M to the first mode (ie, the SSD mode for server) based on the low-level mode signal. Therefore, the storage device 230_M may be used as an SSD for server requiring high reliability.

[0072] When it is determined that the mode signal is not at a low level (operation S230 , No), the process may end.

[0073] As described above, the use mode of the storage device 230_M according to an embodiment may be changed from the second mode (ie, SSD mode for user) to the first mode (ie, SSD mode for server) according to the level of the mode signal.

[0074] As reference Figure 2A and Figure 2B As described above, the storage device included in the storage adapter according to the embodiment can be used as an SSD for a server as well as an SSD for a user.

[0075] Figure 3A is a diagram showing a method according to an embodiment of the present invention. Figure 1 FIG. 1 is a diagram of an example of a host 100 of a storage system.

[0076] refer to Figure 3AAccording to an embodiment, the host 100A may supply power to the storage adapters 210_1 to 210_M. For example, in an embodiment, the host 100A may include a processor 110, a power supply 120, a power failure protection integrated circuit (PLP IC) 130, an auxiliary power supply 140, and a baseboard management controller (BMC) 150.

[0077] The processor 110 may control the overall operation of the host 100A. The processor 110 may include a microprocessor, a microcontroller, a dedicated integrated processor, a central processing unit (CPU), etc. Figure 3A A single processor is shown in the example of FIG. 1 , but in some embodiments, processor 110 may include multiple processors.

[0078] The power supply 120 may supply power to all circuits of the host 100A through the mainboard. For example, the power supply 120 may provide main power to the power-off protection integrated circuit 130.

[0079] The power failure protection integrated circuit 130 may manage power supply to the storage adapters 210_1 to 210_M. For example, the power failure protection integrated circuit 130 may provide the main power of the power supply 120 to the storage adapter 210_M. The power failure protection integrated circuit 130 may provide the main power of the power supply 120 to the auxiliary power supply 140.

[0080] The auxiliary power supply 140 may be charged by power provided by the power failure protection integrated circuit 130. For example, in an embodiment, the auxiliary power supply 140 may include a capacitor, a super capacitor, and / or a rechargeable battery.

[0081] A baseboard management controller (BMC) 150 may monitor the status of the storage system 10A and may perform management operations on the storage adapters 210_1 to 210_M.

[0082] According to an embodiment, the host 100A may supply power to the storage adapters 210_1 to 210_M and may manage the power supply to the storage adapters 210_1 to 210_M. For example, when a sudden power failure event occurs, the host 100A may supply power to the storage adapters 210_1 to 210_M by using an auxiliary power supply. In an embodiment, for example, when a hot plug event occurs, by using the above-mentioned delay time, the host 100A may perform a data dump operation so that data stored in a volatile memory of a storage adapter capable of hot plugging is moved to its non-volatile memory.

[0083] According to the above description, even if the storage device corresponds to an SSD that does not include an auxiliary power supply inside, the host 100A according to the embodiment can use the storage device as an SSD for a server as well as an SSD for a user.

[0084] Figure 3B is a diagram showing a method according to an embodiment of the present invention. Figure 1 FIG. 1 is a diagram of an example of a host 100 of a storage system. Figure 3B The host 100B and Figure 3A Therefore, the same or similar components may be marked with the same or similar reference numerals / symbols, and additional descriptions related to the same or similar components will be omitted to avoid redundancy and facilitate brevity.

[0085] refer to Figure 3B According to an embodiment, the host 100B may supply power to the storage adapters 210_1 to 210_M. For example, in an embodiment, the host 100B may include a processor 110 and a power supply 120, and an uninterruptible power supply (UPS) 160 may be provided outside the host 100B.

[0086] The processor 110 may control the overall operation of the host 100B.

[0087] The power supply 120 may supply power to all circuits of the host 100B through the main board. For example, the power supply 120 may provide main power to the storage adapters 210_1 to 210_M.

[0088] The UPS 160 can provide emergency power to the host 100B. For example, when a sudden power failure event and / or a hot plug event occurs, the UPS 160 can provide emergency power to the host 100B.

[0089] According to an embodiment, the host 100B may supply power to the storage adapters 210_1 to 210_M and may manage the power supply to the storage adapters 210_1 to 210_M. For example, when a sudden power failure event and / or a hot plug event occurs, the host 100B may supply power to the storage adapters 210_1 to 210_M by using an emergency power supply of the UPS 160. Therefore, data stored in the volatile memory of each storage adapter may be dumped into its non-volatile memory.

[0090] In particular, when a hot-plug event occurs, by using the above-mentioned delay time, the host 100B can perform a data dump operation so that data stored in the volatile memory of the hot-plug capable storage adapter is moved to its non-volatile memory.

[0091] According to the above description, even if the storage device corresponds to an SSD that does not include an auxiliary power supply inside, the host 100B according to the embodiment can use the storage device as an SSD for a server as well as an SSD for a user.

[0092] Figure 3A and Figure 3BIt is provided as an example, and the host according to the embodiment may be implemented in various ways.

[0093] Figure 4 is a diagram showing a method according to an embodiment of the present invention. Figure 1 A block diagram of an example of a storage device of a storage system. Figure 4 The Mth storage device 230_M is taken as an example for explanation.

[0094] refer to Figure 4 , the memory device 230_M may include a memory controller 231, a buffer memory 232, a plurality of non-volatile memories (NVMs) 233_1 to 233_n, and a mode signal generation circuit 234. In an embodiment, the plurality of non-volatile memories (NVMs) 233_1 to 233_n may include a first NVM 233_1, ..., and an Nth NVM 233_n. For ease of description, it is assumed below that the mode signal generation circuit 234 is provided in the memory device 230_M.

[0095] The memory controller 231 may control the overall operation of the memory device 230_M. In an embodiment, the memory controller 231 may detect the level of the mode signal and may transmit information about the level of the mode signal to the host 100 (refer to Figure 1 ). In an embodiment, the memory controller 231 may receive a command for a usage mode of the storage device 230_M from the host 100, and may control the storage device 230_M to operate as one of an SSD for a server or an SSD for a user based on the command.

[0096] The buffer memory 232 may be implemented to temporarily store data. For example, the buffer memory 232 may be implemented to include a volatile memory. For example, the buffer memory 232 may include various DRAM devices, such as double data rate synchronous dynamic random access memory (DDR SDRAM), DDR2 SDRAM, DDR3 SDRAM, DDR4 SDRAM, DDR5 SDRAM, DDR6 SDRAM, low power double data rate (LPDDR) SDRAM, LPDDR2 SDRAM, LPDDR3 SDRAM, LPDDR4 SDRAM, LPDDR4X SDRAM, LPDDR5 SDRAM, graphic double data rate synchronous graphic random access memory (GDDRSGRAM), GDDR2 SGRAM, GDDR3 SGRAM, GDDR4 SGRAM, GDDR5 SGRAM, and GDDR6 SGRAM. In an embodiment, the buffer memory 232 may be a stacked memory device in which DRAM chips are stacked together, such as high bandwidth memory (HBM), HBM2, or HBM3.

[0097] Each of the non-volatile memories 233_1 to 233-n may include a plurality of storage cells storing data. Each of the non-volatile memories 233_1 to 233-n may include a plurality of storage blocks, and some or all of the plurality of storage blocks may include storage cells that do not support overwrite operations like flash memory. However, the embodiment is not limited thereto. For example, in some embodiments, each of the non-volatile memories 233_1 to 233-n may be implemented to include RRAM, FRAM, PRAM, TRAM, or MRAM. In some embodiments, each of the storage blocks may have a two-dimensional structure or a three-dimensional structure. The storage cells of the storage blocks having a two-dimensional structure (or a horizontal (or planar) structure) may be formed in a direction parallel to the substrate. The storage cells of the storage blocks having a three-dimensional structure (or a vertical structure) may be formed in a direction perpendicular to the substrate.

[0098] The mode signal generating circuit 234 may be based on the carrier 211_M (refer to Figure 1 ) and the connection status of the storage device 230_M generate a high level or low level mode signal.

[0099] For example, when the carrier 211_M and the storage device 230_M are physically or electrically connected to each other, the mode signal generation circuit 234 may generate a low-level mode signal. In this case, the memory controller 231 may send information indicating that the level of the mode signal is low to the host 100, and the host 100 may set the use mode of the storage device 230_M to the SSD mode for the server. The memory controller 231 may receive a command for the use mode from the host 100, and may control the storage device 230_M to operate as an SSD for the server.

[0100] For example, when the carrier 211_M and the storage device 230_M are physically or electrically separated from each other, the mode signal generation circuit 234 may generate a high-level mode signal. That is, the mode signal generation circuit 234 may change the level of the mode signal from a low level to a high level. In this case, the memory controller 231 may send information indicating that the level of the mode signal is a high level to the host 100, and the host 100 may set the use mode of the storage device 230_M to an SSD mode for a user. The memory controller 231 may receive a command for the use mode from the host 100, and may perform a data dump operation so that the data stored in the buffer memory 232 is stored in at least one of the non-volatile memories 233_1 to 233_n. Thereafter, the memory controller 231 may control the storage device 230_M to operate as an SSD for a user.

[0101] Figure 4An example is shown in which the storage device 230_M does not include an auxiliary power supply inside. However, the embodiment is not limited thereto. For example, in some embodiments, the storage device 230_M may include an auxiliary power supply inside.

[0102] Figure 5 is a diagram showing a method according to an embodiment of the present invention. Figure 4 A block diagram of an example of a memory controller of a storage device.

[0103] refer to Figure 5 , the memory controller 231 according to an embodiment may include a central processing unit (CPU) 231_1 , a main memory 231_2 , a state monitor 231_3 , a host interface 231_4 , and an NVM interface 231_5 .

[0104] The central processing unit (CPU) 231_1 may provide the NVM interface 231_5 with a plurality of storage adapters 210_1 to 210_M (see Figure 1 ) various control information for read / write operations. The central processing unit 231_1 may operate based on software or applications provided for various control operations of the memory controller 231. For example, the central processing unit 231_1 may be configured to perform a data dump operation for managing the plurality of storage adapters 210_1 to 210_M.

[0105] The main memory 231_2 may store commands to be executed by the central processing unit 231_1 and data that has been processed or is to be processed by the central processing unit 231_1 .

[0106] The state monitor 231_3 may monitor in real time or periodically the mode signal generated by the mode signal generating circuit 234. The state monitor 231_3 may provide the monitoring result to the central processing unit 231_1.

[0107] The host interface 231_4 may provide an interface between the host 100 and the storage device 230_M. In other words, the host interface 231_4 may provide an interface with the storage device 230_M, which corresponds to a bus format of the host 100.

[0108] The NVM interface 231_5 may provide an interface with a plurality of non-volatile memories (NVMs) 233_1 to 233 — n.

[0109] In an embodiment, the state monitor 231_3 may monitor a mode signal generated by the storage device 230_M. When a change in the mode signal is detected, the state monitor 231_3 may notify the central processing unit 231_1 that the change in the mode signal is detected, and the central processing unit 231_1 may provide information about the change in the mode signal to the host 100 through the host interface 231_4. In this case, the host 100 may determine the usage mode of the storage device 230_M and whether to perform a data dump operation based on the mode signal, and may provide a command related to the determination result to the storage device 230_M.

[0110] Figure 6 is a diagram showing a method according to an embodiment of the present invention. Figure 1 A block diagram of an example of a storage adapter for a storage system. Figure 6 An example is shown in which the level of the mode signal varies depending on whether the carrier and the storage device are in physical contact with each other.

[0111] For ease of description, Figure 6 In the embodiment, it is assumed that the carrier is implemented to contact opposite side surfaces of the storage device and the front and rear surfaces of the storage device are exposed to the outside. However, this configuration is merely an example, and embodiments are not limited thereto.

[0112] refer to Figure 6 The storage adapter 210_M may include a carrier 211 and a storage device 230 , and the carrier 211 may include a bracket 212 and an opening and closing rod 213 .

[0113] The bracket 212 may be configured as a portion of the housing of the storage adapter 210_M, and may be configured to receive the opposite side surfaces of the storage device 230 to fix the opposite side surfaces of the storage device 230. For example, Figure 6 As shown, the storage device 230 may be inserted into the carrier 211 through the opening and closing rod 213, and the opposite side surfaces of the storage device 230 may be fixed in a state of contact with the bracket 212. In an embodiment, one side surface of the bracket 212 may be connected to a ground voltage.

[0114] The opening and closing lever 213 may be formed on one surface into which the storage device 230 is inserted. For example, the opening and closing lever 213 may be connected to one end of the surface into which the storage device 230 is inserted by a hinge, and the carrier 211 may be opened and closed by a rotation operation of the hinge. That is, the opening and closing lever 213 may be connected to one end of the surface into which the storage device is inserted by a hinge, and the carrier 211 may be opened and closed by a rotation operation of the hinge. The opening and closing lever 213 may be opened to allow the storage device to be inserted into the carrier 211, and may be closed after the storage device is inserted into the carrier 211.

[0115] In an embodiment, the opening and closing lever 213 may contact one surface of the storage device 230 through a rotation operation of the hinge, thereby being physically connected to the storage device 230. The storage device 230 may generate a high level or low level mode signal based on whether it is physically connected to the opening and closing lever 213.

[0116] For example, when the opening and closing lever 213 is in a closed state, that is, when the opening and closing lever 213 physically contacts the storage device 230, the storage device 230 may generate a low-level mode signal. In this case, since the time of the data dump operation can be ensured even in a hot-swap situation, the storage adapter 210_M may be used as an SSD for a server.

[0117] For example, when the opening and closing lever 213 is in an open state, that is, when the opening and closing lever 213 is physically separated from the storage device 230, the storage device 230 may generate a high-level mode signal. In this case, the storage adapter 210_M may be used as an SSD for the user. In other words, when the mode signal is switched from a low level to a high level, the usage mode of the storage adapter 210_M may be changed from an SSD mode for the server to an SSD mode for the user.

[0118] As described above, the storage adapter 210_M according to the embodiment can open and close one surface of the carrier 211 through which the storage device 230 is inserted. Therefore, the storage adapter 210_M can prevent the storage device 230 from being accidentally separated from the opening and closing rod 213. In an embodiment, since the opening and closing rod 213 needs to be opened to physically separate the storage device 230, the storage adapter 210_M can ensure the delay time required for performing the data dump operation. Therefore, the storage adapter 210_M according to the embodiment can be used as an SSD for a server as well as an SSD for a user.

[0119] Figure 7 The embodiment of the present invention is shown in detail Figure 6 Figure 1 shows an example of a physical connection between an opening and closing module in a storage adapter and a storage device. Figure 6 Similarly, assuming that bracket 212 (reference Figure 6 ) is connected to a ground voltage. In the embodiment, it is assumed that the mode signal generating circuit 234 is implemented by using a passive element such as a resistor.

[0120] refer to Figure 7 , the opening and closing rod 213 may include a connector 214. In an embodiment, the connector 214 may be formed of a conductive material. For example, in an embodiment, the connector 214 may be formed of a metal material. The connector 214 may be provided on one surface of the opening and closing rod 213 so as to contact the switch SW of the storage device 230 through the rotation operation of the hinge.

[0121] The memory device 230 may include a mode signal generating circuit 234 and a memory controller 231 , and the mode signal generating circuit 234 may include a resistor “R” and a switch SW.

[0122] In an embodiment, the mode signal generating circuit 234 may include a resistor "R" and a switch SW, and the resistor "R" and the switch SW may be connected to each other on one surface of a printed circuit board (PCB). One end of the resistor R may be provided with a power supply voltage VDD, and a path for the voltage of the mode signal to discharge to the ground voltage of the bracket 212 may be formed depending on whether the connector 214 and the switch SW are in contact with each other.

[0123] For example, assuming that the opening and closing lever 213 is closed, since the connector 214 and the switch SW are in contact with each other, the voltage level of the mode signal may be discharged through the ground voltage of the bracket 212. In this case, the mode signal generating circuit 234 may generate a low level mode signal.

[0124] In an embodiment, for example, assuming that the opening and closing lever 213 is opened, since the connector 214 and the switch SW are separated from each other, the mode signal can be separated from the ground voltage, and therefore, the voltage level of the mode signal can be charged by the power supply voltage VDD. In this case, the mode signal generating circuit 234 can generate a high-level mode signal.

[0125] In an embodiment, when the opening and closing lever 213 is closed, the connector 214 is electrically connected to the switch SW of the storage device 230_M to turn on the switch SW, and the mode signal generating circuit 234 can generate a high-level mode signal. When the electrical connection between the connector 214 and the switch SW of the storage device 230_M is disconnected due to the opening of the opening and closing lever 213, the mode signal generating circuit 234 can generate a low-level mode signal, so that the storage adapter 230_M performs a data dump operation to send the data stored in the buffer memory 232 of the storage device 230_M to, for example, the first non-volatile memory 233_1 of the storage device 230_M before the storage device 230_M is physically removed from the bracket 212 of the carrier 211. In other words, this configuration allows the data dump operation to occur within a given delay time between opening the opening and closing lever 213 and physically removing the storage device 230_M from the bracket 212 of the carrier 211.

[0126] As described above, the storage device 230 according to the embodiment may generate a high level or low level mode signal based on whether the connector 214 of the opening and closing lever 213 is in contact.

[0127] FIG. 8A to FIG. 8E FIG. 1 is a diagram showing a storage device according to various embodiments installed in Figure 6For ease of description, the following example is shown in FIG. Figure 6 and Figure 7 Likewise, it is assumed that a ground voltage is connected to one side surface of the bracket 212, and a path for discharging the mode signal is formed or blocked according to the rotation of the opening and closing lever 213.

[0128] refer to Fig. 8A , the storage device 230 can be inserted into the carrier 211.

[0129] In this case, since the memory device 230 is in a state of not being connected to the carrier 211, the memory device 230 may be in a state in which power has not been supplied to the memory device 230. Therefore, the mode signal may be in an unknown state.

[0130] refer to Figure 8B , the storage device 230 can be inserted into the carrier 211, but the opening and closing rod 213 can be in an open state.

[0131] In this case, the level of the mode signal may be determined according to the host 100 (refer to Figure 1 ) is determined by whether the storage device 230 is powered. For example, in an embodiment, when the host 100 does not power the storage device 230, the mode signal may be in an unknown state. For example, in an embodiment, when the host 100 powers the storage device 230, the mode signal may be in a high level.

[0132] refer to Figure 8C , the storage device 230 may be inserted into the carrier 211, and the opening and closing lever 213 may be in a closed state. In this case, a discharge path for releasing the voltage of the mode signal through the opening and closing lever 213 may be formed. Therefore, the mode signal may be at a low level.

[0133] In this case, the power supply 120 (refer to Figure 3A ) or auxiliary power supply 140 (reference Figure 3A ) supplies power to the storage device 230. That is, even in a typical sudden power outage (SPO) event, the storage device 230 can stably protect data. In an embodiment, even if hot plugging occurs, the storage device 230 can ensure a delay time by opening and closing the opening and closing rod 213, and can stably protect data by performing a data dump operation using the delay time.

[0134] Therefore, when the mode signal is at a low level, the storage device 230 may be used as an SSD for a server, and the host 100 may set the usage mode of the storage device 230 to the SSD mode for a server.

[0135] refer to Fig.8D, the opening and closing rod 213 of the storage device 230 can be opened. The opening and closing rod 213 of the storage device 230 can be opened, for example, to replace the SSD. In this case, the discharge path of the voltage of the mode signal released through the opening and closing rod 213 can be blocked. Therefore, the mode signal can be switched from a low level to a high level.

[0136] In this case, the memory controller 231 of the storage device 230 may provide information indicating that the mode signal has been switched to the host 100. The host 100 may determine that the storage device 230 is to be removed from the carrier 211, and may change the use mode of the storage device 230 to the SSD mode for the user. In this case, when data is stored in the volatile memory of the storage device 230, the host 100 may control the storage device 230 to perform a data dump operation.

[0137] refer to Fig. 8E Since the usage mode of the storage device 230 is the SSD mode for users, the storage device 230 can be accessed from the storage system 10A (refer to Figure 1 ) is removed.

[0138] The above detailed description is only for example, and it is to be understood that various embodiments may be subjected to various changes and applications. Various modifications or applications of various embodiments will be described in detail below.

[0139] Fig. 9 is a diagram showing a method according to an embodiment of the present invention. Figure 1 FIG. 1 is an example of a storage adapter of a storage system. For ease of description, Fig. 9 Only the storage device 230 and the opening and closing rod 213 are shown. Fig. 9 Storage adapters and Figure 7 Therefore, the same or similar components may be marked with the same or similar reference numerals / symbols, and additional descriptions related to the same or similar components will be omitted to avoid redundancy and for the sake of convenience in implementation brevity.

[0140] refer to Fig. 9 , the opening and closing lever 213 may include a connector 214. The mode signal generating circuit 234 may include a resistor "R" and a switch SW. A first end of the resistor "R" may be connected to a power supply voltage VDD, a first end of the switch SW may be connected to a ground voltage, and the ground voltage may be formed within the storage device 230. That is, a discharge path for releasing the mode signal may be formed within the storage device 230.

[0141] In this case, the storage device 230 according to the embodiment may generate a high level or low level mode signal based on whether it is in contact with the connector 214 of the opening and closing lever 213. In other words, the contact between the connector 214 and the switch SW may close the switch SW.

[0142] Fig.10 is a diagram showing a method according to an embodiment of the present invention. Figure 1 Figure 2 is an example of a storage adapter for a storage system. Fig.10 Storage adapters and Fig. 9 Therefore, the same or similar components may be marked with the same or similar reference numerals / symbols, and additional descriptions related to the same or similar components will be omitted to avoid redundancy and for the sake of convenience in implementation brevity.

[0143] refer to Fig.10 The storage adapter 210_M may further include an LED 215. The storage controller 231 may control the LED 215 to provide the user with data dump progress and connection status.

[0144] According to an embodiment, the memory controller 231 may indicate the data dump progress status by turning off the LED 215 when the data dump operation is performed and turning on the LED 215 when the data dump operation is completed. In an embodiment, the memory controller 231 may display the physical connection status of the opening and closing lever 213 and the storage device 230 by using light of a color different from the color indicating the data dump progress status.

[0145] As described above, since the storage adapter 210_M includes the LED 215, the storage adapter 210_M can intuitively inform the user of the data dump progress and the connection status.

[0146] In About Figures 4 to 10 In the various embodiments described, the mode signal generating circuit is described as being implemented in the storage device. However, this configuration is merely an example, and the embodiments are not limited thereto. Fig.11A and Fig. 11B As described above, the mode signal generating circuit may be formed within the carrier.

[0147] Fig.11A and Fig. 11B is a diagram showing various embodiments Figure 1 Figure 2 is an example of a storage adapter for a storage system. Fig.11A and Fig. 11B Storage adapters and Fig. 9 Therefore, the same or similar components may be marked with the same or similar reference numerals / symbols, and additional descriptions related to the same or similar components will be omitted to avoid redundancy and facilitate brevity.

[0148] refer to Fig.11A , the storage adapter 210_M may include a mode signal generating circuit 234_1, and the mode signal generating circuit 234_1 may be formed in the carrier 211 instead of in the storage device 230. In an embodiment, as Fig.11A As shown, the mode signal generating circuit 234_1 may be formed in the opening and closing rod 213 of the carrier 211 .

[0149] In this case, in an embodiment, the mode signal generating circuit 234_1 may include an active element. That is, compared with the case where the mode signal generating circuit 234 of the storage adapter 210_M forms a discharge path by using a passive element such as a resistor “R”, Fig.11A The mode signal generating circuit 234_1 of the storage adapter 210_M can check the connection state between the opening and closing rod 213 and the storage device 230 by using active elements. For example, the mode signal generating circuit 234_1 can be implemented by a circuit for detecting whether an electrical contact is formed between one end of the storage device 230 and the opening and closing rod 213, and can include at least one active element and / or at least one passive element.

[0150] In this case, the mode signal generating circuit 234_1 may generate a low level or high level mode signal based on whether one end of the storage device 230 is in electrical contact with the opening and closing rod 213. The mode signal generating circuit 234_1 may send the generated mode signal to the host 100, and the host 100 may set the usage mode of the storage device 230 based on the received mode signal.

[0151] In an embodiment, when one end of the storage device 230 is in electrical contact with the opening and closing rod 213, the mode signal generating circuit 234_1 may generate a low-level mode signal, and may send the low-level mode signal to the host 100. The host 100 may set the use mode of the storage device 230 to the SSD mode for the server based on the low-level mode signal, and send a command CMD including information about setting the mode to the memory controller 231 of the storage device 230. The storage device 230 may operate as an SSD for the server based on the command CMD.

[0152] In an embodiment, when one end of the storage device 230 and the opening and closing rod 213 are electrically separated from each other, the mode signal generating circuit 234_1 may change the level of the mode signal from a low level to a high level, and may send the changed mode signal to the host 100. The host 100 may change the usage mode of the storage device from the SSD mode for the server to the SSD mode for the user based on the high-level mode signal, and may send a command CMD including information about the changed mode to the memory controller 231 of the storage device 230. The usage mode of the storage device 230 may be changed from the SSD mode for the server to the SSD mode for the user based on the command CMD.

[0153] However, the embodiment is not limited thereto. For example, the mode signal generating circuit 234_1 may be implemented to provide a mode signal to the memory controller 231. Fig. 11B As shown, the mode signal generating circuit 234_1 may generate a low level or high level mode signal based on whether one end of the storage device 230 is in electrical contact with the opening and closing rod 213, and may send the generated mode signal to the memory controller 231. In this case, the memory controller 231 may send a command CMD including information about the mode signal to the host 100, and the host 100 may set the use mode of the storage device 230 based on the information about the mode signal received thereby. Subsequently, the host 100 may send a command CMD including information about the setting mode to the memory controller 231 of the storage device 230.

[0154] Fig.12 is a block diagram of a storage system according to an embodiment. Fig.12 The storage system 10B and Figure 1 Therefore, the same or similar components may be marked with the same or similar reference numerals / symbols, and additional descriptions related to the same or similar components will be omitted to avoid redundancy and facilitate brevity.

[0155] exist Figures 1 to 11B , it is described that the mode signal is generated by the memory device, and the mode signal generated by the memory device is provided by the memory controller of the memory device to the host 100. However, this configuration is merely an example, and embodiments are not limited thereto.

[0156] For example, Fig.12As shown, the host 100 may include a status monitor 180, and the status monitor 180 may monitor the voltage level of the mode signal of the storage device. When the voltage level of the mode signal changes from a low level to a high level, the status monitor 180 may detect the change in the voltage level of the mode signal. Based on the changed voltage level of the mode signal, the host 100 may control the storage device so that the usage mode of the storage device changes from the SSD mode for the server to the SSD mode for the user.

[0157] Fig.13 is a block diagram of a storage system according to an embodiment. Fig.13 The storage system 10C and Fig.12 Therefore, the same or similar components may be marked with the same or similar reference numerals / symbols, and additional descriptions related to the same or similar components will be omitted to avoid redundancy and facilitate brevity.

[0158] exist Figures 1 to 12 In the embodiment, a description is given in which one storage device is installed in one carrier. However, this configuration is only an example, and the embodiment is not limited thereto.

[0159] For example, Fig.13 As shown, the first storage adapter 210_1 may include a first carrier 211_1, and a plurality of storage devices 230_11 to 230_1k may be installed in the first carrier 211_1. In an embodiment, the plurality of storage devices 230_11 to 230_1k may include a first storage device 230_11, ..., and a kth storage device 230_1k.

[0160] Fig.14 is a diagram showing a data center to which the storage system according to the embodiment is applied.

[0161] refer to Fig.14 , the data center 3000 is a facility that collects various data and provides services, and can be called a "data storage center". The data center 3000 can be a system for operating a search engine and a database, and can be a computing system used by a company (such as a bank) or a government agency. The data center 3000 may include application servers 3100 to 3100n and storage servers 3200 to 3200m. The number of application servers 3100 to 3100n and the number of storage servers 3200 to 3200m can be selected differently according to the embodiment. The number of application servers 3100 to 3100n may be different from the number of storage servers 3200 to 3200m.

[0162] The application server 3100 may include at least one processor 3110 and at least one memory 3120. The storage server 3200 may include at least one processor 3210 and at least one memory 3220. Now, the storage server 3200 will be described as an example. The processor 3210 may control all operations of the storage server 3200, may access the memory 3220, and may execute instructions and / or data loaded in the memory 3220. The memory 3220 may be a double data rate synchronous DRAM (DDR SDRAM), a high bandwidth memory (HBM), a hybrid memory cube (HMC), a dual in-line memory module (DIMM), an Optane DIMM, and / or a non-volatile DIMM (NVMDIMM). In some embodiments, the number of processors 3210 and memories 3220 included in the storage server 3200 may have multiple options. In an embodiment, the processor 3210 and the memory 3220 may provide a processor-memory pair. In an embodiment, the number of processors 3210 may be different from the number of memories 3220. The processor 3210 may include a single-core processor or a multi-core processor. The above description of the storage server 3200 may be similarly applied to the application server 3100. According to an embodiment, the application server 3100 may not include the storage device 3150. In other words, in an embodiment, the storage device 3150 may be omitted from the application server 3100. The storage server 3200 may include at least one storage device 3250. The number of storage devices 3250 included in the storage server 3200 may be selected differently according to the embodiment.

[0163] The application servers 3100 to 3100n can communicate with the storage servers 3200 to 3200m through the network 3300. The network 3300 can be implemented by using Fibre Channel (FC) or Ethernet. In this case, FC can be a medium for relatively high-speed data transmission and uses a high-performance and high-availability optical switch. The storage servers 3200 to 3200m can be provided as file storage, block storage, or object storage according to the access method of the network 3300.

[0164] In an embodiment, the network 3300 may be a storage-specific network, such as a storage area network (SAN). For example, the SAN may be an FC-SAN, which uses an FC network and is implemented according to an FC protocol (FCP). As another example, the SAN may be an Internet Protocol (IP)-SAN, which uses a transmission control protocol (TCP) / IP network and is implemented according to a SCSI or Internet SCSI (iSCSI) protocol over TCP / IP. In an embodiment, the network 3300 may be a general network, such as a TCP / IP network. For example, the network 3300 may be implemented according to protocols such as FC over Ethernet (FCoE), network attached storage (NAS), and NVMe over Fabrics (NVMe-oF).

[0165] The following will mainly describe the application server 3100 and the storage server 3200. The description of the application server 3100 may be applied to another application server 3100n, and the description of the storage server 3200 may be applied to another storage server 3200m.

[0166] The application server 3100 may store the data requested to be stored by the user or client in one of the storage servers 3200 to 3200m through the network 3300. In an embodiment, the application server 3100 may obtain the data requested to be read by the user or client from one of the storage servers 3200 to 3200m through the network 3300. For example, the application server 3100 may be implemented as a network server or a database management system (DBMS).

[0167] The application server 3100 may access a memory 3120n or a storage device 3150n included in another application server 3100n through the network 3300. In some embodiments, the application server 3100 may access a memory 3220 to 3220m or a storage device 3250 to 3250m included in the storage servers 3200 to 3200m through the network 3300. Therefore, the application server 3100 may perform various operations on the data stored in the application servers 3100 to 3100n and / or the storage servers 3200 to 3200m. For example, the application server 3100 may execute an instruction to move or copy data between the application servers 3100 to 3100n and / or the storage servers 3200 to 3200m. In this case, the data may be moved directly from the storage devices 3250 to 3250m of the storage servers 3200 to 3200m to the memories 3120 to 3120n of the application servers 3100 to 3100n, or moved to the memories 3220 to 3220m of the storage servers 3200 to 3200m to the memories 3120 to 3120n of the application servers 3100 to 3100n. The data moved through the network 3300 may be data encrypted for security or privacy.

[0168] The storage server 3200 will now be described as an example. The interface (I / F) 3254 may provide a physical connection between the processor 3210 and the controller (CTRL) 3251 and a physical connection between the NIC 3240 and the controller 3251. For example, the interface 3254 may be implemented by using a direct attached storage (DAS) scheme, in which the storage device 3250 is directly connected to a dedicated cable. In an embodiment, for example, the interface 3254 may be implemented by using various interface schemes, such as ATA, SATA, e-SATA, SCSI, SAS, PCI, PCIe, NVMe, IEEE 1394, USB, SD card, MMC (Multimedia Card), eMMC, UFS (Universal Flash), eUFS (Embedded Universal Flash), and CF (Compact Flash) card.

[0169] The storage server 3200 may further include a switch 3230 and a NIC 3240. The switch 3230 may selectively connect the processor 3210 to the storage device 3250 or selectively connect the NIC 3240 to the storage device 3250 by the control of the processor 3210. As described above, the application server 3100 may further include a switch 3130 and a NIC 3140.

[0170] In an embodiment, the NIC 3240 may include a network interface card and a network adapter. The NIC 3240 may be connected to the network 3300 through a wired interface, a wireless interface, a Bluetooth interface, or a fiber optic interface. The NIC 3240 may include an internal memory, a DSP, and a host bus interface, and is connected to the processor 3210 and / or the switch 3230 through the host bus interface. The host bus interface may be implemented as one of the examples of the above-mentioned interface 3254. In an embodiment, the NIC 3240 may be integrated with at least one of the processor 3210, the switch 3230, and the storage device 3250.

[0171] In the storage servers 3200 to 3200m or the application servers 3100 to 3100n, the processor may send a command to the storage devices 3150 to 3150n and 3250 to 3250m or the memories 3120 to 3120n and 3220 to 3220m and program or read data. In this case, the data may be data whose errors are corrected by the ECC engine. The data may be data on which a data bus inversion (DBI) operation or a data masking (DM) operation is performed, and may include cyclic redundancy code (CRC) information. The data may be data encrypted for security or privacy purposes.

[0172] The storage devices 3150 to 3150n and 3250 to 3250m may send control signals and command / address signals to the NAND flash memory devices 3252 to 3252m in response to a read command received from the processor. Therefore, when data is read from the NAND flash memory devices 3252 to 3252m, a read enable (RE) signal may be input as a data output control signal so that the data may be output to the DQ bus. The data strobe signal DQS may be generated by using the RE signal. The command and address signals may be latched into the page buffer according to the rising edge or falling edge of the write enable (WE) signal.

[0173] The controller (CTRL) 3251 may control all operations of the storage device 3250. In an embodiment, the controller 3251 may include an SRAM. The controller 3251 may write data to the NAND flash memory device 3252 in response to a write command, or read data from the NAND flash memory device 3252 in response to a read command. For example, the write command and / or the read command may be provided by the processor 3210 of the storage server 3200, the processor 3210m of another storage server 3200m, or the processors 3110 and 3110n of the application servers 3100 and 3100n. The DRAM 3253 may temporarily store (or buffer) data to be written to the NAND flash memory device 3252 or data read from the NAND flash memory device 3252. In an embodiment, the DRAM 3253 may store metadata. Here, the metadata may be user data or data generated by the controller 3251 for managing the NAND flash memory device 3252. The memory device 3250 may include a reset signal generator (RSG) 3255 and may be implemented to prevent abnormal reset shutdown and improve reliability of a product.

[0174] The storage devices 3150 to 3150m and 3250 to 3250m may include Figures 1 to 14 A storage adapter of one or more of the various embodiments described.

[0175] The storage device and the storage adapter can effectively prevent data loss even in the event of a sudden power outage (such as in the case of hot swapping).

[0176] While the present disclosure has been described with reference to various embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the present disclosure as set forth in the following claims.

Claims

1. A storage adapter, comprising: Carrier; as well as A storage device configured to store data, the storage device comprising: Buffer memory, including volatile memory; at least one non-volatile memory; a memory controller configured to control the buffer memory and the at least one nonvolatile memory; and a mode signal generating circuit configured to generate a mode signal based on a connection state between the storage device and the carrier, wherein the carrier is configured to detachably receive the storage device, Wherein, based on the level of the mode signal, the memory controller selectively performs a data dump operation so that the data stored in the buffer memory is stored in the at least one non-volatile memory.

2. The storage adapter according to claim 1, wherein: When the storage device and one end of the carrier are separated from each other, the mode signal generating circuit generates a high-level mode signal, and The storage device operates in an SSD mode for a user based on the high-level mode signal.

3. The storage adapter according to claim 2, wherein: When the mode signal is at the high level, the memory controller performs the data dump operation so that the data stored in the buffer memory is stored in the at least one nonvolatile memory.

4. The storage adapter according to claim 1, wherein: When the storage device and one end of the carrier are connected to each other, the mode signal generating circuit generates a low-level mode signal, and Wherein, the storage device operates in an SSD mode for a server based on the low-level mode signal.

5. The storage adapter according to claim 1, wherein: The carrier comprises: a bracket configured to constitute at least a portion of a housing of the storage adapter, the bracket receiving the storage device to fix the storage device; and An opening and closing lever is connected to the bracket and is configured to open and close the carrier through a rotation operation after the storage device is received in the bracket.

6. The storage adapter according to claim 5, wherein: The carrier also includes: The LED is configured to display a connection status between the storage device and the carrier.

7. The storage adapter according to claim 5, wherein: The connection state between the storage device and the carrier is determined by the rotation operation of the opening and closing lever.

8. The storage adapter according to claim 5, wherein: The mode signal generating circuit comprises: a resistor including a first terminal connected to a supply voltage; and a switch including a first end and a second end, the first end of the switch being connected to the second end of the resistor, the second end of the switch being connected to a ground voltage, and The opening and closing lever includes a connector, and the connector is physically connected to or disconnected from the switch according to the rotation operation of the opening and closing lever.

9. The storage adapter according to claim 8, wherein: When the connector of the opening and closing lever contacts the switch of the storage device, the resistor and the ground voltage are electrically connected to each other, and the mode signal generating circuit generates a mode signal of a low level.

10. The storage adapter according to claim 8, wherein: When the connector of the opening and closing lever is separated from the switch of the storage device, the resistor is electrically separated from the ground voltage, and the mode signal generating circuit generates a mode signal of a high level.

11. The storage adapter according to claim 8, wherein: The support is formed of a conductive material, and the ground voltage is connected to the support.

12. The storage adapter according to claim 1, wherein: The memory controller comprises: a host interface configured to perform an interface with a host; and a status monitor configured to monitor the level of the mode signal, and The memory controller sends information about the level of the mode signal to the host through the host interface.

13. The storage adapter according to claim 1, wherein: The mode signal generating circuit is arranged in the carrier, and The mode signal generating circuit sends information about the level of the mode signal to the host.

14. A storage device, detachably mounted in a carrier, the storage device comprising: Buffer memory, including volatile memory; at least one non-volatile memory; a memory controller configured to control the buffer memory and the at least one non-volatile memory; as well as a mode signal generating circuit configured to generate a mode signal based on a connection state between the storage device and the carrier, Wherein, based on the level of the mode signal, the memory controller selectively performs a data dump operation so that the data stored in the buffer memory is stored in the at least one non-volatile memory.

15. The storage device according to claim 14, wherein: When the storage device and one end of the carrier are separated from each other, the mode signal generating circuit generates a high-level mode signal, and The storage device operates in an SSD mode for a user based on the high-level mode signal.

16. The storage device according to claim 15, wherein: When the mode signal is at the high level, the memory controller performs the data dump operation so that the data stored in the buffer memory is stored in the at least one nonvolatile memory.

17. The storage device according to claim 15, wherein: When the storage device and the one end of the carrier are connected to each other, the mode signal generating circuit generates a low-level mode signal, and Wherein, the storage device operates in an SSD mode for a server based on the low-level mode signal.

18. A method for operating a storage device, wherein the storage device is detachably stored in a carrier, the method comprising: Setting the usage mode of the storage device to a first mode; detecting a level of a mode signal generated based on a connection state between the storage device and the carrier; as well as A data dump operation is selectively performed based on the level of the mode signal so that the data stored in the buffer memory of the storage device is stored in the nonvolatile memory of the storage device.

19. The operating method according to claim 18, further comprising: When the level of the mode signal is at a high level, the use mode of the storage device is changed from the first mode to the second mode, The first mode is a mode in which the storage device is used as an SSD for a server, and the second mode is a mode in which the storage device is used as an SSD for a user.

20. The operating method according to claim 19, wherein: When the storage device and one end of the carrier are separated from each other, the level of the mode signal is the high level, and Wherein, when the storage device and the one end of the carrier are connected to each other, the level of the mode signal is a low level.

Citation Information

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