Electronic package and fabrication method thereof

Abstract

An electronic package and a method of fabricating the same are provided, including stacking an electronic module including a carrier structure, a first electronic element disposed on a first side of the carrier structure, a second electronic element disposed on a second side of the carrier structure, and a plurality of conductive elements on a substrate via the plurality of conductive elements and a substrate frame, therefore, the accommodating space between the electronic module and the substrate is increased, and the second electronic element of the electronic module can be prevented from colliding with the substrate.

Description

Technical Field

[0001] The present invention relates to a semiconductor packaging process, in particular to an electronic packaging component integrating multiple chips and a manufacturing method thereof. Background Art

[0002] With the evolution of semiconductor packaging technology, semiconductor devices have developed different packaging types. In order to improve electrical functions and save packaging space, different three-dimensional packaging technologies have been developed, such as Fan Out Package on Package (FO PoP), etc., to match the greatly increased number of input / output ports on various chips, and then integrate integrated circuits with different functions into a single package structure. This packaging method can give full play to the heterogeneous integration characteristics of the system package (SiP), and can achieve system integration of electronic components with different functions, such as memory, central processing unit, graphics processor, image application processor, etc. through stacking design, which is suitable for various thin and light electronic products.

[0003] Figure 1 FIG. 1 is a cross-sectional schematic diagram of an existing semiconductor package 1. Figure 1 As shown, the semiconductor package 1 includes a package substrate 10 and a semiconductor module disposed on the package substrate 10 via solder balls 13. Specifically, the semiconductor module includes a circuit structure 15, a first semiconductor chip 11 disposed on the upper side of the circuit structure 15, a packaging layer 14 covering the first semiconductor chip 11, and a second semiconductor chip 12 disposed on the lower side of the circuit structure 15.

[0004] However, in the existing semiconductor package 1, the package substrate 10 only supports the semiconductor module with the solder balls 13, so the second semiconductor chip 12 is easy to collide with the package substrate 10 during assembly, resulting in damage to the second semiconductor chip 12. Therefore, the thickness of the second semiconductor chip 12 should not be too large, which limits the design of the second semiconductor chip 12 or makes it too difficult to manufacture. As a result, the existing semiconductor package 1 cannot be configured with second semiconductor chips 12 of various specifications according to the requirements of the optimal electronic component placement position, resulting in a disadvantageous flexibility in product design.

[0005] Furthermore, if the existing semiconductor package 1 requires more functions, such as when only a small-sized second semiconductor chip 12 can be selected, it is necessary to configure a multi-layer circuit structure 15 and a functional chip 17 on the packaging layer 14, and the packaging layer 14 is used to cover the functional chips 17. In addition, it is necessary to form a plurality of conductive columns 16 electrically connected to each of the circuit structures 15 in the packaging layer 14 to transmit signals between the chips. Therefore, not only does the process become cumbersome and the production cost is greatly increased, but the thickness of the semiconductor package 1 is increased due to the need to stack multiple layers of functional chips 17, making it difficult to meet the thinning requirements.

[0006] Therefore, how to overcome the shortcomings of the prior art is a technical problem that all walks of life are eager to solve. Summary of the invention

[0007] In view of the various deficiencies of the above-mentioned prior art, the present invention provides an electronic package, comprising: a supporting structure having a first side and a second side opposite to each other; a first electronic component, which is combined and electrically connected to the first side of the supporting structure; a second electronic component, which is combined and electrically connected to the second side of the supporting structure; a plurality of conductive elements, which are combined and electrically connected to the second side of the supporting structure; and a substrate frame, which is combined and electrically connected to the plurality of conductive elements and is elastically provided with a space corresponding to the position and quantity of the second electronic component for accommodating the second electronic component.

[0008] The present invention also provides a method for manufacturing an electronic package, comprising: providing a supporting structure having a first side and a second side opposite to each other, and a first electronic component is disposed on the first side; disposing a second electronic component on the second side of the supporting structure, and electrically connecting the second electronic component to the supporting structure; forming a plurality of conductive elements on the second side of the supporting structure, and electrically connecting the plurality of conductive elements to the supporting structure to form an electronic module; and combining the electronic module with a substrate frame, and electrically connecting the substrate frame to the plurality of conductive elements, wherein the substrate frame is elastically provided with a space corresponding to the position and quantity of the second electronic component for accommodating the second electronic component.

[0009] In the aforementioned electronic package and its manufacturing method, the first electronic component has an active surface facing the supporting structure and electrically connected to the supporting structure, and the second electronic component has an active surface facing the supporting structure and electrically connected to the supporting structure, so that the active surface of the first electronic component and the active surface of the second electronic component are arranged face to face.

[0010] In the aforementioned electronic package and its manufacturing method, the substrate frame has a circuit structure.

[0011] The aforementioned electronic package and its manufacturing method further include a substrate connected to the substrate frame. For example, the electronic module is first connected to the substrate frame and then connected to the substrate; or the substrate frame is first connected to the substrate and then the electronic module is connected to the substrate frame.

[0012] The aforementioned electronic package and its manufacturing method also include a coating layer covering the substrate frame, a plurality of conductive elements and the second electronic element.

[0013] The aforementioned electronic package and its manufacturing method further include a packaging layer formed on the first side of the supporting structure to cover the first electronic component.

[0014] As can be seen from the above, the electronic package and the manufacturing method of the present invention are mainly based on the design of the substrate frame. After the substrate frame is combined with the conductive element, the height position of the supporting structure relative to the first surface of the substrate is raised, so that a high enough accommodation space is formed between the supporting structure and the substrate to prevent the second electronic component from colliding with the first surface of the substrate. Therefore, compared with the prior art, the present invention can flexibly design a space for accommodating the second electronic component in the substrate frame according to the number and arrangement position of the second electronic component, thereby facilitating the flexibility of product design.

[0015] Furthermore, the manufacturing method of the present invention can be implemented by using existing semiconductor packaging processes, so there is no need to develop special processes or purchase equipment of special specifications. Therefore, compared with the existing technology, the manufacturing method of the present invention can effectively reduce the production cost of the electronic packaging.

[0016] In addition, the manufacturing method of the present invention can configure a multifunctional large-sized second electronic component as required, so there is no need to stack existing functional chips and their related configurations on the packaging layer. Therefore, compared with the existing technology, the manufacturing method of the present invention not only simplifies the process and can greatly reduce the production cost, but also can effectively reduce the thickness of the electronic package to meet the thinning requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.

[0018] FIG. 2A to FIG. 2E It is a cross-sectional schematic diagram of a method for manufacturing an electronic package of the present invention.

[0019] Figure 2C-1 for Figure 2C Schematic cross-sectional view of other embodiments.

[0020] Figure 2D-1 for Figure 2D A partial top-down schematic diagram of .

[0021] Main component symbols

[0022] 1 Semiconductor Package

[0023] 10 Package substrate

[0024] 11. First Semiconductor Chip

[0025] 12. Second semiconductor chip

[0026] 13 Solder balls

[0027] 14,24 Encapsulation layer

[0028] 15 Line structure

[0029] 16 Conductive pillars

[0030] 17 Functional Chip

[0031] 2 Electronic packaging

[0032] 2a Electronic Module

[0033] 20 Load-bearing structure

[0034] 20a First side

[0035] 20b Second side

[0036] 200 First dielectric layer

[0037] 201,202,203 First circuit layer

[0038] 21 First Electronic Components

[0039] 21a, 22a Active surface

[0040] 21b, 22b Non-active surface

[0041] 22 Second electronic component

[0042] 220 Electrode pads

[0043] 23 Conductive element

[0044] 25 Insulation layer

[0045] 26 substrate rack

[0046] 26a Opening

[0047] 260 Second dielectric layer

[0048] 261 Second circuit layer

[0049] 27 Conductive bump

[0050] 28 protective layer

[0051] 29 Auxiliary electronic components

[0052] 30 substrate

[0053] 30a First surface

[0054] 30b Second surface

[0055] 300 solder balls

[0056] 301 Electrical contact pad

[0057] 302 Ball Planting Pad

[0058] 32 Coating

[0059] 33 Strong firmware

[0060] S Accommodation space. DETAILED DESCRIPTION

[0061] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0062] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical content.

[0063] FIG. 2A to FIG. 2E It is a cross-sectional schematic diagram of a method for manufacturing an electronic package 2 of the present invention.

[0064] like Figure 2A As shown, a supporting structure 20 is provided, which is combined with at least one first electronic component 21 and a packaging layer 24. In this embodiment, three first electronic components 21 are shown.

[0065] The supporting structure 20 is, for example, a package substrate with a core layer and a circuit structure, a package substrate with a coreless circuit structure, a silicon interposer (TSI) with conductive through-silicon vias (TSV), or other board types. It should be understood that the supporting structure 20 can also be other board materials for supporting chips, such as wafers, or other boards with metal routing, etc., and is not limited to the above.

[0066] In the present embodiment, the carrier structure 20 is formed into a coreless package substrate by a redistribution layer (RDL) manufacturing method, which has a first side 20a and a second side 20b opposite to each other, and includes a first dielectric layer 200 and first circuit layers 201, 202, 203 combined with the first dielectric layer 200. For example, the carrier structure 20 is made of a redistribution layer, wherein the material forming the first circuit layers 201, 202, 203 is copper, and the material forming the first dielectric layer 200 is a dielectric material such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), etc.

[0067] The first electronic component 21 is combined on the first side 20a of the supporting structure 20, wherein the first electronic component 21 is an active component, a passive component or a combination thereof, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor.

[0068] In this embodiment, the first electronic component 21 is a semiconductor chip having an active surface 21a and an inactive surface 21b opposite to each other. The active surface 21a is electrically connected to the first circuit layer 202 in a flip-chip manner (as shown in the figure, through a conductive bump 210); or, the first electronic component 21 can also be electrically connected to the first circuit layer 202 in a wire bonding manner via a plurality of welding wires (not shown); or, the first electronic component 21 can be directly electrically connected to the first circuit layer 202. However, the manner in which the first electronic component 21 is electrically connected to the first circuit layer 202 is not limited to the above.

[0069] The packaging layer 24 is formed on the first side 20 a of the supporting structure 20 to cover the first electronic components 21 .

[0070] In this embodiment, the packaging layer 24 is an insulating material, such as a packaging body of polyimide (PI), dry film, or epoxy, which can be formed on the first side 20a of the supporting structure 20 by lamination or molding.

[0071] like Figure 2B As shown, a protective layer 28 is formed on the second side 20b of the supporting structure 20, and at least one second electronic component 22 is arranged on the second side 20b of the supporting structure 20 (two second electronic components 22 are shown in this embodiment), and a conductive element 23 is formed on the second side 20b of the supporting structure 20 to form an electronic module 2a, wherein the height of the conductive element 23 relative to the second side 20b is less than the height of the second electronic component 22 relative to the second side 20b.

[0072] The protection layer 28 is an insulating material such as a solder mask (eg, green paint), and is formed with a plurality of openings such that the first circuit layers 201 , 203 are exposed through the openings.

[0073] The second electronic component 22 is an active component, a passive component or a combination of the two, wherein the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor.

[0074] In this embodiment, the second electronic component 22 is a semiconductor chip having an active surface 22a and an inactive surface 22b opposite to each other, and the active surface 22a has a plurality of electrode pads 220, so that the second electronic component 22 is electrically connected to the first circuit layer 203 by means of a plurality of conductive bumps 27 by means of a flip-chip method with its electrode pads 220, and then the conductive bumps 27 are covered with an insulating layer 25 such as a primer; or, the second electronic component 22 can also be electrically connected to the first circuit layer 203 by means of a plurality of bonding wires (not shown) by means of a bonding method; or, the second electronic component 22 can be directly electrically connected to the first circuit layer 203. However, the method for electrically connecting the second electronic component 22 to the circuit layer is not limited to the above.

[0075] Furthermore, the active surface 21 a of the first electronic component 21 and the active surface 22 a of the second electronic component 22 are arranged face to face.

[0076] The conductive element 23 is a solder material or a metal pillar such as a copper pillar, which is electrically connected to the first circuit layer 201 .

[0077] like Figure 2CAs shown, a substrate 30 is provided, which has a first surface 30a and a second surface 30b opposite to each other, and at least one substrate frame 26 and at least one auxiliary electronic component 29 are disposed on the first surface 30a, wherein the substrate frame 26 has an opening 26a for accommodating the second electronic component 22. Figure 2D As shown, the electronic module 2a is combined with the substrate frame 26 by its conductive element 23 to form an electronic package 2. In this embodiment, the electronic module 2a can be placed on the substrate surface where the substrate frame 26 and the substrate 30 are pre-connected. In another embodiment, as shown in FIG. Figure 2C-1 As shown, the substrate frame 26 and the electronic module 2 a can be combined first and then connected to the substrate 30 , wherein the substrate frame 26 has an opening 26 a for accommodating the second electronic component 22 .

[0078] Please refer to Figure 2D-1 The substrate frame 26 can be provided with openings 26a corresponding to the number and position of the second electronic components 22 in the electronic module 2a as required. That is, the present invention can flexibly design a space (opening 26a) in the substrate frame 26 to accommodate the second electronic components 22 according to the number and arrangement position of the second electronic components 22.

[0079] In this embodiment, the substrate frame 26 has a circuit structure, which includes a second dielectric layer 260, and a second circuit layer 261 disposed on the second dielectric layer 260 and electrically connected to the substrate 30, such as RDL specifications, and the outermost second circuit layer 261 is exposed from the second dielectric layer 260 to electrically connect the electronic module 2a through the conductive element 23, and electrically connect the substrate 30 through the conductive element 26b. For example, the material forming the second circuit layer 261 is copper, and the material forming the second dielectric layer 260 is a dielectric material such as poly(p-oxadiazole) (PBO), polyimide (PI), and prepreg (PP).

[0080] Furthermore, the auxiliary electronic component 29 is a passive component such as a resistor, a capacitor and an inductor, and the first surface 30 a of the substrate 30 has a plurality of electrical contact pads 301 so that the second circuit layer 261 and the auxiliary electronic component 29 are electrically connected to the electrical contact pads 301 .

[0081] In addition, the outer surface of the packaging layer 24 of the electronic module 2a can be leveled with the inactive surface 21b of the first electronic component 21 through a flattening process such as grinding as required, so that the inactive surface 21b of the first electronic component 21 is exposed outside the packaging layer 24.

[0082] In addition, the substrate frame 26 , the conductive elements 23 , 26 b and the second electronic element 22 may be coated by a coating layer 32 such as a primer.

[0083] like Figure 2E As shown, a ball planting process is performed on the ball planting pad 302 of the second surface 30b of the substrate 30 to form a plurality of solder balls 300 for use in subsequent processes. The electronic package 2 is disposed on a circuit board (not shown) with its solder balls 300.

[0084] In this embodiment, a reinforcing member 33 , such as a metal frame, may be disposed on the substrate 30 as required to solve the problem of stress concentration and prevent the substrate 30 from warping. Furthermore, a heat dissipation function may be provided.

[0085] Therefore, the manufacturing method of the present invention is mainly through the design of the substrate frame 26, so that when the substrate frame 26 is combined with the conductive element 23, the height position of the supporting structure 20 relative to the first surface 30a of the substrate 30 is raised, so that a high enough accommodation space S is formed between the supporting structure 20 and the substrate 30 to prevent the second electronic component 22 from colliding with the first surface 30a of the substrate 30. Therefore, compared with the prior art, the electronic package 2 of the present invention can be configured with second electronic components 22 of various specifications according to the requirements of the electronic component placement position, without considering the height size of the second electronic component 22 or the conductive element 23, thereby facilitating the design flexibility of the product.

[0086] Furthermore, the manufacturing method of the present invention can be implemented by using existing semiconductor packaging processes, so there is no need to develop special processes or purchase equipment with special specifications. Therefore, the manufacturing method of the present invention can effectively reduce the production cost of the electronic package 2.

[0087] In addition, the manufacturing method of the present invention can configure a multifunctional large-sized second electronic component 22 as required, so there is no need to stack existing functional chips and their related configurations on the packaging layer 24. At the same time, since the active surface 21a of the first electronic component 21 and the active surface 22a of the second electronic component 22 are configured face to face, the electronic components can communicate vertically to meet the needs of high-speed transmission and obtain the best electrical performance. Therefore, compared with the existing technology, the manufacturing method of the present invention not only simplifies the process and can greatly reduce the production cost, but also can effectively reduce the thickness of the electronic package 2 to meet the demand for thinning.

[0088] The present invention provides an electronic package 2 , which includes: a supporting structure 20 , a first electronic component 21 , a packaging layer 24 , a second electronic component 22 , a plurality of conductive components 23 and a substrate frame 26 .

[0089] The supporting structure 20 has a first side 20 a and a second side 20 b opposite to each other.

[0090] The first electronic component 21 is combined with and electrically connected to the first side 20 a of the supporting structure 20 .

[0091] The packaging layer 24 is formed on the first side 20 a of the supporting structure 20 to cover the first electronic component 21 .

[0092] The second electronic component 22 is combined with and electrically connected to the second side 20 b of the supporting structure 20 .

[0093] The conductive element 23 is combined with and electrically connected to the second side 20 b of the supporting structure 20 .

[0094] The substrate frame 26 is combined with and electrically connected to the conductive element 23 and does not cover the second electronic element 22 .

[0095] In one embodiment, the first electronic component 21 has an active surface 21a facing the supporting structure 20 and electrically connected to the supporting structure 20, and the second electronic component 22 has an active surface 22a facing the supporting structure 20 and electrically connected to the supporting structure 20, so that the active surface 21a of the first electronic component 21 and the active surface 22a of the second electronic component 22 are configured face to face.

[0096] In one embodiment, the substrate frame 26 has a circuit structure.

[0097] In one embodiment, the electronic package 2 further includes a substrate 30 connected to the substrate frame 26 .

[0098] For example, in one embodiment, the electronic package 2 further includes a coating layer 32 coating the substrate frame 26 , the conductive element 23 and the second electronic element 22 .

[0099] In summary, the electronic package and the manufacturing method thereof of the present invention, through the design of the substrate frame, raises the height position of the supporting structure relative to the first surface of the substrate, so that a high enough accommodation space is formed between the supporting structure and the substrate to prevent the second electronic component from colliding with the first surface of the substrate. At the same time, the present invention can flexibly design a space for accommodating the second electronic component in the substrate frame according to the number and arrangement position of the second electronic component. Therefore, the electronic package of the present invention can be configured with second electronic components of various specifications according to the requirements of the arrangement position of the electronic component, which is conducive to the flexibility of product design.

[0100] Furthermore, the manufacturing method of the present invention can be implemented by using existing semiconductor packaging processes, so there is no need to develop special processes or purchase equipment of special specifications. Therefore, the manufacturing method of the present invention can effectively reduce the production cost of the electronic packaging.

[0101] In addition, the manufacturing method of the present invention can configure a multifunctional large-sized second electronic component as required, so there is no need to stack existing functional chips and their related configurations on the packaging layer. Therefore, the manufacturing method of the present invention not only simplifies the process and can greatly reduce the production cost, but also can effectively reduce the thickness of the electronic package to meet the demand for thinning.

[0102] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the inventive concept and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. An electronic package, comprising: A load-bearing structure having a first side and a second side opposite to each other; A first electronic component is bonded to and electrically connected to the first side of the supporting structure; a second electronic component bonded to and electrically connected to the second side of the supporting structure; a plurality of conductive elements bonded to and electrically connected to the second side of the support structure; as well as The substrate frame is combined with and electrically connected to the plurality of conductive elements and is elastically provided with spaces corresponding to the positions and quantities of the second electronic elements for accommodating the second electronic elements.

2. The electronic package of claim 1, wherein: The first electronic component has an active surface facing the supporting structure and electrically connected to the supporting structure, and the second electronic component has an active surface facing the supporting structure and electrically connected to the supporting structure, so that the active surface of the first electronic component and the active surface of the second electronic component are arranged face to face.

3. The electronic package of claim 1, wherein: The substrate frame has a circuit structure.

4. The electronic package of claim 1, wherein: The electronic package also includes a substrate connected to the substrate frame.

5. The electronic package of claim 1, wherein: The electronic package also includes a covering layer covering the substrate frame, a plurality of conductive elements and the second electronic element.

6. The electronic package of claim 1, wherein: The electronic package also includes a packaging layer formed on the first side of the supporting structure to cover the first electronic component.

7. A method for manufacturing an electronic package, comprising: Providing a supporting structure having a first side and a second side opposite to each other, wherein a first electronic component is disposed on the first side; Disposing a second electronic component on the second side of the supporting structure, and electrically connecting the second electronic component to the supporting structure; Forming a plurality of conductive elements on the second side of the supporting structure, and electrically connecting the plurality of conductive elements to the supporting structure to form an electronic module; as well as The electronic module is combined with a substrate frame, and the substrate frame is electrically connected to the plurality of conductive elements, wherein the substrate frame is elastically provided with spaces corresponding to the positions and quantities of the second electronic elements for accommodating the second electronic elements.

8. The method for manufacturing an electronic package as claimed in claim 7, wherein: The first electronic component has an active surface facing the supporting structure and electrically connected to the supporting structure, and the second electronic component has an active surface facing the supporting structure and electrically connected to the supporting structure, so that the active surface of the first electronic component and the active surface of the second electronic component are arranged face to face.

9. The method for manufacturing an electronic package as claimed in claim 7, wherein: The substrate frame has a circuit structure.

10. The method for manufacturing an electronic package according to claim 7, wherein: The manufacturing method includes connecting the substrate frame and a substrate. 11 . The method for manufacturing an electronic package as claimed in claim 10 , wherein the electronic module is first combined with the substrate frame and then connected to the substrate. 12 . The method for manufacturing an electronic package as claimed in claim 10 , wherein the substrate frame is first connected to the substrate, and then the electronic module is combined to the substrate frame.

13. The method for manufacturing an electronic package according to claim 7, wherein: The manufacturing method further comprises covering the substrate frame, a plurality of conductive elements and the second electronic element with a covering layer.

14. The method for manufacturing an electronic package according to claim 7, wherein: The manufacturing method further includes forming a packaging layer on the first side of the supporting structure to cover the first electronic component.

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