Back contact battery, battery assembly and photovoltaic system

Abstract

The invention is suitable for the technical field of solar cells, and provides a back contact cell, a cell assembly and a photovoltaic system. The back contact cell comprises a silicon substrate, a plurality of first polarity fine grids and a plurality of second polarity fine grids. The first polarity fine grid and the second polarity fine grid are arranged on the silicon substrate along a first direction, and the first polarity fine grid and the second polarity fine grid are spaced; the first polarity fine grid comprises a first grid line, the first grid line is provided with a first connecting block, the width of the first connecting block is larger than that of the first grid line, and the length of the first connecting block is larger than or equal to 100 micrometers; the second polarity fine grid comprises a second grid line, the second grid line comprises a first main body part and a first bending part which are connected, the first main body part extends along a second direction, the second direction is crossed with the first direction, and the first bending part is arranged corresponding to the first connecting block and is bent from the first main body part to the direction far away from the first connecting block. Therefore, the connection stability of the back contact battery and the electric connecting piece can be improved.

Description

Technical Field

[0001] The present application belongs to the technical field of solar cells, and in particular relates to a back-contact cell, a cell assembly and a photovoltaic system. Background Art

[0002] Solar cell power generation is a sustainable, clean energy source, utilizing the photovoltaic effect of a semiconductor pn junction to convert sunlight into electricity. In related technologies, back-contact cells are typically connected using electrical connectors such as solder ribbons to form a cell string. However, these connectors can easily become detached from the back-contact cells, resulting in poor connection stability.

[0003] Based on this, how to improve the connection stability between the back contact battery and the electrical connector has become an urgent problem to be solved. Summary of the Invention

[0004] The present application provides a back-contact cell, a cell assembly, and a photovoltaic system, aiming to solve the problem of how to improve the connection stability between the back-contact cell and the electrical connector.

[0005] The back contact battery provided in this application includes:

[0006] Silicon substrate;

[0007] A plurality of first polarity fine gates and a plurality of second polarity fine gates are provided on the silicon substrate and arranged along a first direction, wherein the first polarity fine gates and the second polarity fine gates are spaced apart;

[0008] The first polarity fine gate includes a first gate line, the first gate line is provided with a first connecting block, the width of the first connecting block is greater than the width of the first gate line, and the length of the first connecting block is greater than or equal to 100 μm;

[0009] The second polarity fine grid includes a second grid line, which includes a first main body and a first bending portion connected to each other. The first main body extends along a second direction, and the second direction intersects with the first direction. The first bending portion is arranged corresponding to the first connecting block and bends from the first main body in a direction away from the first connecting block.

[0010] Specifically, the difference between the width of the first connection block and the width of the first gate line is 5 μm-290 μm.

[0011] Specifically, a maximum distance between the first bending portion and the first main body portion in the first direction is 5 μm-290 μm.

[0012] Specifically, the first gate line, the first connecting block, and the second gate line satisfy the following formula:

[0013] -100μm≤w1-w2-d1≤100μm;

[0014] Wherein, w1 is the width of the first connecting block, w2 is the width of the first gate line, and d1 is the maximum distance between the first bending portion and the first main body portion in the first direction.

[0015] Specifically, the first gate line is a first polarity fine gate closest to the edge of the silicon substrate, and the distance between the first gate line and the edge is 0.4 mm-1 mm.

[0016] Specifically, the distance from the first connecting block to the edge is 0.4 mm-50 mm.

[0017] Specifically, the first polarity fine grid includes a third grid line, and the third grid line includes a second main body and a second bending portion connected to each other. The second main body extends along the second direction, and the second bending portion is arranged corresponding to the first connecting block and bends from the second main body in a direction away from the first connecting block.

[0018] Specifically, along a direction away from the first connecting block, the bending depths of the first bending portion and the second bending portion gradually decrease.

[0019] Specifically, for the adjacent second gate line and the third gate line, the first bending portion and the second bending portion satisfy the following formula:

[0020] 50μm≤d1-d2≤150μm;

[0021] Wherein, d2 is the maximum distance between the second bending portion and the second main body portion in the first direction, and d1 is the maximum distance between the first bending portion and the first main body portion in the first direction.

[0022] Specifically, the first gate lines and the first connecting blocks provided on the first gate lines form a first conductive structure, and each row of the first conductive structures is continuous;

[0023] And / or, the second gate lines in each row are continuous.

[0024] Specifically, the first connection block includes at least one of a pad and a gate line segment.

[0025] Specifically, the first connecting block is formed with a hollow area;

[0026] Alternatively, the first connecting block is solid.

[0027] Specifically, the second polarity fine gate includes a fourth gate line, the fourth gate line is provided with a second connection block, and the width of the second connection block is greater than the width of the fourth gate line.

[0028] Specifically, a difference between the width of the second connection block and the width of the fourth gate line is 5 μm-290 μm.

[0029] Specifically, the difference between the area of ​​the first connection block and the area of ​​the second connection block is -400 μm. 2 ~400μm 2 .

[0030] Specifically, the first polarity grid line adjacent to the second connection block is disconnected at a position corresponding to the second connection block to avoid the second connection block. In the second direction, the distance between the second connection block and the breakpoint of the first grid line is 0.2 mm-1 mm.

[0031] Specifically, the fourth gate line is a second polarity fine gate closest to the edge of the silicon substrate, and the distance between the fourth gate line and the edge is greater than 0.7 mm-1.3 mm.

[0032] Specifically, the distance from the second connecting block to the edge of the silicon substrate is 0.7 mm to 50 mm.

[0033] Specifically, the fourth gate line is a second polarity fine gate closest to the edge of the silicon substrate, and the second connecting block is located on a side of the fourth gate line facing the edge.

[0034] Specifically, the second connecting block protrudes from the fourth gate line toward both sides of the fourth gate line.

[0035] Specifically, the fourth gate line includes a third main portion and a third bending portion connected to each other, the third main portion extends along the second direction, the third bending portion bends from the third main portion toward a direction away from the edge of the silicon substrate, and the second connecting block is provided at the third bending portion.

[0036] Specifically, a maximum distance between the third bending portion and the third main body portion in the first direction is 5 μm-290 μm.

[0037] Specifically, the fourth gate line and the second gate line are the same second polarity fine gate line.

[0038] Specifically, the fourth gate line and the second connecting block provided on the fourth gate line form a second conductive structure, and each row of the second conductive structure is continuous.

[0039] Specifically, the second connection block includes at least one of a pad and a gate line segment.

[0040] Specifically, the second connecting block is formed with a hollow area;

[0041] Alternatively, the second connecting block is solid.

[0042] Specifically, the silicon substrate includes a plurality of first polarity doped regions and a plurality of second polarity doped regions arranged along the first direction, the first polarity doped regions are provided with the first polarity fine gates, and the second polarity doped regions are provided with the second polarity fine gates;

[0043] The first polarity doping region includes a first doping region, the first doping region includes a first area and a second area, the first area is provided with the first gate line, and the second area corresponds to the first connecting block;

[0044] The second polarity doping region includes a second doping region, the second doping region includes a third area and a fourth area, the third area is provided with the first main portion of the second gate line, and the fourth area is provided with the first bending portion of the second gate line.

[0045] Specifically, the second area protrudes from the first area.

[0046] Specifically, in the first direction, the maximum depth of the second region protruding from the first region is 5 μm-290 μm.

[0047] Specifically, a side of the fourth region facing away from the second region protrudes from the third region.

[0048] Specifically, in the first direction, a maximum depth of the fourth region protruding from the third region is 1 μm-500 μm.

[0049] Specifically, the second region protrudes from the first region toward the fourth region, and in the first direction, a difference between a maximum depth of the second region protruding from the first region and a maximum depth of the fourth region protruding from the third region is 50 μm-200 μm.

[0050] Specifically, the first polarity fine grid includes a third grid line, the third grid line includes a second main portion and a second bent portion connected to each other, the second main portion extends along the second direction, and the second bent portion is provided corresponding to the first connecting block and bends from the second main portion in a direction away from the first connecting block;

[0051] The first polarity doping region includes a third doping region, the third doping region includes a fifth region and a sixth region, the fifth region is provided with the second main portion of the third gate line, and the sixth region is provided with the second bending portion of the third gate line.

[0052] Specifically, a side of the sixth region facing away from the second region protrudes from the fifth region.

[0053] Specifically, the fourth region protrudes from the third region on a side facing away from the second region, and the protrusion depths of the fourth region and the sixth region gradually decrease in a direction away from the second region.

[0054] Specifically, for the adjacent second doping region and the third doping region, the fourth region and the sixth region satisfy the following formula:

[0055] 50μm≤H2-H3≤200μm;

[0056] H2 is the maximum depth of the fourth region protruding from the third region on the side away from the second region in the first direction, and H3 is the maximum depth of the sixth region protruding from the fifth region on the side away from the second region in the first direction.

[0057] Specifically, each row of the first doped regions is continuous;

[0058] And / or, the second doped regions in each row are continuous.

[0059] Specifically, the doped region closest to the edge of the silicon substrate is a P region.

[0060] Specifically, the second polarity fine gate includes a fourth gate line, the fourth gate line is provided with a second connecting block, and the width of the second connecting block is greater than the width of the fourth gate line;

[0061] The second polarity doping region includes a fourth doping region, the fourth doping region includes a seventh region and an eighth region, the seventh region is provided with the fourth gate line, and the eighth region corresponds to the second connecting block.

[0062] Specifically, the eighth region protrudes from the seventh region.

[0063] Specifically, the maximum depth of the eighth region protruding from the seventh region is 5 μm-290 μm.

[0064] Specifically, the fourth doping region and the second doping region are the same second polarity doping region.

[0065] Specifically, the fourth doping regions in each row are continuous.

[0066] Specifically, the fourth gate line includes a third main portion and a third bent portion connected to each other, the third main portion extends along the second direction, the third bent portion bends from the third main portion in a direction away from the edge of the silicon substrate, and the second connecting block is provided on the third bent portion;

[0067] The fourth doping region includes a ninth area, and the ninth area is provided with the third bending portion.

[0068] Specifically, the side of the ninth region facing away from the eighth region protrudes from the seventh region.

[0069] Specifically, the first polarity fine grid is a positive grid line, and the first polarity fine grid includes a fifth grid line and a sixth grid line. The distance between the sixth grid line and the adjacent second polarity fine grid is greater than the distance between the fifth grid line and the adjacent second polarity fine grid.

[0070] Specifically, the sixth gate line is provided with a third connecting block, and the width of the third connecting block is greater than the width of the sixth gate line.

[0071] Specifically, the spacing between the sixth grid line and the adjacent second polarity fine grid is a first spacing, the spacing between the fifth grid line and the adjacent second polarity fine grid is a second spacing, and the difference between the first spacing and the second spacing is 0.05-0.1 mm.

[0072] The battery assembly provided in the present application includes any of the above-mentioned back-contact batteries.

[0073] The photovoltaic system provided in this application includes any of the above-mentioned battery components.

[0074] In the back-contact cell, battery assembly, and photovoltaic system of the embodiments of the present application, since the width of the first connecting block is greater than the width of the first grid line and the length is greater than or equal to 100 μm, the contact area between the first connecting block and the electrical connector can be increased, thereby increasing the pulling force, reducing the risk of the electrical connector falling off the back-contact cell, and improving the connection stability between the back-contact cell and the electrical connector. At the same time, since the first bent portion of the second grid line bends away from the first main portion from the first connecting block, more space can be provided for the first connecting block with a larger width, facilitating the widening of the first connecting block and reducing the risk of short circuits caused by the small distance between the electrodes of the two polarities. BRIEF DESCRIPTION OF THE DRAWINGS

[0075] Figure 1 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0076] Figure 2 yes Figure 1 An enlarged schematic diagram of a partial structure of a back contact battery;

[0077] Figure 3 1 is a schematic structural diagram of a back-contact battery according to an embodiment of the present application;

[0078] Figure 4 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0079] Figure 5is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0080] Figure 6 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0081] Figure 7 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0082] Figure 8 yes Figure 7 An enlarged schematic diagram of a partial structure of a back contact battery;

[0083] Figure 9 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0084] Figure 10 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0085] Figure 11 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0086] Figure 12 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0087] Figure 13 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0088] Figure 14 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0089] Figure 15 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0090] Figure 16 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0091] Figure 17 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0092] Figure 18 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0093] Figure 19 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0094] Figure 20 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0095] Figure 21 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0096] Figure 22 yes Figure 21 An enlarged schematic diagram of a partial structure of a back contact battery;

[0097] Figure 23 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0098] Figure 24 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0099] Figure 25 is a schematic diagram of a partial structure of a back-contact battery according to an embodiment of the present application;

[0100] Figure 26 is a schematic diagram of a back-contact battery according to an embodiment of the present application;

[0101] Figure 27 yes Figure 26 Schematic diagram of part of the structure of the back contact battery;

[0102] Description of main component symbols:

[0103] Back contact cell 10, silicon substrate 101, first conductive structure 1001, second conductive structure 1002, dielectric film layer 1003;

[0104] First polarity fine gate 11, first gate line 111, first connection block 112, first hollow area 1120, third gate line 113, second main body 1131, second bending portion 1132, fifth gate line 114, sixth gate line 115, third connection block 116;

[0105] The second polarity fine gate 12, the second gate line 121, the first main portion 1211, the first bending portion 1212, the fourth gate line 122, the third main portion 1221, the third bending portion 1222, the second connecting block 123, and the second hollow area 1230;

[0106] The length S1 of the first connecting block, the width w1 of the first connecting block, the width w2 of the first grid line, the width w3 of the second connecting block, and the width w4 of the fourth grid line; the maximum distance d1 between the first bent portion and the first main portion in the first direction, the maximum distance d2 between the second bent portion and the second main portion in the first direction, the distance d3 between the second connecting block and the breakpoint of the first grid line, and the maximum distance d4 between the third bent portion and the third main portion in the first direction; the distance x1 between the first grid line and the edge, the distance x2 between the first connecting block and the edge, the distance x3 between the fourth grid line and the edge, and the distance x4 between the second connecting block and the edge;

[0107] The first polarity doping region 13, the first doping region 131, the first region 1311, the second region 1312, the third doping region 132, the fifth region 1321, the sixth region 1322, the fifth doping region 133, the overlapping portion 1331, and the non-overlapping portion 1332;

[0108] The second polarity doped region 14, the second doped region 141, the third region 1411, the fourth region 1412, the fourth doped region 142, the seventh region 1421, the eighth region 1422, the ninth region 1423, the sixth doped region 143, the body 1431, and the protrusion 1432;

[0109] The width of the first region is W1, the width of the second region is W2, the width of the third region is W3, and the width of the fourth region is W4; the maximum depth of the second region protruding from the first region is H1, the maximum depth of the fourth region protruding from the third region is H2, the maximum depth of the sixth region protruding from the fifth region is H3, and the maximum depth of the eighth region protruding from the seventh region is H4;

[0110] The spacing L1 between the fifth gate line and the adjacent second polarity fine gate, the spacing L2 between the sixth gate line and the adjacent second polarity fine gate, the width L3 of the third connecting block, the width L4 of the sixth gate line, the spacing L5 between two adjacent sixth gate lines, the depth L6 of the protrusion from the main body, the width L7 of the overlapping portion, the length L8 of the overlapping portion, and the spacing L9 between the overlapping portion and the third connecting block. DETAILED DESCRIPTION

[0111] In order to make the purpose, technical solutions and advantages of the present application more clear, the present application is further described in detail below with reference to the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application. In addition, it should be understood that the specific embodiments described herein are merely used to explain the present application and are not intended to limit the present application.

[0112] In the description of this application, it should be understood that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on this application.

[0113] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the described features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0114] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections, electrical connections, or mutual communication; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0115] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0116] The disclosure below provides many different embodiments or examples for realizing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. In addition, the present application may repeat reference numbers and / or reference letters in different examples. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those skilled in the art will appreciate the application of other processes and / or the use scenarios of other materials.

[0117] See also Figure 1 、 Figure 2 and Figure 3 The back contact battery 10 of the embodiment of the present application includes:

[0118] Silicon substrate 101;

[0119] A plurality of first polarity fine gates 11 and a plurality of second polarity fine gates 12 are provided on the silicon substrate 101 and arranged along a first direction, with the first polarity fine gates 11 and the second polarity fine gates 12 spaced apart.

[0120] The first polarity fine gate 11 includes a first gate line 111 , the first gate line 111 is provided with a first connection block 112 , a width w1 of the first connection block 112 is greater than a width w2 of the first gate line 111 , and a length S1 of the first connection block 112 is greater than or equal to 100 μm;

[0121] The second polarity fine grid 12 includes a second grid line 121, which includes a first main body 1211 and a first bending portion 1212 connected to each other. The first main body 1211 extends along a second direction that intersects the first direction. The first bending portion 1212 is arranged corresponding to the first connecting block 112 and bends from the first main body 1211 in a direction away from the first connecting block 112.

[0122] In the back-contact battery 10 of the embodiment of the present application, since the width w1 of the first connecting block 112 is greater than the width w2 of the first grid line 111 and the length s1 is greater than or equal to 100 μm, the contact area between the first connecting block 112 and the electrical connector can be increased, thereby increasing the pulling force, reducing the risk of the electrical connector falling off the back-contact battery 10, and improving the connection stability between the back-contact battery 10 and the electrical connector. At the same time, since the first bent portion 1212 of the second grid line 121 bends away from the first main portion 1211 in a direction away from the first connecting block 112, more space can be provided for the wider first connecting block 112, facilitating the widening of the first connecting block 112 and reducing the risk of short circuits caused by the small distance between the electrodes of the two polarities.

[0123] Specifically, the back contact cell 10 can be a sliced ​​cell formed by cutting a whole cell. For example, Figure 3 A half-cell battery is formed by cutting a whole cell in half. The back contact cell 10 can also be a whole cell that has not been cut. The whole cell back contact cell 10 can include a slicing groove, and the whole cell can be cut along the slicing groove to obtain Figure 3 The back contact battery 10 of the whole piece can be asymmetrical along the slicing groove, or symmetrical along the slicing groove.

[0124] This article uses a busbar-less back-contact cell 10 as an example for explanation and description. It is understood that the back-contact cell 10 may also be a busbar-equipped back-contact cell 10. In the case of a busbar-equipped back-contact cell 10, the busbar may be located outside the first connection block 112. This prevents the busbar from interfering with the connection between the first connection block 112 and the first electrical connector.

[0125] Specifically, the silicon base 101 may include a silicon substrate, a first polarity doping layer, a second polarity doping layer and a dielectric film layer 1003 .

[0126] Furthermore, the silicon substrate may be a P-type silicon substrate or an N-type silicon substrate, a single crystal silicon substrate or a polycrystalline silicon substrate. The specific form of the silicon substrate is not limited here.

[0127] Furthermore, a first polarity doped layer and a second polarity doped layer are provided on a silicon substrate. The first polarity doped layer and the second polarity doped layer have different doping polarities. The two doped layers can be formed by diffusion into the silicon substrate or by depositing a film layer on the silicon substrate.

[0128] It can be understood that in the thickness direction of the back contact cell 10, the first polarity doped layer is stacked on the silicon substrate, and the second polarity doped layer is stacked on the silicon substrate. On the plane perpendicular to the thickness direction of the back contact cell 10, the first polarity doped layer and the second polarity doped layer are distributed in different regions, corresponding to the first polarity doped region 13 and the second polarity doped region 14, respectively. Figure 12-Figure 20 shown.

[0129] The following descriptions of "the first polarity doping region 13 includes the first doping region 131" and "the first polarity doping region 13 includes the third doping region 132" refer to the first doping region 131 and the third doping region 132 being doping regions of the first polarity. The following descriptions of "the second polarity doping region 14 includes the second doping region 141" and "the second polarity doping region 14 includes the fourth doping region 142" refer to the second doping region 141 and the fourth doping region 142 being doping regions of the second polarity.

[0130] Furthermore, the dielectric film layer 1003 can cover the first polarity doping layer and the second polarity doping layer, the first polarity fine gate 11 passes through the dielectric film layer 1003 to contact the first polarity doping layer, and the second polarity fine gate 12 passes through the dielectric film layer 1003 to contact the second polarity doping layer. In this way, the dielectric film layer 1003 is used to achieve electrical isolation between the first polarity doping layer and the second polarity doping layer, and the dielectric film layer 1003 can also be used to reduce light reflection and recombination. The dielectric film layer 1003 can also be provided between at least one pair of adjacent first polarity doping regions 13 and second polarity doping regions 14 to electrically isolate the first polarity doping regions 13 and the second polarity doping regions 14. Please note that in order to better display the first polarity doping regions 13 and the second polarity doping regions 14, Figure 12-Figure 20 The portion of the dielectric film layer 1003 covering the first polarity doping region 13 and the second polarity doping region 14 is omitted.

[0131] Specifically, the first polarity fine gate 11 and the second polarity fine gate 12 may be distributed over the entire region of the silicon substrate 101; the first polarity fine gate 11 and the second polarity fine gate 12 may be distributed over a portion of the silicon substrate 101. It is understood that the region of the silicon substrate 101 where the first polarity fine gate 11 and the second polarity fine gate 12 are not distributed may be distributed with other fine gates, may be distributed with a main gate, or may not be provided with a gate line.

[0132] Specifically, the first polarity fine gate 11 and the second polarity fine gate 12 have different polarities. The first polarity fine gate 11 corresponds to the first polarity doping layer and the first polarity doping region 13. The second polarity fine gate 12 corresponds to the second polarity doping layer and the second polarity doping region 14.

[0133] Specifically, the number of first polarity fine grids 11 can be 1, 2, 3, 4, or another number. The number of second polarity fine grids 12 can be 1, 2, 3, 4, or another number. This is not limited herein. The number of first polarity fine grids 11 and the number of second polarity fine grids 12 can be the same or different.

[0134] Specifically, the first polarity fine grids 11 and the second polarity fine grids 12 are arranged along the first direction, and may be arranged alternately or non-alternatingly, and may be arranged at equal intervals or at unequal intervals along the first direction, which is not limited here.

[0135] Specifically, the first polarity fine grid 11 and the second polarity fine grid 12 are spaced apart, which means that a gap is formed between adjacent first polarity fine grids 11 and second polarity fine grids 12. The gap may be filled with an insulating member or may be an air gap.

[0136] The following descriptions of "the first polarity fine gate 11 includes a first gate line 111," "the first polarity fine gate 11 includes a third gate line 113," and "the first polarity fine gate 11 includes a fifth gate line 114 and a sixth gate line 115" mean that the first gate line 111, the third gate line 113, the fifth gate line 114, and the sixth gate line 115 are all fine gates of the first polarity. The following descriptions of "the second polarity fine gate 12 includes a second gate line 121" and "the second polarity fine gate 12 includes a fourth gate line 122" mean that the second gate line 121 and the fourth gate line 122 are both fine gates of the second polarity.

[0137] See also Figure 1 、 Figure 2 and Figure 3 In this embodiment, the first gate line 111 is a first polarity fine gate 11 closest to the edge of the silicon substrate 101. In this way, the risk of the electrical connector falling off from the end of the back contact cell 10 can be reduced.

[0138] It is understood that in other embodiments, the first gate line 111 may be located at a position away from the edge of the silicon substrate 101. For example, the first gate line 111 may be the second, third, fourth, or other numbered first polarity fine gate line 11 from the edge. In this way, the risk of the electrical connector falling off from a relatively central position of the back contact battery 10 can be reduced. In this case, a bent second gate line 121 may be provided on one or both sides of the first gate line 111 to avoid the first connecting block 112 provided on the first gate line 111.

[0139] See also Figure 1 、 Figure 2 and Figure 3 , the first connection block 112 is provided on the first gate line 111 . That is, the first connection block 112 is connected to the first gate line 111 .

[0140] Specifically, the first connecting block 112 may pass through the dielectric film layer 1003 to contact the first polarity doped layer. The first connecting block 112 and the first polarity doped layer may also be isolated by the dielectric film layer 1003. The first connecting block 112 may be manufactured together with the first gate line 111. The first connecting block 112 and the first gate line 111 may also be manufactured in separate steps.

[0141] In one example, the first connection block 112 and the first gate line 111 are made of the same paste, and both are burned through the dielectric film layer 1003 to contact the first polarity doped layer. In another example, the paste of the first gate line 111 is burned through the dielectric film layer 1003 to contact the first polarity doped layer, while the paste of the first connection block 112 is not burned through the dielectric film layer 1003.

[0142] In some embodiments, the first connecting block 112 includes at least one of a pad and a gate line segment. In this way, the first connecting block 112 has various forms, which is conducive to meeting more production scenarios and needs. For example, the first connecting block 112 includes a pad. For another example, the first connecting block 112 includes a gate line segment. For another example, the first connecting block 112 includes a pad and a gate line segment. It can be understood that when the first connecting block 112 includes a gate line segment, the gate line segment passes through the dielectric film layer 1003 to contact the first polarity doped layer. When the first connecting block 112 includes a pad, the pad can pass through the dielectric film layer 1003 to contact the first polarity doped layer, or it can be isolated from the first polarity doped layer by the dielectric film layer 1003.

[0143] Note that in two adjacent back-contact cells 10, the electrical connector electrically connects the fine grids of one polarity in one back-contact cell 10 and electrically connects the fine grids of the other polarity in the other back-contact cell 10. This article discusses the connection of the electrical connectors in one back-contact cell 10.

[0144] That is, in a back-contact cell 10, a first electrical connector is electrically connected to a first polarity fine grid 11 and isolated from a second polarity fine grid 12; a second electrical connector is electrically connected to a second polarity fine grid 12 and isolated from a first polarity fine grid 11. In other words, the fine grids connected to an electrical connector in a back-contact cell 10 have the same polarity. It should be understood that this does not mean that the electrical connector has the same polarity as the fine grid to which it is connected.

[0145] Specifically, the first electrical connectors and the second electrical connectors extend along the first direction and are alternately arranged along the second direction.

[0146] Specifically, the second polarity fine grid 12 can be disconnected where it covers the first electrical connector, avoiding the first electrical connector; the second polarity fine grid 12 can also be continuous where it covers the first electrical connector, electrically isolated from the first electrical connector by an insulating member. Similarly, the first polarity fine grid 11 can be disconnected where it covers the second electrical connector, avoiding the second electrical connector; the first polarity fine grid 11 can also be continuous where it covers the second electrical connector, electrically isolated from the second electrical connector by an insulating member.

[0147] Specifically, the first connection block 112 is used to connect a first electrical connection member.

[0148] Furthermore, the first connection block 112 and the first electrical connector can be electrically connected by at least one of conductive adhesive bonding, direct welding, solder paste welding, and physical contact, which is not limited here.

[0149] Furthermore, the entire area of ​​the first connection block 112 is connected to the first electrical connector. This increases the connection area, which helps improve connection stability. It is understood that in other embodiments, a portion of the first connection block 112 may be connected to the first electrical connector.

[0150] Furthermore, the first electrical connector includes at least one of a soldering ribbon and a conductive wire. This article uses a soldering ribbon as an example for description. It will be appreciated that, in the case of a soldering ribbon as the first electrical connector, the present embodiment can reduce the risk of the soldering ribbon detaching from the back contact cell 10.

[0151] Specifically, the area of ​​the back contact cell 10 covered by the first electrical connector is the first pre-connection area.

[0152] Furthermore, in the battery assembly, the number of first electrical connectors connected to the same back contact battery 10 is multiple. In the back contact battery 10, a first connection block 112 may be provided in each first pre-connection area, such as Figure 3 Alternatively, the first connection blocks 112 may be provided in part of the first pre-connection areas, while the first connection blocks 112 may not be provided in the remaining first pre-connection areas.

[0153] Furthermore, in the first pre-connection region, a first connection block 112 may be provided at each first polarity fine grid 11. A first connection block 112 may also be provided at some first polarity fine grids 11. This is not limited here. Figure 3 In the example of FIG. 1 , first connection blocks 112 are provided at the first polarity fine gates 11 at both ends of the first pre-connection region.

[0154] See also Figure 1 and Figure 2 The width w1 of the first connecting block 112 refers to the size of the first connecting block 112 in the first direction. The width w1 of the first connecting block 112 may be the same everywhere, different everywhere, or partially the same. The width w2 of the first gate line 111 refers to the size of the first gate line 111 in the first direction. The width w2 of the first gate line 111 may be the same everywhere, different everywhere, or partially the same.

[0155] Specifically, the width w1 of the first connecting block 112 is greater than the width w2 of the first gate line 111, meaning that the width of at least one portion of the first connecting block 112 is greater than the width of at least one portion of the first gate line 111. Alternatively, the minimum width of the first connecting block 112 may be greater than the maximum width of the first gate line 111; alternatively, the maximum width of the first connecting block 112 may be greater than the maximum width of the first gate line 111; or alternatively, the maximum width of the first connecting block 112 may be greater than the width of the junction between the first gate line 111 and the first connecting block 112. This is not limited herein.

[0156] See also Figure 2 The length s1 of the first connection block 112 is greater than or equal to 100 μm, for example, 100 μm, 101 μm, 110 μm, 150 μm, 200 μm, 500 μm, 800 μm, 1000 μm, 1800 μm, 2000 μm, or 5000 μm.

[0157] Specifically, the length S1 of the first connection block 112 refers to the size in the second direction of the first connection block 112. The length S1 of the first connection block 112 may be the same throughout, different throughout, or partially the same.

[0158] The length S1 of the first connecting block 112 is greater than or equal to 100 μm, which means that the length of at least one portion of the first connecting block 112 is greater than or equal to 100 μm. Alternatively, the minimum length of the first connecting block 112 is greater than or equal to 100 μm, meaning that the length of all portions of the first connecting block 112 is greater than or equal to 100 μm. Alternatively, the maximum length of the first connecting block 112 is greater than or equal to 100 μm. This is not limited here.

[0159] See also Figure 2 and Figure 4In some embodiments, the first connection block 112 is formed with a first hollow area 1120. In this way, the material of the first connection block 112 can be reduced while ensuring the coverage of the first connection block 112, which is beneficial for improving connection stability and reducing costs.

[0160] See also Figure 5 In some embodiments, the first connecting block 112 is solid. This maximizes the area of ​​the first connecting block 112, thereby increasing the contact area between the first connecting block 112 and the electrical connector, increasing the pulling force, reducing the risk of the electrical connector falling off the back-contact battery 10, and improving the connection stability between the back-contact battery 10 and the electrical connector.

[0161] See also Figure 1 and Figure 2 In some embodiments, the first connection block 112 is rectangular. It is understood that in other embodiments, the first connection block 112 may be circular, annular, elliptical, triangular, racetrack-shaped, or other shapes. The specific shape of the first connection block 112 is not limited herein.

[0162] See also Figure 1 、 Figure 2 and Figure 3 The second gate line 121 includes a first main body 1211 and a first bending portion 1212 connected to each other. The first main body 1211 extends along the second direction, and the second direction intersects the first direction. The first bending portion 1212 is arranged corresponding to the first connecting block 112 and bends from the first main body 1211 in a direction away from the first connecting block 112.

[0163] Specifically, the first main body portion 1211 and the first bending portion 1212 are connected, which means that the first main body portion 1211 and the first bending portion 1212 are electrically connected and not disconnected.

[0164] Specifically, the first main portion 1211 extending along the second direction means that the entire first main portion 1211 extends in the second direction. This does not limit the specific shape of the first main portion 1211. In this embodiment, the first main portion 1211 is linear, and the extension direction of the first main portion 1211, i.e., the second direction, is the longitudinal direction of the first main portion 1211. In other embodiments, the first main portion 1211 may also be wavy, broken, or other shapes.

[0165] Specifically, the second direction intersects the first direction, which means that the second direction does not overlap, is not the same as, or is not opposite to the first direction. In this embodiment, the first direction and the second direction are perpendicular to each other. The first direction and the second direction are respectively parallel to two adjacent long sides of the silicon substrate 101. It will be understood that in other embodiments, the first direction and the second direction may also form an acute angle or an obtuse angle; the first direction and the second direction may also form an acute angle or an obtuse angle with two adjacent long sides of the silicon substrate 101. This is not limited here. Please note that the "two adjacent long sides" here refer to the sides other than the corners of the silicon substrate 101, and do not take into account the arc sides or short sides with rounded or chamfered corners of the silicon substrate 101.

[0166] Specifically, the first bent portion 1212 is disposed correspondingly to the first connecting block 112, meaning that, regardless of the thickness of the first bent portion 1212 and the first connecting block 112, in the first direction, the projections of the first bent portion 1212 and the first connecting block 112 on the same plane at least partially overlap. In other words, the range occupied by the first bent portion 1212 and the first connecting block 112 in the second direction at least partially overlap.

[0167] In this embodiment, the range occupied by the first bent portion 1212 in the second direction overlaps and exceeds the range occupied by the first connecting block 112 in the second direction. In this way, the first bent portion 1212 avoids the first connecting block 112 as much as possible, providing more space for the first connecting block 112 with a larger width, facilitating the widening of the first connecting block 112, and minimizing the risk of short circuits caused by a too small distance between the electrodes of the two polarities.

[0168] It can be understood that in other embodiments, the range occupied by the first connecting block 112 in the second direction may cover and exceed the range occupied by the first bending portion 1212 in the second direction; the range occupied by the first connecting block 112 in the second direction may completely overlap with the range occupied by the first bending portion 1212 in the second direction; or the range occupied by the first connecting block 112 in the second direction may intersect with the range occupied by the first bending portion 1212 in the second direction.

[0169] Specifically, the first bending portion 1212 bends from the first main portion 1211 in a direction away from the first connecting block 112 , which means that in the first direction, the maximum distance between the first bending portion 1212 and the first main portion 1211 is greater than 0.

[0170] Specifically, the first bending portion 1212 includes a first bending section, a first connecting section and a second bending section connected in sequence, the first bending section connects the first main body 1211 and one end of the first connecting section, and the second bending section connects the first main body 1211 and the other end of the first connecting section. Figure 1In the example, the first connecting segment is a straight line segment.

[0171] It is understood that in other examples, the first bending portion 1212 may be wavy, folded, or other shapes. The first connecting section may be wavy, folded, or other shapes. This is not limited here.

[0172] See also Figure 1 and Figure 2 In some embodiments, the difference between the width w1 of the first connection block 112 and the width w2 of the first gate line 111 is 5 μm-290 μm, for example, 5 μm, 8 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 280 μm, or 290 μm.

[0173] In this way, the width difference between the first connecting block 112 and the first gate line 111 is within an appropriate range, which can avoid the first connecting block 112 being too narrow and the connection stability of the first electrical connector being poor due to the difference being too small, and can also avoid the first connecting block 112 being too large and the current loss being too large due to the difference being too large.

[0174] See also Figure 1 and Figure 2 In some embodiments, the width w1 of the first connection block 112 is 10 μm-300 μm, for example, 10 μm, 12 μm, 20 μm, 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 280 μm, or 300 μm.

[0175] In this way, the width w1 of the first connecting block 112 is within an appropriate range, which can avoid the situation where the width is too small, resulting in a smaller contact width with the first electrical connector and poor connection stability of the first electrical connector, and can also avoid the situation where the width is too large, resulting in too large a series resistance of the first connecting block 112 and large current loss.

[0176] See also Figure 1 and Figure 2 In some embodiments, the width w2 of the first gate line 111 is 5 μm-250 μm, for example, 5 μm, 7 μm, 10 μm, 50 μm, 100 μm, 150 μm, 200 μm, 240 μm, or 250 μm.

[0177] In this way, the width w2 of the first gate line 111 is within an appropriate range, which can avoid the gate line being easily disconnected and the poor effect of extracting carriers from the silicon substrate 101 due to a too small width, and can also avoid the excessive series resistance, large current loss and high cost due to an excessive width.

[0178] See also Figure 1 and Figure 2In some embodiments, the maximum distance d1 between the first bending portion 1212 and the first main portion 1211 in the first direction is 5 μm-290 μm, for example, 5 μm, 8 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 280 μm, or 290 μm.

[0179] In this way, the maximum distance d1 between the first bent portion 1212 and the first main body portion 1211 in the first direction is within an appropriate range, which can avoid the first bent portion 1212 and the first connecting block 112 with different polarities being close to each other and the greater risk of short circuit due to too small a spacing, and can also avoid the total length of the second gate line 121 being too large, the series resistance being too large, and the current loss being too large due to too large a spacing.

[0180] See also Figure 1 and Figure 2 In some embodiments, the first gate line 111, the first connecting block 112 and the second gate line 121 satisfy the following formula:

[0181] -100μm≤w1-w2-d1≤100μm;

[0182] Wherein, w1 is the width of the first connecting block 112 , w2 is the width of the first gate line 111 , and d1 is the maximum distance between the first bending portion 1212 and the first main portion 1211 in the first direction.

[0183] In this way, the difference in width between the first connecting block 112 and the first gate line 111 and the difference in the maximum bending depth of the first bent portion 1212 are within an appropriate range, which can avoid the situation where the maximum bending depth of the first bent portion 1212 is too large compared to the width difference between the first connecting block 112 and the first gate line 111 due to the difference being too small, and the series resistance of the second gate line 121 is too large while it is difficult to significantly improve the short circuit risk. It can also avoid the situation where the maximum bending depth of the first bent portion 1212 is too small compared to the width difference between the first connecting block 112 and the first gate line 111 due to the difference being too large, and the short circuit risk is greater.

[0184] Specifically, the value of w1-w2-d1 is, for example, -100 μm, -80 μm, -50 μm, -20 μm, 0 μm, 10 μm, 20 μm, 50 μm, 80 μm, and 100 μm.

[0185] Preferably, the value of w1-w2-d1 is 0. That is, w1-w2=d1. In this way, both the short circuit risk and the series resistance are taken into consideration, and the overall effect is better.

[0186] See also Figure 1 and Figure 2In some embodiments, the first gate line 111 is the first polarity fine gate 11 closest to the edge of the silicon substrate 101, and the distance x1 between the first gate line 111 and the edge is 0.4 mm-1 mm, for example, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, 0.9 mm, or 1 mm.

[0187] In this way, the distance x1 between the first gate line 111 and the edge is within an appropriate range, which can avoid the inconvenience of lamination caused by too small a distance and the poor effect of collecting carriers caused by too large a distance.

[0188] Preferably, the distance x1 between the first grid line 111 and the edge is 0.5 mm to 0.8 mm, for example, 0.5 mm, 0.52 mm, 0.55 mm, 0.58 mm, 0.6 mm, 0.62 mm, 0.65 mm, 0.68 mm, 0.7 mm, 0.72 mm, 0.75 mm, 0.78 mm, or 0.8 mm. Thus, further optimizing the distance x1 between the first grid line 111 and the edge results in a better overall effect.

[0189] See also Figure 1 and Figure 2 In some embodiments, the distance x2 from the first connecting block 112 to the edge is 0.4 mm to 50 mm, for example, 0.4 mm, 0.5 mm, 1 mm, 5 mm, 10 mm, 20 mm, 30 mm, 40 mm, 48 mm, or 50 mm.

[0190] In this way, the distance x2 from the first connecting block 112 to the edge is within an appropriate range, which can avoid the inconvenience of stacking caused by too small a distance, and can also avoid the poor connection stability between the end area of ​​the back contact battery 10 and the first electrical connector caused by too large a distance.

[0191] Preferably, the distance x2 from the first connecting block 112 to the edge is 0.8 mm to 5 mm. For example, it is 0.8 mm, 0.82 mm, 0.9 mm, 1 mm, 2 mm, 3 mm, 4 mm, or 5 mm. Thus, further optimizing the distance x2 from the first connecting block 112 to the edge improves the connection stability between the back-contact battery 10 and the first electrical connector.

[0192] See also Figure 6 In some embodiments, the first polarity fine grid 11 includes a third grid line 113, and the third grid line 113 includes a second main body 1131 and a second bending portion 1132 connected to each other. The second main body 1131 extends along the second direction, and the second bending portion 1132 is arranged corresponding to the first connecting block 112, and bends from the second main body 1131 in a direction away from the first connecting block 112.

[0193] In this way, the bent third gate line 113 can be used to provide more space for the first connecting block 112 with a larger width and the second gate line 121 bent to avoid the first connecting block 112, thereby facilitating the widening of the first connecting block 112 and the bending of the second gate line 121, and reducing the risk of short circuit caused by the small distance between the electrodes of the two polarities.

[0194] Specifically, the second main body portion 1131 and the second bending portion 1132 are connected, which means that the second main body portion 1131 and the second bending portion 1132 are electrically connected and not disconnected.

[0195] Specifically, the second main body portion 1131 extending along the second direction means that the second main body portion 1131 as a whole extends in the second direction. This does not limit the specific shape of the second main body portion 1131. In this embodiment, the second main body portion 1131 is linear, and the extension direction of the second main body portion 1131, i.e., the second direction, is the longitudinal direction of the second main body portion 1131. In other embodiments, the second main body portion 1131 may also be wavy, broken, or other shapes.

[0196] Specifically, the second bent portion 1132 is disposed correspondingly to the first connecting block 112, meaning that, regardless of the thickness of the second bent portion 1132 and the first connecting block 112, in the first direction, the projections of the second bent portion 1132 and the first connecting block 112 on the same plane at least partially overlap. In other words, the second bent portion 1132 and the first connecting block 112 occupy at least partially overlapping areas in the second direction.

[0197] In this embodiment, the range occupied by the second bent portion 1132 in the second direction overlaps and exceeds the range occupied by the first connection block 112 in the second direction. In this way, the second bent portion 1132 avoids the first connection block 112 as much as possible, providing more space for the first connection block 112 with a larger width, facilitating the widening of the first connection block 112, and minimizing the risk of short circuits caused by a too small distance between the electrodes of the two polarities.

[0198] It can be understood that in other embodiments, the range occupied by the first connecting block 112 in the second direction may cover and exceed the range occupied by the second bending portion 1132 in the second direction; or the range occupied by the first connecting block 112 in the second direction may completely overlap with the range occupied by the second bending portion 1132 in the second direction; or the range occupied by the first connecting block 112 in the second direction may intersect with the range occupied by the second bending portion 1132 in the second direction.

[0199] Specifically, the second bending portion 1132 bends from the second main body portion 1131 in a direction away from the first connecting block 112 , which means that in the first direction, the maximum distance between the second bending portion 1132 and the second main body portion 1131 is greater than 0.

[0200] Specifically, the second bending portion 1132 includes a third bending section, a second connecting section and a fourth bending section connected in sequence, the third bending section connects the second main body 1131 and one end of the second connecting section, and the fourth bending section connects the second main body 1131 and the other end of the second connecting section. Figure 6 In the example, the second connecting segment is a straight line segment.

[0201] It is understood that in other examples, the second bending portion 1132 may be wavy, folded, or other shapes. The second connecting section may be wavy, folded, or other shapes. This is not limited here.

[0202] Note that the second gate line 121 is a bent second polarity fine gate 12, and the third gate line 113 is a bent first polarity fine gate 11. The second gate line 121 may be adjacent to or not adjacent to the first gate line 111. The third gate line 113 may be adjacent to or not adjacent to the second gate line 121.

[0203] exist Figure 1-Figure 5 In the example, the number of the second gate line 121 is one, adjacent to the first gate line 111, and there is no third gate line 113. That is, in the direction away from the edge, the first gate line 111 and the second gate line 121 are arranged in sequence.

[0204] exist Figure 6 In the example shown in FIG, there are two second gate lines 121 and one third gate line 113. One second gate line 121 is adjacent to a first gate line 111, and the third gate line 113 is located between two second gate lines 121. That is, in a direction away from the edge, the first gate line 111, the second gate line 121, the third gate line 113, and the second gate line 121 are arranged in sequence.

[0205] It is understandable that in other examples, the first gate line 111 , the second gate line 121 , the third gate line 113 , the second gate line 121 , and the third gate line 113 may be arranged in sequence in a direction away from the edge.

[0206] See also Figure 6 In some embodiments, the bending depths of the first bending portion 1212 and the second bending portion 1132 gradually decrease in a direction away from the first connecting block 112 .

[0207] In this way, the bending depth of the bent portion gradually decreases in the direction away from the first connecting block 112. The bent portion can be used to avoid the first connecting block 112 or the adjacent bent portion to reduce the risk of short circuit, and can also achieve a transition from bending to smoothness.

[0208] Specifically, the bending depth of the first bending portion 1212 is the maximum distance between the first bending portion 1212 and the first main portion 1211 in the first direction in the second gate line 121, that is, Figure 6 The bending depth of the second bending portion 1132 is the maximum distance between the second bending portion 1132 and the second main portion 1131 in the first direction in the third gate line 113, that is, Figure 6 d2 shown in .

[0209] exist Figure 6 In the example, along the direction away from the edge, the first gate line 111, the second gate line 121, the third gate line 113, and the second gate line 121 are arranged in sequence, and the bending depths of the corresponding bending portions gradually decrease.

[0210] See also Figure 6 In some embodiments, for the adjacent second gate line 121 and the third gate line 113 , the first bending portion 1212 and the second bending portion 1132 satisfy the following formula:

[0211] 50μm≤d1-d2≤150μm;

[0212] d2 is the maximum distance between the second bending portion 1132 and the second main body portion 1131 in the first direction, and d1 is the maximum distance between the first bending portion 1212 and the first main body portion 1211 in the first direction.

[0213] In this way, the difference in the bending depths of the adjacent second gate lines 121 and third gate lines 113 is within an appropriate range, which can avoid the need to use more bent gate lines to achieve a smooth transition from bending to smoothness due to a small difference, increased process complexity, and low production efficiency. It can also avoid the situation where the bending depth of one gate line is insufficient, the distance to the bending portion with opposite polarity is close, and the risk of short circuit is high due to a large difference.

[0214] Specifically, the value of d1-d2 is, for example, 50 μm, 52 μm, 80 μm, 90 μm, 100 μm, 120 μm, 140 μm, and 150 μm.

[0215] See also Figure 1 、 Figure 2 and Figure 3 In some embodiments, the first gate lines 111 and the first connecting blocks 112 provided on the first gate lines 111 form a first conductive structure 1001 , and each row of the first conductive structure 1001 is continuous.

[0216] In this way, each row of the first conductive structures 1001 is not disconnected or has no breakpoints, so that the power of the back-contact battery 10 is better.

[0217] See also Figure 1 、 Figure 2 and Figure 3 In some embodiments, each row of second gate lines 121 is continuous.

[0218] In this way, each row of second gate lines 121 is continuous and has no breakpoints, so that the power of the back contact battery 10 is better.

[0219] See also Figure 7 and Figure 8 In some embodiments, the second polarity fine gate 12 includes a fourth gate line 122 . The fourth gate line 122 is provided with a second connection block 123 . The width w3 of the second connection block 123 is greater than the width w4 of the fourth gate line 122 .

[0220] In this way, the contact area between the second connecting block 123 and the second electrical connector is increased, the pulling force is increased, the risk of the second electrical connector falling off the back contact battery 10 is reduced, and the connection stability between the back contact battery 10 and the second electrical connector is improved.

[0221] See also Figure 7 and Figure 8 In some embodiments, the fourth gate line 122 and the second gate line 121 are formed from the same second-polarity fine gate 12. Integrating the first bent portion 1212 and the second connecting block 123 into the same second-polarity fine gate 12 enhances the connection stability between the bent portion and the second electrical connector. Furthermore, centralized design and manufacturing facilitates improved manufacturing efficiency.

[0222] Please note that when the fourth gate line 122 and the second gate line 121 are the same second polarity fine gate 12 , the fourth gate line 122 and the second gate line 121 can be respectively regarded as partial structures of the second polarity fine gate 12 .

[0223] It is understood that in other examples, the fourth gate line 122 and the second gate line 121 may also be different second polarity fine gates 12. This is not limited here.

[0224] Specifically, the second connection block 123 is used to connect the second electrical connection member.

[0225] Furthermore, the second connection block 123 and the second electrical connector can be electrically connected by at least one of conductive adhesive bonding, direct welding, solder paste welding, and physical contact, which is not limited here.

[0226] Furthermore, the entire area of ​​the second connecting block 123 is connected to the second electrical connector. This increases the connection area, which helps improve connection stability. It is understood that in other embodiments, a portion of the second connecting block 123 may be connected to the second electrical connector.

[0227] Furthermore, the second electrical connector includes at least one of a soldering ribbon and a conductive wire. This article uses a soldering ribbon as an example for description. It will be appreciated that, in the case of a soldering ribbon as the second electrical connector, the present embodiment can reduce the risk of the soldering ribbon detaching from the back contact cell 10.

[0228] Specifically, the area of ​​the back contact cell 10 covered by the second electrical connector is the second pre-connection area.

[0229] Furthermore, in the battery assembly, there are multiple second electrical connectors connected to the same back-contact battery cell 10. In the back-contact battery cell 10, a second connection block 123 may be provided in each second pre-connection area. Alternatively, a second connection block 123 may be provided in some of the second pre-connection areas, while no second connection block 123 may be provided in the remaining second pre-connection areas. Furthermore, in the second pre-connection area, a second connection block 123 may be provided at each second polarity fine grid 12. Alternatively, a second connection block 123 may be provided at some of the second polarity fine grids 12. This is not limited here. In this embodiment, second connection blocks 123 are provided at the second polarity fine grids 12 at both ends of the second pre-connection area.

[0230] In some embodiments, the second connecting block 123 includes at least one of a pad and a gate line segment. In this way, the second connecting block 123 has various forms, which is conducive to meeting more production scenarios and needs. For example, the second connecting block 123 includes a pad. In another example, the second connecting block 123 includes a gate line segment. In another example, the second connecting block 123 includes a pad and a gate line segment. It can be understood that when the second connecting block 123 includes a gate line segment, the gate line segment passes through the dielectric film layer 1003 to contact the second polarity doped layer. When the second connecting block 123 includes a pad, the pad can pass through the dielectric film layer 1003 to contact the second polarity doped layer, or it can be isolated from the second polarity doped layer by the dielectric film layer 1003.

[0231] See also Figure 7 and Figure 8 The width w3 of the second connecting block 123 refers to the size of the second connecting block 123 in the first direction. The width w3 of the second connecting block 123 can be the same everywhere, different everywhere, or partially the same. The width w4 of the fourth gate line 122 refers to the size of the fourth gate line 122 in the first direction. The width w4 of the fourth gate line 122 can be the same everywhere, different everywhere, or partially the same.

[0232] Specifically, the width w3 of the second connecting block 123 is greater than the width w4 of the fourth gate line 122, meaning that the width of at least one location of the second connecting block 123 is greater than the width of at least one location of the fourth gate line 122. Alternatively, the minimum width of the second connecting block 123 may be greater than the maximum width of the fourth gate line 122; alternatively, the maximum width of the second connecting block 123 may be greater than the maximum width of the fourth gate line 122; or alternatively, the maximum width of the second connecting block 123 may be greater than the width of the junction between the fourth gate line 122 and the second connecting block 123. This is not limited herein.

[0233] See also Figure 8 and Figure 9 In some embodiments, the second connection block 123 is formed with a second hollow area 1230. In this way, the material of the second connection block 123 can be reduced while ensuring the coverage of the second connection block 123, which is beneficial to improving connection stability while reducing costs.

[0234] See also Figure 10 In some embodiments, the second connecting block 123 is solid. This maximizes the area of ​​the second connecting block 123, thereby increasing the contact area between the second connecting block 123 and the electrical connector, increasing the pulling force, reducing the risk of the electrical connector falling off the back-contact battery 10, and improving the connection stability between the back-contact battery 10 and the electrical connector.

[0235] See also Figure 7 and Figure 8 In some embodiments, the second connecting block 123 is rectangular. It is understood that in other embodiments, the second connecting block 123 may be circular, annular, elliptical, triangular, racetrack-shaped, or other shapes. The specific shape of the second connecting block 123 is not limited herein.

[0236] See also Figure 7 and Figure 8 In some embodiments, the difference between the width w3 of the second connection block 123 and the width w4 of the fourth gate line 122 is 5 μm-290 μm, for example, 5 μm, 8 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 280 μm, or 290 μm.

[0237] In this way, the width difference between the second connecting block 123 and the fourth gate line 122 is within an appropriate range, which can avoid the second connecting block 123 being too narrow and the connection stability of the second electrical connector being poor due to the difference being too small, and can also avoid the second connecting block 123 being too large and the current loss being too large due to the difference being too large.

[0238] See also Figure 7 and Figure 8In some embodiments, the width w3 of the second connection block 123 is 10 μm-300 μm, for example, 10 μm, 12 μm, 20 μm, 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 280 μm, or 300 μm.

[0239] In this way, the width w3 of the second connecting block 123 is within an appropriate range, which can avoid the situation where the width is too small, resulting in a smaller contact width with the second electrical connector and poor connection stability of the second electrical connector, and can also avoid the situation where the width is too large, resulting in too large a series resistance of the second connecting block 123 and large current loss.

[0240] See also Figure 7 and Figure 8 In some embodiments, the width w4 of the fourth gate line 122 is 5 μm-250 μm, for example, 5 μm, 7 μm, 10 μm, 50 μm, 100 μm, 150 μm, 200 μm, 240 μm, or 250 μm.

[0241] In this way, the width w4 of the fourth gate line 122 is within an appropriate range, which can avoid the gate line being easily disconnected and the poor effect of extracting carriers from the silicon substrate 101 due to a too small width, and can also avoid the excessive series resistance, large current loss and high cost due to an excessive width.

[0242] See also Figure 7 and Figure 8 In some embodiments, the difference between the area of ​​the first connection block 112 and the area of ​​the second connection block 123 is -400 μm. 2 ~400μm 2 For example, -400μm 2 、-400μm 2 、-400μm 2 、-400μm 2 、-400μm 2 , 400μm 2 .

[0243] In this way, the difference between the area of ​​the first connecting block 112 and the area of ​​the second connecting block 123 is within an appropriate range, which can avoid a large difference in the area of ​​the first connecting block 112 and the second connecting block 123 caused by the difference being too small or too large, so that the contact area between the first connecting block 112 and the first electrical connector and the contact area between the second connecting block 123 and the second electrical connector are roughly the same, so that the pulling force of the first electrical connector and the second electrical connector on the connecting blocks is roughly the same, which is beneficial to improving the connection stability between the electrical connector and the back contact battery 10.

[0244] See also Figure 7 and Figure 8In some embodiments, the first polarity grid lines adjacent to the second connection block 123 are disconnected at positions corresponding to the second connection block 123 to avoid the second connection block 123. In the second direction, the distance d3 between the breakpoints of the second connection block 123 and the first grid lines 111 is 0.2 mm to 1 mm, for example, 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, 0.9 mm, or 1 mm.

[0245] In this way, the space between the first polarity grid lines adjacent to the second connection block 123 is utilized to expand the area of ​​the second connection block 123, thereby increasing the contact area between the second connection block 123 and the second electrical connector and improving the connection stability. At the same time, the distance d3 between the breakpoint of the second connection block 123 and the first grid line 111 is kept within an appropriate range, thereby avoiding the risk of short circuits caused by the proximity of opposite polarity electrodes due to a too small distance, and also avoiding the poor carrier collection effect in the spacer region and poor battery efficiency caused by an excessively large distance.

[0246] Specifically, the first polarity gate line adjacent to the second connection block 123 is disconnected at a position corresponding to the second connection block 123, which means that the line connecting the two breakpoints of the first polarity gate line passes through the second connection block 123. In order to avoid the second connection block 123 with opposite polarity, the first polarity gate line is disconnected to form two breakpoints.

[0247] Preferably, the spacing d3 between the second connecting block 123 and the breakpoint of the first gate line 111 is 0.3 mm to 0.6 mm. For example, it is 0.3 mm, 0.32 mm, 0.4 mm, 0.45 mm, 0.5 mm, 0.58 mm, or 0.6 mm. Thus, further optimizing the spacing d3 between the breakpoint of the second connecting block 123 and the first gate line 111 balances the area of ​​the second connecting block 123 and carrier collection, resulting in better overall performance.

[0248] See also Figure 7 and Figure 8 In some embodiments, the fourth gate line 122 is the second polarity fine gate 12 closest to the edge of the silicon substrate 101 , and a distance x3 between the fourth gate line 122 and the edge is greater than 0.7 mm-1.3 mm.

[0249] In this way, the distance x3 between the fourth gate line 122 and the edge is within an appropriate range, which can avoid the inconvenience of lamination caused by too small a distance and the poor effect of collecting carriers caused by too large a distance.

[0250] Preferably, the distance x3 between the fourth grid line 122 and the edge is 0.8 mm to 1.1 mm, for example, 0.8 mm, 0.82 mm, 0.85 mm, 0.88 mm, 0.9 mm, 0.95 mm, 1 mm, 1.02 mm, 1.05 mm, 1.08 mm, or 1.1 mm. Thus, further optimizing the distance x3 between the fourth grid line 122 and the edge results in a better overall effect.

[0251] It is understood that in other embodiments, the fourth gate line 122 may be located away from the edge of the silicon substrate 101. For example, the fourth gate line 122 may be the second, third, fourth, or other numbered second polarity fine gate line 12 from the edge. In this way, the risk of the electrical connector falling off from the center of the back contact battery 10 can be reduced. In this case, a bent first polarity gate line 11 may be provided on one or both sides of the fourth gate line 122 to avoid the second connecting block 123 provided on the fourth gate line 122.

[0252] See also Figure 7 and Figure 8 In some embodiments, the distance x4 from the second connecting block 123 to the edge of the silicon substrate 101 is 0.7 mm to 50 mm, for example, 0.7 mm, 0.8 mm, 1 mm, 5 mm, 10 mm, 20 mm, 30 mm, 40 mm, 48 mm, or 50 mm.

[0253] In this way, the distance x4 from the second connecting block 123 to the edge is within an appropriate range, which can avoid the inconvenience of stacking caused by too small a distance, and can also avoid the poor connection stability between the end area of ​​the back contact battery 10 and the second electrical connector caused by too large a distance.

[0254] Preferably, the distance x4 from the second connecting block 123 to the edge is 1 mm to 5 mm. For example, it is 1 mm, 1.02 mm, 1.5 mm, 2 mm, 3 mm, 4 mm, 4.5 mm, or 5 mm. Thus, further optimizing the distance x4 from the second connecting block 123 to the edge improves the connection stability between the back-contact battery 10 and the second electrical connector.

[0255] See also Figure 7 and Figure 8 In some embodiments, the fourth gate line 122 is the second polarity fine gate 12 closest to the edge of the silicon substrate 101 , and the second connecting block 123 is located on a side of the fourth gate line 122 facing the edge.

[0256] In this way, the edge space can be fully utilized, so that the second connection block 123 has a larger range and the connection welding strip has a larger range, which is beneficial to improving the connection stability between the back contact battery 10 and the second electrical connector.

[0257] In some embodiments, the second connection blocks 123 protrude from the fourth gate line 122 toward both sides of the fourth gate line 122 .

[0258] In this way, the space between the two sides of the second connection block 123 and the opposite-sex grid lines can be fully utilized, so that the range of the second connection block 123 is larger and the range of the connection welding strip is larger, which is beneficial to improving the connection stability between the back contact battery 10 and the second electrical connector.

[0259] See also Figure 11 In some embodiments, the fourth gate line 122 includes a third main portion 1221 and a third bending portion 1222 connected to each other, the third main portion 1221 extends along the second direction, the third bending portion 1222 bends from the third main portion 1221 in a direction away from the edge of the silicon substrate 101, and the second connecting block 123 is provided on the third bending portion 1222.

[0260] In this way, the second connecting block 123 is arranged at the position where the fourth gate line 122 is bent in the direction away from the edge of the silicon substrate 101, so that the position of the second connecting block 123 can be further away from the edge of the silicon substrate 101, further away from the end of the second electrical connector, and closer to the middle of the second electrical connector. This can prevent the end of the second electrical connector from being difficult to extend to the second connecting block 123 near the edge of the silicon substrate 101 due to offset or cutting error, so that the second connecting block 123 is easier to connect with the second electrical connector and the connection stability is higher.

[0261] Specifically, the third bending portion 1222 includes a fifth bending section, a third connecting section and a sixth bending section connected in sequence, the fifth bending section connects the third main body portion 1221 and one end of the third connecting section, and the sixth bending section connects the third main body portion 1221 and the other end of the fourth connecting section. Figure 11 In the example, the third connecting segment is a straight line segment.

[0262] It is understood that in other examples, the third bending portion 1222 may be wavy, folded, or other shapes. The second connecting section may be wavy, folded, or other shapes. This is not limited here.

[0263] See also Figure 11 In some embodiments, the maximum distance d4 between the third bending portion 1222 and the third main body portion 1221 in the first direction is 5 μm-290 μm, for example, 5 μm, 8 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 280 μm, or 290 μm.

[0264] In this way, the maximum distance d4 between the third bending portion 1222 and the third main body portion 1221 in the first direction is within an appropriate range, which can avoid the third bending portion 1222 and the adjacent opposite-sex fine gate being too close and the risk of short circuit being greater due to too small a spacing, and can also avoid the total length of the fourth gate line 122 being too large, the series resistance being too large, and the current loss being too large due to too large a spacing.

[0265] See also Figure 7 In some embodiments, the fourth gate lines 122 and the second connecting blocks 123 provided on the fourth gate lines 122 form the second conductive structures 1002 , and each row of the second conductive structures 1002 is continuous.

[0266] In this way, each row of the second conductive structures 1002 is not disconnected or has no breakpoints, so that the power of the back-contact battery 10 is better.

[0267] See also Figure 12 and Figure 2 In some embodiments, the silicon substrate 101 includes a plurality of first polarity doped regions 13 and a plurality of second polarity doped regions 14 arranged along a first direction. The first polarity doped regions 13 are provided with first polarity fine gates 11, and the second polarity doped regions 14 are provided with second polarity fine gates 12.

[0268] The first polarity doped region 13 includes a first doped region 131, which includes a first area 1311 and a second area 1312. The first area 1311 is provided with a first gate line 111, and the second area 1312 corresponds to the first connecting block 112; the second polarity doped region 14 includes a second doped region 141, which includes a third area 1411 and a fourth area 1412. The third area 1411 is provided with a first main body 1211 of the second gate line 121, and the fourth area 1412 is provided with a first bending portion 1212 of the second gate line 121.

[0269] In this way, the doped regions of two polarities correspond to the fine gates of two polarities, which facilitates the production of fine gates of corresponding polarities on the doped regions and the electrical connection between the doped regions and the fine gates of corresponding polarities, thereby reducing process difficulty, improving production efficiency and reducing costs.

[0270] Specifically, “the first region 1311 is provided with the first gate line 111 ” means that the first gate line 111 is in electrical contact with the first region 1311 .

[0271] Specifically, "second region 1312 corresponds to first connecting block 112" means that, in the thickness direction of back-contact cell 10, the projections of first connecting block 112 and second region 1312 on the same plane at least partially overlap. First connecting block 112 can be in electrical contact with second region 1312 or electrically isolated from second region 1312.

[0272] Specifically, “the third region 1411 is provided with the first main portion 1211 of the second gate line 121 ” means that the first main portion 1211 of the second gate line 121 is in electrical contact with the third region 1411 .

[0273] Specifically, “the first bent portion 1212 of the second gate line 121 is disposed in the fourth region 1412 ” means that the first bent portion 1212 of the second gate line 121 is in electrical contact with the fourth region 1412 .

[0274] Specifically, the first polarity doping region 13 and the second polarity doping region 14 can be formed in the entire area of ​​the silicon substrate 101, so that the first polarity fine gate 11 and the second polarity fine gate 12 are distributed in the entire area of ​​the silicon substrate 101; the first polarity doping region 13 and the second polarity doping region 14 can be formed in a partial area of ​​the silicon substrate 101, so that the first polarity fine gate 11 and the second polarity fine gate 12 are distributed in a partial area of ​​the silicon substrate 101.

[0275] Specifically, the first polarity doping region 13 and the second polarity doping region 14 have different polarities. The first polarity doping region 13 corresponds to the first polarity doping layer, and the second polarity doping region 14 corresponds to the second polarity doping layer.

[0276] Specifically, the number of first polarity doped regions 13 may be 1, 2, 3, 4, or another number. The number of second polarity doped regions 14 may be 1, 2, 3, 4, or another number. This is not limited herein. The number of first polarity doped regions 13 and the number of second polarity doped regions 14 may be the same or different.

[0277] Specifically, the first polarity doped regions 13 and the second polarity doped regions 14 are arranged along the first direction, and may be arranged alternately or non-alternatingly along the first direction; and may be arranged at equal intervals or at unequal intervals along the first direction, which is not limited here.

[0278] It can be understood that a gap may be formed between adjacent first polarity doping regions 13 and second polarity doping regions 14 , or they may contact each other, or other film layer structures may be provided.

[0279] In some embodiments, a dielectric film layer 1003 is disposed between at least one pair of adjacent first polarity doping regions 13 and second polarity doping regions 14 . The dielectric film layer 1003 electrically isolates the first polarity doping regions 13 and the second polarity doping regions 14 .

[0280] In this way, the dielectric film layer 1003 is used to achieve electrical isolation between the first doped layer and the second doped layer. At the same time, the refractive index difference and surface passivation effect of the dielectric film layer 1003 can be used to reduce optical loss and carrier recombination.

[0281] Specifically, the dielectric film layer 1003 may be disposed between a pair of adjacent first polarity doped regions 13 and second polarity doped regions 14, or between multiple pairs of adjacent first polarity doped regions 13 and second polarity doped regions 14. In this embodiment, the dielectric film layer 1003 is disposed between all adjacent first polarity doped regions 13 and second polarity doped regions 14.

[0282] Specifically, the dielectric film layer 1003 covers the first doped layer and the second doped layer. The first polarity fine gate 11 passes through the dielectric film layer 1003 to contact the first doped layer, and the second polarity fine gate 12 passes through the dielectric film layer 1003 to contact the second doped layer. To better illustrate the first polarity doped region 13 and the second polarity doped region 14, the portion of the dielectric film layer 1003 covering the first polarity doped region 13 and the second polarity doped region 14 is omitted in the figure.

[0283] Specifically, the dielectric film layer 1003 includes at least one of an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon carbide layer, an amorphous silicon layer, and a silicon oxide layer.

[0284] In some embodiments, a trench is formed between the first polarity doping region 13 and the second polarity doping region 14 , and the dielectric film layer 1003 is at least partially disposed in the trench.

[0285] In this way, the trench can be used to electrically isolate the first polarity doping region 13 from the second polarity doping region 14 inside the silicon substrate 101 , thereby reducing the risk of conduction between the first polarity doping region 13 and the second polarity doping region 14 .

[0286] Specifically, “the dielectric film layer 1003 is at least partially disposed in the trench” means that a portion of the dielectric film layer 1003 is disposed in the trench and the remaining portion is disposed outside the trench, or the entire dielectric film layer 1003 is disposed in the trench.

[0287] Specifically, the trench is continuously provided between the first polarity doping region 13 and the second polarity doping region 14. In other words, the first polarity doping region 13 and the second polarity doping region 14 are separated by the trench. In this way, the first polarity doping region 13 and the second polarity doping region 14 cannot be electrically connected across the trench.

[0288] In some embodiments, a tunneling layer is disposed between at least one pair of adjacent first polarity doping regions 13 and second polarity doping regions 14 , and both the first polarity doping regions 13 and the second polarity doping regions 14 are in contact with the tunneling layer.

[0289] This can reduce the reverse bias voltage and the heat generated when the back-contact cell 10 is shielded in the module and becomes a load. Furthermore, the tunneling layer can play a passivating role, reducing recombination at the interface between the first polarity doped region 13 and the second polarity doped region 14.

[0290] Specifically, the tunneling layer includes at least one of a silicon oxide layer, an aluminum oxide layer, and a silicon carbide layer.

[0291] In some embodiments, at least one pair of adjacent first polarity doping regions 13 and second polarity doping regions 14 are in contact with each other.

[0292] In this way, the reverse bias voltage can be reduced, and the heat generation power when the back contact battery 10 becomes a load after being shielded in the module can be reduced.

[0293] Specifically, the adjacent first polarity doping regions 13 and second polarity doping regions 14 may contact each other in the entire adjacent region, or may contact each other in a partial adjacent region.

[0294] See also Figure 13 and Figure 14 In some embodiments, the second region 1312 protrudes from the first region 1311 .

[0295] In this way, the second region 1312 corresponding to the first connecting block 112 protrudes from the first region 1311 where the first gate line 111 is located, providing sufficient space for the wider first connecting block 112. Furthermore, when the first connecting block 112 is located in the second region 1312 and is in electrical contact with the second region 1312, the risk of short circuits caused by the relatively wide first connecting block 112 being too close to the edge of the first region 1311 and being too close to the adjacent second polarity doped region 14 can be reduced.

[0296] See also Figure 13 Specifically, the width W2 of the second region 1312 is greater than the width W1 of the first region 1311. In this way, the second region 1312 with a larger width better corresponds to the first connection block 112 with a larger width.

[0297] Specifically, the width W2 of the second region 1312 is 12 μm to 2000 μm. For example, the width W2 of the second region 1312 is 12 μm, 15 μm, 20 μm, 50 μm, 100 μm, 500 μm, 800 μm, 1000 μm, 1500 μm, 1800 μm, or 2000 μm. This ensures that the width W2 of the second region 1312 is within an appropriate range, thereby avoiding insufficient area for the first connecting block 112 and a greater risk of short circuits due to a smaller width, and also avoiding poor carrier collection of the other polarity due to an excessively large width.

[0298] Preferably, the width W2 of the second region 1312 is 500 μm-1500 μm, for example, 500 μm, 510 μm, 600 μm, 800 μm, 1000 μm, 1200 μm, 1400 μm, or 1500 μm. Thus, further optimizing the width W2 of the second region 1312 balances short circuit risk and carrier collection efficiency, resulting in a better overall effect.

[0299] Specifically, the width W1 of the first region 1311 is 6 μm to 800 μm. This ensures that the width W1 of the first region 1311 is within an appropriate range, thereby avoiding insufficient placement of the first gate line 111, a greater risk of short circuits, and poor carrier collection for the first gate line 111 due to a smaller width, and also avoiding poor carrier collection for the other polarity due to an excessively large width.

[0300] Preferably, the width W1 of the first region 1311 is 10 μm-600 μm, for example, 10 μm, 12 μm, 20 μm, 80 μm, 100 μm, 200 μm, 500 μm, or 600 μm. Thus, further optimizing the width W1 of the first region 1311 balances short circuit risk and carrier collection efficiency of both polarities, resulting in better overall performance.

[0301] It is understood that in other embodiments, the widths of the first region 1311 and the second region 1312 may be the same. Figure 13 Based on the example of , the upper side of the second area 1312 is concave, and the concave depth is equal to the convex depth of the lower side. In other embodiments, the width W2 of the second area 1312 can be smaller than the width W1 of the first area 1311. For example, in Figure 13 Based on the example of , the upper side of the second region 1312 is concave, and the concave depth is greater than the convex depth of the lower side. This is not limited here.

[0302] See also Figure 13 In some embodiments, in the first direction, the maximum depth H1 of the second region 1312 protruding from the first region 1311 is 5 μm-290 μm, for example, 5 μm, 8 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 280 μm, or 290 μm.

[0303] In this way, the maximum depth H1 of the second region 1312 protruding from the first region 1311 is within an appropriate range, which can avoid insufficient setting area of ​​the first connecting block 112 and greater short circuit risk caused by too small a depth, and can also avoid being unfavorable for collecting carriers of the other polarity caused by too large a depth.

[0304] See also Figure 14In some embodiments, the fourth region 1412 is recessed from the third region 1411 on the side facing the second region 1312. This allows the recessed fourth region 1412 to cooperate with the protruding second region 1312, fully utilizing the space and making the arrangement of the doped regions more rational, thereby facilitating better carrier collection and improving the photoelectric conversion efficiency of the battery.

[0305] See also Figure 15 and Figure 16 In some embodiments, the fourth region 1412 protrudes from the third region 1411 on a side facing away from the second region 1312 .

[0306] In this way, the fourth region 1412 corresponding to the first bending portion 1212 protrudes from the third region 1411 provided with the first main body portion 1211, which can provide sufficient space for the bent first bending portion 1212, thereby reducing the risk of short circuit caused by the small edge distance between the bent first bending portion 1212 and the fourth region 1412 and being too close to the adjacent heterogeneous doped region.

[0307] See also Figure 16 In some embodiments, the side of the fourth region 1412 facing the second region 1312 is recessed from the third region 1411 , and the side of the fourth region 1412 facing away from the second region 1312 is protruded from the third region 1411 .

[0308] In this way, it is possible to cooperate with the protruding second region 1312 to fully utilize the space, making the arrangement of the doping regions more reasonable and conducive to better collection of carriers, and to provide sufficient space for the bent first bent portion 1212, thereby reducing the risk of short circuit caused by the small edge distance between the bent first bent portion 1212 and the fourth region 1412 and being too close to the adjacent oppositely doped region.

[0309] Specifically, the concave depth and the convex depth of the fourth region 1412 are the same, so that the size of the fourth region 1412 in the second direction is the same as that of the third region 1411, which is conducive to better collection of carriers.

[0310] It is understood that in other embodiments, the concave depth of the fourth region 1412 may be greater than the convex depth, or may be less than the convex depth, which is not limited here.

[0311] See also Figure 15 and Figure 16 In some embodiments, in the first direction, the maximum depth H2 of the fourth region 1412 protruding from the third region 1411 on the side facing away from the second region 1312 is 1 μm-500 μm, for example, 1 μm, 2 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 300 μm, 400 μm, or 500 μm.

[0312] In this way, the maximum depth H2 of the fourth region 1412 protruding from the third region 1411 is within an appropriate range, which can avoid the risk of short circuit caused by the small edge distance between the first bend portion 1212 and the fourth region 1412 and the proximity to the adjacent heterogeneous doped region due to the protrusion depth being too small, and can also avoid the poor carrier collection effect caused by the protrusion depth being too large.

[0313] Preferably, the maximum depth H2 of the fourth region 1412 protruding from the third region 1411 on the side facing away from the second region 1312 is 5 μm to 190 μm. Examples include 5 μm, 6 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 180 μm, and 190 μm. This further optimizes the maximum depth of the fourth region 1412 protruding from the third region 1411, balancing short circuit risk and carrier collection, resulting in a better overall effect.

[0314] Specifically, the third region 1411 and the fourth region 1412 have the same width, which is beneficial for better collection of carriers.

[0315] It is understood that in other embodiments, the width W4 of the fourth region 1412 may be smaller than the width W3 of the third region 1411. Figure 14 Alternatively, the width W4 of the fourth region 1412 is greater than the width W3 of the third region 1411, as shown in FIG. Figure 15 No limitation is given here.

[0316] See also Figure 15 and Figure 16 In some embodiments, the second region 1312 protrudes from the first region 1311 on a side facing the fourth region 1412. In the first direction, a difference between a maximum depth H1 of the second region 1312 protruding from the first region 1311 and a maximum depth H2 of the fourth region 1412 protruding from the third region 1411 is 50 μm to 200 μm, for example, 50 μm, 52 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, or 200 μm.

[0317] In this way, the difference between the maximum depth of the protrusion of the second region 1312 and the maximum depth of the protrusion of the fourth region 1412 is within an appropriate range, which can avoid the situation where the maximum depth of the protrusion of the fourth region 1412 is close to the maximum depth of the protrusion of the second region 1312 due to a small difference, the need for adjacent oppositely doped regions to be recessed to avoid each other, and the greater process complexity; it can also avoid the situation where the width of the fourth region 1412 is small, the effect of collecting carriers is poor, and the risk of short circuit is greater due to a large difference.

[0318] Specifically, the maximum depth H2 of the fourth region 1412 protruding from the third region 1411 is the same as the maximum depth of the fourth region 1412 recessed from the third region 1411. This ensures that the difference between the maximum depth of the second region 1312 protruding and the maximum depth of the fourth region 1412 recessed falls within a suitable range. This avoids a situation where a too small difference results in the maximum depth of the recess of the fourth region 1412 being similar to the maximum depth of the protrusion of the second region 1312, resulting in a smaller width of the fourth region 1412 and poor carrier collection. It also avoids a situation where an excessively large difference results in poor coordination between the recess of the fourth region 1412 and the protrusion of the second region 1312, poor space utilization, and poor carrier collection.

[0319] See also Figure 17 、 Figure 18 and Figure 6 In some embodiments, the first polarity fine grid 11 includes a third grid line 113, and the third grid line 113 includes a second main portion 1131 and a second bent portion 1132 connected to each other. The second main portion 1131 extends along the second direction, and the second bent portion 1132 is provided corresponding to the first connecting block 112 and bends from the second main portion 1131 in a direction away from the first connecting block 112.

[0320] The first polarity doping region 13 includes a third doping region 132 . The third doping region 132 includes a fifth region 1321 and a sixth region 1322 . The fifth region 1321 includes the second main portion 1131 of the third gate line 113 . The sixth region 1322 includes the second bending portion 1132 of the third gate line 113 .

[0321] In this way, the third doped region 132 corresponds to the third gate line 113, which facilitates the production of the third gate line 113 on the third doped region 132 and the electrical connection between the third doped region 132 and the third gate line 113, thereby reducing process difficulty, improving production efficiency and reducing costs.

[0322] Specifically, “the second main portion 1131 of the third gate line 113 is disposed in the fifth region 1321 ” means that the second main portion 1131 of the third gate line 113 is in electrical contact with the fifth region 1321 .

[0323] Specifically, “the second bent portion 1132 of the third gate line 113 is disposed in the sixth region 1322 ” means that the second bent portion 1132 of the third gate line 113 is in electrical contact with the sixth region 1322 .

[0324] See also Figure 15 and Figure 16In some embodiments, the sixth region 1322 is recessed from the fifth region 1321 on the side facing the second region 1312. This allows the recessed sixth region 1322 to cooperate with the protruding fourth region 1412, fully utilizing the space and making the arrangement of the doped regions more rational, thereby facilitating better carrier collection and improving the photoelectric conversion efficiency of the battery.

[0325] See also Figure 17 and Figure 18 In some embodiments, the side of the sixth region 1322 facing away from the second region 1312 protrudes from the fifth region 1321 .

[0326] In this way, the sixth region 1322 corresponding to the second bending portion 1132 protrudes from the fifth region 1321 provided with the second main body portion 1131, which can provide sufficient space for the bent second bending portion 1132, thereby reducing the risk of short circuit caused by the small edge distance between the bent second bending portion 1132 and the sixth region 1322 and being too close to the adjacent heterogeneous doped region.

[0327] See also Figure 18 In some embodiments, the side of the sixth region 1322 facing the second region 1312 is recessed from the fifth region 1321 , and the side of the sixth region 1322 facing away from the second region 1312 is protruded from the fifth region 1321 .

[0328] In this way, it is possible to cooperate with the protruding fourth region 1412 to fully utilize the space, making the arrangement of the doping regions more reasonable and conducive to better collection of carriers, and to provide sufficient space for the bent second bend portion 1132, thereby reducing the risk of short circuit caused by the small edge distance between the bent second bend portion 1132 and the sixth region 1322 and being too close to the adjacent oppositely doped region.

[0329] Specifically, the recessed depth and the protruding depth of the sixth region 1322 are the same, so that the size of the sixth region 1322 in the second direction is the same as that of the fifth region 1321, which is conducive to better collection of carriers.

[0330] It is understood that in other embodiments, the concave depth of the sixth region 1322 may be greater than the convex depth or less than the convex depth, which is not limited here.

[0331] See also Figure 18 In some embodiments, the fourth region 1412 protrudes from the third region 1411 on a side facing away from the second region 1312 , and the protrusion depths of the fourth region 1412 and the sixth region 1322 gradually decrease in a direction away from the second region 1312 .

[0332] In this way, the depth of the protrusion gradually decreases in the direction away from the second area 1312, and a transition from protrusion to smoothness can be achieved.

[0333] Specifically, the protrusion depth of the fourth region 1412 is the maximum depth of the protrusion from the third region 1411 on the side of the fourth region 1412 away from the second region 1312 in the first direction in the second doping region 141, that is, Figure 18 The protrusion depth of the sixth region 1322 is the maximum depth of the sixth region 1322 protruding from the fifth region 1321 on the side of the third doping region 1322 facing away from the second region 1312 in the first direction, that is, Figure 18 H3 shown in .

[0334] exist Figure 18 In the example, along the direction away from the edge, the first doping region 131, the second doping region 141, the third doping region 132, and the second doping region 141 are arranged in sequence, and the corresponding protrusion depths gradually decrease.

[0335] See also Figure 18 In some embodiments, for the adjacent second doping region 141 and the third doping region 132 , the fourth region 1412 and the sixth region 1322 satisfy the following formula:

[0336] 50μm≤H2-H3≤200μm;

[0337] H2 is the maximum depth of the fourth region 1412 protruding from the third region 1411 on the side away from the second region 1312 in the first direction, and H3 is the maximum depth of the sixth region 1322 protruding from the fifth region 1321 on the side away from the second region 1312 in the first direction.

[0338] In this way, the difference in the protrusion depths of the adjacent second doping region 141 and the third doping region 132 is within an appropriate range, which can avoid the need to use more doping regions to protrude to achieve a transition from bending to smoothness due to a small difference, increased process complexity, and low production efficiency. It can also avoid the situation where the protrusion depth of one doping region is insufficient, the corresponding bending portion is close to the edge of the doping region, and the risk of short circuit is high due to a large difference.

[0339] Specifically, the value of H2-H3 is, for example, 50 μm, 52 μm, 80 μm, 90 μm, 100 μm, 120 μm, 140 μm, 150 μm, 180 μm, and 200 μm.

[0340] In some embodiments, each row of the first doped regions 131 is continuous. In this way, each row of the first doped regions 131 is not disconnected, thereby improving the power of the back contact battery 10.

[0341] In some embodiments, each row of the second doped regions 141 is continuous, so that each row of the second doped regions 141 is not disconnected, thereby improving the power of the back contact battery 10.

[0342] In some embodiments, the doped region closest to the edge of the silicon substrate 101 is a P region. In this way, the space at the edge can be used to increase the area of ​​the P region, making the P region larger and more convenient for collecting carriers.

[0343] It is understood that in other embodiments, the doped region closest to the edge of the silicon substrate 101 may also be an N region.

[0344] See also Figure 19 and Figure 8 In some embodiments, the second polarity fine gate 12 includes a fourth gate line 122 , the fourth gate line 122 is provided with a second connection block 123 , and the width of the second connection block 123 is greater than the width of the fourth gate line 122 ;

[0345] The second polarity doping region 14 includes a fourth doping region 142 . The fourth doping region 142 includes a seventh region 1421 and an eighth region 1422 . The seventh region 1421 is provided with the fourth gate line 122 , and the eighth region 1422 corresponds to the second connection block 123 .

[0346] In this way, the fourth doped region 142 corresponds to the fourth gate line 122 , which facilitates fabrication of the fourth gate line 122 on the fourth doped region 142 , thereby reducing process difficulty, improving fabrication efficiency, and reducing costs.

[0347] Specifically, “the seventh region 1421 is provided with the fourth gate line 122 ” means that the fourth gate line 122 is in electrical contact with the seventh region 1421 .

[0348] Specifically, "eighth region 1422 corresponds to second connecting block 123" means that, in the thickness direction of back-contact cell 10, second connecting block 123 and eighth region 1422, projected onto the same plane, at least partially overlap. Second connecting block 123 can be in electrical contact with eighth region 1422, or it can be electrically isolated from eighth region 1422.

[0349] See also Figure 19 and Figure 8 In some embodiments, the fourth doped region 142 and the second doped region 141 are the same second polarity doped region 14. Integrating the fourth region 1412 and the eighth region 1422 into the same second polarity doped region 14 enhances the stability of the connection with the second electrical connector. Furthermore, centralized design and manufacturing facilitate improved manufacturing efficiency.

[0350] Please note that when the fourth doping region 142 and the second doping region 141 are the same second polarity doping region 14 , the fourth doping region 142 and the second doping region 141 can be respectively regarded as partial structures of the second polarity doping region 14 .

[0351] It is understood that in other examples, the fourth doping region 142 and the second doping region 141 may also be different second polarity fine gates 12. This is not limited here. Figure 19 In some embodiments, the eighth region 1422 is electrically connected to the second connection block 123 , and the eighth region 1422 protrudes from the seventh region 1421 .

[0352] Thus, the eighth region 1422 corresponding to the second connecting block 123 protrudes from the seventh region 1421 where the fourth gate line 122 is located, providing ample space for the wider second connecting block 123. Furthermore, when the second connecting block 123 is located in the eighth region 1422 and is in electrical contact with the eighth region 1422, the risk of short circuits caused by the narrow distance between the edges of the wider second connecting block 123 and the eighth region 1422, or by proximity to adjacent heterogeneous doped regions, can be reduced.

[0353] Specifically, the side of the eighth region 1422 facing the edge of the back-contact cell 10 may protrude from the seventh region 1421, or the side of the eighth region 1422 facing away from the edge of the back-contact cell 10 may protrude from the seventh region 1421, or both sides of the eighth region 1422 may protrude from the seventh region 1421. This is not limited here.

[0354] It is understood that in other embodiments, the eighth region 1422 may be aligned with the seventh region 1421. The eighth region 1422 may also be recessed from the seventh region 1421. This is not limited here.

[0355] See also Figure 19 In some embodiments, the maximum depth H4 of the eighth region 1422 protruding from the seventh region 1421 is 5 μm-290 μm, for example, 5 μm, 8 μm, 10 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 280 μm, or 290 μm.

[0356] In this way, the maximum depth H4 of the eighth region 1422 protruding from the seventh region 1421 is within an appropriate range, which can avoid insufficient setting area of ​​the second connecting block 123 and greater short circuit risk caused by too small a depth, and can also avoid being unfavorable for collecting carriers of the other polarity due to too large a depth.

[0357] In some embodiments, each row of the fourth doping regions 142 is continuous. In this way, each row of the fourth doping regions 142 is not disconnected, thereby improving the power of the back contact cell 10.

[0358] See also Figure 20 In some embodiments, the fourth gate line 122 includes a third main portion 1221 and a third bent portion 1222 connected to each other. The third main portion 1221 extends along the second direction. The third bent portion 1222 bends from the third main portion 1221 in a direction away from the edge of the silicon substrate 101. The second connecting block 123 is provided on the third bent portion 1222.

[0359] The fourth doped region 142 includes a ninth region 1423 , and the ninth region 1423 defines a third bending portion 1222 .

[0360] In this way, the ninth region 1423 of the fourth doped region 142 corresponds to the third bent portion 1222 of the fourth gate line 122 , which facilitates fabrication of the fourth gate line 122 on the fourth doped region 142 , thereby reducing process difficulty, improving fabrication efficiency, and lowering costs.

[0361] See also Figure 20 In some embodiments, the side of the ninth region 1423 facing away from the eighth region 1422 protrudes from the seventh region 1421 .

[0362] In this way, the ninth region 1423 corresponding to the third bending portion 1222 protrudes from the seventh region 1421 provided with the third main body portion 1221, which can provide sufficient space for the bent third bending portion 1222, thereby reducing the risk of short circuit caused by the small edge distance between the bent third bending portion 1222 and the ninth region 1423 and being too close to the adjacent oppositely doped region.

[0363] See also Figure 21 and Figure 22 In some embodiments, the first polarity fine gate 11 is a positive gate line, and the first polarity fine gate 11 includes a fifth gate line 114 and a sixth gate line 115 , and the spacing L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 is greater than the spacing L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12 .

[0364] In this way, since the spacing between the sixth gate line 115 and the adjacent heterogeneous fine gate in the first direction is greater than the spacing between the fifth gate line 114 and the adjacent heterogeneous fine gate, sufficient space can be reserved on the silicon substrate 101 for setting up the anti-hot spot structure, thereby reducing the risk of short circuit caused by contact between fine gates of different polarities and doped regions.

[0365] Specifically, the spacing L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 is greater than the spacing L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12, meaning that the spacing between the sixth gate line 115 and at least one adjacent second polarity fine gate 12 is greater than the spacing between the fifth gate line 114 and at least one adjacent second polarity fine gate 12. Alternatively, the minimum spacing L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 may be greater than the maximum spacing L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12; or the maximum spacing L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 may be greater than the maximum spacing L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12. This is not limited herein.

[0366] See also Figure 22 and Figure 23 The first polarity doping region 13 includes a fifth doping region 133, the second polarity doping region 14 includes a sixth doping region 143, the fifth doping region 133 includes an overlapping portion 1331 and a non-overlapping portion 1332, the sixth doping region 143 includes a main body 1431 and a protruding portion 1432, the main body 1431 is spaced from the fifth doping region 133, the protruding portion 1432 protrudes from the main body 1431 and overlaps with the overlapping portion 1331; the sixth gate line 115 is arranged in the non-overlapping portion 1332.

[0367] Thus, the protrusion 1432 of the sixth doped region 143 overlaps the overlapping portion 1331 of the fifth doped region 133, forming an anti-hot spot structure. This reduces reverse bias and reduces the heat generated when the back-contact cell 10 becomes a load after being shielded in the module, thereby reducing the risk of hot spots. Furthermore, the fifth gate line 114 is located in the non-overlapping portion 1332, reducing the risk of short circuits caused by contact between fine gates of different polarities and doped regions.

[0368] Specifically, the first sub-gate 114 is disposed outside the non-overlapping portion 1332 .

[0369] Specifically, the body 1431 and the fifth doping region 133 may be separated by a trench, and the body 1431 and the non-overlapping portion 1332 may be separated by a dielectric film layer 1003. This is not limited here.

[0370] Specifically, the shape of the protrusion 1432 can be rectangular, circular, square, triangular or other shapes, which are not limited here.

[0371] Specifically, the sixth gate line 115 is disposed in the non-overlapping portion 1332 , which means that the sixth gate line 115 is in electrical contact with the non-overlapping portion 1332 .

[0372] See also Figure 24 and Figure 25 In some embodiments, the sixth gate line 115 is provided with a third connection block 116 , and a width L3 of the third connection block 116 is greater than a width L4 of the sixth gate line 115 .

[0373] In this way, the contact area between the third connecting block 116 and the first electrical connector can be increased, the pulling force can be increased, the risk of the first electrical connector falling off from the back contact battery 10 can be reduced, and the connection stability between the back contact battery 10 and the first electrical connector can be improved.

[0374] Specifically, the sixth gate line 115 is provided with a third connection block 116 . That is, the third connection block 116 is connected to the sixth gate line 115 .

[0375] Specifically, the third connecting block 116 can pass through the dielectric film layer 1003 to contact the first polarity doped layer. The third connecting block 116 and the first polarity doped layer can also be isolated by the dielectric film layer 1003. The third connecting block 116 can be manufactured together with the sixth gate line 115. The third connecting block 116 and the sixth gate line 115 can also be manufactured in separate steps.

[0376] In one example, the third connecting block 116 and the sixth gate line 115 are made of the same paste, and both are burned through the dielectric film layer 1003 to contact the first polarity doped layer. In another example, the paste of the sixth gate line 115 is burned through the dielectric film layer 1003 to contact the first polarity doped layer, while the paste of the third connecting block 116 is not burned through the dielectric film layer 1003.

[0377] In some embodiments, the third connecting block 116 includes at least one of a pad and a gate line segment. In this way, the third connecting block 116 has various forms, which is conducive to meeting more production scenarios and needs. For example, the third connecting block 116 includes a pad. In another example, the third connecting block 116 includes a gate line segment. In another example, the third connecting block 116 includes a pad and a gate line segment. It can be understood that when the third connecting block 116 includes a gate line segment, the gate line segment passes through the dielectric film layer 1003 to contact the first polarity doped layer. When the third connecting block 116 includes a pad, the pad can pass through the dielectric film layer 1003 to contact the first polarity doped layer, or it can be isolated from the first polarity doped layer by the dielectric film layer 1003.

[0378] Specifically, the third connection block 116 is used to connect the first electrical connection member.

[0379] Furthermore, the third connection block 116 and the first electrical connector can be electrically connected to each other through at least one of conductive adhesive bonding, direct welding, solder paste welding, and physical contact, which is not limited here.

[0380] Furthermore, the entire area of ​​the third connection block 116 may be connected to the first electrical connector. Alternatively, a partial area of ​​the third connection block 116 may be connected to the first electrical connector.

[0381] Specifically, the width L3 of the third connecting block 116 refers to the size of the third connecting block 116 in the first direction. The width L3 of the third connecting block 116 can be the same everywhere, different everywhere, or partially the same. The width L4 of the sixth gate line 115 refers to the size of the sixth gate line 115 in the first direction. The width L4 of the sixth gate line 115 can be the same everywhere, different everywhere, or partially the same.

[0382] Specifically, width L3 of third connecting block 116 is greater than width L4 of sixth gate line 115, meaning that the width of at least one portion of third connecting block 116 is greater than the width of at least one portion of sixth gate line 115. Alternatively, the minimum width of third connecting block 116 may be greater than the maximum width of sixth gate line 115; alternatively, the maximum width of third connecting block 116 may be greater than the maximum width of sixth gate line 115; or alternatively, the maximum width of third connecting block 116 may be greater than the width of the junction between sixth gate line 115 and third connecting block 116. This is not limited herein.

[0383] In some embodiments, the third connection block is formed with a third hollow area, so that the material of the third connection block can be reduced while ensuring the coverage of the third connection block, which is beneficial to improving connection stability and reducing costs.

[0384] In some embodiments, the third connecting block is solid. This allows the area of ​​the third connecting block to be maximized, thereby increasing the contact area between the third connecting block and the electrical connector, increasing the pulling force, reducing the risk of the electrical connector falling off the back-contact battery 10, and improving the connection stability between the back-contact battery 10 and the electrical connector.

[0385] In some embodiments, the third connecting block is rectangular. It is understood that in other embodiments, the third connecting block can be circular, annular, elliptical, triangular, racetrack-shaped, or other shapes. The specific shape of the third connecting block is not limited here.

[0386] See also Figure 21 、 Figure 22 and Figure 24 In some embodiments, the spacing L2 between the sixth gate line 115 and the adjacent second polarity fine grid 12 is a first spacing, the spacing L1 between the fifth gate line 114 and the adjacent second polarity fine grid 12 is a second spacing, and the difference between the first spacing and the second spacing is 0.05 mm to 0.1 mm, for example, 0.05 mm, 0.06 mm, 0.07 mm, 0.08 mm, 0.09 mm, or 0.1 mm.

[0387] In this way, the difference between the first spacing and the second spacing is within an appropriate range, which can avoid insufficient space for setting up the anti-hot spot structure due to a small difference, and can also avoid poor carrier collection effect due to a large difference.

[0388] Specifically, the interval L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 may be equal everywhere, or unequal everywhere, or partially equal and partially unequal.

[0389] Specifically, the interval L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12 may be equal everywhere, or unequal everywhere, or equal in part and unequal in part.

[0390] Specifically, the difference between the first spacing and the second spacing may be a fixed value within a range of 0.05 mm to 0.1 mm, or may fluctuate within a range of 0.05 mm to 0.1 mm.

[0391] See also Figure 21 、 Figure 22 and Figure 24 In some embodiments, the distance L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 is 0.2 mm to 0.8 mm, for example, 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, or 0.8 mm.

[0392] In this way, the distance L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 is within an appropriate range, which can avoid insufficient space for setting the anti-hot spot structure due to too small a distance, and can also avoid poor carrier collection effect due to too large a distance.

[0393] Specifically, the interval L2 between the sixth gate line 115 and the adjacent second polarity fine gate 12 may be a fixed value within the range of 0.2 mm to 0.8 mm, or may fluctuate within the range of 0.2 mm to 0.8 mm.

[0394] See also Figure 21 、 Figure 22 and Figure 24 In some embodiments, the interval L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12 is a second interval of 0.1 mm to 0.7 mm.

[0395] In this way, the distance L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12 is within an appropriate range, which can avoid gate line density and high cost caused by too small a distance, and can also avoid poor carrier collection effect caused by too large a distance.

[0396] Specifically, the interval L1 between the fifth gate line 114 and the adjacent second polarity fine gate 12 may be a fixed value within the range of 0.1 mm to 0.7 mm, or may fluctuate within the range of 0.1 mm to 0.7 mm.

[0397] See also Figure 21In some embodiments, there are multiple sixth gate lines 115 , and the number of fine gates between two adjacent sixth gate lines 115 is 8-35, for example, 8, 10, 12, 15, 19, 20, 22, 25, 28, 30, 32, or 35.

[0398] In this way, the number of fine gates between two adjacent sixth gate lines 115 is within an appropriate range, which can avoid the situation where the number of fine gates between two adjacent sixth gate lines 115 is too small, resulting in a large number of sixth gate lines 115 as a whole and low manufacturing efficiency. It can also avoid the situation where the number of fine gates between two adjacent sixth gate lines 115 is too large, resulting in a poor effect on reducing the risk of hot spots.

[0399] Specifically, in the back contact cell 10, there may be multiple sixth grid lines 115, forming multiple pairs of adjacent sixth grid lines 115. The number of grid lines between the multiple pairs of adjacent sixth grid lines 115 may be the same, different, or partially the same and the rest different.

[0400] See also Figure 21 In some embodiments, the distance L5 between two adjacent sixth gate lines 115 is 6 mm to 16.8 mm, for example, 6 mm, 7 mm, 8 mm, 10 mm, 12 mm, 14 mm, 15 mm, 16 mm, or 16.8 mm.

[0401] In this way, the distance L5 between two adjacent sixth gate lines 115 is within an appropriate range, which can avoid the overall large number of sixth gate lines 115 and low manufacturing efficiency caused by too small a distance, and can also avoid the overall poor effect of reducing the risk of hot spots caused by too large a distance.

[0402] Specifically, in the back contact cell 10, there may be multiple sixth busbars 115, forming multiple pairs of adjacent sixth busbars 115. The intervals L5 between the multiple pairs of adjacent sixth busbars 115 may be the same, different, or partially the same and the rest different.

[0403] See also Figure 23 and 25 In some embodiments, in the first direction, the depth L6 of the protrusion 1432 protruding from the body 1431 is 40 μm-500 μm, for example, 40 μm, 42 μm, 44 μm, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 200 μm, 250 μm, 300 μm, 350 μm, 400 μm, 450 μm, 480 μm, or 500 μm.

[0404] In this way, the depth L6 of the protrusion 1432 protruding from the main body 1431 is within an appropriate range, which can avoid the situation where the protrusion depth is too small, resulting in insufficient contact area with the fifth doped region 133 or even difficulty in contacting the fifth doped region 133, and poor effect in reducing the risk of hot spots. It can also avoid the situation where the protrusion depth is too large, resulting in a close distance to the sixth gate line 115 and a greater risk of short circuit.

[0405] Specifically, the depth L6 of the protrusion 1432 protruding from the main body 1431 can be a fixed value within the range of 40 μm to 500 μm, or can fluctuate within the range of 40 μm to 500 μm, which is not limited here.

[0406] See also Figure 23 and 25 The width L7 of the overlapping portion 1331 is 45 μm-500 μm, for example, 45 μm, 48 μm, 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm, 350 μm, 400 μm, 450 μm, 480 μm, and 500 μm.

[0407] In this way, the width L7 of the overlapping portion 1331 is within an appropriate range, which can avoid the poor effect of reducing the risk of hot spots due to a too small width, and can also avoid the sixth gate line 115 being too close to the heterogeneous doped region and the greater risk of short circuit due to an excessive width.

[0408] Specifically, the width L7 of the overlapping portion 1331 refers to the dimension of the overlapping portion 1331 in the first direction.

[0409] Specifically, the width L7 of the overlapping portion 1331 may be a fixed value within a range of 45 μm to 500 μm, or may fluctuate within a range of 45 μm to 500 μm, which is not limited here.

[0410] See also Figure 23 and 25 The length L8 of the overlapping portion 1331 is 10 μm-2000 μm, for example, 10 μm, 12 μm, 50 μm, 100 μm, 300 μm, 500 μm, 800 μm, 1000 μm, 1200 μm, 1500 μm, 1800 μm, and 2000 μm.

[0411] In this way, the length L8 of the overlapping portion 1331 is within an appropriate range, which can avoid the poor effect of reducing the risk of hot spots caused by excessive or insufficient length.

[0412] Specifically, the length L8 of the overlapping portion 1331 may be a fixed value within a range of 10 μm to 2000 μm, or may fluctuate within a range of 10 μm to 2000 μm, which is not limited herein.

[0413] See also Figure 23 and25 The ratio of the width of the overlapping portion 1331 to the width of the fifth doping region 133 is less than or equal to 85%, for example, 85%, 83%, 80%, 75%, 70%, 60%, 50%, 40%, 30%, 20%, 10%, 8%, 5%, 1%, or 0.1%.

[0414] In this way, the width ratio of the overlapping portion 1331 to the fifth doped region 133 is within an appropriate range, which can avoid the poor effect of reducing the risk of hot spots caused by a too small ratio, and can also avoid the sixth gate line 115 being too close to the oppositely doped region and the greater risk of short circuit caused by an excessively large ratio.

[0415] Specifically, the width of the fifth doping region 133 refers to the size of the fifth doping region 133 in the first direction.

[0416] See also Figure 23 and 25 The distance L9 between the protrusion 1432 and the third connection block 116 is greater than or equal to 50 μm, for example, 50 μm, 52 μm, 60 μm, 100 μm, 200 μm, 300 μm, 400 μm, 480 μm, or 500 μm.

[0417] In this way, the distance L9 between the protrusion 1432 and the third connecting block 116 is within an appropriate range, which can avoid the greater short circuit risk caused by too small a distance, and can also avoid the poor effect of reducing the hot spot risk caused by too large a distance.

[0418] Specifically, the distance L9 between the protrusion 1432 and the third connection block 116 may be a fixed value within a range greater than or equal to 50 μm, or may fluctuate within a range greater than or equal to 50 μm, which is not limited here.

[0419] Please note that in the description of this specification, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. For example, Figure 26 and Figure 27 In the embodiment, the features of multiple embodiments or examples above are combined.

[0420] The battery assembly of the embodiment of the present application includes any one of the above-mentioned back-contact batteries 10.

[0421] In the battery assembly of the embodiment of the present application, since the width of the first connecting block 112 in the back-contact battery 10 is greater than the width of the first grid line 111 and the length is greater than or equal to 100 μm, the contact area between the first connecting block 112 and the electrical connector can be increased, thereby increasing the pulling force, reducing the risk of the electrical connector falling off the back-contact battery 10, and improving the connection stability between the back-contact battery 10 and the electrical connector. At the same time, since the first bent portion 1212 in the second grid line 121 bends away from the first main portion 1211 in a direction away from the first connecting block 112, more space can be provided for the first connecting block 112 with a larger width, facilitating the widening of the first connecting block 112 and reducing the risk of short circuits caused by the small distance between the electrodes of the two polarities.

[0422] In this embodiment, multiple back-contact cells 10 in the battery assembly can be connected in series in sequence to form a battery string, thereby realizing the series bus output of the current. For example, the series connection of the battery cells can be realized by setting welding strips (bus bars, interconnecting bars), conductive back plates, etc.

[0423] It is understood that in such an embodiment, the battery assembly may further include a metal frame, a backsheet, photovoltaic glass, and an adhesive film. The adhesive film may be placed between the front and back surfaces of the back-contact battery 10, the photovoltaic glass, adjacent cells, and the like. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the adhesive film may be EVA film or POE film. The specific choice may be based on actual conditions and is not limited here.

[0424] Photovoltaic glass can cover the adhesive film on the front surface of the back-contact cell 10. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and excellent physical, mechanical, and optical properties. For example, ultra-clear glass can have a light transmittance of over 92%, protecting the back-contact cell 10 while minimizing the impact on the efficiency of the back-contact cell 10. The adhesive film can also bond the photovoltaic glass and the back-contact cell 10 together, providing sealing, insulation, and waterproofing of the back-contact cell 10.

[0425] A backsheet can be attached to the film on the back of the back-contact cell 10. The backsheet protects and supports the back-contact cell 10, offering reliable insulation, water resistance, and aging resistance. A variety of backsheet options are available, typically including tempered glass, organic glass, and aluminum alloy TPT composite film. The specific configuration depends on the specific situation and is not limited here. The backsheet, back-contact cell 10, film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the primary external support structure for the entire cell assembly and provides stable support and installation for the cell assembly. For example, the metal frame can be used to mount the cell assembly in the desired location.

[0426] The photovoltaic system of the embodiment of the present application includes the above-mentioned battery assembly.

[0427] In the photovoltaic system of the embodiment of the present application, since the width of the first connecting block 112 in the back-contact cell 10 is greater than the width of the first grid line 111 and the length is greater than or equal to 100 μm, the contact area between the first connecting block 112 and the electrical connector can be increased, thereby increasing the pulling force, reducing the risk of the electrical connector falling off the back-contact cell 10, and improving the connection stability between the back-contact cell 10 and the electrical connector. At the same time, since the first bent portion 1212 in the second grid line 121 bends away from the first main portion 1211 in a direction away from the first connecting block 112, more space can be provided for the first connecting block 112 with a larger width, facilitating the widening of the first connecting block 112 and reducing the risk of short circuits caused by the small distance between the electrodes of the two polarities.

[0428] In this embodiment, the photovoltaic system can be applied to photovoltaic power stations, such as ground power stations, rooftop power stations, water surface power stations, etc., and can also be applied to equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array can be an array combination of multiple battery modules. For example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter to be converted into the alternating current required by the mains power grid and then connected to the mains power network to achieve solar power supply.

[0429] Throughout this specification, reference to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with an embodiment or example is included in at least one embodiment or example of the present application. In this specification, the illustrative use of the above terms does not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0430] In addition, the above is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A back contact battery, characterized in that: include: Silicon substrate; A plurality of first polarity fine gates and a plurality of second polarity fine gates are disposed on the silicon substrate and arranged along a first direction, wherein the first polarity fine gates and the second polarity fine gates are spaced apart; The first polarity fine gate includes a first gate line, the first gate line is provided with a first connection block, the width of the first connection block is greater than the width of the first gate line, and the length of the first connection block is greater than or equal to 100 μm; The second polarity fine grid includes a second grid line, and the second grid line includes a first main body and a first bending portion connected to each other. The first main body extends along a second direction, and the second direction intersects with the first direction. The first bending portion is arranged corresponding to the first connecting block and bends from the first main body to a direction away from the first connecting block.

2. The back contact cell according to claim 1, characterized in that: The difference between the width of the first connection block and the width of the first gate line is 5 μm-290 μm.

3. The back contact cell according to claim 1, characterized in that: A maximum distance between the first bending portion and the first main body portion in the first direction is 5 μm-290 μm.

4. The back contact cell according to claim 1, characterized in that: The first gate line, the first connecting block and the second gate line satisfy the following formula: -100μm≤w1-w2-d1≤100μm; Wherein, w1 is the width of the first connecting block, w2 is the width of the first gate line, and d1 is the maximum distance between the first bending portion and the first main body portion in the first direction.

5. The back contact cell according to claim 1, characterized in that: The first gate line is a first polarity thin gate closest to the edge of the silicon substrate, and the distance between the first gate line and the edge is 0.4 mm-1 mm.

6. The back contact cell according to claim 1, characterized in that: The distance from the first connecting block to the edge is 0.4 mm-50 mm.

7. The back contact cell according to claim 1, characterized in that: The first polarity fine grid includes a third grid line, and the third grid line includes a second main body and a second bent portion connected to each other, the second main body extends along the second direction, and the second bent portion is arranged corresponding to the first connecting block and bends from the second main body to a direction away from the first connecting block.

8. The back contact battery according to claim 7, characterized in that: Along the direction away from the first connecting block, the bending depths of the first bending portion and the second bending portion gradually decrease.

9. The back contact cell according to claim 7, characterized in that: For the adjacent second gate line and the third gate line, the first bending portion and the second bending portion satisfy the following formula: 50μm≤d1-d2≤150μm; Wherein, d2 is the maximum distance between the second bending portion and the second main body portion in the first direction, and d1 is the maximum distance between the first bending portion and the first main body portion in the first direction.

10. The back contact cell according to claim 1, characterized in that: The first gate lines and the first connecting blocks disposed on the first gate lines form a first conductive structure, and each row of the first conductive structures is continuous; And / or, each row of the second gate lines is continuous.

11. The back contact cell according to claim 10, characterized in that: The first connection block includes at least one of a pad and a gate line segment.

12. The back contact cell according to claim 10, characterized in that: The first connecting block is formed with a hollow area; Alternatively, the first connecting block is solid.

13. The back contact cell according to claim 1, characterized in that: The second polarity fine gate includes a fourth gate line, the fourth gate line is provided with a second connection block, and the width of the second connection block is greater than the width of the fourth gate line.

14. The back contact cell according to claim 13, characterized in that: The difference between the width of the second connection block and the width of the fourth gate line is 5 μm-290 μm.

15. The back contact cell according to claim 13, characterized in that: The difference between the area of ​​the first connection block and the area of ​​the second connection block is -400 μm 2 ~400μm 2 .

16. The back contact cell according to claim 13, characterized in that The first polarity grid line adjacent to the second connection block is disconnected at a position corresponding to the second connection block to avoid the second connection block. In the second direction, the distance between the breakpoint of the second connection block and the first grid line is 0.2 mm-1 mm.

17. The back contact cell according to claim 13, characterized in that: The fourth gate line is a second polarity fine gate closest to the edge of the silicon substrate, and the distance between the fourth gate line and the edge is greater than 0.7 mm-1.3 mm.

18. The back contact cell according to claim 13, characterized in that The distance between the second connecting block and the edge of the silicon substrate is 0.7 mm-50 mm.

19. The back contact cell according to claim 13, characterized in that: The fourth gate line is a second polarity fine gate closest to the edge of the silicon substrate, and the second connecting block is located on a side of the fourth gate line facing the edge.

20. The back contact cell according to claim 13, characterized in that The second connecting block protrudes from the fourth gate line toward two sides of the fourth gate line.

21. The back contact cell according to claim 13, characterized in that The fourth gate line includes a third main body and a third bending portion connected to each other, the third main body extends along the second direction, the third bending portion bends from the third main body toward a direction away from an edge of the silicon substrate, and the second connecting block is disposed at the third bending portion.

22. The back contact cell according to claim 21, characterized in that A maximum distance between the third bending portion and the third main body portion in the first direction is 5 μm-290 μm.

23. The back contact cell according to claim 13, characterized in that The fourth gate line and the second gate line are the same second polarity fine gate.

24. The back contact cell according to claim 13, characterized in that The fourth gate line and the second connecting block disposed on the fourth gate line form a second conductive structure, and each row of the second conductive structure is continuous.

25. The back contact cell according to claim 13, characterized in that The second connection block includes at least one of a pad and a gate line segment.

26. The back contact cell according to claim 13, characterized in that The second connecting block is formed with a hollow area; Alternatively, the second connecting block is solid.

27. The back contact cell according to claim 1, characterized in that The silicon substrate comprises a plurality of first polarity doping regions and a plurality of second polarity doping regions arranged along the first direction, the first polarity doping regions are provided with the first polarity fine gates, and the second polarity doping regions are provided with the second polarity fine gates; The first polarity doping region includes a first doping region, the first doping region includes a first area and a second area, the first area is provided with the first gate line, and the second area corresponds to the first connecting block; The second polarity doping region includes a second doping region, the second doping region includes a third region and a fourth region, the third region is provided with the first main body of the second gate line, and the fourth region is provided with the first bending portion of the second gate line.

28. The back contact cell according to claim 27, characterized in that The second area protrudes from the first area.

29. The back contact cell according to claim 28, characterized in that In the first direction, a maximum depth of the second region protruding from the first region is 5 μm-290 μm.

30. The back contact cell according to claim 27, characterized in that A side of the fourth region facing away from the second region protrudes from the third region.

31. The back contact cell according to claim 30, characterized in that In the first direction, a maximum depth of the fourth region protruding from the third region is 1 μm-500 μm.

32. The back contact cell according to claim 30, characterized in that The second region protrudes from the first region toward a side of the fourth region. In the first direction, a difference between a maximum depth of the second region protruding from the first region and a maximum depth of the fourth region protruding from the third region is 50 μm-200 μm.

33. The back contact cell according to claim 27, characterized in that The first polarity fine grid includes a third grid line, the third grid line includes a second main body portion and a second bent portion connected to each other, the second main body portion extends along the second direction, the second bent portion is arranged corresponding to the first connecting block, and bends from the second main body portion to a direction away from the first connecting block; The first polarity doping region includes a third doping region, the third doping region includes a fifth region and a sixth region, the fifth region is provided with a second main body portion of the third gate line, and the sixth region is provided with the second bending portion of the third gate line.

34. The back contact cell according to claim 33, characterized in that A side of the sixth region facing away from the second region protrudes from the fifth region.

35. The back contact cell according to claim 34, characterized in that The fourth region protrudes from the third region on a side facing away from the second region, and the protrusion depths of the fourth region and the sixth region gradually decrease in a direction away from the second region.

36. The back contact cell according to claim 35, characterized in that For the adjacent second doping region and the third doping region, the fourth region and the sixth region satisfy the following formula: 50μm≤H2-H3≤200μm; Among them, H2 is the maximum depth of the fourth region protruding from the third region on the side away from the second region in the first direction, and H3 is the maximum depth of the sixth region protruding from the fifth region on the side away from the second region in the first direction.

37. The back contact cell according to claim 27, characterized in that The first doped regions in each row are continuous; And / or, the second doping regions in each row are continuous.

38. The back contact cell according to claim 27, characterized in that The doped region closest to the edge of the silicon substrate is a P region.

39. The back contact cell according to claim 27, characterized in that The second polarity fine grid includes a fourth grid line, the fourth grid line is provided with a second connection block, and the width of the second connection block is greater than the width of the fourth grid line; The second polarity doping region includes a fourth doping region, the fourth doping region includes a seventh region and an eighth region, the seventh region is provided with the fourth gate line, and the eighth region corresponds to the second connecting block.

40. The back contact cell according to claim 39, characterized in that The eighth region protrudes from the seventh region.

41. The back contact cell according to claim 40, characterized in that The maximum depth of the eighth region protruding from the seventh region is 5 μm-290 μm.

42. The back contact cell according to claim 39, characterized in that The fourth doping region and the second doping region are the same second polarity doping region.

43. The back contact cell according to claim 39, characterized in that The fourth doping regions in each row are continuous.

44. The back contact cell according to claim 39, characterized in that The fourth gate line includes a third main body portion and a third bending portion connected to each other, the third main body portion extends along the second direction, the third bending portion bends from the third main body portion in a direction away from the edge of the silicon substrate, and the second connecting block is provided at the third bending portion; The fourth doping region includes a ninth area, and the third bending portion is disposed in the ninth area.

45. The back contact cell according to claim 44, characterized in that A side of the ninth region facing away from the eighth region protrudes from the seventh region.

46. ​​The back contact cell according to claim 1, characterized in that The first polarity fine grid is a positive grid line, and the first polarity fine grid includes a fifth grid line and a sixth grid line, and the spacing between the sixth grid line and an adjacent second polarity fine grid is greater than the spacing between the fifth grid line and an adjacent second polarity fine grid.

47. The back contact cell according to claim 46, characterized in that The sixth gate line is provided with a third connection block, and the width of the third connection block is greater than the width of the sixth gate line.

48. The back contact cell according to claim 46, characterized in that The spacing between the sixth grid line and the adjacent second polarity fine grid is a first spacing, the spacing between the fifth grid line and the adjacent second polarity fine grid is a second spacing, and the difference between the first spacing and the second spacing is 0.05-0.1 mm.

49. A battery assembly, characterized in that: A back contact battery comprising any one of claims 1-48.

50. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 49.

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