TBC battery and preparation method thereof

Abstract

The invention provides a TBC battery and a preparation method thereof. The preparation method comprises the following steps: providing a carrying disc with hollow parts, wherein the shape and the distribution mode of the hollow parts are the same as those of a preset doped polycrystalline silicon region; placing the silicon wafer on a carrying disc, placing the carrying disc under oxygen, and forming a tunneling oxide layer on the silicon wafer in a region corresponding to the hollow part; placing the carrier plate in an evaporator, and evaporating a polycrystalline silicon layer on the surface of the tunneling oxide layer; first doped slurry and second doped slurry are printed on the surface of the polycrystalline silicon layer, then annealing treatment is carried out, a first doped polycrystalline silicon layer and a second doped polycrystalline silicon layer are obtained, and the polarity of the first doped polycrystalline silicon layer is opposite to that of the second doped polycrystalline silicon layer. According to the invention, the crossed tunneling layer and polycrystalline silicon layer are directly evaporated on the back surface of the cell by using the carrier plate with the hollow part and the evaporation equipment, then doping is carried out, a mask process and laser grooving are not needed, and damage is reduced by cleaning and etching.

Description

Technical Field

[0001] The present invention mainly relates to the technical field of solar cells, and in particular to a TBC cell and a preparation method thereof. Background Art

[0002] Back contact cells (BC) move the PN junction and metal contact to the back of the cell, so that there is no electrode blocking the front, and the cell absorbs sunlight over a larger area, thereby improving conversion efficiency and generating more electricity. TBC cells, which are formed by combining BC technology with Topcon (tunneling oxide passivation contact cell technology), are attracting more attention from major manufacturers.

[0003] At present, the manufacturing process of TBC cells is basically: alkali polishing, deposition of the first tunnel oxide layer and the first polysilicon layer on the back, boron diffusion (boron doping to form a mask BSG layer), first grooving and cleaning, deposition of the second tunnel oxide layer and the second polysilicon layer on the back, phosphorus doping to form a mask PSG layer, second grooving, cleaning and texturing on both sides, deposition of an aluminum oxide layer on the back, deposition of an anti-reflection film on the back and front, screen printing, sintering, and testing and sorting. Repeated laser grooving, cleaning, and etching during the production process of the above solution will damage the polysilicon and substrate, affecting the power generation efficiency of the cell. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a TBC battery and a method for preparing the same, so as to solve the problem that the existing preparation method includes repeated laser grooving and cleaning and etching, which may damage the polysilicon and the substrate.

[0005] To solve the above technical problems, the present invention provides a method for preparing a TBC battery, comprising: providing a carrier having a hollow portion, wherein the shape and distribution of the hollow portion are the same as those of a preset doped polysilicon area; placing a silicon wafer on the carrier, placing the carrier under oxygen, and forming a tunneling oxide layer on the silicon wafer in the area corresponding to the hollow portion; placing the carrier in an evaporator, and evaporating a polysilicon layer on the surface of the tunneling oxide layer; printing a first doping slurry and a second doping slurry on the surface of the polysilicon layer, respectively, and then performing annealing to obtain a first doped polysilicon layer and a second doped polysilicon layer, wherein the first doped polysilicon layer and the second doped polysilicon layer have opposite polarities.

[0006] Optionally, the first doping paste and the second doping paste are respectively printed on the surface of the polysilicon layer by screen printing.

[0007] Optionally, the method further includes: using an acidic solution to remove the first doping slurry and the second doping slurry remaining on the silicon wafer after the annealing treatment.

[0008] Optionally, the method further includes: texturing the front side of the silicon wafer or texturing both sides of the silicon wafer after the annealing treatment.

[0009] Optionally, the method further comprises: forming a passivation layer and an anti-reflection layer on both sides of the silicon wafer after the annealing treatment.

[0010] Optionally, the anti-reflection layer includes a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer or a combination of the above film layers.

[0011] Optionally, the thickness of the tunnel oxide layer is 1-2 nm, and the thickness of the polysilicon layer is 100-300 nm.

[0012] Optionally, the annealing temperature of the annealing treatment is 700-1000° C., and the annealing time is 10-100 min.

[0013] Optionally, the first doping paste is a boron-doped paste, and the second doping paste is a phosphorus-doped paste.

[0014] In order to solve the above technical problems, the present invention provides a TBC battery, comprising: a silicon wafer, a first passivation structure, a second passivation structure, a first electrode and a second electrode; the first passivation structure and the second passivation structure are located on the back side of the silicon wafer in a cross shape, the first passivation structure comprises a tunneling oxide layer and a first doped polysilicon layer, and the second passivation structure comprises a tunneling oxide layer and a second doped polysilicon layer; wherein the first passivation structure and the second passivation structure are obtained by the preparation method of the TBC battery as described above.

[0015] Compared with the prior art, the present invention has the following advantages:

[0016] The preparation method of the TBC battery of the present application utilizes a carrier plate with a hollow portion and an evaporation device to directly evaporate a cross-shaped tunneling layer and a polysilicon layer on the back of the battery and then perform doping, without the need for a mask process and laser grooving, cleaning and etching to reduce damage; the polysilicon layer is generated by evaporation, and the evaporated polysilicon film has a strong bonding force and good film quality, and can better block impurity atoms from entering the substrate during the subsequent diffusion process, reduce Auger recombination, and at the same time can increase the deposition rate of polysilicon and reduce the process time of polysilicon. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings:

[0018] Figure 1 Schematic diagram of the structure of a TBC battery according to an embodiment of the present invention.

[0019] Figure 2is a flow chart of a method for preparing a TBC battery according to an embodiment of the present invention.

[0020] Figure 3 yes Figure 2 Flow chart of the method for preparing the TBC battery of the optimized embodiment. DETAILED DESCRIPTION

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0022] Figure 1 Schematic diagram of the structure of a TBC battery according to an embodiment of the present invention. Figure 1 As shown, the TBC cell 100 includes: a silicon wafer 1, a first passivation structure, a second passivation structure, a first electrode 7 and a second electrode 8. The first passivation structure includes a tunneling oxide layer 2 and a first doped polysilicon layer 3, and the second passivation structure includes a tunneling oxide layer 2 and a second doped polysilicon layer 4. The first passivation structure and the second passivation structure are located on the back of the silicon wafer in a cross shape. The first electrode 7 is electrically connected to the first doped polysilicon layer 3, and the second electrode 8 is electrically connected to the second doped polysilicon layer 4.

[0023] Optionally, the TBC cell 100 further includes an aluminum oxide layer 5 and a silicon nitride layer 6 .

[0024] The existing manufacturing method of the first passivation structure and the second passivation structure is to deposit the first tunnel oxide layer and the first polysilicon layer on the back, diffuse boron (boron doping to form a mask BSG layer), laser grooving and cleaning for the first time; deposit the second tunnel oxide layer and the second polysilicon layer on the back, dope phosphorus to form a mask PSG layer, laser grooving and cleaning for the second time. The repeated laser grooving + cleaning and etching in the production process of the above scheme will cause certain damage to the polysilicon and the substrate, which will reduce the conversion efficiency of the battery.

[0025] The present application provides a method for preparing a TBC battery, which utilizes a carrier plate with a hollow portion and an evaporation device to directly evaporate a cross-shaped tunneling layer and a polysilicon layer on the back of the battery and then perform doping, without the need for a mask process and laser grooving, cleaning and etching to reduce damage.

[0026] Figure 2 FIG. 1 is a flow chart of a method for preparing a TBC battery according to an embodiment of the present invention. Figure 2 As shown, the method 200 for preparing a TBC battery includes:

[0027] Step S21: providing a carrier having a hollow portion, wherein the shape and distribution of the hollow portion are the same as those of the preset doped polysilicon region.

[0028] In some embodiments, the hollow portion is a plurality of cross-shaped rectangles.

[0029] Step S22: placing the silicon wafer on a carrier, placing the carrier under oxygen, and forming a tunneling oxide layer on the silicon wafer in the area corresponding to the hollow portion.

[0030] Optionally, before placing the silicon wafer on the carrier, the silicon wafer is polished, a first doped polysilicon region and a second doped polysilicon region are demarcated on one side of the polished silicon wafer, and the silicon wafer is placed on the carrier so that the first doped polysilicon region and the second doped polysilicon region completely overlap with the hollow portion.

[0031] The carrier is placed in an oxygen atmosphere to oxidize the silicon wafer in the first doped polysilicon region and the second doped polysilicon region to form a tunneling oxide layer.

[0032] Optionally, nitrous oxide is used as a reaction gas and plasma-deposited on the surface of a silicon wafer under high temperature to form a tunneling oxide layer. The reaction temperature of this step is 400-550°C, the reaction time is 80-120s, the nitrous oxide flow rate is 10000-13000sccm, and the thickness of the prepared tunneling layer is 1-2nm.

[0033] Step S23: placing the carrier in an evaporation machine, and evaporating a polysilicon layer on the surface of the tunnel oxide layer.

[0034] Optionally, the polysilicon layer is an intrinsic amorphous silicon layer, and the thickness of the intrinsic amorphous silicon layer is 100-300 nm.

[0035] Vacuum evaporation, or evaporation for short, refers to a process in which a coating material (or film material) is evaporated and gasified by a certain heating evaporation method under vacuum conditions, and the particles fly to the surface of the substrate and condense into a film. Evaporation is an earlier and more widely used vapor deposition technology, with the advantages of simple film formation method, high film purity and density, and unique film structure and performance.

[0036] The present application generates a polysilicon layer by evaporation. The evaporated polysilicon film has strong bonding force and good film quality. It can better block impurity atoms from entering the substrate during subsequent diffusion and reduce Auger recombination. At the same time, it can increase the deposition rate of polysilicon and reduce the process time of polysilicon.

[0037] Step S24: printing a first doping paste and a second doping paste on the surface of the polysilicon layer respectively, and then performing annealing at a high temperature to obtain a first doped polysilicon layer and a second doped polysilicon layer, wherein the first doped polysilicon layer and the second doped polysilicon layer have opposite polarities.

[0038] The first doping paste includes but is not limited to boron-doped paste, and the second doping paste includes but is not limited to phosphorus-doped paste.

[0039] Optionally, the boron-doped slurry and the phosphorus-doped slurry are respectively printed on the surface of the polysilicon layer by screen printing, and then annealed at a high temperature, wherein the annealing temperature is 700-1000° C. and the annealing time is 10-100 min.

[0040] Optionally, the method further includes removing the first doping slurry and the second doping slurry remaining on the silicon wafer after the annealing treatment by using an acidic solution. The acidic solution includes but is not limited to hydrofluoric acid.

[0041] Optionally, the method further includes step S25: screen printing and sintering on the back side of the silicon wafer to form a metallized electrode.

[0042] Figure 3 yes Figure 2 Flow chart of the method for preparing the TBC battery of the optimized embodiment. Figure 3 As shown, the method 300 for preparing a TBC battery includes:

[0043] Step S31: providing a carrier having a hollow portion, wherein the shape and distribution of the hollow portion are the same as those of the preset doped polysilicon region;

[0044] Step S32: placing the silicon wafer on a carrier, placing the carrier under oxygen, and forming a tunneling oxide layer on the silicon wafer in the area corresponding to the hollow portion;

[0045] Step S33: placing the carrier in a vapor deposition machine, and vapor-depositing a polysilicon layer on the surface of the tunnel oxide layer;

[0046] Step S34: printing a first doping paste and a second doping paste on the surface of the polysilicon layer respectively, and then performing annealing at a high temperature to obtain a first doped polysilicon layer and a second doped polysilicon layer, wherein the first doped polysilicon layer and the second doped polysilicon layer have opposite polarities.

[0047] Step S35: texturing the front side of the silicon wafer or texturing both sides of the silicon wafer after the annealing treatment.

[0048] Step S36: forming a passivation layer and an anti-reflection layer on both sides of the silicon wafer.

[0049] Optionally, the passivation layer is an aluminum oxide layer. Trimethylaluminum (TMA) and water are used as precursor vapors to perform an atomic layer deposition reaction on the surface, forming nano-scale Al2O3 on the front side of the silicon wafer, providing an excellent surface passivation effect and increasing the open circuit voltage.

[0050] Optionally, the anti-reflection layer includes a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer, or a combination of the above film layers.

[0051] Taking the anti-reflection layer as a silicon nitride layer as an example, nitrogen and silane gases are ionized by a high-frequency power supply and deposited on the front side of the silicon wafer to form a silicon nitride film, while enhancing passivation and reducing light reflection.

[0052] Step S37: screen printing and sintering on the back of the silicon wafer to form a metallized electrode.

[0053] Flowcharts are used in the present application to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0054] The basic concepts have been described above. Obviously, for those skilled in the art, the above invention disclosure is only used as an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0055] As shown in this application, unless the context clearly indicates an exception, the words "a", "an", "a kind" and / or "the" do not refer to the singular, but also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0056] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the application. Meanwhile, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to actual proportional relationships. The technology, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, methods and equipment should be considered as a part of the specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0057] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0058] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0059] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.

[0060] It should be understood that when a component is referred to as being "on another component," "connected to another component," "coupled to another component," or "contacting another component," it may be directly on, connected to, coupled to, or contacting the other component, or there may be intervening components. In contrast, when a component is referred to as being "directly on another component," "directly connected to," "directly coupled to," or "directly contacting" another component, there are no intervening components. Similarly, when a first component is referred to as being "electrically in contact with" or "electrically coupled to" a second component, there is an electrical path between the first component and the second component that allows current to flow. The electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even without direct contact between conductive components.

[0061] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0062] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of the present application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the subject of the present application requires more features than the features mentioned. In fact, the features of the embodiment are less than all the features of the single embodiment disclosed above.

[0063] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining the digits. Although the numerical domains and parameters used to confirm the breadth of the range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values ​​is as accurate as possible within the feasible range.

[0064] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the present application.

Claims

1. A method for preparing a TBC battery, characterized in that: include: Providing a carrier having a hollow portion, wherein the shape and distribution of the hollow portion are the same as those of the preset doped polysilicon region; Placing a silicon wafer on the carrier, placing the carrier under oxygen, and forming a tunneling oxide layer on the silicon wafer in the area corresponding to the hollow portion; Placing the carrier in an evaporator, and evaporating a polysilicon layer on the surface of the tunnel oxide layer; A first doping paste and a second doping paste are printed on the surface of the polysilicon layer respectively, and then annealing is performed to obtain a first doped polysilicon layer and a second doped polysilicon layer, wherein the first doped polysilicon layer and the second doped polysilicon layer have opposite polarities.

2. The method for preparing a TBC battery according to claim 1, characterized in that: The first doping paste and the second doping paste are respectively printed on the surface of the polysilicon layer in a screen printing manner.

3. The method for preparing a TBC battery according to claim 1, characterized in that: Also includes: The acidic solution is used to remove the first doping slurry and the second doping slurry remaining on the silicon wafer after the annealing treatment.

4. The method for preparing a TBC battery according to claim 1, characterized in that: Also includes: The front side of the silicon wafer or the double sides of the silicon wafer are textured after annealing.

5. The method for preparing a TBC battery according to claim 1, characterized in that: Also includes: A passivation layer and an anti-reflection layer are formed on both sides of the silicon wafer after annealing.

6. The method for preparing a TBC battery according to claim 5, characterized in that: The anti-reflection layer includes a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer or a combination of the above film layers.

7. The method for preparing a TBC battery according to claim 1, characterized in that: The thickness of the tunnel oxide layer is 1-2 nm, and the thickness of the polysilicon layer is 100-300 nm.

8. The method for preparing a TBC battery according to claim 1, characterized in that: The annealing temperature of the annealing treatment is 700-1000° C., and the annealing time is 10-100 min.

9. The method for preparing a TBC battery according to any one of claims 1 to 8, characterized in that: The first doping paste is a boron-doped paste, and the second doping paste is a phosphorus-doped paste.

10. A TBC battery, characterized in that: include: A silicon wafer, a first passivation structure, a second passivation structure, a first electrode, and a second electrode; The first passivation structure and the second passivation structure are located on the back side of the silicon wafer in a cross shape, the first passivation structure includes a tunneling oxide layer and a first doped polysilicon layer, and the second passivation structure includes a tunneling oxide layer and a second doped polysilicon layer; Wherein, the first passivation structure and the second passivation structure are obtained by the preparation method of the TBC battery according to any one of claims 1 to 9.

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